CN107170830B - Thin film transistor, manufacturing method thereof and display device - Google Patents

Thin film transistor, manufacturing method thereof and display device Download PDF

Info

Publication number
CN107170830B
CN107170830B CN201710438465.9A CN201710438465A CN107170830B CN 107170830 B CN107170830 B CN 107170830B CN 201710438465 A CN201710438465 A CN 201710438465A CN 107170830 B CN107170830 B CN 107170830B
Authority
CN
China
Prior art keywords
layer
insulating layer
thin film
film transistor
source drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710438465.9A
Other languages
Chinese (zh)
Other versions
CN107170830A (en
Inventor
张帅
李栋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201710438465.9A priority Critical patent/CN107170830B/en
Publication of CN107170830A publication Critical patent/CN107170830A/en
Application granted granted Critical
Publication of CN107170830B publication Critical patent/CN107170830B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1292Multistep manufacturing methods using liquid deposition, e.g. printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device

Abstract

The invention relates to a thin film transistor, a manufacturing method thereof and a display device, which are used for solving the problem that in the existing flexible display screen, an interlayer dielectric layer is thick and is easy to break in the bending process, so that a metal wire of a source drain layer is broken. The thin film transistor includes: the semiconductor device comprises a substrate base plate, an active layer, a source drain layer and an insulating layer, wherein the active layer, the source drain layer and the insulating layer are arranged on the substrate base plate; the source drain layer is connected with the active layer through a through hole on the insulating layer; the insulating layer material includes a hydrogen storage material. In the thin film transistor, the insulating layer made of the hydrogen storage material is arranged between the active layer and the source drain layer, and hydrogen atoms stored in the insulating layer can provide hydrogen atoms for the active layer, so that the subsequent interlayer dielectric layer can be omitted.

Description

Thin film transistor, manufacturing method thereof and display device
Technical Field
The invention relates to the technical field of thin film transistors, in particular to a thin film transistor, a manufacturing method thereof and a display device.
Background
The traditional displays are flat panel displays and cannot be bent freely. The trend in the future is to expect a large amount of information to be presented on a flexible body, i.e. to be displayed on a flexible display, i.e. to realize a flexible display. The official definition of a flexible display is a display device whose display screen and module can be mechanically bent in any one of the steps of substrate packaging, production, storage, use, operation, process joining, handling, transportation, etc. In the existing LTPS (Low Temperature polysilicon) backplane manufacturing process, an interlayer dielectric layer disposed between a gate and an active layer in a thin film transistor is generally formed by depositing an inorganic material SiO-SiNx double layer, and the thickness is generally set to about 500 nm, so that during the bending process of a flexible display screen, the interlayer dielectric layer is subjected to an excessively large stress, which may cause the interlayer dielectric layer to break, and further cause a source drain electrode layer metal wire to break, which affects the yield of the product.
In summary, in the conventional flexible display screen, the thickness of the interlayer dielectric layer is relatively thick, and the interlayer dielectric layer is easily broken in the bending process, so that the metal wire of the source drain layer is broken, and the yield of the product is affected.
Disclosure of Invention
The invention aims to provide a thin film transistor, a manufacturing method thereof and a display device, which are used for solving the problem that in the existing flexible display screen, an interlayer dielectric layer is thick and is easy to break in the bending process, so that the metal wire of a source drain layer is broken, and the yield of a product is influenced.
The embodiment of the invention provides a thin film transistor, which comprises: the semiconductor device comprises a substrate, an active layer, a source drain layer and an insulating layer, wherein the active layer, the source drain layer and the insulating layer are arranged on the substrate; wherein the content of the first and second substances,
the source drain layer is connected with the active layer through a via hole on the insulating layer;
the material of the insulating layer includes a hydrogen storage material.
Preferably, the thin film transistor further includes: a gate electrode disposed between the active layer and the source drain layer;
the insulating layer is disposed between the gate and the active layer.
Preferably, the thin film transistor further includes: a gate electrode disposed between the active layer and the source drain layer;
the insulating layer is arranged between the grid and the source drain layer.
Preferably, the thin film transistor further includes: the grid electrode insulating layer is arranged on one side, deviating from the substrate base plate, of the active layer, and the planarization layer is arranged on one side, close to the substrate base plate, of the source drain layer.
Preferably, the thickness of the insulating layer is 6 nm to 15 nm.
Preferably, the material of the insulating layer includes ammonium fluotitanate-graphene oxide.
Preferably, the hydrogen storage amount of the insulating layer ranges from 1 wt% to 5 wt%.
The embodiment of the invention also provides a display device which comprises any one of the thin film transistors provided by the embodiment of the invention.
The embodiment of the invention also provides a manufacturing method of the thin film transistor, which comprises the following steps:
forming an active layer on a base substrate;
coating a mixed solution containing an insulating material on the active layer; wherein the insulating material comprises a hydrogen storage material;
baking the substrate coated with the mixed solution to volatilize the solvent in the mixed solution to form a solid insulating layer;
and forming a source drain layer on the insulating layer, and connecting the source drain layer with the active layer through the through hole on the insulating layer.
Preferably, after the solid insulating layer is formed and before the source/drain layer is formed on the insulating layer, the method further includes:
treating the insulating layer by adopting a hydrogen plasma bombardment process to store hydrogen atoms in the insulating layer;
and carrying out hydrogenation treatment on the insulating layer after the hydrogen atoms are stored so that the hydrogen atoms stored in the insulating layer are transferred to the active layer.
The invention has the following beneficial effects:
according to the thin film transistor provided by the embodiment of the invention, the insulating layer made of the hydrogen storage material is arranged between the active layer and the source drain layer, and hydrogen atoms stored in the insulating layer can be used for providing hydrogen atoms for the active layer, so that the subsequent interlayer dielectric layer can be omitted, and meanwhile, compared with the interlayer dielectric layer made of an inorganic material, the flexible insulating layer has stronger flexibility and is not easy to break during bending, so that the yield of products can be improved.
Drawings
Fig. 1 is a schematic structural diagram of a first thin film transistor according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a second thin film transistor according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating basic steps of a method for fabricating a thin film transistor according to an embodiment of the present invention;
fig. 4 is a flowchart illustrating an overall process of a method for fabricating a thin film transistor according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The thickness and the size and shape of the regions of each layer in the drawings do not reflect the actual scale of the thin film transistor, and are only intended to schematically illustrate the present invention.
The thin film transistor provided by the embodiment of the invention is designed and optimized again on the existing thin film transistor, and the insulating layer made of the hydrogen storage material is arranged between the active layer and the source drain layer. The specific structure thereof will be described in detail below.
As shown in fig. 1, a schematic structural diagram of a first thin film transistor provided in an embodiment of the present invention is shown, where the thin film transistor includes: a substrate 100, an active layer 101 disposed on the substrate 100, a source drain layer 102, and an insulating layer 103 disposed between the active layer 101 and the source drain layer 102; the source drain layer 102 is connected with the active layer 101 through a via hole 103v on the insulating layer 103; the material of the insulating layer 103 includes a hydrogen storage material.
In specific implementation, the thin film transistor is an important component constituting the flexible display screen, and the interlayer dielectric layer arranged between the gate and the active layer in the thin film transistor is generally formed by depositing an inorganic material SiO/SiNx double layer, and the thickness is generally set to about 500 nanometers, so that in the process of bending the flexible display screen, the interlayer dielectric layer is subjected to overlarge stress, which may cause the interlayer dielectric layer to break, thereby causing the metal wire of the source drain layer to break, and affecting the yield of the product. Therefore, in the thin film transistor of the present invention, the insulating layer 103 made of a hydrogen storage material is disposed between the active layer 101 and the source drain layer 102, and the source drain layer 102 may be connected to the active layer 101 through the via hole 103v on the insulating layer 103. Since the hydrogen atoms stored in the insulating layer 103 can be used to provide hydrogen atoms to the active layer 101, the subsequent interlayer dielectric layer can be omitted, and compared with an interlayer dielectric layer made of an inorganic material, the insulating layer 103 with flexibility has stronger flexibility and is not easy to break when being bent, so that the yield of products can be improved.
The insulating layer is made of hydrogen storage materials, so that hydrogen atoms can be provided for the active layer, the hydrogen-rich atoms are mainly used for the characteristics of the thin film transistor, the existing interlayer dielectric layer also contains hydrogen atoms, but the quantity of the contained hydrogen atoms is small, so that the thickness of the corresponding interlayer dielectric layer is thick, and the hydrogen atoms can eliminate dangling bonds of P-Si to improve the characteristics of the thin film transistor, so that the insulating layer is made of the hydrogen storage materials with stronger hydrogen storage capacity, and the characteristics of the thin film transistor can be further improved.
Specifically, the substrate refers to a carrier substrate used for manufacturing a thin film transistor. The insulating layer 103 is a flexible film made of a hydrogen storage material, and the insulating layer 103 is disposed between the active layer 101 and the source/drain layer 102, and may be disposed as needed, as long as it can provide hydrogen atoms to the active layer 101, and is not limited herein. The specific structure of the thin film transistor is described in detail below.
In specific implementation, the thin film transistor provided by the embodiment of the invention may be a top gate type or a bottom gate type, and may be specifically configured according to actual needs. For convenience of explanation, the present invention will be described in detail with reference to the accompanying drawings, which illustrate only a top gate type. In order to isolate the active layer from the gate electrode, as shown in fig. 1, the thin film transistor preferably further includes: the gate insulating layer 105 disposed on the side of the active layer away from the substrate is provided with a via hole similar to the insulating layer 103, such that the source/drain layer 102 can be connected to the active layer 101 through the via hole 105v on the gate insulating layer 105. The specific manner, material, etc. of manufacturing the gate insulating layer may be set as required, and are not limited herein.
Specifically, because the insulating layer that sets up is hydrogen storage material, and hydrogen storage capacity is stronger, therefore the thickness of general insulating layer only needs to set up to 6 nanometers-15 nanometers and can satisfy the requirement, need not to set up the interlayer dielectric layer again moreover, but because the thickness of interlayer dielectric layer among the prior art generally needs to set up about 500 nanometers, therefore in order to keep certain distance between grid and the source drain layer, as shown in fig. 1, preferred, thin-film transistor still includes: and a planarization layer 106 disposed on the source drain layer on a side adjacent to the substrate. Because the planarization layer is generally made of organic materials, the flexibility of the planarization layer is much better than that of an interlayer dielectric layer made of inorganic materials, and when the thin film transistor is bent, the thin film transistor cannot be easily broken.
Specifically, the position of the insulating layer may be set as needed. This will be described in detail below.
As shown in fig. 1, in order to facilitate the formation of the insulating layer, the insulating layer may be disposed between the gate electrode and the active layer, and preferably, the thin film transistor further includes: a gate electrode 104 disposed between the active layer 101 and the source-drain layer 102; the insulating layer 103 is disposed between the gate electrode 104 and the active layer 101.
Specifically, since a solution coating method (described in detail later) is generally required for forming the insulating layer, when the insulating layer 103 is provided between the gate electrode 104 and the active layer 101, that is, above the gate insulating layer 105, the formation of the insulating layer 103 is more convenient.
In this case, the insulating layer 103 and the gate insulating layer 105 are two adjacent layers, and no other layer is provided between the two adjacent layers, and in particular, if the thickness of the insulating layer 103 is increased as appropriate, the gate insulating layer 105 may be actually omitted, and the insulating layer 103 may be used to replace the function of the gate insulating layer 105.
In addition to disposing the insulating layer between the gate and the active layer, as shown in fig. 2, the second thin film transistor according to the embodiment of the present invention preferably further includes: a gate electrode 104 disposed between the active layer and the source and drain electrode layers; an insulating layer 103 is disposed between the gate 104 and the source drain layer 102.
Specifically, when the insulating layer 103 is disposed between the gate 104 and the source/drain layer 102, since the insulating layer 103 and the planarization layer 106 are two adjacent layers, and no other layer is disposed therebetween, in the specific manufacturing process, if the thickness of the insulating layer 103 is appropriately increased, the manufacturing of the planarization layer 106 may be actually omitted, and the insulating layer 103 may directly replace the function of the planarization layer 106.
The insulating layer is made of hydrogen storage materials and has flexibility, wherein the hydrogen storage amount of the insulating layer can reach 1 wt% -5 wt%. In specific implementation, the material of the insulating layer may be selected according to factors such as manufacturing process conditions and hydrogen storage requirements, and preferably, the material of the insulating layer includes ammonium fluotitanate-graphene oxide. Because the carbon atoms in the ammonium fluotitanate-graphene oxide form a hexagonal honeycomb lattice planar layer structure by sp2 hybridized orbits, the ammonium fluotitanate-graphene oxide composite material has extremely strong hydrogen storage capacity, and compared with the graphite oxide frequently adopted in the prior art, the hydrogen storage capacity of the ammonium fluotitanate-graphene oxide composite material can be improved by 10 times.
Meanwhile, a film layer rich in hydrogen atoms is introduced into the thin film transistor, so that hydrogenation treatment is facilitated, and the characteristics of the thin film transistor can be improved; the ammonium fluotitanate-graphene oxide material is a composite material bonded by chemical bonds, generally the composite material needs to be prepared, and the specific preparation method can refer to the following method steps:
(1) the method comprises the following steps of (1) taking natural crystalline flake graphite as a raw material, taking potassium permanganate and concentrated sulfuric acid as oxidants, putting the raw material into a reaction solvent for reaction, wherein the reaction time is about 1.5 hours, and preparing graphene oxide;
(2) weighing a certain amount of graphene oxide, adding the graphene oxide into absolute ethyl alcohol, and carrying out ultrasonic dispersion for 3 hours to fully dissolve the graphene oxide so as to obtain a primary graphene oxide ethanol solution.
(3) Adding urea into the graphene oxide ethanol solution, heating in water bath for 3 hours at 60 ℃, cooling, and performing ultrasonic dispersion on the mixed solution for 15 minutes to obtain the urea-graphene oxide solution.
(4) Dissolving polyethylene glycol and ammonium fluotitanate in deionized water, adding the solution into the urea-graphene oxide solution, carrying out ultrasonic dispersion on the mixed solution for 15 minutes, and then moving the mixed solution to an oil bath to react for 5 hours at the temperature of 150 ℃.
(5) Naturally cooling to room temperature, centrifugally separating, washing with absolute ethyl alcohol and deionized water for several times, and drying at 60 ℃ for 6 hours to obtain the ammonium fluotitanate-graphene oxide composite material (H8F6N2 Ti-FGO).
Based on the same inventive concept, an embodiment of the present invention further provides a display device, including any one of the above thin film transistors provided in the embodiments of the present invention. The implementation of the display device can refer to any of the above embodiments of the thin film transistor, and repeated descriptions are omitted.
Embodiments of the present invention further provide a method for manufacturing any of the above thin film transistors, which is similar to the thin film transistor provided in the embodiments of the present invention in terms of the principle of solving the problems, so that the implementation of the method can refer to the implementation of the thin film transistor, and repeated details are not repeated.
An embodiment of the present invention further provides a method for manufacturing a thin film transistor, as shown in fig. 3, which is a flowchart illustrating basic steps of the method for manufacturing a thin film transistor according to the embodiment of the present invention, and specifically includes the following steps:
step 301, forming an active layer on a substrate;
step 302, coating a mixed solution containing an insulating material on the active layer; wherein the insulating material comprises a hydrogen storage material;
step 303, baking the substrate coated with the mixed solution to volatilize the solvent in the mixed solution to form a solid insulating layer;
and 304, forming a source drain layer on the insulating layer, and connecting the source drain layer with the active layer through the through hole on the insulating layer.
In the implementation, an active layer is formed on the substrate 100, and the active layer can be fabricated by a method in the prior art, which is not limited herein. For example, the substrate 100 is cleaned, and the substrate 100 is made of a transparent material such as glass or a polyimide film. Then, the structure of the active layer 101 is formed on the substrate base plate 100 using a plasma enhanced chemical vapor deposition method, in which the amorphous silicon thin film has a thickness of 40 nm to 50 nm. Then, the substrate 100 is sent to a high temperature furnace for processing, so as to achieve the purpose of dehydrogenation (i.e. reducing the content of hydrogen atoms in the amorphous silicon film), and the content of hydrogen atoms is generally controlled within 2%; then, the substrate 100 is subjected to excimer laser annealing to convert amorphous silicon into a polycrystalline silicon thin film, and then channel doping is performed.
After the active layer is manufactured, other film layers, such as a gate insulating layer, may be manufactured as needed, and a specific manufacturing method is not limited herein, and since the additional insulating layer is disposed above the active layer, the insulating layer may be manufactured by a solution coating method.
Specifically, the method for preparing the ammonium fluorotitanate-graphene oxide composite material has been introduced above, and after the composite material is prepared, the ammonium fluorotitanate-graphene oxide composite material may be subjected to ultrasonic dispersion by using an ethanol solution with a concentration of 10% as a solvent (or using a solvent such as water or acetone), so as to prepare a mixed solution for spin coating; and then, the prepared mixed solution can be coated on a grid electrode insulating layer, and then drying treatment is carried out on the grid electrode insulating layer, so that a solid ammonium fluotitanate-graphene oxide insulating layer is obtained, and in the manufacturing process, the thickness of the insulating layer can be controlled to be about 10 nanometers through controlling the concentration of the spin-coating liquid.
Preferably, after the forming the solid insulating layer and before forming the source/drain layer on the insulating layer, the method further includes: treating the insulating layer by adopting a hydrogen plasma bombardment process to store hydrogen atoms in the insulating layer; the insulating layer after storing the hydrogen atoms is subjected to a hydrogenation treatment to cause the hydrogen atoms stored in the insulating layer to migrate into the active layer.
Specifically, after a solid insulating layer is formed, the substrate is placed in a reaction chamber, hydrogen is introduced, and then the insulating layer is treated by using a plasma bombardment process, because the insulating layer is a very good hydrogen storage material, the treated insulating layer is rich in hydrogen atoms and can be directly subjected to hydrogenation treatment, wherein the hydrogenation treatment is generally carried out in a high-temperature reaction chamber and baking is carried out at 25-350 ℃, and the amount of hydrogen stored in the specific insulating layer is related to the baking temperature, the material and the like. For example: when the ammonium fluotitanate-graphene oxide composite material is used for manufacturing the insulating layer, hydrogen plasma bombardment treatment is respectively carried out on the composite material at 60 ℃, 180 ℃ and 300 ℃ for 1 hour, and the hydrogen storage amounts of the composite material at different activation temperatures are respectively 1.4 wt%, 1.2 wt% and 2.6 wt%.
After the insulating layer is processed, the gate layer is formed by a low-temperature sputtering process, and preferably, the forming of the gate layer includes: forming a gate electrode layer on the insulating layer by a sputtering process under a process condition lower than a preset temperature; the preset temperature is the lowest temperature value affecting the flatness of the insulating layer, and may be generally selected from 30 ℃ to 60 ℃. After the pattern of the gate layer is formed, because the hydrogenation process is performed in advance when the insulating layer is manufactured, it is not necessary to manufacture an interlayer dielectric layer like the prior art, but only an organic material is needed to manufacture a planarization layer on the gate layer, and the manufactured structure is as shown in fig. 1.
And finally, forming a via hole of the source drain layer on the planarization layer in an exposure mode, manufacturing a pattern of the source drain layer, and enabling the source drain layer to be connected with the active layer through the via hole on the insulating layer, wherein the source drain layer can also be manufactured by adopting a low-temperature process in order not to influence the characteristics of the insulating layer.
For clearly explaining the method for manufacturing the thin film transistor according to the embodiment of the present invention, as shown in fig. 4, a flowchart of the overall steps of the method for manufacturing the thin film transistor according to the embodiment of the present invention specifically includes the following steps:
step 401, forming an active layer on a substrate;
step 402, coating a mixed solution containing an insulating material on the active layer;
step 403, baking the substrate coated with the mixed solution to volatilize the solvent in the mixed solution, so as to form a solid insulating layer;
step 404, processing the insulating layer by adopting a hydrogen plasma bombardment process to store hydrogen atoms in the insulating layer;
step 405, performing hydrogenation treatment on the insulating layer after storing hydrogen atoms to make the hydrogen atoms stored in the insulating layer migrate to the active layer;
step 406, forming a gate electrode layer on the insulating layer by using a sputtering process under a process condition lower than a preset temperature;
step 407, forming a source drain layer on the gate layer, and connecting the source drain layer with the active layer through the via hole on the insulating layer.
In summary, in the thin film transistor provided in the embodiments of the present invention, the insulating layer made of the hydrogen storage material is disposed between the active layer and the source drain layer, and hydrogen atoms stored in the insulating layer can be used to provide hydrogen atoms for the active layer, so that the subsequent fabrication of the interlayer dielectric layer can be omitted.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (4)

1. A thin film transistor, comprising: the semiconductor device comprises a substrate, an active layer, a source drain layer and an insulating layer, wherein the active layer, the source drain layer and the insulating layer are arranged on the substrate; wherein the content of the first and second substances,
the source drain layer is connected with the active layer through a via hole on the insulating layer;
the material of the insulating layer comprises a hydrogen storage material;
the thin film transistor further includes: the grid electrode insulating layer is arranged on one side, away from the substrate, of the active layer, and the grid electrode is arranged between the active layer and the source drain electrode layer;
the insulating layer is arranged between the grid electrode and the active layer;
and the insulating layer is adjacent to the gate insulating layer;
the thin film transistor further includes: the planarization layer is arranged on the source drain layer and close to one side of the substrate;
the insulating layer and the planarization layer are two adjacent film layers;
the planarization layer is made of an organic material;
the thickness of the insulating layer is 6-15 nanometers;
the material of the insulating layer comprises ammonium fluotitanate-graphene oxide.
2. The thin film transistor according to claim 1, wherein the insulating layer has a hydrogen storage amount ranging from 1 wt% to 5 wt%.
3. A display device comprising the thin film transistor according to any one of claims 1 to 2.
4. A method for manufacturing a thin film transistor includes:
forming an active layer on a base substrate;
coating a mixed solution containing an insulating material on the active layer; wherein the insulating material comprises a hydrogen storage material;
baking the substrate coated with the mixed solution to volatilize the solvent in the mixed solution to form a solid insulating layer;
forming a source drain layer on the insulating layer, and connecting the source drain layer with the active layer through a via hole on the insulating layer;
after the solid insulating layer is formed and before the source drain layer is formed on the insulating layer, the method further comprises:
treating the insulating layer by adopting a hydrogen plasma bombardment process to store hydrogen atoms in the insulating layer;
subjecting the insulating layer after storing hydrogen atoms to a hydrogenation treatment to cause hydrogen atoms stored in the insulating layer to migrate into the active layer;
wherein, the hydrogenation treatment is carried out in a high-temperature reaction chamber, and the baking is carried out at the temperature of 25-350 ℃.
CN201710438465.9A 2017-06-12 2017-06-12 Thin film transistor, manufacturing method thereof and display device Active CN107170830B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710438465.9A CN107170830B (en) 2017-06-12 2017-06-12 Thin film transistor, manufacturing method thereof and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710438465.9A CN107170830B (en) 2017-06-12 2017-06-12 Thin film transistor, manufacturing method thereof and display device

Publications (2)

Publication Number Publication Date
CN107170830A CN107170830A (en) 2017-09-15
CN107170830B true CN107170830B (en) 2022-01-11

Family

ID=59825203

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710438465.9A Active CN107170830B (en) 2017-06-12 2017-06-12 Thin film transistor, manufacturing method thereof and display device

Country Status (1)

Country Link
CN (1) CN107170830B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107342298B (en) 2017-07-24 2021-01-26 京东方科技集团股份有限公司 Display device, array substrate and manufacturing method thereof
CN110176397B (en) * 2019-04-18 2021-03-02 京东方科技集团股份有限公司 Active layer contact hole etching method and array substrate circuit detection method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1716637A (en) * 2004-06-30 2006-01-04 三星Sdi株式会社 Thin film transistor (TFT) and flat panel display including the tft and their methods of manufacture

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015036797A (en) * 2013-08-15 2015-02-23 ソニー株式会社 Display device and electronic apparatus
CN103985637B (en) * 2014-04-30 2017-02-01 京东方科技集团股份有限公司 Low-temperature polycrystalline silicon thin film transistor, manufacturing method thereof and display device
CN104716047B (en) * 2015-03-30 2017-08-01 京东方科技集团股份有限公司 A kind of thin film transistor (TFT) and preparation method thereof, array base palte and display device
WO2017073097A1 (en) * 2015-10-29 2017-05-04 三菱電機株式会社 Thin film transistor substrate and method for manufacturing same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1716637A (en) * 2004-06-30 2006-01-04 三星Sdi株式会社 Thin film transistor (TFT) and flat panel display including the tft and their methods of manufacture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
钛配合物/氧化石墨烯复合储氢材料的制备及其性能研究;黄子荣等;《广东化工》;20151231;第42卷(第8期);正文第40页左栏实验部分至第39页左栏总结与展望 *

Also Published As

Publication number Publication date
CN107170830A (en) 2017-09-15

Similar Documents

Publication Publication Date Title
US9947757B2 (en) Display device, array substrate, and thin film transistor
CN102157564B (en) Preparation method of top gate metal oxide thin film transistor (TFT)
CN103985637A (en) Low-temperature polycrystalline silicon thin film transistor, manufacturing method thereof and display device
WO2018152875A1 (en) Method for manufacturing thin film transistor, thin film transistor and display
CN107170830B (en) Thin film transistor, manufacturing method thereof and display device
CN101567392B (en) Thin-film transistor
US10693011B2 (en) Thin film transistor array substrate, method of manufacturing the same, and display device including thin film transistor substrate
US7781775B2 (en) Production method of semiconductor device and semiconductor device
US8361897B2 (en) Method for depositing a thin film electrode and thin film stack
WO2015192558A1 (en) Low-temperature polysilicon thin film transistor and manufacturing method thereof, array substrate and display device
WO2016065768A1 (en) Manufacturing method for low-temperature polycrystalline silicon and manufacturing method for thin film transistor (tft) substrate
CN103236400A (en) Production method of low-temperature polysilicon thin film and production method of thin-film transistor
US20090155988A1 (en) Element of low temperature poly-silicon thin film and method of making poly-silicon thin film by direct deposition at low temperature and inductively-coupled plasma chemical vapor deposition equipment therefor
CN107316906B (en) LTPS substrate, manufacturing method thereof, thin film transistor, array substrate and display device
CN104952914A (en) Oxide semiconductor thin film, thin film transistor, oxide semiconductor thin film preparation method, thin film transistor manufacturing method, oxide semiconductor thin film preparation device and thin film transistor manufacturing device
KR100666563B1 (en) Method of fabricating a semiconductor device and a semiconductor fabricated by the smae method
US10490756B2 (en) Method for fabricating flexible OLED panel and flexible OLED panel
CN107342298B (en) Display device, array substrate and manufacturing method thereof
JP2005236264A (en) Method of forming polycrystalline silicon thin film and thin-film transistor using polycrystalline silicon produced by the method
WO2016045254A1 (en) Method for manufacturing low-temperature polycrystalline silicon thin film, low-temperature polycrystalline silicon thin film and device using same
JPH1197438A (en) Method for reforming silicon oxide
Nishizaki et al. Comparison of a-Si TFTs fabricated by Cat-CVD and PECVD methods
CN1316770A (en) Process for preparing polysilicon film
JP2002185005A (en) Hybrid tft array substrate and its manufacturing method
Chang et al. Supercritical Ammoniation-Enabled Interfacial Polarization for Function-Mode Transformation and Overall Optimization of Thin-Film Transistors

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant