CN107153591B - Detection method and device for power supply architecture of memory - Google Patents

Detection method and device for power supply architecture of memory Download PDF

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CN107153591B
CN107153591B CN201710321465.0A CN201710321465A CN107153591B CN 107153591 B CN107153591 B CN 107153591B CN 201710321465 A CN201710321465 A CN 201710321465A CN 107153591 B CN107153591 B CN 107153591B
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power supply
fault simulation
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detection operation
architecture
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CN107153591A (en
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胡广建
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/261Functional testing by simulating additional hardware, e.g. fault simulation

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Abstract

The invention discloses a detection method of a power supply architecture of a memory, which comprises the following steps: determining a fault simulation type of a power supply architecture; performing fault simulation on the power supply framework by using the fault simulation type and a prestored power supply framework simulation strategy corresponding to the fault simulation type; according to the fault simulation type, corresponding detection operation is carried out on the power supply architecture so as to verify the safety of the power supply architecture; therefore, in the scheme, the effectiveness and the safety of the power supply framework of the memory are verified by analyzing the power supply failure mode of the power supply framework of the memory and simulating the fault failure mode of the power supply framework, so that the safety of storage power supply can be effectively enhanced, and the adverse effect on stored data caused by abnormal power supply is greatly reduced; the invention also discloses a detection device of the power supply architecture of the memory, and the technical effects can be realized.

Description

Detection method and device for power supply architecture of memory
Technical Field
The present invention relates to the field of power supply architecture testing technologies, and in particular, to a method and an apparatus for detecting a power supply architecture of a memory.
Background
The power supply architecture of the memory is generally a dual-control redundancy mode. In designing a Power supply architecture of a memory, problems such as Power Distribution Unit (PSU), Battery Backup Unit (BBU), Power redundancy, and the like are generally considered. Moreover, power supply abnormality often occurs to a certain extent in the use process of the device, and once the power supply of the memory is abnormal, for example: short circuits, open circuits, and extreme unconventional conditions can adversely affect the overall memory system.
Therefore, how to detect the power supply architecture of the memory and verify the validity of the power supply architecture is a problem to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a detection method and a detection device for a power supply architecture of a memory, so as to detect the power supply architecture of the memory and verify the effectiveness of the power supply architecture.
In order to achieve the above purpose, the embodiment of the present invention provides the following technical solutions:
a method of detecting a memory power architecture, comprising:
determining a fault simulation type of a power supply architecture;
performing fault simulation on the power supply framework by using the fault simulation type and a prestored power supply framework simulation strategy corresponding to the fault simulation type;
and executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture.
Optionally, the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type are used for performing fault simulation on the power supply architecture; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the single power supply PSU is in a short-circuit type, generating a fault PSU by short-circuit PSUs, executing corresponding detection operations on the power supply framework, and judging that the power supply framework is not abnormal when each detection operation meets a corresponding detection result;
wherein, the detection result corresponding to each detection operation comprises: and judging that the output of the failed PSU is disconnected and judging that the non-failed PSU supplies power normally.
Optionally, the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type are used for performing fault simulation on the power supply architecture; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: all power supply PSUs are in short circuit type, all the PSUs are in short circuit, corresponding detection operation is carried out on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the outputs of all PSUs are disconnected, judging that the switching circuits of the PSUs and the BBU act without errors, and judging that the BBU supplies power normally.
Optionally, the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type are used for performing fault simulation on the power supply architecture; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the power grid is in a power failure type, an AC power supply circuit is cut off, corresponding detection operations are executed on the power supply framework, and when each detection operation meets a corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the outputs of all PSUs are disconnected, judging that the switching circuits of the PSUs and the BBU act without errors, and judging that the BBU supplies power normally.
Optionally, the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type are used for performing fault simulation on the power supply architecture; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the hard disk short circuit type is adopted, a hard disk power supply circuit is short-circuited, corresponding detection operation is executed on the power supply framework, and when each detection operation meets a corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the GATE of the mainboard normally acts, and judging that the voltage of the PSU corresponding to the mainboard is not interfered.
Optionally, the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type are used for performing fault simulation on the power supply architecture; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: when the PSU powered by the BBU recovers the power supply type, the PSU is powered back, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the main board GATE normally acts.
Optionally, the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type are used for performing fault simulation on the power supply architecture; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the power failure type of the power grid charged by the BBU is the power failure type, the AC power supply circuit is cut off, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the main board GATE normally acts, and judging that the BBU is rapidly switched from the charging mode to the discharging mode.
Optionally, the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type are used for performing fault simulation on the power supply architecture; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the BBU output end is in a short circuit type in the charging power supply mode, the BBU output end is in short circuit, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the PSU closes the charging channel.
A detection apparatus for a memory power architecture, comprising:
the fault simulation type determining module is used for determining the fault simulation type of the power supply architecture;
the fault simulation module is used for carrying out fault simulation on the power supply framework by utilizing the fault simulation type and a prestored power supply framework simulation strategy corresponding to the fault simulation type;
and the detection module is used for executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture.
According to the above scheme, the method for detecting the power supply architecture of the memory provided by the embodiment of the invention comprises the following steps: determining a fault simulation type of a power supply architecture; performing fault simulation on the power supply framework by using the fault simulation type and a prestored power supply framework simulation strategy corresponding to the fault simulation type; according to the fault simulation type, corresponding detection operation is carried out on the power supply architecture so as to verify the safety of the power supply architecture; therefore, in the scheme, the effectiveness and the safety of the power supply framework of the memory are verified by analyzing the power supply failure mode of the power supply framework of the memory and simulating the fault failure mode of the power supply framework, so that the safety of storage power supply can be effectively enhanced, and the adverse effect on stored data caused by abnormal power supply is greatly reduced; the invention also discloses a detection device of the power supply architecture of the memory, and the technical effects can be realized.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic flow chart illustrating a method for detecting a power supply architecture of a memory according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a system power supply architecture according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
FIG. 6 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
FIG. 7 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
FIG. 8 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
FIG. 9 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
FIG. 10 is a schematic diagram of another system power supply architecture according to an embodiment of the present disclosure;
fig. 11 is a schematic structural diagram of a switching management chip according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a detection apparatus of a memory power supply architecture according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention discloses a detection method and a detection device for a power supply framework of a memory, which are used for detecting the power supply framework of the memory and verifying the effectiveness of the power supply framework.
Referring to fig. 1, a method for detecting a memory power supply architecture according to an embodiment of the present invention includes:
s101, determining a fault simulation type of a power supply architecture;
specifically, the power supply architecture of the existing memory is generally in a dual-control redundancy mode, and if some short circuits, open circuits, extreme badness and unconventional conditions occur, the power supply architecture is affected badly, so that in the scheme, various failure modes are simulated according to the fault simulation type of the power supply architecture, the effectiveness of the power supply architecture is tested and verified, and the existence of the leak is prevented. The fault simulation type and the power supply architecture simulation strategy corresponding to the fault simulation type in the scheme can be preset and stored, and after the fault simulation type is determined, safety detection can be carried out according to the corresponding power supply architecture simulation strategy.
S102, performing fault simulation on the power supply framework by using the fault simulation type and a prestored power supply framework simulation strategy corresponding to the fault simulation type;
specifically, when the power supply architecture is subjected to fault simulation, the PSU and the BBU are generally short-circuited and open-circuited respectively to simulate various bad problems of the power supply architecture. For example: the power failure of the PSU is simulated by plugging and unplugging the AC power supply, the short circuit of the PSU is simulated by short circuit PSU output, and the short circuit of the BBU is simulated by short circuit BBU output. And under different power supply failure modes, verifying whether the power supply architecture meets the requirement of the storage power supply by testing the power supply voltage waveform of the power supply architecture and notifying a control signal of upper-layer software backup.
S103, executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture.
Specifically, after the power supply architecture is subjected to fault simulation according to the power supply architecture simulation strategy, the validity and the safety of the power supply architecture of the memory are verified through the detection of the power supply structure, the verification method can effectively enhance the safety of storage power supply, and the adverse effect on stored data caused by abnormal power supply is greatly reduced.
It should be noted that in the present solution, different supplies are simulated by different fault simulation types
The electrical architecture failure mode tests the safety of the power supply architecture by simulating the failure modes, wherein the failure simulation types comprise: the power supply PSU short circuit type, all power supply PSUs short circuit type, power grid power failure type, hard disk short circuit type, PSU power supply recovery type, power grid power failure type in the charging power supply mode, BBU output end short circuit type in the charging power supply mode, and each fault simulation type is described respectively as follows:
1. the short circuit type of the power supply PSU is as follows:
if the fault simulation type is as follows: if the single power supply PSU is in a short-circuit type, generating a fault PSU by short-circuit PSUs, executing corresponding detection operations on the power supply framework, and judging that the power supply framework is not abnormal when each detection operation meets a corresponding detection result;
wherein, the detection result corresponding to each detection operation comprises: and judging that the output of the failed PSU is disconnected and judging that the non-failed PSU supplies power normally.
Specifically, referring to fig. 2, a schematic diagram of a system power supply architecture provided in this embodiment is shown, where the system power supply architecture in this embodiment includes two power supplies: PSU0, PSU1, two backup power supplies: BBU0, BBU1, and also two motherboards: MB0, MB 1. In a normal PSU power supply mode, if one of the power supply PSUs is short-circuited, for example, the PSU0 or PSU1 is short-circuited, the fault simulation operation performed at this time is to simulate a fault PSU by short-circuiting the PSU, so that the PSU cannot normally output, thereby generating a fault PSU, and at this time, whether the power supply system is safe or not is judged by detecting the power supply system, and the detection operation performed under this type includes: and testing whether the PSU0/PSU 1Q 10 gate is normally closed, whether the host swap gate operates correctly or not, and whether the voltage of the P12V _ PSU fluctuates abnormally or not.
It should be noted that, referring to fig. 3, the PSU 0Q 10 gate is a control signal of a protection circuit inside the PSU, and when the PSU is internally short-circuited or fails, the switch protection is turned on to disconnect the PSU output; if the PSU0/PSU 1Q 10 gate is normally off, it represents that the output of the failed PSU has been disconnected; the P12V — PSU voltage is the output voltage of the PSU, and if it is detected that the non-faulty PSU has no abnormal fluctuation, it represents that the non-faulty PSU is normally powered, and if both of the above conditions are satisfied, it represents that the power supply system is not abnormal.
2. All power supply PSUs are in short circuit type:
if the fault simulation type is as follows: all power supply PSUs are in short circuit type, all the PSUs are in short circuit, corresponding detection operation is carried out on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the outputs of all PSUs are disconnected, judging that the switching circuits of the PSUs and the BBU act without errors, and judging that the BBU supplies power normally.
Specifically, in this embodiment, if two PSUs are short-circuited at the same time, the executed fault simulation strategy is to short-circuit the outputs of the two PSUs at the same time; at this time, whether the power supply system is safe is judged by detecting the power supply system, and the detection operation executed under the type comprises the following steps: and testing whether the PSU0PSU 1Q 10 gate is normally closed, the host swap gate operates without error, and the output voltage P12V _ AUX of the main board has abnormal fluctuation.
It should be noted that, the normal shutdown of the PSU0PSU 1Q 10 gate represents that the outputs of both PSUs are disconnected, the host swap gate operates without error to represent that the power supply of the two faulty PSUs has been changed to the power supply of two BBUs, the output voltage P12V _ AUX has abnormal fluctuation, and represents that the AUX power supply has no abnormality after the power supply of the BBUs is changed, and it should be noted that, no matter the PSU is supplied with the normal PSU or the BBU is supplied with the power during the power failure, the AUX power supply is changed to the power supply of the following MB (main control) through the host swap IC (power supply switching circuit). Referring to fig. 4, under the condition that the power grid is not powered down, the judgment can be performed by detecting whether the voltage of the P12V _ PSU is lower than 11.4V, if the voltage is lower than 11.4V, it is determined that both PSU0 and PSU1 are short-circuited, a control signal for switching between BBU0 and BBU1 is sent, the switching operation is completed through the main board, the PSU is not powered up any more, and the HOT swap IC switches the power supply to the BBU power supply.
3. The type of power failure of a power grid:
if the fault simulation type is as follows: if the power grid is in a power failure type, an AC power supply circuit is cut off, corresponding detection operations are executed on the power supply framework, and when each detection operation meets a corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the outputs of all PSUs are disconnected, judging that the switching circuits of the PSUs and the BBU act without errors, and judging that the BBU supplies power normally.
Specifically, the power failure of the power grid is simulated in the normal power supply mode of the PSU, the executed fault simulation operation is to disconnect the AC power supply circuit, and the detection operation executed to determine whether the power supply system is safe by detecting the power supply system includes all tests in the type of short circuit of all power supply PSUs, which is not described herein again.
It should be noted that, when the power grid fails, the PSU cannot normally output, and therefore, in this scheme, the power supply of the device is changed from PSU power supply to BBU power supply by switching between the PSU and the BBU, and a schematic diagram of a system charging architecture thereof can be seen in fig. 4.
4. Hard disk short circuit type:
if the fault simulation type is as follows: if the hard disk short circuit type is adopted, a hard disk power supply circuit is short-circuited, corresponding detection operation is executed on the power supply framework, and when each detection operation meets a corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the GATE of the mainboard normally acts, and judging that the voltage of the PSU corresponding to the mainboard is not interfered.
Specifically, when the power is supplied by the PSU normally, if a short circuit occurs in a certain hard disk, the executed fault simulation strategy is a short-circuit hard disk power supply circuit. At this time, whether the power supply system is safe is judged by detecting the power supply system, and the detection operation executed under the type comprises the following steps: test MB0GATE is functioning normally, test MB 1P 12V _ PSU is disturbed.
It should be noted that, referring to fig. 5, in the normal power supply mode of the PSU, if a short circuit occurs on a motherboard (a short circuit occurs on a hard disk), the hot swap IC turns off the control mos, and when detecting that MB0GATE normally operates and no interference occurs on MB 1P 12V _ PSU, it is determined that no abnormality occurs in the system.
5. PSU power restoration type:
if the fault simulation type is as follows: when the PSU powered by the BBU recovers the power supply type, the PSU is powered back, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the main board GATE normally acts.
Specifically, when the BBU is normally powered, the AC is powered on to verify whether the power supply system can be normally recovered, and when it is determined whether the power supply system is normally powered, whether the voltage of the P12V _ PSU is higher than 11.4V can be detected, and if the voltage is higher than 11.4V, it is determined that the power supply system is normally powered, and at this time, it is determined whether the power supply system is safe by detecting the power supply system, and the detection operations executed under this type include: test MB0GATE for normal action.
It should be noted that, referring to fig. 6 and 7, fig. 6 is a schematic diagram of a system charging architecture before power supply is restored, and fig. 7 is a schematic diagram of a system charging architecture after power supply is restored; during a normal BBU power supply mode, if the PSU power supply is recovered, whether the MB0GATE acts or not needs to be judged, namely, after the P12V _ PSU voltage is detected to be higher than 11.4V, whether the main board control signal is switched to the PSU power supply or not is judged, and if the main board control signal is switched to the PSU power supply mode, the system is judged to supply power normally.
6. The power-down type of the power grid in the charging and power-supplying mode is as follows:
if the fault simulation type is as follows: if the power failure type of the power grid charged by the BBU is the power failure type, the AC power supply circuit is cut off, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the main board GATE normally acts, and judging that the BBU is rapidly switched from the charging mode to the discharging mode.
Specifically, in the charging and power supplying mode, if a short circuit occurs in the dual PSU or the power grid fails, the fault simulation strategy executed at this time is to disconnect the AC power supply circuit. At this time, whether the power supply system is safe is judged by detecting the power supply system, and the detection operation executed under the type comprises the following steps: test whether MB GATE is operating normally, test whether bbu can be switched from the charging mode to the discharging mode quickly.
It should be noted that, referring to fig. 8 and fig. 9, fig. 8 is a schematic diagram of a system charging architecture before power failure, and fig. 9 is a schematic diagram of a system charging architecture after power failure; if a short circuit occurs in the double PSUs in the BBU charging mode, firstly, the BBU must be successfully switched to complete the power supply. And during switching, if the BBU is in charging, the BBU is changed from the charging state to the power supply state, which requires conversion time, and if the time is too long, the standby power switching is unsuccessful, so that in the scheme, whether the BBU can be quickly switched from the charging mode to the discharging mode needs to be tested, and if the BBU can be quickly switched to the charging mode, no abnormality exists. Specifically, if the voltage of the P12V _ PSU is detected to be lower than 11.4V, a BBU power supply loop can be opened through the BBU charge rate and the BBU enable, and the host plug IC is switched at the same time.
7. BBU output end short circuit type under the charging power supply mode:
if the fault simulation type is as follows: if the BBU output end is in a short circuit type in the charging power supply mode, the BBU output end is in short circuit, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the PSU closes the charging channel.
Specifically, in the charging and power supplying mode, if the BBU output terminal is short-circuited, the fault simulation strategy executed at this time is to short-circuit the BBU output terminal, and the detection operation executed on the power supplying architecture includes: and judging whether the PSU closes the charging channel of the BBU or not.
It should be noted that, referring to fig. 10, the charging circuit and the discharging circuit of the BBU are independent from each other, and a failure on one side must not involve a failure on the other circuit; therefore, when the BBU is charged, if the BBU output end is short-circuited, the PSU closes the charging channel to the BBU, which indicates that the power supply architecture is safe, and if the charging channel cannot be closed, the charging architecture is abnormal.
It is to be noted that, referring to fig. 11, the switching circuit for switching the power supply, the backup power supply, and the AC power supply in the above-described embodiment employs TPS2456 as a switch management chip — hot swap IC, and in fig. 11, the port INA corresponds to P12V _ PSU, the port INB corresponds to P12V _ BBU, and the port OUTA & B corresponds to P12V _ AU, for example: in an AC (grid) complete power-on and power-off process:
1. when the AC is powered off:
the PSU power supply is switched to BBU power supply; GAT1A and GAT2A are closed, and the PSU power supply path is cut off; GAT1B and GAT2B are open and the BBU power path is open.
2. When AC is recovered:
the BBU power supply is switched to PSU power supply; GAT1A and GAT2A are opened, and the PSU power supply path is opened; GAT1B and GAT2B are closed and the BBU power path is cut off.
In the following, the detection device provided by the embodiment of the present invention is introduced, and the detection device described below and the detection method described above may be referred to each other.
Referring to fig. 12, a detection apparatus for a memory power supply architecture according to an embodiment of the present invention includes:
a fault simulation type determining module 100, configured to determine a fault simulation type of the power supply architecture;
the fault simulation module 200 is configured to perform fault simulation on a power supply architecture by using the fault simulation type and a pre-stored power supply architecture simulation strategy corresponding to the fault simulation type;
the detection module 300 is configured to perform a corresponding detection operation on the power supply architecture according to the fault simulation type, so as to verify the safety of the power supply architecture.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (8)

1. A detection method for a memory power supply architecture is characterized by comprising the following steps:
determining a fault simulation type of a power supply architecture;
performing fault simulation on the power supply framework by using the fault simulation type and a prestored power supply framework simulation strategy corresponding to the fault simulation type;
executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture;
if the fault simulation type is as follows: if the single power supply PSU is in a short-circuit type, generating a fault PSU by short-circuit PSUs, executing corresponding detection operations on the power supply framework, and judging that the power supply framework is not abnormal when each detection operation meets a corresponding detection result; wherein, the detection result corresponding to each detection operation comprises: and judging that the output of the failed PSU is disconnected and judging that the non-failed PSU supplies power normally.
2. The detection method according to claim 1, wherein a power supply architecture is subjected to fault simulation by using the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: all power supply PSUs are in short circuit type, all the PSUs are in short circuit, corresponding detection operation is carried out on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the outputs of all PSUs are disconnected, judging that the switching circuits of the PSUs and the BBU act without errors, and judging that the BBU supplies power normally.
3. The detection method according to claim 1, wherein a power supply architecture is subjected to fault simulation by using the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the power grid is in a power failure type, an AC power supply circuit is cut off, corresponding detection operations are executed on the power supply framework, and when each detection operation meets a corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the outputs of all PSUs are disconnected, judging that the switching circuits of the PSUs and the BBU act without errors, and judging that the BBU supplies power normally.
4. The detection method according to claim 1, wherein a power supply architecture is subjected to fault simulation by using the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the hard disk short circuit type is adopted, a hard disk power supply circuit is short-circuited, corresponding detection operation is executed on the power supply framework, and when each detection operation meets a corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the GATE of the mainboard normally acts, and judging that the voltage of the PSU corresponding to the mainboard is not interfered.
5. The detection method according to claim 1, wherein a power supply architecture is subjected to fault simulation by using the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: when the PSU powered by the BBU recovers the power supply type, the PSU is powered back, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the main board GATE normally acts.
6. The detection method according to claim 1, wherein a power supply architecture is subjected to fault simulation by using the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the power failure type of the power grid charged by the BBU is the power failure type, the AC power supply circuit is cut off, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the main board GATE normally acts, and judging that the BBU is rapidly switched from the charging mode to the discharging mode.
7. The detection method according to claim 1, wherein a power supply architecture is subjected to fault simulation by using the fault simulation type and a prestored power supply architecture simulation strategy corresponding to the fault simulation type; executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture, wherein the detection operation comprises the following steps:
if the fault simulation type is as follows: if the BBU output end is in a short circuit type in the charging power supply mode, the BBU output end is in short circuit, corresponding detection operation is executed on the power supply framework, and when each detection operation meets the corresponding detection result, it is judged that the power supply framework is not abnormal;
wherein, the detection result corresponding to each detection operation comprises: and judging that the PSU closes the charging channel.
8. A detection apparatus for a memory power architecture, comprising:
the fault simulation type determining module is used for determining the fault simulation type of the power supply architecture;
the fault simulation module is used for carrying out fault simulation on the power supply framework by utilizing the fault simulation type and a prestored power supply framework simulation strategy corresponding to the fault simulation type;
the detection module is used for executing corresponding detection operation on the power supply architecture according to the fault simulation type so as to verify the safety of the power supply architecture;
wherein, if the fault simulation type is: if the single power supply PSU is in a short circuit type, the fault simulation module generates a fault PSU through the short circuit PSU; the detection module executes corresponding detection operation on the power supply framework, and when each detection operation meets a corresponding detection result, the power supply framework is judged to be abnormal; wherein, the detection result corresponding to each detection operation comprises: and judging that the output of the failed PSU is disconnected and judging that the non-failed PSU supplies power normally.
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