CN107145182A - Input voltage pattern intends resistor and resistance control method - Google Patents
Input voltage pattern intends resistor and resistance control method Download PDFInfo
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- CN107145182A CN107145182A CN201710355873.8A CN201710355873A CN107145182A CN 107145182 A CN107145182 A CN 107145182A CN 201710355873 A CN201710355873 A CN 201710355873A CN 107145182 A CN107145182 A CN 107145182A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
Intend resistor the present invention relates to a kind of input voltage pattern, it is characterised in that：Including the voltage source sequentially input, voltage magnitude and impedance conversion, AD converter, processor, D/A converter and output driving part, wherein processor receives the magnitude of voltage of AD converter input, the output of D/A converter is controlled further according to target resistance resistance, it is exported the voltage required for corresponding voltage signal control generation.
Description
Technical field
The present invention relates to servo electrical equipment field, it is specifically related to a kind of input voltage pattern and intends resistor.
Background technology
Existing variable resistance has these traditional resistor casees of resistance box, mechanical potentiometer, digital regulation resistance to be manual
Variable resistance, it is difficult to automatically adjust.In order to also occur in that some program control artifical resistances, most common way with program control regulation
For digital synthesis technology, by inputting fixed electric current, the method for program control change output voltage is carried out artifical resistance, thus realized
The automatic conversion of resistance value.
The central principle of the program control scheme be by by fixed input voltage by being sent to DAC reference edge after conversion,
As output DAC reference voltage, the deficiency of the program is the reference voltage by adjusting DAC so that DAC is in itself in difference
Resistance value under the error that produces it is unstable, be difficult the error for solving thus to introduce by amendment, cause the simulation finally given
The stability of resistance is not ideal.
Because any DAC and ADC precision depends critically upon the performance of benchmark.If regarding input as DAC reference datas
So that entirely output DAC precision cannot be guaranteed.
The content of the invention
Based on problem present in above method, this patent scheme gathers front end by ADC and fixes input voltage, according to electricity
Arranges value is hindered, output end provides relevant voltage value by DAC, reaches artifical resistance purpose, by selecting appropriate reference voltage to make
Front-end A/D C and rear end DAC are operated in optimum state, so that having evaded de-regulation ADC and DAC reference voltage causes error, though
Right front end introduces an ADC again, is designed by the solution of the present invention, and the error that front-end A/D C is introduced is much smaller than regulation with reference to electricity
Error caused by pressure, so as to reach the stable purpose of output artifical resistance.Also, in conjunction with error Producing reason, enter the hand-manipulating of needle
Analysis and removal to property, reduce the difficulty and workload of fitting.
Also realized in numeric field than higher precision, more highly reliable and more low price various signal transactings in analog domain
Function, the ability that numeral suppresses noise is much larger than analog signal, in the storage and transmitting procedure of analog signal, noise and distortion
It can be accumulated, so that the processing to signal produces bad effect, and in numeric field, data signal almost can be deposited nondestructively
Storage and transmission.
Specifically, the present invention provides a kind of input voltage pattern plan resistor, it is characterised in that：Including what is sequentially input
Voltage source, voltage magnitude and impedance conversion, AD converter, processor, D/A converter and output driving part, wherein processor connect
The magnitude of voltage of AD converter input is received, the output of D/A converter is controlled further according to target resistance resistance, makes the corresponding electricity of its output
Press the voltage required for signal control generation.
Further, it is characterised in that：The artifical resistance calculation is carried out as follows：
Wherein UiRepresent input voltage value, RrefSample resistance value in indication circuit, U0Sample resistance terminal voltage value is represented,
I0Represent to flow through current value in sample resistance.
Further, it is characterised in that：Wherein,D1The voltage magnitude read for processor and impedance become
Numerical value of the voltage exported after changing after AD converter is converted, N1For AD converter digit, U1For the reference electricity of AD converter
Pressure.
Further, it is characterised in that：Wherein,D2Pair of output voltage for needed for output driving part
Answer digital value, N2For D/A converter digit, U2For the reference voltage of D/A converter.
Further, it is characterised in that：For the amendment of artifical resistance value, the imbalance electricity of the operational amplifier is being considered
In the case of stream and offset voltage, the actual output voltage of operational amplifier and the error of desired output voltage are：
Wherein, UIOFor the offset voltage of the operational amplifier, offset current is IB1And IB2For the operational amplifier just
To the offset current of, negative input.
Further, it is characterised in that：For the amendment of artifical resistance value, the temperature drift of the operational amplifier is being considered
In the case of shifting, the actual output voltage of operational amplifier and the error of desired output voltage are：
Wherein, input offset current IB1、IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature
Drift about as TCV.
Further, it is characterised in that：In the case where considering the transformed error of AD converter：
Wherein, D1The input terminal voltage amplitude read for embeded processor and the voltage exported after impedance conversion pass through AD
Numerical value after converter transform, N1For AD converter digit, U1For the reference voltage of AD converter.
ΔUoppError caused by-input offset current and offset voltage；
TC11Error caused by Δ T- importation temperature drifts；
NADCULSBADCTransformed error caused by-AD converter；
NADCDetermined according to actual measurement ADC error.
Further, it is characterised in that：The actual output voltage value U of the resistance simulation device0Calculation it is as follows：
Wherein, D2The corresponding digital value of output voltage, N for needed for output driving part2For D/A converter digit, U2For DA
The reference voltage of converter, TCP△ T are the output voltage error that output driving part temperature drift is brought, NDACULSBDACFor DA
Transformed error caused by converter.
Further, it is characterised in that：The calculation formula of artifical resistance value is as follows：
K1Represent input voltage amplitude and impedance transformation part conversion coefficient；
K2Represent output driving part conversion coefficient.
Brief description of the drawings
Input voltage pattern intends resistance principle figure to Fig. 1 in the prior art；
Fig. 2 is the input voltage type simulative resistance circuit block diagram of the present invention；
Fig. 3 is the input voltage type simulative resistance circuit schematic diagram of the present invention；
Fig. 4 is the voltage magnitude and impedance inverter circuit error model figure of the present invention；
Fig. 5 is the output driving part error model figure of the present invention.
Embodiment
In order that those skilled in the art is better understood from the present invention, the present invention is made with implementation below in conjunction with the accompanying drawings
It is described in further detail.
As shown in Fig. 2 showing the voltage drive resistor circuit block diagram of the present invention, first, voltage magnitude and impedance become
Change circuit (physical circuit is as shown in Figure 4) collection input voltage UiSignal, and signal is nursed one's health, to meet AD converter
Input requirements；Then, high-precision AD converter gathers the voltage and is input in embeded processor, embeded processor pair
Voltage is handled using filtering, error correction scheduling algorithm, further according to set combined resistance resistance RxControl D/A converter
Output, its is exported corresponding voltage signal, while passing through output equipment shows voltage, electric current and resistance value；Finally, use
The voltage signal that D/A converter is exported is sent to delivery outlet by output driving circuit.
As shown in figure 3, showing the control source type simulative resistance circuit schematic diagram of the present invention, it can obtain, resistor resistance
Calculation formula it is as follows：
In formula：UiRepresent input voltage value；
RrefSample resistance value in indication circuit；
U0Represent sample resistance terminal voltage value (relative to output reference point)；
I0Represent to flow through current value in sample resistance；
U1Represent ADC portion reference voltage；
U2Represent DAC portion reference voltage；
K1Represent input voltage amplitude and impedance transformation part conversion coefficient；
K2Represent output driving part conversion coefficient；
D1Represent ADC portion output digital quantity；
D2Represent DAC portion input digital quantity；
Can be seen that from above expression formula influences the parameter of final resistance output accuracy of measurement to have the electricity related to input amplifier
Pressure amplitude value and impedance inverter circuit parameter, sample resistance precision, input ADC reference voltage precisions, output DAC reference voltage precisions
And output driving circuit parameter.
Further circuit error is analyzed, it is main to include input amplitude and impedance transformation part offset voltage and imbalance
Electric current and the influence of temperature drift, the influence of ADC and DAC transformed errors, output driving part offset voltage and offset current
And the influence of temperature drift.Above error is mainly linearity error, it may be considered that be fitted to eliminate by final calibration.Tool
Body method is that processor receives the magnitude of voltage of AD converter input, and the output of D/A converter is controlled further according to target resistance resistance,
It is set to export the voltage required for corresponding voltage signal control generation.By repeatedly input and repeatedly output valve adjust, come pair
Adjusted value is fitted (for example with least square method), final to determine adjustment formula.
But, even if for linearity error, but more the reason for be due to error, the error curve that it is integrated is also very multiple
It is miscellaneous, accurate fitting is wanted, data volume needs are very big, in consideration of it, the present invention also provides a kind of source of error analysis and removed and plan
The method for closing the mode that is combined to realize precise resistance value.
1), can be to input amplitude and impedance inverter circuit error analysis for preferred
Error separation is set up to input amplitude and impedance inverter circuit as shown in figure 4, wherein, two inputs are lacked of proper care
Electric current is IB1And IB2, so-called offset current refers to that the two ends of operational amplifier are " void is disconnected " in perfect condition, but in actual circuit
In, the positive-negative input end of operational amplifier has a small amount of electric current to flow into, and this electric current is exactly offset current, and input offset voltage is
UIO, herein so-called offset voltage refer in the ideal situation, it is defeated when the voltage of the positive-negative input end of operational amplifier is identical
Go out voltage and be equal to 0, but in practice, operational amplifier must can just make defeated in an input one small voltage of extra application
Go out voltage equal to 0V, the small voltage is offset voltage, it should be pointed out that offset current and offset voltage can pass through
Measurement is obtained in advance, so passing through the operational amplifier input offset current and input offset voltage to the ADC stages before
Measured in advance, I can be obtainedB1、IB2And UIO, from fig. 4, it can be seen that it is respectively U+ and U-, stream to set amplifier input terminal voltage
Cross resistance R1And R2Electric current be respectively I1And I2.Below equation can be obtained by analysis：
U+=Ui+IB1·Rf+UIO
U-=I1R1
I2=I1+IB2
U+=U-
List solution of equation and obtain output voltage and be：
Wherein U+For the magnitude of voltage at the operational amplifier positive input terminal of importation, U-For importation operational amplifier just
The magnitude of voltage of input end, the input voltage of input voltage type artifical resistance is Ui, resistance R1For importation operational amplifier
Sampling resistor between reverse input end and ground, resistance R2For importation operational amplifier reverse input end and output end it
Between sampling resistor, resistance RfThe input resistance connected by the positive input of importation operational amplifier, voltage UO’For
The output end voltage of importation operational amplifier.
And if the operational amplifier of importation handled as preferable operational amplifier, do not consider offset voltage
With the situation of offset current, then ideally the output voltage values of the operational amplifier of importation are：
So, there is the presence of operational amplifier offset voltage and offset current, cause the reality of ADC stage operational amplifiers
The error of output voltage and desired output voltage is
R1For the sampling resistor between the reverse input end and ground of importation operational amplifier
R2For the sampling resistor between the reverse input end and output end of importation operational amplifier
RfThe input resistance connected by the positive input of importation operational amplifier
UIOFor the offset voltage of importation operational amplifier
IB1For the offset current of importation operational amplifier positive input
IB2For the offset current of importation operational amplifier negative input
UIOFor the offset voltage of the operational amplifier, IB1And IB2It is positive, negative input for the operational amplifier
Offset current.
According to above-mentioned formula, revised simulation electricity is can obtain by being modified in embeded processor to the error
Resistance, meanwhile, calibration fitting is reused to be modified.Due to having lacked an error, the global error of data is just relatively easy
Some, fitting is got up more quick and precisely.
2) secondly, further consider that the influence temperature drift that temperature drift is brought to input current type artifical resistance device is brought
Error influence
If input offset current IB1And IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature is floated
Move as TCV, can obtain the error equation that temperature drift brings is：
U+=Ui+TCIB1·ΔT·Rf+TCVΔT
U-=I1R1
I2=I1+TCIB2·ΔT
U+=U-
Solution of equation is listed to obtain
Ideally the output voltage values of the operational amplifier of importation are：
Analysis is understood, in the case of with offset voltage and offset current, because temperature drift causes ADC stage computings
Error between the actual output voltage and desired output voltage of amplifier is：
R1For the sampling resistor between the reverse input end and ground of importation operational amplifier
R2For the sampling resistor between the reverse input end and output end of importation operational amplifier
RfThe input resistance connected by the positive input of importation operational amplifier
TCV is the offset voltage temperature drift of importation operational amplifier
TCIB1For the offset current temperature drift of importation operational amplifier positive input
TCIB2For the offset current temperature drift of importation operational amplifier negative input
△ T are temperature drift amount
By two-part analysis above, the voltage that actual ADC is collected is
According to above-mentioned formula, revised mould is can obtain by being modified in embeded processor to this two errors
Intend resistance value.Due to having lacked two errors, the global error of data is just relatively more simple, and fitting is got up more quick and precisely.
3) AD converter and the DA transformed errors in DAC stages in ADC stages again, are further considered
All there is transformed error in actually AD converter and D/A converter, be divided into static error and dynamic error.Produce quiet
The reason for state error, has, unstable, the null offset of amplifier of a reference source, internal resistance and pressure drop and electricity when analog switch is turned on
Hinder deviation of resistance etc. in network.Dynamic error is then the additive error produced in the dynamic process of conversion, and it is due to electricity
The influence of distributed constant in road, caused by making the time of everybody voltage signal arrival decoding network output end different.Generally conversion
Error minimum output voltage ULSBMultiple represent, i.e.,
ΔUo=NULSB
Wherein, ULSBIt is 1 to refer to ADC and DAC digital quantities lowest order, corresponding conversion voltage value when remaining is 0, i.e.,
Wherein n changes digit for the maximum of ADC or DAC；
After being analyzed by ADC error, into the magnitude of voltage U after embeded processor actual correctioni' be
Wherein, D1The importation voltage magnitude read for embeded processor and the voltage exported after impedance conversion pass through
Numerical value after AD converter conversion, N1For AD converter digit, U1For the reference voltage of AD converter.
ΔUoppError caused by-input offset current and offset voltage；
TC11Error caused by Δ T- importation temperature drifts；
NADCULSBADCTransformed error caused by-AD converter；
NADCDetermined according to actual measurement ADC error.
Further output par, c DAC errors are analyzed, analysis principle and error Producing reason are with above-mentioned ADC ranks
The error analysis of section is consistent.
ΔUDAC=NDACULSBDAC
Similarly, calibration fitting is carried out again by being modified in embeded processor to the errors of these three types.
4) output driving part error is finally considered
The error model of the part is as shown in figure 5, it is similar with Fig. 4.Below equation can be obtained by analysis：
U+'=UIO'-IB1'·Rf'
I1'=I2'+IB2'
U+'=U-'
It can obtain
Ideally
The error that output driving part output voltage can be obtained is
△Uopo‘For output par, c operational amplifier offset electric current and output voltage error caused by offset voltage,
Rf’For the sampling resistor between the positive input and ground of output par, c operational amplifier
R3’The input resistance connected by the reverse input end of output par, c operational amplifier
R4’For the sampling resistor between the positive input and output end of output par, c operational amplifier
UIO’For the offset voltage of output par, c operational amplifier
IB1’For the offset current of output par, c operational amplifier positive input
IB2’For the offset current of output par, c operational amplifier negative input
UIO’For the offset voltage of the operational amplifier.
The temperature drift of output par, c operational amplifier produce error expression be：
TCV ' is the offset voltage temperature drift of output par, c operational amplifier
TCIB1’For the offset current temperature drift of output par, c operational amplifier positive input
TCIB2’For the offset current temperature drift of output par, c operational amplifier negative input
△ T are temperature drift amount
It is so as to obtain the expression formula after output voltage progress error correction
D2The corresponding digital value of output voltage, N for needed for DAC stage voltages-electric pressure converter2For D/A converter digit, U2
For the reference voltage of D/A converter.
Each parameter error of summary, be to expression formula of the final artifical resistance after error correction further
Wherein
K1Represent input voltage amplitude and impedance transformation part conversion coefficient；
K2Represent output driving part conversion coefficient；
According to above-mentioned formula, the global error of circuit can be accurately calculated, then the formula is implanted into processor
Compensate, then accurately control output voltage and be equal to setting voltage.
Described above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications also should
It is considered as protection scope of the present invention.Although in addition, having used some specific terms in this specification, these terms are only
For convenience of explanation, any limitation is not constituted to the present invention.
Claims (10)
1. input voltage pattern intends resistor, it is characterised in that：Including voltage source, voltage magnitude and the impedance conversion sequentially input
Circuit, AD converter, processor, D/A converter and output driving part, wherein processor receive the voltage of AD converter input
Value, the output of D/A converter is controlled further according to target resistance resistance, it is exported corresponding voltage signal and is controlled required for generating
Voltage.
2. input voltage pattern according to claim 1 intends resistor, it is characterised in that：Calculating for artifical resistance is adopted
Carried out with following manner：
Wherein RxThe resistor resistance of the simulation for needed for, UiRepresent input voltage value, RrefSample resistance value in indication circuit, U0Table
Show sample resistance terminal voltage value, I0Represent to flow through current value in sample resistance.
3. input voltage pattern according to claim 2 intends resistor, it is characterised in that：The voltage magnitude and impedance become
Changing circuit includes the first operational amplifier, and its positive input connects the voltage source, while being also associated with high-precision fixed value
Resistance Rf, connect sampling resistor R between output end and ground1With R2, reverse input end is connected to resistance R1With R2Between tie point.
4. input voltage pattern according to claim 3 intends resistor, it is characterised in that：The output driving part includes
Second operational amplifier, its positive input is connected with one second high-precision fixed resistance Rf’, connected between output end and voltage
Sampling resistor R3With R4, reverse input end is connected to resistance R3With R4Between tie point.
5. input voltage pattern according to claim 4 intends resistor, it is characterised in that：For repairing for artifical resistance value
Just, it is also contemplated that in the case of the offset current and offset voltage of first operational amplifier, the mistake of the first operational amplifier
Difference, and its error is compensated within a processor, the error calculation formula is：
Wherein, UIOFor the offset voltage of the operational amplifier, offset current is IB1And IB2For the operational amplifier it is positive,
The offset current of negative input.
6. input voltage pattern according to claim 5 intends resistor, it is characterised in that：For repairing for artifical resistance value
Just, it is also contemplated that in the case of the temperature drift of first operational amplifier, the error of the first operational amplifier, and by its
Error is compensated within a processor, and the error calculation formula is：
Wherein, input offset current IB1、IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature drift
For TCV.
7. input voltage pattern according to claim 6 intends resistor, it is characterised in that：It is also contemplated that AD converter and DA
The transformed error of converter, its formula is respectively：
ΔUADC=NADCULSBADC；
ΔUDAC=NDACULSBDAC；
Wherein, ULSBADC、ULSBDACIt is 1 to refer to ADC, DAC input digital quantity lowest order respectively, corresponding conversion voltage when remaining is 0,
I.e.
Wherein n1, n2 represent ADC, DAC change data maximum number of digits respectively
NADCDetermined according to actual measurement ADC error, NDACDetermined according to actual measurement DAC errors.
8. input voltage pattern according to claim 7 intends resistor, it is characterised in that：The amendment of the resistance simulation device
It is also contemplated that the second operational amplifier offset electric current and error caused by offset voltage, its calculation are as follows：
Wherein, Δ Uopo- output driving part due to output voltage error caused by offset current and offset voltage,
Rf’For the sampling resistor between the positive input and ground of output par, c operational amplifier
R3’The input resistance connected by the reverse input end of output par, c operational amplifier
R4’For the sampling resistor between the positive input and output end of output par, c operational amplifier
UIO’For the offset voltage of output par, c operational amplifier
IB1’For the offset current of output par, c operational amplifier positive input
IB2’For the offset current of output par, c operational amplifier negative input
UIO’For the offset voltage of the operational amplifier.
Further, it is also contemplated that the error that the second operational amplifier temperature drift of output driving part is produced
Wherein, TCV ' is the offset voltage temperature drift of output par, c operational amplifier
TCIB1’For the offset current temperature drift of output par, c operational amplifier positive input
TCIB2’For the offset current temperature drift of output par, c operational amplifier negative input
△ T are temperature drift amount.
9. input voltage pattern according to claim 8 intends resistor, it is characterised in that：Consider the error, mould
The calculation formula for intending resistance value is as follows：
K1Represent input voltage amplitude and impedance transformation part conversion coefficient；
K2Represent output driving part conversion coefficient.
10. a kind of input voltage pattern intends the resistance control method of resistor, it is characterised in that：It is any using claim 1-9
Voltage-type artifical resistance device described in, controls its resistance to carry out using the method that fitting and error concealment are combined.
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| CN108254702A (en) * | 2018-01-25 | 2018-07-06 | 常州同惠电子股份有限公司 | Resistance simulation device based on multiplying-type digital analog converter |
| CN108254702B (en) * | 2018-01-25 | 2020-05-05 | 常州同惠电子股份有限公司 | Resistor simulation device based on multiplication type digital-to-analog converter |
| CN110967548A (en) * | 2018-09-29 | 2020-04-07 | 株洲中车时代电气股份有限公司 | Program-controlled variable resistor device with current detection function and working method |
| CN109709362A (en) * | 2019-01-18 | 2019-05-03 | 南京优倍电气有限公司 | The circuit of artifical resistance is realized using DAC |
| CN110189790A (en) * | 2019-06-18 | 2019-08-30 | 北京控制与电子技术研究所 | A kind of resistance measurement method based on nonvolatile storage |
| CN110618300A (en) * | 2019-09-18 | 2019-12-27 | 宿州市泰华仪表有限公司 | Circuit for simulating resistor |
| CN115001263A (en) * | 2021-11-26 | 2022-09-02 | 荣耀终端有限公司 | Power supply conversion circuit and electronic equipment |
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