CN107072074A - A kind of processing method of heat emission hole for printing board PCB - Google Patents
A kind of processing method of heat emission hole for printing board PCB Download PDFInfo
- Publication number
- CN107072074A CN107072074A CN201710103517.7A CN201710103517A CN107072074A CN 107072074 A CN107072074 A CN 107072074A CN 201710103517 A CN201710103517 A CN 201710103517A CN 107072074 A CN107072074 A CN 107072074A
- Authority
- CN
- China
- Prior art keywords
- pcb
- heat emission
- emission hole
- electrodeposited coating
- deposited
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
A kind of processing method that the application provides heat emission hole for PCB, by increasing capacitance it is possible to increase the electrodeposited coating of heat emission hole inwall, reduces the influence to PCB surface plating thickness, is conducive to the design of highly denser outer-layer circuit.The processing method includes：At least two layers PCB daughter board is pressed to form PCB, between any two layers of adjacent PCB daughter board having at least includes one layer of target inner conducting layer for being exposed to side wall in inner conducting layer, inner conducting layer；Drilling processing is carried out to PCB, the heat emission hole through PCB is obtained；First electroplating processes are carried out to PCB, PCB outer walls and heat emission hole inwall is deposited the first electrodeposited coating；Windowing processing is carried out respectively to the first electrodeposited coating for being deposited on upper and lower surface, the first area and second area for making upper surface disconnect, and the 3rd region of lower surface disconnects with the 4th region；By at least one layer of target inner conducting layer, the second electroplating processes are carried out to heat emission hole, heat emission hole inwall and first area is deposited the second electrodeposited coating.
Description
Technical field
The application is related to art of printed circuit boards, and is used for printed circuit board (PCB) (Print more particularly, to one kind
Circuit Broading, PCB) heat emission hole processing method.
Background technology
With the development of networking products, people require that the power output of power converter is improved constantly, while wishing it again
Size can come in reduce.The power conversion apparatus generally used at present is surface mount power converter (abbreviation Surface Mount power
Pipe), Surface mount power MOSFET is generally radiated by printed circuit board (PCB), and this just proposes requirement to the heat-sinking capability of pcb board.
In current techniques, realized and radiated using preprocessing heat emission hole in the pcb.In the hole inwall plating thermal conductivity of heat emission hole
Higher heat-conducting layer (for example, copper coating) come accelerate radiating, this is typically realized by electroplating technology.Electroplating technology is by one integral piece
In workpiece immersion electroplating solution, using electrolysis principle, in the process of workpiece surface deposited metal or alloy.Due to being by one integral piece work
Part immerses electroplating solution, and the electroplating process of heat emission hole can be caused to electroplate whole PCB, cause PCB surface heat conduction thickness
Degree increase.The trend that this develops with networking products to smaller direction, PCB develops to thinner direction is contradicted.Therefore, in electricity
After plating, generally require to reduce PCB surface heat-conducting layer thickness by nog plate.
However, the challenge brought is designed as wireless veneer is highly dense, and the challenge that high-speed high frequency heat-radiation belt comes, it is desirable to dissipate
Hot hole realizes radiating on the basis of taking into account highly dense fine rule road.And if PCB surface conductive layer thickness is too big, then it is unfavorable for uniform fine rule
The arrangement on road；Reduce heat-conducting layer thickness even by nog plate, but to result in PCB surface uneven for nog plate process, equally not
Beneficial to the arrangement of uniform fine rule road.
The content of the invention
The processing method that the application provides a kind of heat emission hole for PCB, can realize that the electrodeposited coating of heat emission hole inwall increases
Plus, while reducing the influence of PCB surface plating thickness, be conducive to the design of follow-up highly denser outer-layer circuit.
There is provided a kind of processing method of the heat emission hole for printing board PCB, the outer wall bag of the PCB for first aspect
The side wall for including upper surface, lower surface and being connected between the upper surface and the lower surface, the processing method includes：
At least two layers PCB daughter board is pressed to form PCB, any two layers adjacent PCB at least two layers PCB daughter board
Having between daughter board at least includes conduction in one layer of target in the inner conducting layer between inner conducting layer, at least two layers daughter board
Layer, the target inner conducting layer is exposed at least one face of the side wall；
According to the PCB figures being pre-designed, drilling processing is carried out to the PCB, obtained through the PCB thickness directions
At least one heat emission hole；
Carry out the first electroplating processes to the PCB, the outer wall of the PCB after first electroplating processes and each
The inwall deposition of heat emission hole has the first electrodeposited coating；
The first electrodeposited coating for being deposited on the upper surface and the first electrodeposited coating for being deposited on the lower surface are carried out respectively
Windowing is handled, the first electrodeposited coating of the first area of the upper surface after being handled through the windowing and the first electricity of second area
Coating disconnects, and first electrodeposited coating and the electrodeposited coating of four-range first in the 3rd region of the lower surface disconnect, wherein, institute
First area is stated to be located at the region around the aperture of the heat emission hole in the upper surface, the second area is the upper table
In face away from the heat emission hole region, the 3rd region be the lower surface in be located at the heat emission hole aperture around
Region, the 4th region is the region away from the heat emission hole in the lower surface；
By at least one layer of target inner conducting layer, the second electroplating processes are carried out to the heat emission hole, through described second
The inwall of the heat emission hole after electroplating processes and first area deposition have the second electrodeposited coating.
Therefore, the embodiment of the present invention by inner conducting layer by drawing PCB sides, in order to be connected with electroplating clamp so that
In the case that heat emission hole and peripheral region disconnect with the region away from heat emission hole in PCB upper and lower surface, it can be led by interior
Electric layer realizes parcel plating, and the plating thickness to PCB upper and lower surface is reduced while heat emission hole inner wall thickness is increased
Influence, effective lifting outer layer wiring density while lifting local radiating effect is conducive to follow-up highly denser outer layer line
The design on road.
Alternatively, described pair is deposited on the first electrodeposited coating of the upper surface and is deposited on the first plating of the lower surface
Layer carries out windowing processing respectively, including：
By etching mode to the first electrodeposited coating for being deposited on the upper surface and the first electricity for being deposited on the lower surface
Coating carries out windowing processing respectively.
Alternatively, described pair is deposited on the first electrodeposited coating of the upper surface and is deposited on the first plating of the lower surface
Layer carries out windowing processing respectively, including：
By machining process to being deposited on the first electrodeposited coating of the upper surface and being deposited on the of the lower surface
One electrodeposited coating carries out windowing processing respectively.
Alternatively, described pair is deposited on the first electrodeposited coating of the upper surface and is deposited on the first plating of the lower surface
Layer carries out windowing processing respectively, including：
By laser ablation mode to being deposited on the first electrodeposited coating of the upper surface and being deposited on the of the lower surface
One electrodeposited coating carries out windowing processing respectively.
Alternatively, first electrodeposited coating includes：Copper coating, tin coating, silvering or gold plate, second electrodeposited coating
Including：Copper coating, tin coating, silvering or gold plate.
Alternatively, first electrodeposited coating of the inwall of each heat emission hole and the gross thickness of second electrodeposited coating are deposited on
More than or equal to 2 mils.
By simulation calculation, when the plating thickness increase of heat emission hole inwall, thermal conductivity factor is also improved therewith.
Second aspect there is provided a kind of processing method of the heat emission hole for printing board PCB, including：
At least two layers PCB daughter board is pressed to form PCB, and according to the PCB figures being pre-designed, the PCB bored
Hole is handled, and obtains at least one heat emission hole through the PCB thickness directions；
Dry film is covered to the upper and lower surface of the PCB, and at least one radiates according to the pcb board
The position of each heat emission hole in hole, to the dry film carry out windowing processing, through the windowing handle after dry film in include with
At least one corresponding windowing of at least one described heat emission hole, at least one described windowing and at least one heat emission hole
Position is corresponded, and the pore size each opened a window is less than the pore size of corresponding heat emission hole, so that each heat emission hole quilt
Corresponding windowing is blocked；
The 3rd electroplating processes, the inwall deposition of each heat emission hole after the 3rd electroplating processes are carried out to the PCB
There is the 3rd electrodeposited coating；
The dry film is removed, and the 4th electroplating processes are carried out to the PCB, described in after the 4th electroplating processes
The inwall deposition of PCB outer wall and each heat emission hole has the 4th electrodeposited coating.
Therefore, the embodiment of the present invention covers dry film by the upper and lower surface in PCB, and by opening dry film
Window processing obtains the windowing that aperture is less than heat emission hole aperture, to block the aperture of heat emission hole, it is to avoid electrodeposited coating is deposited on heat emission hole
Aperture and peripheral region, are reduced to the plating thickness on PCB upper and lower surface while heat emission hole inner wall thickness is increased
Influence, effectively lifts outer layer wiring density while lifting local radiating effect, is conducive to follow-up highly denser outer-layer circuit
Design.
Alternatively, in described at least one heat emission hole according to the pcb board each heat emission hole position, to described dry
Film carries out windowing processing, including：
According to the PCB at least one heat emission hole each heat emission hole position, by etching mode to described
Dry film carries out windowing processing.
Alternatively, it is described according to the PCB at least one heat emission hole each heat emission hole position, to described dry
Film carries out windowing processing, including：
According to the PCB at least one heat emission hole each heat emission hole position, pass through machining process pair
The dry film carries out windowing processing.
Alternatively, it is described according to the PCB at least one heat emission hole each heat emission hole position, to described dry
Film carries out windowing processing, including：
According to the PCB at least one heat emission hole each heat emission hole position, pass through laser ablation mode pair
The dry film carries out windowing processing.
Alternatively, the 3rd electrodeposited coating includes：Copper coating, tin coating, silvering or gold plate, the 4th electrodeposited coating
Including：Copper coating, tin coating, silvering or gold plate.
Alternatively, the 3rd electrodeposited coating and the gross thickness of the 4th electrodeposited coating of the inwall of each heat emission hole are deposited on
More than or equal to 2 mils.
By simulation calculation, when the plating thickness increase of heat emission hole inwall, thermal conductivity factor is also improved therewith.
The third aspect includes there is provided a kind of computer program product, the computer program product：Computer program generation
Code, when the computer program code is run by the processing unit of transmission equipment, transmitting element or processor, transmitter, makes
Obtaining in any possible implementation of the above-mentioned first aspect of execution for sending equipment or first aspect is used for dissipating for PCB
The processing method of hot hole.
Fourth aspect includes there is provided a kind of computer program product, the computer program product：Computer program generation
Code, when the computer program code is run by the processing unit of transmission equipment, transmitting element or processor, transmitter, makes
Obtaining in any possible implementation of the above-mentioned second aspect of execution for sending equipment or second aspect is used for dissipating for PCB
The processing method of hot hole.
There is provided a kind of computer-readable recording medium in terms of 5th, be stored with finger in the computer-readable recording medium
Order, when run on a computer so that computer performs any possible realization of above-mentioned first aspect or first aspect
Method in mode.
There is provided a kind of computer-readable recording medium in terms of 6th, be stored with finger in the computer-readable recording medium
Order, when run on a computer so that computer performs any possible realization of above-mentioned second aspect or second aspect
Method in mode.
Brief description of the drawings
Fig. 1 applies to the PCB of embodiment of the present invention schematic diagram.
Fig. 2 is the indicative flowchart of the processing method of the heat emission hole for PCB according to the embodiment of the application one.
Fig. 3 is the schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.
Fig. 4 is another schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.
Fig. 5 is the another schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.
Fig. 6 is another schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.
Fig. 7 is the indicative flowchart of the processing method of the heat emission hole for PCB according to another embodiment of the application.
Fig. 8 is the schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.
Fig. 9 is another schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.
Figure 10 is another schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.
Figure 11 is the another schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.
Embodiment
Below in conjunction with accompanying drawing, the technical scheme in the application is described.
For the ease of understanding the embodiment of the present invention, Fig. 1 is combined first and describes the PCB for being applied to the embodiment of the present invention in detail.
Fig. 1 shows the PCB 10 suitable for the embodiment of the present invention.As illustrated, Surface mount power MOSFET is mounted on PCB surface,
For realizing that power changes (for example, power amplification etc.).Under normal circumstances, Surface mount power MOSFET can be from metal-oxide half
Conductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET) etc..
By taking MOSFET as an example, its radiating depends on drain pin and package casing.On the one hand, overlaying on the copper of PCB surface can make
For Surface Mount MOSFET radiating element, the heat that power consumption is produced reaches PCB on MOSFET substrate by its drain lead
On, recycle the copper on PCB to reject heat in surrounding environment.On the other hand, the heat that power consumption is produced is encapsulated by substrate through power tube
Shell is directly scattered in surrounding environment.The heat emission hole of the embodiment of the present invention relates generally to former radiating mode, that is, passes through PCB
On copper radiating.
In order to adapt to the demand of the highly dense design of wireless veneer and high-speed high frequency radiating, this application provides a kind of heat emission hole
Processing method.Hereinafter, the processing method for describing the heat emission hole for PCB of the embodiment of the present invention in detail with reference to Fig. 2 to Figure 11.
It should be noted that in the embodiment being described below, being related to each technique of PCB processing, such as：Pressure
Close, drill, electroplating, cover dry film, moving back film, etching windowing, mechanical windowing, laser windowing, nog plate etc., but these techniques is specific
Process and detailed process of the prior art are same or similar, for sake of simplicity, being omitted in the application to the detailed of its detailed process
Explanation.
Fig. 2 is the indicative flowchart of the processing method 200 of the heat emission hole for PCB according to the embodiment of the application one.
It is appreciated that the outer wall of the PCB in the embodiment of the present invention includes upper surface, lower surface and is connected to the upper and lower surface
Between side wall.
As shown in Fig. 2 the processing method 200 includes：
S210, at least two layers PCB daughter board is pressed to form PCB, and any two layers between at least two layers PCB daughter board is adjacent
PCB daughter boards between there is inner conducting layer, at least include in the inner conducting layer between at least two layers PCB daughter board in one layer of target
Conductive layer, the target inner conducting layer is exposed at least one face of the side wall of the PCB.
Fig. 3 is the schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.As illustrated,
PCB can be pressed by multi-layer PCB daughter board and formed, and (for ease of distinguishing, can will be located at PCB by conductive layer between layers
Conductive layer between plate is denoted as inner conducting layer) isolation.The conductive layer can be used for making signal line and circuit connection.It can manage
Solution, the layer number of the inner conducting layer is related to the number of plies of PCB daughter boards, therefore, and the layer number of the inner conducting layer is at least one layer.
Then, one layer of target inner conducting layer is at least included at least one layer of inner conducting layer, the target inner conducting layer is exposed to PCB sides wall
At least one face.Assuming that the PCB is rectangular parallelepiped structure, then its side wall includes four faces.Then the target inner conducting layer is exposed to this
At least one in four faces, in order to the second electroplating processes in follow-up S250, can describe the mistake in detail with reference to S250 hereinafter
Journey.
The conductive layer can be by preparing, typically for conductive material, and the conductive material can be copper.It should be understood that here
The conductive material of example should not constitute any restriction to the application, and the conductive material can also be other metal materials or high score
Subconductivity material, the application is to this and is not particularly limited.
It should be noted that Fig. 3 and Fig. 4 for showing hereinafter to Fig. 6, Fig. 8 to Figure 11 are shown for the ease of understanding
PCB partial cross section schematic diagram.In these schematic diagrames, not shown PCB side boundaries, that is to say, that heat emission hole can
The portion that can be existed only in PCB, and PCB side may be possible in the position away from heat emission hole, also, in the PCB
Also there are more regions and do not configure heat emission hole.Just as shown in Figure 5, the area of second area is likely larger than the face of first area
Product, four-range area is likely larger than the area in the 3rd region, and the application is to this and is not particularly limited.For sake of simplicity, hereinafter
The middle explanation omitted to same or similar situation.
S220, according to the PCB figures being pre-designed, drilling processing is carried out to the PCB, obtains running through the PCB thickness directions
At least one heat emission hole.
Specifically, PCB design personnel can be pre-designed PCB figures, and the wiring that the figure includes to the PCB is set
Meter, the layout of electronic component and the layout with external connection.The PCB figures being pre-designed according to this, it may be determined that at which
Location arrangements Surface mount power MOSFET by heat emission hole, it is necessary to be radiated, and then determine the particular location of heat emission hole.Determining
Behind the position of heat emission hole, drilling processing is carried out to PCB, the heat emission hole through the PCB thickness directions is obtained.
Wherein, PCB thickness directions are i.e. perpendicular to the upper surface of the PCB or the direction of lower surface.Under normal circumstances, PCB
Upper and lower surface is substantially parallel, and the thickness of the PCB is the distance between upper surface and lower surface.
Fig. 4 is another schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.As schemed
Show, heat emission hole runs through the thickness direction of the PCB, i.e. heat emission hole can be the through hole for being basically parallel to the PCB thickness directions, or
Person says that the central shaft of the heat emission hole is substantially parallel with PCB thickness direction.It is mentioned here substantially parallel, it is possible to understand that angle
It is approximately 0 °.That is, the central shaft of heat emission hole and the PCB angle of thickness direction are approximately 0 °, in other words, heat emission hole
The angle of central shaft and PCB upper surface or lower surface is approximately 90 °.In preparation process, the angle there may be certain
Error range, this error can be understood as the axial deviation of the through hole, but the error is being machined in acceptable scope
, it is negligible, in other words, is allowed.
It is appreciated that the quantity of the heat emission hole can be according to the quantity and the area of the PCB of surface-pasted power tube
(that is, the area of upper surface or lower surface) is determined.Under normal circumstances, at least one heat emission hole is included in PCB.
In addition, from fig. 4 it can be seen that inner conducting layer is through PCB's, therefore, in the PCB after being handled through drilling, inside leading
Electric layer is exposed to the inwall of each heat emission hole, in other words, it can be seen that the section of inner conducting layer on the inwall of heat emission hole.
S230, carries out the first electroplating processes to the PCB, the outer wall of the PCB after first electroplating processes and each dissipates
The inwall of hot hole has deposited the first electrodeposited coating.
Specifically, the first electroplating processes are the electric plating of whole board to the PCB.Electroplating clamp can be by being connected in S210
Any one in the target inner conducting layer, PCB upper surface or the PCB lower surface that refer to realizes the conducting of circuit, then
Using electrolysis principle, the first electrodeposited coating is deposited in the inwall of PCB outside and heat emission hole.
Non-limiting as example, first electrodeposited coating includes：Copper coating, tin coating, silvering or gold plate.
It is understood that under normal circumstances, the outer wall of each layer of PCB daughter board is all coated with copper, and copper can be used as conduction
Layer is connected with electroplating clamp, realizes the conducting of circuit.Wherein, by pressing the PCB to be formed upper surface and following table to PCB daughter boards
The copper in face can be understood as outer conducting layer and (for ease of distinguishing and illustrating, the conductive layer outside PCB is denoted as into outer conduction
Layer), the copper between two adjacent PCB daughter boards can be understood as inner conducting layer.
In embodiments of the present invention, the first of PCB outer wall and the inwall of heat emission hole is deposited on after the first electroplating processes
The thickness of electrodeposited coating can be 1 mil (mil).
S240, enters respectively to being deposited on PCB the first electrodeposited coating of upper surface with the first electrodeposited coating for being deposited on lower surface
Row windowing is handled, the first plating of the first electrodeposited coating and second area of the first area of the upper surface after being handled through the windowing
Layer disconnects, and first electrodeposited coating and the electrodeposited coating of four-range first in the 3rd region of the lower surface disconnect.
Wherein, the first area is is located at the region around the aperture of the heat emission hole in the upper surface, and the second area is
Region away from the heat emission hole in the upper surface, the 3rd region is the area in the lower surface around the aperture of the heat emission hole
Domain, the 4th region is the region away from the heat emission hole in the lower surface.
After it have passed through the first electroplating processes, full plate has all electroplated the first electrodeposited coating, for PCB, except dissipating
Hot hole inwall is needed to deposit thicker heat dissipating layer, and other positions need not be thickened.Therefore, the application is in PCB upper surface and following table
Windowing processing is made respectively on first electrodeposited coating in face, has made the aperture peripheral region of heat emission hole (for example, corresponding respectively to upper surface
First area and lower surface the 3rd region) and away from heat emission hole region (for example, corresponding respectively to the secondth area of upper surface
Domain and the 4th region of lower surface) disconnect, i.e. cut off heat emission hole and aperture peripheral region and the circuit away from radiating bore region
Conducting.
Fig. 5 is the another schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.As schemed
Show.Windowing processing is carried out by the first electrodeposited coating of the first electrodeposited coating to upper surface and lower surface, makes to be deposited on upper surface
First electrodeposited coating of the first electrodeposited coating of first area and the second area for being deposited on upper surface disconnects, and is deposited on lower surface
The 3rd region the first electrodeposited coating and be deposited on lower surface the electrodeposited coating of four-range first disconnect.Shown in Fig. 5 is to be somebody's turn to do
PCB schematic cross-section, if (overlooking) upper surface of the PCB in terms of the direction that arrow is pointed to, it can be seen that heat emission hole and hole
The region of mouth peripheral region and remote heat emission hole is separated completely.
Alternatively, the first electrodeposited coating for being deposited on the upper surface and the first electrodeposited coating for being deposited on the lower surface are entered respectively
Row windowing is handled, including：
By etching mode to being deposited on the first electrodeposited coating of the upper surface and being deposited on the first electrodeposited coating of the lower surface
Windowing processing is carried out respectively.
Alternatively, the first electrodeposited coating for being deposited on the upper surface and the first electrodeposited coating for being deposited on the lower surface are entered respectively
Row windowing is handled, including：
By machining mode to the first electrodeposited coating for being deposited on the upper surface and the first electricity for being deposited on the lower surface
Coating carries out windowing processing respectively
Alternatively, the first electrodeposited coating for being deposited on the upper surface and the first electrodeposited coating for being deposited on the lower surface are entered respectively
Row windowing is handled, including：
By laser ablation mode to the first electrodeposited coating for being deposited on the upper surface and the first electricity for being deposited on the lower surface
Coating carries out windowing processing respectively.
It should be understood that the specific method listed above that windowing processing is carried out to the first electrodeposited coating is merely illustrative, no
Tackle the application and constitute any limit.
It is understood that after being handled by above-mentioned windowing, if passing through outer conducting layer (that is, PCB upper surface or following table
The conductive layer in face) electroplated, electrodeposited coating can not be deposited on heat emission hole inwall, and be simply deposited on electrodeposited coating
The second area of PCB upper surface and the 4th region of lower surface, and the processing request to heat emission hole proposed with the application
(i.e., it is ensured that the thick heat-conducting layer (heat transfer is realized by electrodeposited coating) of heat emission hole inwall, made without the upper and lower surface thickness to PCB
Into influence) contradict.If on the contrary, realizing the circuit turn-on with heat emission hole inwall by some conductive layer, just can realize
Parcel plating to heat emission hole inwall, and this conductive layer can be the target inner conducting layer referred in S210.
S250, by least one layer of target inner conducting layer, the second electroplating processes are carried out to the heat emission hole, through second electricity
The inwall of the heat emission hole after plating and first area deposition have the second electrodeposited coating.
Fig. 6 is another schematic diagram of the processing method of the heat emission hole for PCB according to the embodiment of the application one.Fig. 6 shows
The PCB obtained after the second electroplating processes is gone out.As illustrated, by the way that electroplating clamp is connected into target inner conducting layer, can
To realize to region (that is, the of first area and lower surface including upper surface around heat emission hole inwall and radiating aperture
Three regions) parcel plating, make heat emission hole inwall deposit have thicker electrodeposited coating (that is, the first electrodeposited coating and the second electrodeposited coating
Thickness sum).
In embodiments of the present invention, the thickness of the second electrodeposited coating of the inwall of heat emission hole is deposited on after the second electroplating processes
Can be 2mil.That is, after the first electroplating processes and the second electroplating processes, the electrodeposited coating deposited in heat emission hole inwall
Thickness can reach 3mil.
It should be understood that the thickness for the electrodeposited coating illustrated here is merely illustrative, by adjust the concentration of electroplating solution with
And electroplating time, the thickness of electrodeposited coating can be controlled to increased or decrease.It will be appreciated that by the embodiment of the present invention to first
The windowing of electrodeposited coating realizes the parcel plating to heat emission hole inwall.
Non-limiting as example, first electrodeposited coating includes：Copper coating, tin coating, silvering or gold plate.
In embodiments of the present invention, the material of the first electrodeposited coating deposition and the material of the second electrodeposited coating deposition can with identical or
It is different.No matter the material of the first electrodeposited coating and the second electrodeposited coating is identical or different, by depositing thicker electricity in heat emission hole inwall
Coating, can improve the thermal conductivity factor of the heat emission hole.
Typically, first electrodeposited coating and the second electrodeposited coating are copper coating.
By simulation calculation, if the first electrodeposited coating and the second electrodeposited coating are copper coating, the first electrodeposited coating and second
The thickness sum (that is, heat emission hole inwall copper is thick) of electrodeposited coating is doubled, and thermal conductivity factor is doubled；When heat emission hole inwall copper is thick
When increasing to 4mil by 1mil, thermal conductivity factor improves three times.
It should be strongly noted that due to being handled by windowing, the first area of upper surface and second area are disconnected, under
3rd region on surface and the 4th region disconnect, and after the second electroplating processes, second electrodeposited coating can also be deposited on upper table
The first area in face and the 3rd region of lower surface.In order to ensure that the thickness of PCB surface is uniform, the can be reduced by nog plate
One region and the plating thickness in the 3rd region.
But, nog plate to the first area of upper surface and the nog plate to the 3rd region of lower surface are only to part
The nog plate in region, does not have influence on most of region not drilled, that is, upper surface second area and lower surface the 4th
Region.Therefore, second area and four-range uniformly-coating layer by nog plate because less being influenceed, and surface is uniform, favorably
In the arrangement of highly dense fine rule road.
Because, connect up and the copper of PCB surface is carried out on PCB indeed through pre-designed PCB figures
Etch to realize., can will be unwanted that is, be etched according to PCB figures to PCB surface with mask plate to copper
Copper is got rid of, and is only left for the copper cash as circuit connection.The application to heat emission hole by carrying out parcel plating so that PCB
Upper and lower surface copper it is thick smaller, it is only necessary to, just can be with using the etchant solution of a small amount of low concentration, the corrosion by the short time
Etching obtains required circuit；Also, the flow of etchant solution is small, it is easy to control, it is to avoid a large amount of etchant solutions are flowed into, and are difficult
Control and cause the etching to PCB surface uneven.
It should also be noted that, only having used different face for ease of distinguishing the first electrodeposited coating and the second electrodeposited coating in Fig. 6
Color is illustrated, but this should not constitute any limit to the application.As described above, the first electrodeposited coating and the second electrodeposited coating can
Think identical material or different materials, the application is to this and is not particularly limited.
Therefore, the embodiment of the present invention by inner conducting layer by drawing PCB sides, in order to be connected with electroplating clamp so that
In the case that heat emission hole and peripheral region disconnect with the region away from heat emission hole in PCB upper and lower surface, it can be led by interior
Electric layer realizes parcel plating, and the plating thickness to PCB upper and lower surface is reduced while heat emission hole inner wall thickness is increased
Influence, effective lifting outer layer wiring density while lifting local radiating effect is conducive to follow-up highly denser outer layer line
The design on road.
Fig. 7 is the schematic flow of the processing method 300 of the heat emission hole for PCB according to another embodiment of the application
Figure.
As shown in fig. 7, the processing method 300 includes：
S310, at least two layers PCB daughter board is pressed to form PCB, and according to the PCB figures being pre-designed, the PCB is carried out
Drilling is handled, and obtains at least one heat emission hole through the PCB thickness directions.
Fig. 8 is the schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.As schemed
Show, the PCB can be pressed by multi-layer PCB daughter board and formed.PCB design personnel can be pre-designed PCB figures, be set in advance according to this
The PCB figures of meter, it may be determined that the position of heat emission hole, to carry out drilling processing to PCB, are obtained through the PCB thickness directions
At least one heat emission hole.
S320, dry film is covered to the upper and lower surface of the PCB, and according at least one heat emission hole in the pcb board
In each heat emission hole position, windowing processing is carried out to the dry film, included in the dry film after being handled through the windowing with this at least
A pair of the position 1 of at least one corresponding windowing of one heat emission hole, at least one windowing and at least one heat emission hole
Should, the pore size each opened a window is less than the pore size of corresponding heat emission hole, so that each heat emission hole is opened by corresponding
Window is blocked.
Fig. 9 is another schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.As schemed
It is shown, dry film is covered each by PCB upper and lower surface, to avoid electrodeposited coating to be deposited on the upper of PCB in electroplating process
Surface and lower surface.Meanwhile, in order to ensure that electrodeposited coating is deposited on the inwall of heat emission hole, can by pair with heat emission hole relative position
The dry film at place carries out windowing processing.Include at least one windowing in dry film after windowing is handled, at least one windowing
Corresponded with least one heat emission hole, the pore size each opened a window is less than the pore size of corresponding heat emission hole.It is optional
Ground, this carries out windowing processing to the dry film according to the position of each heat emission hole in the pcb board at least one heat emission hole, including：
According to the position of each heat emission hole in this in the PCB at least one heat emission hole, the dry film is entered by etching mode
Row windowing is handled.
Alternatively, this is opened the dry film according to the position of each heat emission hole in this in the PCB at least one heat emission hole
Window processing, including：
It is dry to this by machining process according to the position of each heat emission hole in this in the PCB at least one heat emission hole
Film carries out windowing processing.
Alternatively, this is opened the dry film according to the position of each heat emission hole in this in the PCB at least one heat emission hole
Window processing, including：
It is dry to this by laser ablation mode according to the position of each heat emission hole in this in the PCB at least one heat emission hole
Film carries out windowing processing.
S330, the 3rd electroplating processes, the inwall deposition of each heat emission hole after the 3rd electroplating processes are carried out to the PCB
There is the 3rd electrodeposited coating.
By carrying out windowing processing to dry film in S320, dry film can be covered in the aperture peripheral region of heat emission hole, with
Corresponding heat emission hole is blocked, to avoid sedimentary from being deposited in the aperture peripheral region of heat emission hole.
Figure 10 is the another schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.Figure
The PCB obtained by the 3rd electroplating processes is shown in 10.By covering dry film in S330 and dry film being carried out at windowing
Reason, the parcel plating to heat emission hole is realized in the 3rd electroplating processes.Through the PCB after the 3rd electroplating processes, do not done
The heat emission hole inwall deposition of film covering has the 3rd electrodeposited coating, and the region covered by dry film does not deposit the 3rd electrodeposited coating then.
In embodiments of the present invention, the thickness that the 3rd electrodeposited coating of heat emission hole inwall is deposited on after the 3rd electroplating processes is
2mil。
It should be noted that the position relationship on the border that the 3rd electrodeposited coating after the 3rd electroplating processes opens a window with dry film
The outer surface for being possible to be rendered as the 3rd electrodeposited coating is concordant with the border opened a window, it is also possible to because electroplating time is shorter or electroplates molten
The more low reason of liquid concentration does not reach the border of dry film windowing also, or even it is also possible to because electroplating time is longer or electroplating solution is dense
Spend the reason such as higher
S340, removes the dry film, and carries out the 4th electroplating processes to the PCB, the PCB's after the 4th electroplating processes
The inwall deposition of outer wall and each heat emission hole has the 4th electrodeposited coating.
Figure 11 is another schematic diagram of the processing method of the heat emission hole for PCB according to another embodiment of the application.Figure
The PCB obtained by the 4th electroplating processes is shown in 11.By removing dry film, it is pair carrying out the 4th electroplating processes to PCB
PCB carries out electric plating of whole board, and PCB outer walls and heat emission hole inwall after the 4th electroplating processes have deposited the 4th electrodeposited coating.
In embodiments of the present invention, after the 4th electroplating processes PCB outer walls and the 4th of heat emission hole inwall deposition the
The thickness of electrodeposited coating is 1mil.
Alternatively, the 3rd electrodeposited coating of inwall and the gross thickness of the 4th electrodeposited coating for being deposited on each heat emission hole are more than
Or equal to 2 mil mil.
In embodiments of the present invention, the gross thickness of the 3rd electrodeposited coating and the 4th electrodeposited coating is 3mil.
It should be understood that the thickness for the electrodeposited coating illustrated here is merely illustrative, by adjust the concentration of electroplating solution with
And electroplating time, the thickness of electrodeposited coating can be controlled to increased or decrease.
It should be noted that only having used different face for ease of distinguishing the 3rd electrodeposited coating and the 4th electrodeposited coating in Figure 11
Color is illustrated, but this should not constitute any limit to the application.3rd electrodeposited coating and the 4th electrodeposited coating can be identical material
Or different materials, the application is to this and is not particularly limited.
Alternatively, the 3rd electrodeposited coating includes：Copper coating, tin coating, silvering or gold plate, the 4th electrodeposited coating bag
Include：Copper coating, tin coating, silvering or gold plate.
Therefore, the embodiment of the present invention covers dry film by the upper and lower surface in PCB, and by opening dry film
Window processing obtains the windowing that aperture is less than heat emission hole aperture, to block the aperture of heat emission hole, it is to avoid electrodeposited coating is deposited on heat emission hole
Aperture and peripheral region, are reduced to the plating thickness on PCB upper and lower surface while heat emission hole inner wall thickness is increased
Influence, effectively lifts outer layer wiring density while lifting local radiating effect, is conducive to follow-up highly denser outer-layer circuit
Design.
It should be noted that the processing method of the heat emission hole of above example is only to the portion in the process of the heat emission hole
Operation break-down, any limit is constituted without tackling the application.For example, the processing method also includes electroplating (Plated on hole
Filed Via, POFV) etc., its detailed process with it is same or similar in the prior art, for sake of simplicity, repeating no more here.
It should be understood that in embodiments of the present invention, " first ", " second ", " the 3rd " and " 4th " is only to be used to distinguish difference
Object, for example, distinguish different electroplating processes, different electrodeposited coating, different regions etc. should not be constituted any to the present invention
Limit.
It should also be understood that each embodiment of the processing method of the above-mentioned heat emission hole for PCB enumerated, can pass through robot
Or digital control processing mode is performed, device software or technique for performing the processing method can be deposited by performing be stored in
Computer program code in reservoir performs above-mentioned processing method.
It should also be understood that in various embodiments of the present invention, the size of the sequence number of above-mentioned each process is not meant to perform
The priority of order, the execution sequence of each process should be determined with its function and internal logic, without the reality of the reply embodiment of the present invention
Apply process and constitute any limit.
Those of ordinary skill in the art are it is to be appreciated that the list of each example described with reference to the embodiments described herein
Member and algorithm steps, can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually
Performed with hardware or software mode, depending on the application-specific and design constraint of technical scheme.Professional and technical personnel
Described function can be realized using distinct methods to each specific application, but this realization is it is not considered that exceed
Scope of the present application.
It is apparent to those skilled in the art that, for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, may be referred to the corresponding process in preceding method embodiment, will not be repeated here.
, can be with several embodiments provided herein, it should be understood that disclosed systems, devices and methods
Realize by another way.For example, device embodiment described above is only schematical, for example, the unit
Divide, only a kind of division of logic function there can be other dividing mode when actually realizing, such as multiple units or component
Another system can be combined or be desirably integrated into, or some features can be ignored, or do not perform.It is another, it is shown or
The coupling each other discussed or direct-coupling or communication connection can be the indirect couplings of device or unit by some interfaces
Close or communicate to connect, can be electrical, machinery or other forms.
The unit illustrated as separating component can be or may not be it is physically separate, it is aobvious as unit
The part shown can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple
On NE.Some or all of unit therein can be selected to realize the mesh of this embodiment scheme according to the actual needs
's.
In addition, each functional unit in the application each embodiment can be integrated in a processing unit, can also
That unit is individually physically present, can also two or more units it is integrated in a unit.
If the function is realized using in the form of SFU software functional unit and is used as independent production marketing or in use, can be with
It is stored in a computer read/write memory medium.Understood based on such, the technical scheme of the application is substantially in other words
The part contributed to prior art or the part of the technical scheme can be embodied in the form of software product, the meter
Calculation machine software product is stored in a storage medium, including some instructions are to cause a computer equipment (can be individual
People's computer, server, or network equipment etc.) perform all or part of step of the application each embodiment methods described.
And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage (Read-Only Memory, ROM), arbitrary access are deposited
Reservoir (Random Access Memory, RAM), magnetic disc or CD etc. are various can be with the medium of store program codes.
It is described above, the only embodiment of the application, but the protection domain of the application is not limited thereto, and it is any
Those familiar with the art can readily occur in change or replacement in the technical scope that the application is disclosed, and should all contain
Cover within the protection domain of the application.Therefore, the protection domain of the application should be based on the protection scope of the described claims.
Claims (12)
1. the processing method of a kind of heat emission hole for printing board PCB, it is characterised in that the outer wall of the PCB includes upper
Surface, lower surface and the side wall being connected between the upper surface and the lower surface, the processing method include：
At least two layers PCB daughter board is pressed to form PCB, any two layers adjacent PCB daughter board at least two layers PCB daughter board
Between there is inner conducting layer, one layer of target inner conducting layer, institute are at least included in the inner conducting layer between at least two layers daughter board
State at least one face that target inner conducting layer is exposed to the side wall；
According to the PCB figures being pre-designed, drilling processing is carried out to the PCB, obtained through the PCB thickness directions at least
One heat emission hole；
The first electroplating processes, the outer wall of the PCB after first electroplating processes and each radiating are carried out to the PCB
The inwall deposition in hole has the first electrodeposited coating；
The first electrodeposited coating for being deposited on the upper surface and the first electrodeposited coating for being deposited on the lower surface are opened a window respectively
Processing, the first electrodeposited coating and the first electrodeposited coating of second area of the first area of the upper surface after being handled through the windowing
Disconnect, and the first electrodeposited coating and the electrodeposited coating of four-range first disconnection in the 3rd region of the lower surface, wherein, described the
One region is is located at the region around the aperture of the heat emission hole in the upper surface, the second area is in the upper surface
Region away from the heat emission hole, the 3rd region is the area in the lower surface around the aperture of the heat emission hole
Domain, the 4th region is the region away from the heat emission hole in the lower surface；
By at least one layer of target inner conducting layer, the second electroplating processes are carried out to the heat emission hole, through the described second plating
The inwall of the heat emission hole after processing and first area deposition have the second electrodeposited coating.
2. processing method according to claim 1, it is characterised in that described pair is deposited on the first of the upper surface and electroplates
Layer carries out windowing processing respectively with the first electrodeposited coating for being deposited on the lower surface, including：
By etching mode to being deposited on the first electrodeposited coating of the upper surface and being deposited on the first electrodeposited coating of the lower surface
Windowing processing is carried out respectively.
3. processing method according to claim 1, it is characterised in that described pair is deposited on the first of the upper surface and electroplates
Layer carries out windowing processing respectively with the first electrodeposited coating for being deposited on the lower surface, including：
By machining process to the first electrodeposited coating for being deposited on the upper surface and the first electricity for being deposited on the lower surface
Coating carries out windowing processing respectively.
4. processing method according to claim 1, it is characterised in that described pair is deposited on the first of the upper surface and electroplates
Layer carries out windowing processing respectively with the first electrodeposited coating for being deposited on the lower surface, including：
By laser ablation mode to the first electrodeposited coating for being deposited on the upper surface and the first electricity for being deposited on the lower surface
Coating carries out windowing processing respectively.
5. processing method according to any one of claim 1 to 4, it is characterised in that first electrodeposited coating includes：Copper
Coating, tin coating, silvering or gold plate, second electrodeposited coating include：Copper coating, tin coating, silvering or gold plate.
6. processing method according to any one of claim 1 to 5, it is characterised in that be deposited on the interior of each heat emission hole
First electrodeposited coating of wall and the gross thickness of second electrodeposited coating are more than or equal to 2 mils.
7. a kind of processing method of heat emission hole for printing board PCB, it is characterised in that including：
At least two layers PCB daughter board is pressed to form PCB, and according to the PCB figures being pre-designed, drill hole is carried out to the PCB
Reason, obtains at least one heat emission hole through the PCB thickness directions；
Dry film is covered to the upper and lower surface of the PCB, and according to the pcb board at least one heat emission hole
The position of each heat emission hole, windowing processing is carried out to the dry film, include in the dry film after being handled through the windowing with it is described
At least one corresponding windowing of at least one heat emission hole, at least one described windowing and the position of at least one heat emission hole
Correspond, the pore size each opened a window is less than the pore size of corresponding heat emission hole so that each heat emission hole by pair
The windowing answered is blocked；
The 3rd electroplating processes are carried out to the PCB, the inwall deposition of each heat emission hole after the 3rd electroplating processes has the
Three electrodeposited coatings；
The dry film is removed, and the 4th electroplating processes are carried out to the PCB, the PCB's after the 4th electroplating processes
The inwall deposition of outer wall and each heat emission hole has the 4th electrodeposited coating.
8. processing method according to claim 7, it is characterised in that it is described according to the pcb board at least one dissipate
The position of each heat emission hole in hot hole, windowing processing is carried out to the dry film, including：
According to the PCB at least one heat emission hole each heat emission hole position, by etching mode to the dry film
Carry out windowing processing.
9. processing method according to claim 7, it is characterised in that it is described according to the PCB at least one dissipate
The position of each heat emission hole in hot hole, windowing processing is carried out to the dry film, including：
According to the PCB at least one heat emission hole each heat emission hole position, by machining process to described
Dry film carries out windowing processing.
10. processing method according to claim 7, it is characterised in that it is described according to the PCB at least one dissipate
The position of each heat emission hole in hot hole, windowing processing is carried out to the dry film, including：
According to the PCB at least one heat emission hole each heat emission hole position, by laser ablation mode to described
Dry film carries out windowing processing.
11. the processing method according to any one of claim 7 to 10, it is characterised in that the 3rd electrodeposited coating includes：
Copper coating, tin coating, silvering or gold plate, the 4th electrodeposited coating include：Copper coating, tin coating, silvering or gold plate.
12. the processing method according to any one of claim 7 to 11, it is characterised in that be deposited on each heat emission hole
The 3rd electrodeposited coating of inwall and the gross thickness of the 4th electrodeposited coating are more than or equal to 2 mils.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710103517.7A CN107072074B (en) | 2017-02-24 | 2017-02-24 | A kind of processing method of the heat release hole for printing board PCB |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710103517.7A CN107072074B (en) | 2017-02-24 | 2017-02-24 | A kind of processing method of the heat release hole for printing board PCB |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107072074A true CN107072074A (en) | 2017-08-18 |
| CN107072074B CN107072074B (en) | 2019-07-12 |
Family
ID=59621330
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710103517.7A Active CN107072074B (en) | 2017-02-24 | 2017-02-24 | A kind of processing method of the heat release hole for printing board PCB |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107072074B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108471669A (en) * | 2018-02-28 | 2018-08-31 | 宁波央腾汽车电子有限公司 | A kind of welding method reducing printed circuit board thermal resistance |
| CN109413846A (en) * | 2018-12-29 | 2019-03-01 | 广东美的制冷设备有限公司 | Highly integrated electric-controlled plate and electric appliance |
| CN109951949A (en) * | 2019-04-19 | 2019-06-28 | 苏州浪潮智能科技有限公司 | It is a kind of for improving the processing method of wiring board heat dissipation performance |
| CN111263506A (en) * | 2018-11-30 | 2020-06-09 | 浙江宇视科技有限公司 | Circuit board and electronic equipment |
| CN112776003A (en) * | 2019-11-07 | 2021-05-11 | 台达电子工业股份有限公司 | Heat abstractor and robot that is suitable for thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000133914A (en) * | 1998-10-23 | 2000-05-12 | Hitachi Aic Inc | Printed wiring board and manufacture thereof |
| TW200838385A (en) * | 2007-03-14 | 2008-09-16 | Phoenix Prec Technology Corp | Circuit board structure having fine circuits and fabrication method thereof |
| KR20140145769A (en) * | 2013-06-14 | 2014-12-24 | 삼성전기주식회사 | Printed circuit board and printed circuit board manufacturing the same |
| CN104582272A (en) * | 2013-10-09 | 2015-04-29 | 珠海方正科技高密电子有限公司 | Method and device for manufacturing metalized step trough on side wall |
| CN105392299A (en) * | 2015-11-27 | 2016-03-09 | 北大方正集团有限公司 | Method for improving uniformity of PCB copper reduction |
-
2017
- 2017-02-24 CN CN201710103517.7A patent/CN107072074B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000133914A (en) * | 1998-10-23 | 2000-05-12 | Hitachi Aic Inc | Printed wiring board and manufacture thereof |
| TW200838385A (en) * | 2007-03-14 | 2008-09-16 | Phoenix Prec Technology Corp | Circuit board structure having fine circuits and fabrication method thereof |
| KR20140145769A (en) * | 2013-06-14 | 2014-12-24 | 삼성전기주식회사 | Printed circuit board and printed circuit board manufacturing the same |
| CN104582272A (en) * | 2013-10-09 | 2015-04-29 | 珠海方正科技高密电子有限公司 | Method and device for manufacturing metalized step trough on side wall |
| CN105392299A (en) * | 2015-11-27 | 2016-03-09 | 北大方正集团有限公司 | Method for improving uniformity of PCB copper reduction |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108471669A (en) * | 2018-02-28 | 2018-08-31 | 宁波央腾汽车电子有限公司 | A kind of welding method reducing printed circuit board thermal resistance |
| CN111263506A (en) * | 2018-11-30 | 2020-06-09 | 浙江宇视科技有限公司 | Circuit board and electronic equipment |
| CN111263506B (en) * | 2018-11-30 | 2021-06-01 | 浙江宇视科技有限公司 | Circuit board and electronic equipment |
| CN109413846A (en) * | 2018-12-29 | 2019-03-01 | 广东美的制冷设备有限公司 | Highly integrated electric-controlled plate and electric appliance |
| CN109951949A (en) * | 2019-04-19 | 2019-06-28 | 苏州浪潮智能科技有限公司 | It is a kind of for improving the processing method of wiring board heat dissipation performance |
| CN112776003A (en) * | 2019-11-07 | 2021-05-11 | 台达电子工业股份有限公司 | Heat abstractor and robot that is suitable for thereof |
| CN112776003B (en) * | 2019-11-07 | 2022-05-06 | 台达电子工业股份有限公司 | Heat abstractor and robot that is suitable for thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107072074B (en) | 2019-07-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107072074A (en) | A kind of processing method of heat emission hole for printing board PCB | |
| JP5515586B2 (en) | Wiring board and manufacturing method thereof | |
| CN108966478B (en) | Flexible circuit board and manufacturing method thereof | |
| CN103687344A (en) | Circuit board manufacturing method | |
| CN103687313A (en) | Method for graphically machining bottoms of blind grooves | |
| CN104185377A (en) | Fine-line PCB manufacturing method | |
| CN105934084B (en) | A kind of printed circuit board and its full addition production method | |
| CN113613399A (en) | Circuit board manufacturing method and circuit board | |
| CN104425286A (en) | IC carrier plate, semiconductor device having the same and manufacturing method of the IC carrier plate | |
| CN103813652A (en) | Processing method of blind hole | |
| CN102548254A (en) | Nuclear-free preparation method of chip carrier | |
| CN105530768B (en) | A kind of production method and circuit board of circuit board | |
| CN109548320B (en) | Circuit board with stepped bonding pad and forming method thereof | |
| TW201743671A (en) | Manufacturing method of high-density multilayer board | |
| US10219374B2 (en) | Printed wiring board | |
| CN106658959A (en) | Flexible circuit board and manufacturing method thereof | |
| JP4470499B2 (en) | Multilayer wiring board manufacturing method and multilayer wiring board | |
| CN110418519A (en) | Multistage printed circuit board differentiation processing method of through holes and its printed circuit board | |
| CN109379840A (en) | A kind of processing method and circuit board of hanging golden finger | |
| CN107889359A (en) | Multi-layer PCB preparation method | |
| CN106332444B (en) | Circuit board and manufacturing method thereof | |
| CN105451469A (en) | Circuit board golden finger manufacturing method | |
| CN113194620A (en) | Method for drilling non-metallized hole and printed circuit board | |
| CN209299584U (en) | A kind of solderability pcb board | |
| CN111128679A (en) | Power division microwave substrate and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |