CN106992819B - Ultrasonic signal excitation, control, reception, conditioning and communication system - Google Patents

Ultrasonic signal excitation, control, reception, conditioning and communication system Download PDF

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CN106992819B
CN106992819B CN201710231268.XA CN201710231268A CN106992819B CN 106992819 B CN106992819 B CN 106992819B CN 201710231268 A CN201710231268 A CN 201710231268A CN 106992819 B CN106992819 B CN 106992819B
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signal
pin
module
capacitor
resistor
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CN106992819A (en
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方文平
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Hangzhou Jianwei Technology Co ltd
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Hangzhou Jianwei Technology Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B11/00—Transmission systems employing sonic, ultrasonic or infrasonic waves
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B14/00—Transmission systems not characterised by the medium used for transmission
    • H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
    • H04B14/026—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse time characteristics modulation, e.g. width, position, interval

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
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  • Transducers For Ultrasonic Waves (AREA)

Abstract

The invention discloses an ultrasonic signal excitation, control, receiving, conditioning and communication system. The ultrasonic signal transmission device comprises a signal transmission circuit, a signal conditioning circuit, a communication module and a power circuit, wherein the signal transmission circuit is used for ultrasonic signal transmission excitation and excitation control, the signal conditioning circuit is used for ultrasonic signal receiving and conditioning, the communication module is connected between the signal transmission circuit and the signal conditioning circuit to communicate respectively on an upper computer, and the power circuit is connected to the signal transmission circuit and the signal conditioning circuit to supply power respectively. The high-voltage square wave ultrasonic excitation signal generated by the invention can be compatible with various ultrasonic transducers, and has two modes of receiving and transmitting integration and receiving and separating, the system can be communicated with an upper computer to realize parameter configuration, the ultrasonic echo signal received by the system is accessed into a third-party signal acquisition system for analysis and processing, and the system has stable operation, high reliability and high application value.

Description

Ultrasonic signal excitation, control, reception, conditioning and communication system
Technical Field
The present invention relates to signal excitation, control, reception, conditioning and communication systems, and more particularly to ultrasonic signal excitation, control, reception, conditioning and communication systems.
Background
The present nondestructive detection technology is an indispensable technology and an effective tool in industrial development, reflects the industrial development level of a country to a certain extent, and has been acknowledged as important. The ultrasonic detection technology is used as a part of the nondestructive detection technology, and the application prospect of the ultrasonic detection technology is more and more extensive. Ultrasonic waves are used as a signal source of a nondestructive testing technology, and the research on the technologies of excitation, control, receiving, conditioning, communication and the like of the ultrasonic waves is particularly prominent and important.
Disclosure of Invention
In order to meet the requirements of various ultrasonic nondestructive tests, the invention provides an ultrasonic signal excitation, control, receiving, conditioning and communication system, which comprehensively applies a bottom embedded system, an FPGA technology, a high-voltage pulse excitation technology, a signal amplification technology, a signal filtering technology and a communication system, improves the ultrasonic excitation and the ultrasonic echo signal conditioning, realizes a high-performance ultrasonic signal excitation, control, receiving, conditioning and communication system with adjustable trigger frequency, adjustable trigger mode, adjustable pulse delay and pulse width, adjustable gain and adaptive ultrasonic probe, and can be used as an independent module for ultrasonic flaw detection and ultrasonic residual stress measurement.
In order to realize the functions, the invention adopts the technical scheme that:
the ultrasonic signal transmission device comprises a signal transmission circuit, a signal conditioning circuit, a communication module and a power circuit, wherein the signal transmission circuit is used for ultrasonic signal transmission excitation and excitation control, the signal conditioning circuit is used for ultrasonic signal receiving and conditioning, the communication module is connected between the signal transmission circuit and the signal conditioning circuit respectively and used for serial communication, and the power circuit is connected to the signal transmission circuit and the signal conditioning circuit respectively and used for power supply.
The signal transmitting circuit specifically comprises a signal transmitting main control module, a square wave pulse control module, a high-voltage pulse excitation module, a transmitting impedance matching module and an ultrasonic signal transmitting probe, wherein the square wave pulse control module comprises a pulse extension module and a pulse width control module, and the square wave pulse control module, the high-voltage pulse excitation module, the transmitting impedance matching module and the ultrasonic signal transmitting probe are sequentially connected:
the ultrasonic wave excitation device comprises a signal emission main control module for controlling and processing the emission of an excitation ultrasonic signal, wherein the signal emission main control module is respectively connected with a square wave pulse control module, a high-voltage pulse excitation module and an emission impedance matching module and respectively sends control signals to the square wave pulse control module, the high-voltage pulse excitation module and the emission impedance matching module to control the work of each module;
the square wave pulse control module is used for receiving a square wave pulse trigger signal from the signal transmission main control module to generate a square wave pulse signal and controlling the time delay and the pulse width of the square wave pulse signal;
the device comprises a high-voltage pulse excitation module, a pulse signal generation module and a pulse signal generation module, wherein the high-voltage pulse excitation module is used for receiving a square wave pulse signal from a square wave pulse control module and modulating the square wave pulse signal to generate a high-voltage excitation pulse signal;
the device comprises a transmitting impedance matching module, a receiving module and a transmitting module, wherein the transmitting impedance matching module is used for receiving a high-voltage excitation pulse signal from a high-voltage pulse excitation module and generating an impedance-matched signal by impedance matching with an ultrasonic signal receiving probe;
the ultrasonic signal transmitting probe is used for receiving the impedance matched signal from the transmitting impedance matching module and generating an ultrasonic transmitting signal;
the signal conditioning circuit specifically comprises a signal conditioning main control module, a pre-amplification and attenuation module, a receiving impedance matching module, a high-pass filtering control module, a program-controlled secondary amplification module and an ultrasonic signal receiving probe, wherein the pre-amplification and attenuation module, the receiving impedance matching module, the high-pass filtering control module, the program-controlled secondary amplification module and the ultrasonic signal receiving probe are sequentially connected:
comprises an ultrasonic signal receiving probe for receiving ultrasonic echo signals;
the ultrasonic echo signal matching device comprises a receiving impedance matching module, a receiving impedance matching module and a signal processing module, wherein the receiving impedance matching module is used for receiving an ultrasonic echo signal from an ultrasonic signal receiving probe and generating an impedance matched signal by impedance matching with the ultrasonic signal receiving probe;
the device comprises a pre-amplification and attenuation module for amplifying and attenuating an ultrasonic echo signal;
the ultrasonic echo signal pre-amplifying and attenuating module is used for receiving the ultrasonic echo signal and filtering the ultrasonic echo signal;
the ultrasonic echo signal processing device comprises a program-controlled secondary amplification module, a high-pass filtering control module and a gain adjusting module, wherein the program-controlled secondary amplification module is used for receiving an ultrasonic echo signal from the high-pass filtering control module and adjusting the gain;
the ultrasonic echo signal processing device comprises a signal conditioning main control module for receiving and processing an ultrasonic echo signal, wherein the signal conditioning main control module is respectively connected with a pre-amplifying and attenuating module, a receiving impedance matching module, a high-pass filtering control module and a program-controlled secondary amplifying module and respectively sends control signals to the pre-amplifying and attenuating module, the receiving impedance matching module, the high-pass filtering control module and the program-controlled secondary amplifying module to control the work of each module;
the communication module is specifically:
the device comprises a transmitting communication circuit which is used for being connected between a signal transmitting main control module of a signal transmitting circuit and an upper computer for communication connection;
the signal conditioning communication circuit comprises a signal conditioning main control module and an upper computer, wherein the signal conditioning main control module is used for being connected with the signal conditioning circuit and is in communication connection with the upper computer.
The power supply circuit is used for supplying power to the signal emission main control module, the square wave pulse control module, the high-voltage pulse excitation module, the impedance matching module, the signal conditioning main control module, the receiving impedance matching module, the pre-amplification and attenuation module, the high-pass filtering control module, the program-controlled secondary amplification module, the communication module and the like.
The power supply circuit comprises a +3.3V voltage output circuit, a +7V voltage output circuit, a-7V voltage output circuit, a +5VIN voltage output circuit, a +12VIN voltage output circuit and a-12 VIN voltage output circuit.
The +3.3V voltage output circuit comprises: the SHDN pin and the IN pin of the power management chip U300 are connected and then respectively connected with one ends of an inductor L301 and a capacitor C315, the other end of the inductor L301 is respectively connected with +5VIN input voltage and a capacitor C314, the other end of the capacitor C314 is grounded, the other end of the capacitor C315 is grounded, the GND pin and the TAP pin of the power management chip U300 are grounded, the OUT pin of the power management chip U300 is respectively connected with one ends of a resistor R306, a capacitor C313 and the inductor L300, the other end of the resistor R306 is respectively connected with an ADJ pin and a resistor R307, the other ends of the resistor R307 and the capacitor C312 are grounded, the other end of the inductor L300 is respectively connected with the other end of the capacitor C313 and one end of the capacitor C300 and then outputs 3.3V voltage, and the other ends of the capacitor C313 and the capacitor C300 are grounded.
The +7V voltage output circuit comprises: the SHDN pin and the IN pin of the power management chip U301 are connected and then connected with the +12VIN input voltage and the capacitor C323, the other end of the inductor L323 is grounded, the GND pin and the TAP pin are grounded, the OUT pin of the power management chip U301 is connected with one end of the resistor R308, the capacitor C321 and the inductor L306 respectively, the other end of the resistor R308 is connected with one end of the ADJ pin of the power management chip U301 and one end of the resistor R309 respectively, the other end of the resistor R309 and the other end of the capacitor C321 are grounded, the other end of the inductor L306 is connected with one end of the capacitor C322, one end of the capacitor C307, one end of the capacitor C305 and one end of the inductor L308 respectively, the other ends of the capacitor C322, the capacitor C307 and the capacitor C305 are grounded, the other end of the inductor L308 is connected with one end of the capacitor C327 and one end of the capacitor C306 respectively and outputs +7V voltage, and the other ends of the capacitor C327 and the capacitor C306 are grounded.
the-7V voltage output circuit comprises: the GND pin of the power management chip U302 is grounded, the FB pin is connected with the VOUT pin through a resistor R312, the FB pin is grounded through a resistor R311, the REF pin is grounded through a resistor R310, the VIN pin and the TAP pin are connected with-12 VIN input voltage, the TAP pin is grounded through a capacitor C325, the VOUT pin is grounded through a resistor R301 and a capacitor C324, two ends of the resistor R301 and the capacitor C324 which are connected in series are connected in parallel with two ends of an inductor L307 and a capacitor C326 which are connected in series, the capacitor C326 and the capacitor C308 are connected in parallel, a leading-out port between the inductor L307 and the capacitor C326 is respectively connected with one ends of the inductor L309 and the capacitor C309, the other end of the capacitor C309 is grounded, the other end of the inductor L309 is respectively connected with one ends of the capacitor C328 and the capacitor C310 and outputs-7V voltage, and the other ends of the capacitor C328 and the capacitor C310 are grounded.
The +5VIN voltage output circuit comprises: the +5VIN output voltage end is respectively connected with one end of a capacitor C301, one end of a capacitor C316 and one end of an inductor L302, the other ends of the capacitor C301 and the capacitor C316 are grounded, the other end of the inductor L302 is respectively connected with one end of the capacitor C302, one end of a capacitor C317 and one end of an inductor L303, the other ends of the capacitor C302 and the capacitor C317 are grounded, the other end of the inductor L303 is respectively connected with one end of a capacitor C311 and the external +5V voltage, and the other end of the capacitor C311 is grounded.
The +12VIN voltage output circuit comprises: the +12VIN output voltage end is respectively connected with one end of a capacitor C319, one end of a capacitor C304 and one end of an inductor L305, the other ends of the capacitor C319 and the capacitor C304 are grounded, the other end of the inductor L305 is respectively connected with one end of a capacitor C303, one end of a capacitor C318 and one end of an inductor L304, the other ends of the capacitor C303 and the capacitor C318 are grounded, the other end of the inductor L304 is respectively connected with one end of a capacitor C320 and the external +12V voltage, and the other end of the capacitor C320 is grounded.
The-12 VIN voltage output circuit comprises: the output-12 VIN voltage end is respectively connected with one end of a capacitor C322 and one end of an inductor L310, the other end of the capacitor C322 is grounded, the other end of the inductor L310 is respectively connected with one end of a capacitor C329, one end of a capacitor C330 and one end of an inductor L311, the other ends of the capacitor C329 and the capacitor C330 are grounded, the other end of the inductor L311 is respectively connected with one end of a capacitor C333 and an external-12V voltage, and the other end of the capacitor C333 is grounded.
The transmitting communication circuit comprises a communication chip U100 connected to an upper computer, a VCC pin of the communication chip U100 is connected with a DI2 pin through a capacitor C181, DI2, ED, ER and GND pins are connected and then grounded, a DO1 pin and a pin are connected with a signal transmitting main control module, an R11 pin is connected with one end of a resistor R100, the other end of the resistor R100 is respectively connected with one ends of a resistor R101 and a resistor R102, the other end of the resistor R101 is grounded, and the other end of the resistor R102 is connected with the pin.
The conditioning communication circuit comprises a communication chip IC1T connected to an upper computer, a VCC pin and a DI2 pin of the communication chip IC1T are connected through a capacitor C1T, DI2, ED, ER and GND pins are connected and then grounded, a DO1 pin and the pins are connected with a signal conditioning main control module, an R11 pin is connected with one end of a resistor R2T, the other end of the resistor R2T is connected with one ends of a resistor R3T and a resistor R4T respectively, the other end of the resistor R3T is grounded, and the other end of the resistor R4T is connected with the pins.
The signal transmission main control module comprises a chip IC2TA and a chip XIT, a pulse transmission IO pin of the chip IC2TA is connected with one end of a resistor R5T, the other end of the resistor R5T outputs a square wave pulse trigger signal, a 3V3IO1 pin, a 3V3INT pin and a 3V3IO2 pin are connected with +3.3V voltage, an IO/GCLK1 pin is connected with one end of a resistor R8T, the other end of the resistor R8T is connected with a CLK pin of the chip XIT, an EN pin of the chip XIT is connected with +3.3V voltage, a GND pin of the chip XIT is grounded, a VCC pin of the chip XIT is connected with +3.3V voltage through one ends of capacitors C4T, C5T and C6T respectively, and the other ends of the capacitors C4T, C5T and C6T are grounded.
The square wave pulse control module comprises a pulse delay chip IC4T, a pulse width control chip IC5T, a chip IC6T and a reverse booster IC7T: the TRIG pin of the chip IC4T is connected with a square wave pulse trigger signal, the RES pin and the GND pin of the chip IC4T are connected with the ground, the P0-P11 pins of the chip IC4T are connected with a signal emission main control module, the AE pin and the VDD pin of the chip IC4T are connected with +5V voltage, the VDD pin is connected with one ends of a capacitor C39T and a capacitor C41T, the other ends of the capacitor C39T and the capacitor C41T are connected with the ground, and the OUTB pin of the chip IC4T is connected with the TRIG pin of the chip IC 5T; RES pins and GND pins of a chip IC5T are grounded, P0-P11 pins of the chip IC5T are connected with a signal emission main control module, AE pins and VDD pins are connected with +5V voltage, the VDD pin of the chip IC5T is connected with one ends of a capacitor C42T and a capacitor C44T, the other ends of the capacitor C42T and the capacitor C44T are grounded, and an OUT pin of the chip IC5T is connected with 4 pins and 5 pins of a chip IC 6T; the 14 pin of the chip IC6T is respectively connected with +5V voltage and one end of a capacitor C38T, the other end of the capacitor C38T is grounded, the 6 pin of the chip IC6T is connected with one end of a resistor R30T, the other end of the resistor R30T is connected with the 1 pin of the reverse booster IC7T, the 5 pin of the reverse booster IC7T is connected with one end of a capacitor C47T, the other end of the capacitor C47T is connected with one fixed end of an adjustable resistor R32T and one end of a resistor R33T, the sliding end of the adjustable resistor R32T is connected with one end of a resistor R31T, the other fixed end of the adjustable resistor R32T and the other end of the resistor R33T are connected with one end of a resistor R34T together, the other end of the resistor R31T outputs square wave pulse signals, the other end of the resistor R34T is grounded, the 6 pin of the reverse booster IC7T is respectively connected with one ends of capacitors C81T, C82T, C83T, C45T, C46T and one end of an inductor L16T, and the other end of the capacitors C81T, C82T, C83T and the other end of the inductor L16T is grounded.
The high-voltage pulse excitation module comprises a power chip POEWR1T and a switch K2T: the square wave pulse signal (input signal) is respectively connected with the base electrodes of a triode V10T and a triode V18T, the emitter electrode of the triode V18T is respectively connected with one end of an inductor L11T, a capacitor C88T, a capacitor C89T and a capacitor C90T, the other end of the inductor L11T is connected with-12V voltage, the other ends of the capacitors C88T, C89T and C90T are grounded, the collector electrode of the triode V18T is respectively connected with one end of a resistor R54T and the emitter electrode of the triode V10T, the other end of the resistor R54T is respectively connected with one end of a resistor R58T and the grid electrode of an MOS tube V14T, the other end of the R58T is grounded, the source electrode of the MOS tube V14T is connected with one end of a resistor R62T, the other end of the resistor R62T is grounded, the drain electrode of the MOS tube V14T is connected with one ends of capacitors C118T and C119T, the other ends of the capacitors C118T and C119T are connected with one end of a resistor R90T and one end of a diode V22T, the other ends of the resistor R90T and the diode V22T are grounded, the drain electrode of the MOS tube V14T is used as an output signal and is connected with the anode of the diode V9T and the source electrode of the MOS tube V7T, the cathode of the diode V9T is connected with the emitter of the triode V8T, the base electrode of the triode V8T is respectively connected with the resistor R6T, the resistor R52T, the capacitors C59T-C63T and one end of the resistor R51T and the grid electrode of the MOS tube, the collector of the triode V8T and the other ends of the resistors R6T, R52T and the capacitors C59T-C63T are grounded, the other end of the resistor R51T is connected with one end of the resistor R44T, the other end of the resistor R44T is connected with one end of the resistor R41T, and the other end of the resistor R41T is respectively connected with one ends of the capacitors C33T, C49T, C48T, C52T and C51T, the cathode of the voltage regulator V2T and the pin 3 of the power supply chip POWR 1T.
The 4 feet of a power supply chip POEWR1T are respectively connected with the other ends of capacitors C33T, C49T, C48T, C52T and C51T, the 1 foot of the chip POEWR1T is connected with the 2 feet through a capacitor C18T, the 2 feet of the POEWR1T are connected with +24V voltage, the anode of a voltage regulator tube V2T is respectively connected with one ends of resistors R42T, R43T and R44T and the drain electrode of a MOS tube V7T, the other ends of the resistors R39T, R42T, R43T and R44T are connected with one end of a capacitor C55T, the other end of the capacitor C55T is connected with the anode of a voltage regulator tube V5T, one ends of a resistor R38T and a resistor R40T, the cathode of the voltage regulator tube V5T is respectively connected with the cathode of a diode V6T, a resistor R48T, capacitors C64T and C58T, the anode of a diode V6T is connected with the other ends of the capacitors C64T and C58T, the other end of the resistor R48T is respectively connected with one end of an inductor L17T, a capacitor C126T and a capacitor T and a C128T, the other ends of capacitors C126T, C127T and C128T are grounded, the other end of an inductor L17T is connected with +12V voltage, the other ends of a resistor R38T and a resistor R40T are connected with one end of a resistor R46T and the cathode of a voltage regulator tube V3T, the other end of the resistor R46T is grounded, the anode of the voltage regulator tube V3T is connected with the cathode of a diode V1T, the anode of a diode V4T and one end of a resistor R47T, the other end of the resistor R47T is grounded, the anode of the diode V1T and the cathode of the diode V4T are connected with a pin 1 of a switch K2T and output high-voltage excitation pulses, a pin 3 of the switch K2T is connected with +12V voltage, a pin 5 of the switch K2T is connected with the drain electrode of a MOS tube Q2T, a pin 7 of the switch K2T is connected with a terminal X9, the grid electrode of the MOS tube Q2T is connected with a signal emission module through a resistor R50T, and the source electrode of the Q2T is connected with the grid electrode of the signal emission module through a capacitor C57T after being grounded.
The transmitting impedance matching module comprises MOS tubes Q3T-Q6T and switches K3T-K6T: the grid electrode of the MOS tube Q3T is connected with the signal emission main control module through a resistor R71T, the source electrode of the MOS tube Q3T is connected with the grid electrode of the MOS tube Q3T through a capacitor C70T, the drain electrode of the MOS tube Q3T is connected with a pin 5 of a switch K3T, and a pin 3 of the switch K3T is connected with +12V voltage; a pin 1 of the switch K3T is connected with a pin 1 of the switch K4T, a grid electrode of the MOS tube Q4T is connected with the signal emission main control module through a resistor R72T, a source electrode of the MOS tube Q4T is connected with a grid electrode of the MOS tube Q4T through a capacitor C71T, and a drain electrode of the MOS tube Q4T is connected with a pin 5 of the switch K4T; a pin 3 of the switch K4T is connected with a +12V voltage, a pin 7 of the switch K4T is connected with a pin 1 of the switch K5T, a grid electrode of the MOS tube Q5T is connected with the signal emission main control module through a resistor R73T, a source electrode of the MOS tube Q5T is connected with a grid electrode of the MOS tube Q5T through a capacitor C72T, and a drain electrode of the MOS tube Q5T is connected with a pin 5 of the switch K5T; the 3-pin of the switch K5T is connected with the +12V voltage, the 7-pin of the switch K5T is connected with the 7-pin of the switch K6T, the grid electrode of the MOS tube Q6T is connected with the signal emission main control module through the resistor R74T, the source electrode of the MOS tube Q6T is connected with the grid electrode of the MOS tube Q6T through the capacitor C73T, the drain electrode of the MOS tube Q6T is connected with the 5-pin of the switch K6T, the 3-pin of the switch K6T is connected with the +12V voltage, and the 1-pin of the switch K6T outputs a high-voltage pulse excitation signal matched with the impedance of the ultrasonic emission probe.
The signal conditioning main control module comprises a chip U101 and a chip Y100, wherein an IO/GCLK0 pin of the chip U101 is connected with one end of a resistor R108, the other end of the resistor R108 is connected with a CLK pin of the chip Y100, an EN pin of the chip Y100 is connected with +3.3V voltage, a GND pin of the chip Y100 is grounded, a VCC pin of the chip Y100 is connected with one end of capacitors C136, C137 and C138 and +3.3V voltage respectively, and the other ends of the capacitors C136, C137 and C138 are grounded.
The receiving impedance matching module comprises MOS tubes Q707 and Q700-Q702 and switches K707 and K700-K702: the grid of the MOS tube Q707 is connected with the signal conditioning main control module through a resistor R707, the source of the MOS tube Q707 is connected with the grid of the MOS tube Q707 through a capacitor C707, the drain of the MOS tube Q707 is connected with a pin 5 of a switch K707, a pin 3 of the switch K707 is connected with +12V voltage, a pin 1 of the switch K707 is connected with an ultrasonic receiving signal end, a pin 7 of the switch K707 outputs signals after impedance matching, the grid of the MOS tube Q700 is connected with the signal conditioning main control module through a resistor R700, the source of the MOS tube Q700 is connected with the grid of the MOS tube Q700 through a capacitor C700, the drain of the MOS tube Q700 is connected with a pin 5 of the switch K700, a pin 3 of the switch K700 is connected with +12V voltage, and a pin 7 of the switch K700 outputs signals after impedance matching, A pin 1 of a switch K700 is connected with a pin 1 of a switch K701, a grid electrode of an MOS tube Q701 is connected with a signal conditioning main control module through a resistor R701, a source electrode of the MOS tube Q701 is connected with a grid electrode of the MOS tube Q701 through a capacitor C701, a drain electrode of the MOS tube Q701 is connected with a pin 5 of the switch K701, a pin 3 of the switch K701 is connected with a +12V voltage, a pin 7 of the switch K701 is connected with a pin 7 of a switch K702, a grid electrode of the MOS tube Q702 is connected with a signal emission main control module through a resistor R702, a source electrode of the MOS tube Q702 is connected with a grid electrode of the MOS tube Q702 through a capacitor C702, a drain electrode of the MOS tube Q702 is connected with a pin 5 of the switch K702, a pin 3 of the switch K702 is connected with a +12V voltage, and a pin 1 output of the switch K702 is connected with a 15 ohm resistor and then grounded.
The pre-amplification and attenuation module comprises chips U402-U404: the signal (input signal) after impedance matching is connected to one end of a resistor R423, a resistor R409 and a resistor R417, the other end of the resistor R423 is connected with a resistor R424 IN series and then connected with a resistor R402 and a pin 3 of a voltage regulator tube U405, the other end of the resistor R409 is connected with a resistor R410 IN series and then connected with a resistor R407 and a pin 3 of a voltage regulator tube U406, the other end of the resistor R417 is connected with a resistor R418 IN series and then connected with a resistor R415 and a pin 3 of a voltage regulator tube U407, the pin 3 of the voltage regulator tube U405 is connected with a pin + IN of a chip U402 through a resistor R403, the pin 3 of the voltage regulator tube U406 is connected with a pin-IN of a chip U403, and the pin 3 of the voltage regulator tube U407 is connected with a pin-IN of a chip U404.
A resistor R401 and a capacitor C400 are connected IN parallel between an FB pin and an IN pin of a chip U402, the IN pin of the chip U402 is grounded after passing through the resistor R400 and the capacitor C401 respectively, a-5V pin of the chip U402 is grounded after passing through the capacitors C422 and C404 respectively, a GND pin of the chip U402 is grounded, a +5V pin of the chip U402 is grounded after passing through the capacitors C421 and C402 respectively, a VOUT pin of the chip U402 is connected with a 10 pin of a relay K400 through the resistor R404, a CC pin of the chip U402 is connected IN series with the capacitor C405 after passing through the resistor R405 and the capacitor C403 respectively, the pins 1, 4, 6 and 9 of the relay K400 are grounded, a pin 2 of the relay K400 is connected with a pin 1 of the diode D400 and a drain of the MOS transistor Q400, a pin 3 of the diode D400 is connected with a pin 3 of the relay K400, a source of the MOS transistor Q400 is grounded, a gate of the MOS transistor Q400 is connected with the 406R and the capacitor C406R 406 and the other end of the signal conditioning module is connected with the ground, and the other end of the relay K400 outputs an attenuated signal or the signal of the relay K400 is attenuated.
The FB pin of the chip U403 is connected with the-IN pin through a resistor R408 and a capacitor C407 respectively, the + IN pin of the chip U403 is connected with the ground through capacitors C424 and C410 and R412 respectively, the GND pin of the chip U403 is connected with the ground, the +5V pin of the chip U403 is connected with the ground through capacitors C423 and C408 respectively, the VOUT pin of the chip U403 is connected with the 10 pin of the relay K401 through a resistor R411, the CC pin of the chip U403 is connected with the ground through a resistor R413 and a capacitor C409 respectively and then connected with the capacitor C411 IN series, the pins 1, 4, 6 and 9 of the relay K401 are connected with the ground, the pin 2 of the relay K401 is connected with the pin 1 of the diode D401 and the drain of the MOS tube Q401, the pin 3 of the diode D401 is connected with the pin 3 of the relay K401, the source of the MOS tube Q401 is connected with the ground, the gate of the MOS tube Q401 is connected with one end of the resistor R414 and one end of the capacitor C412 respectively, the other end of the resistor R414 is connected with the main control signal conditioning module, the other end of the capacitor C412 is connected with the ground, and the pin 5 of the relay K401 outputs an amplified or attenuated signal.
The FB pin of the chip U404 is connected with the-IN pin through a resistor R416 and a capacitor C413 respectively, the + IN pin of the chip U404 is grounded through capacitors C416, C426 and a resistor R420 respectively, the GND pin of the chip U404 is grounded, the +5V pin of the chip U404 is grounded through capacitors C425 and C414 respectively, the VOUT pin of the chip U404 is connected with the 10 pin of the relay K402 through a resistor R419, the CC pin of the chip U404 is grounded through a resistor R421 and a capacitor C415 respectively and then connected with the capacitor C417 IN series, the pins 1, 4, 6 and 9 of the relay K402 are grounded, the pin 2 of the relay K402 is connected with the pin 1 of the diode D402 and the drain of the MOS tube Q402, the pin 3 of the diode D402 is connected with the pin 3 of the relay K402, the source of the MOS tube Q402 is grounded, the gate of the MOS tube Q402 is connected with one end of the resistor R422 and one end of the capacitor C418 respectively, the other end of the resistor R422 is connected with the main control signal conditioning module, the other end of the capacitor C418 is grounded, and the pin 5 of the relay K402 outputs an amplified or attenuated signal.
The high-pass filtering control module comprises relays K600-K602, output signals of the pre-amplifying and attenuating module are respectively connected with a pin 10 of the relay K600 and one ends of capacitors C601, C602, C604 and C605, the other ends of the capacitors C601 and C602 are connected with the pin 10 of the relay K601, and the other ends of the capacitors C604 and C605 are connected with the pin 10 of the relay K602. Pins 1, 4, 6 and 9 of the relay K600 are grounded, pin 2 of the relay K600 is respectively connected with pin 1 of the diode D600 and the drain electrode of the MOS tube Q600, pin 3 of the diode D600 is connected with pin 3 of the relay K600, the source electrode of the MOS tube Q600 is grounded, the grid electrode of the MOS tube Q600 is connected with one end of the capacitor C600 and one end of the resistor R600, the other end of the capacitor C600 is grounded, and the other end of the resistor R600 is connected with the signal conditioning main control module; pins 1, 4, 6 and 9 of the relay K601 are grounded, pin 2 of the relay K601 is respectively connected with pin 1 of the diode D601 and the drain electrode of the MOS tube Q601, pin 3 of the diode D601 is connected with pin 3 of the K601, the source electrode of the MOS tube Q601 is grounded, the grid electrode of the MOS tube Q601 is connected with one end of a capacitor C603 and one end of a resistor R601, the other end of the capacitor C603 is grounded, and the other end of the resistor R601 is connected with the signal conditioning main control module; pins 1, 4, 6 and 9 of the relay K602 are grounded, pin 2 of the relay K602 is respectively connected with pin 1 of the diode D602 and the drain electrode of the MOS tube Q602, pin 3 of the diode D602 is connected with pin 3 of the K602, the source electrode of the MOS tube Q602 is grounded, the grid electrode of the MOS tube Q602 is connected with one end of the capacitor C606 and one end of the resistor R602, the other end of the capacitor C606 is grounded, and the other end of the resistor R602 is connected with the signal conditioning main control module; the 5 pins of the relay K600, the relay K601 and the relay K602 are grounded through a resistor R606 and output to the differential converter as the output end of the high-pass filtering control module, and the single-ended signals after high-pass filtering are converted into two paths of differential signals through the differential converter.
The program-controlled secondary amplifying circuit comprises a chip U210, a chip U211 and a chip U208: the negative differential signal Sig _ Isolated _ B-sent by the high-pass filtering control module is connected with the pin 3 of the clamping diode U214 after passing through the resistor R210, the pin 3 of the clamping diode U214 is connected with the pin 16 of the chip U210, the positive differential signal Sig _ Isolated _ B + sent by the high-pass filtering control module is connected with the pin 1 and the pin 2 of the clamping diode U214 after passing through the resistor R211, and the pin 1 of the clamping diode U214 is connected with the pin 1 of the chip U210; pins 2, 8, 10, 15 and 17 of the chip U210 are grounded, pins 3 and 4 of the chip U210 are grounded through a capacitor C216, pin 6 of the chip U210 is grounded through a capacitor C220, pin 7 of the chip U210 is grounded through a capacitor C218, pin 8 of the chip U210 is connected with pins 1 and 2 of the clamping diode U215 after being connected with a resistor R204 and a capacitor C251 in series, pin 9 of the chip U210 is connected with pin 3 of the clamping diode U215 after being connected with a resistor R200 and a capacitor C248, pin 11 of the chip U210 is grounded through a capacitor C204, and pins 12, 13 and 14 of the chip U210 are connected with the signal conditioning main control module. A pin 3 of the clamping diode U215 is connected with one end of a capacitor C211 and a pin 16 of the chip U211, the other end of the capacitor C211 is connected with a pin 1 of the clamping diode U215 and a pin 1 of the chip U211, pins 2, 8, 10, 15 and 17 of the chip U211 are grounded, pins 3 and 4 of the chip U211 are grounded through a capacitor C217, a pin 6 of the chip U211 is grounded through a capacitor C221, a pin 7 of the chip U211 is grounded through a capacitor C219, a pin 8 of the chip U211 is connected with a pin 6 of the chip U208 through a capacitor C250, a pin 9 of the chip U211 is connected with a pin 3 of the chip U208 through a capacitor C249, a pin 11 of the chip U211 is grounded through a capacitor C205, and pins 12, 13 and 14 of the chip U211 are connected with a conditioning signal main control module; the 1 and 2 pins of the chip U208 are connected with the capacitors C206, C207 and C208 in parallel and then grounded, the 3 pin of the chip U208 is connected with one ends of the resistor R202 and the capacitor C212, the other end of the resistor R202 is grounded, the other end of the capacitor C212 is connected with the 6 pin of the U208 and one end of the resistor R203, the other end of the resistor R203 is grounded, the 9 pin of the chip U208 is connected with the signal conditioning main control module, the 10 pin of the chip U208 is grounded, the 11, 12 and 13 pins of the chip U208 are connected and then grounded through the capacitors C213, C214 and C215, the 15 pin of the chip U208 is connected with one end of the resistor R201, the other end of the resistor R201 is connected with one ends of the capacitors C209, C260 and C210, the other ends of the capacitors C209 and C260 are grounded, and the other end of the capacitor C210 outputs signals after secondary program control amplification.
The invention has the advantages that
The invention realizes the circuit design of ultrasonic signal excitation, control, receiving, conditioning and communication, in particular to the design of the excitation and high-voltage pulse electronic circuit of the ultrasonic signal, meets the basic requirements of the transmission and the receiving of the ultrasonic signal, and can be used as an independent ultrasonic signal excitation source in the ultrasonic nondestructive testing field. The system has stable operation, high reliability and higher application value.
The invention integrates the technologies of time delay and pulse width control of square wave signals, signal amplification, filtering and communication of high-frequency signals and the like, improves the signal-to-noise ratio, the gain adjustment range and the pulse trigger frequency of ultrasonic transmitting signals and ultrasonic receiving signals, has stronger technical innovation and advancement, and lays a good foundation for developing high-performance ultrasonic nondestructive testing equipment in the future.
Drawings
Fig. 1 is a block diagram of a system architecture of an embodiment of the present invention.
Fig. 2 is a circuit management module of an embodiment of the invention.
Fig. 3 is a communication module of an embodiment of the present invention.
Fig. 4 is a signal transmission module main controller according to an embodiment of the present invention.
Fig. 5 is a block diagram of a square wave pulse control module according to an embodiment of the present invention.
Fig. 6 is a high voltage pulse excitation control module according to an embodiment of the present invention.
Fig. 7 is a transmit impedance matching module of an embodiment of the present invention.
Fig. 8 is a signal conditioning module master controller according to an embodiment of the present invention.
Fig. 9 is a receiving impedance matching module of an embodiment of the present invention.
Fig. 10 is a pre-amplification and attenuation module of an embodiment of the present invention.
FIG. 11 is a high pass filter control module of an embodiment of the present invention.
Fig. 12 is a programmed two-stage amplification circuit of an embodiment of the invention.
Detailed Description
The invention is described in further detail below with reference to the figures and the embodiments.
As shown in fig. 1, the system of the present invention includes a signal transmitting circuit, a signal conditioning circuit, a communication module and a power circuit, wherein the signal transmitting circuit is used for transmitting and exciting ultrasonic signals and controlling the excitation, the signal conditioning circuit is used for receiving and conditioning ultrasonic signals, the communication module is connected to an upper computer and is respectively used for communication between the signal transmitting circuit and the signal conditioning circuit, and the power circuit is respectively connected to the signal transmitting circuit and the signal conditioning circuit for supplying power.
The signal transmitting circuit specifically comprises a signal transmitting main control module, a square wave pulse control module, a high-voltage pulse excitation module, a transmitting impedance matching module and an ultrasonic signal transmitting probe, wherein the square wave pulse control module comprises a pulse extension module and a pulse width control module, and the square wave pulse control module, the high-voltage pulse excitation module, the transmitting impedance matching module and the ultrasonic signal transmitting probe are sequentially connected.
The signal conditioning circuit specifically comprises a signal conditioning main control module, a pre-amplification and attenuation module, a receiving impedance matching module, a high-pass filtering control module, a program-controlled secondary amplification module and an ultrasonic signal receiving probe, wherein the pre-amplification and attenuation module, the receiving impedance matching module, the high-pass filtering control module, the program-controlled secondary amplification module and the ultrasonic signal receiving probe are sequentially connected.
The communication module specifically comprises a transmitting communication circuit and a conditioning communication circuit.
The system is also provided with a power supply circuit for supplying power to the signal transmitting main control module, the square wave pulse control module, the high-voltage pulse excitation module, the impedance matching module, the signal conditioning main control module, the receiving impedance matching module, the pre-amplification and attenuation module, the high-pass filtering control module, the program-controlled secondary amplification module, the communication module and the like.
As shown in fig. 3, the power supply circuit includes a +3.3V voltage output circuit, a +7V voltage output circuit, a-7V voltage output circuit, a +5VIN voltage output circuit, a +12VIN voltage output circuit, and a-12 VIN voltage output circuit.
As shown in fig. 3, the +3.3V voltage output circuit includes: the SHDN pin and the IN pin of the power management chip U300 are connected and then connected with one end of an inductor L301 and one end of a capacitor C315 respectively, the other end of the inductor L301 is connected with a +5VIN input voltage and the capacitor C314 respectively, the other end of the capacitor C314 is grounded, the other end of the capacitor C315 is grounded, the GND pin and the TAP pin of the power management chip U300 are grounded, the OUT pin of the power management chip U300 is connected with one end of a resistor R306, a capacitor C313 and one end of the inductor L300 respectively, the other end of the resistor R306 is connected with an ADJ pin and a resistor R307 respectively, the other ends of the resistor R307 and the capacitor C312 are grounded, the other end of the inductor L300 is connected with the other end of the capacitor C313 and one end of the capacitor C300 respectively and then outputs 3.3V voltage, and the other ends of the capacitor C313 and the capacitor C300 are grounded.
As shown in fig. 3, the +7V voltage output circuit includes: the SHDN pin and the IN pin of the power management chip U301 are connected and then connected with the +12VIN input voltage and the capacitor C323, the other end of the inductor L323 is grounded, the GND pin and the TAP pin are grounded, the OUT pin of the power management chip U301 is connected with one end of the resistor R308, the capacitor C321 and the inductor L306 respectively, the other end of the resistor R308 is connected with one end of the ADJ pin of the power management chip U301 and one end of the resistor R309 respectively, the other end of the resistor R309 and the other end of the capacitor C321 are grounded, the other end of the inductor L306 is connected with one end of the capacitor C322, one end of the capacitor C307, one end of the capacitor C305 and one end of the inductor L308 respectively, the other ends of the capacitor C322, the capacitor C307 and the capacitor C305 are grounded, the other end of the inductor L308 is connected with one end of the capacitor C327 and one end of the capacitor C306 respectively and outputs +7V voltage, and the other ends of the capacitor C327 and the capacitor C306 are grounded.
As shown in fig. 3, the-7V voltage output circuit includes: the GND pin of the power management chip U302 is grounded, the FB pin is connected with the VOUT pin through a resistor R312, the FB pin is grounded through a resistor R311, the REF pin is grounded through a resistor R310, the VIN pin and the TAP pin are connected with-12 VIN input voltage, the TAP pin is grounded through a capacitor C325, the VOUT pin is grounded through a resistor R301 and a capacitor C324, two ends of the resistor R301 and the capacitor C324 after being connected in series are connected in parallel with two ends of an inductor L307 and a capacitor C326 after being connected in series, the capacitor C326 and the capacitor C308 are connected in parallel, a leading-out port between the inductor L307 and the capacitor C326 is respectively connected with one ends of the inductor L309 and the capacitor C309, the other end of the capacitor C309 is grounded, the other end of the inductor L309 is respectively connected with one ends of the capacitor C328 and the capacitor C310 and outputs-7V voltage, and the other ends of the capacitor C328 and the capacitor C310 are grounded.
As shown in fig. 3, the +5VIN voltage output circuit includes: the +5VIN output voltage end is respectively connected with one end of a capacitor C301, one end of a capacitor C316 and one end of an inductor L302, the other ends of the capacitor C301 and the capacitor C316 are grounded, the other end of the inductor L302 is respectively connected with one end of the capacitor C302, one end of a capacitor C317 and one end of an inductor L303, the other ends of the capacitor C302 and the capacitor C317 are grounded, the other end of the inductor L303 is respectively connected with one end of a capacitor C311 and the external +5V voltage, and the other end of the capacitor C311 is grounded.
As shown in fig. 3, the +12VIN voltage output circuit includes: the +12VIN output voltage end is respectively connected with one end of a capacitor C319, one end of a capacitor C304 and one end of an inductor L305, the other ends of the capacitor C319 and the capacitor C304 are grounded, the other end of the inductor L305 is respectively connected with one end of a capacitor C303, one end of a capacitor C318 and one end of an inductor L304, the other ends of the capacitor C303 and the capacitor C318 are grounded, the other end of the inductor L304 is respectively connected with one end of a capacitor C320 and the external +12V voltage, and the other end of the capacitor C320 is grounded.
As shown in fig. 3, the-12 VIN voltage output circuit includes: the output-12 VIN voltage end is respectively connected with one end of a capacitor C322 and one end of an inductor L310, the other end of the capacitor C322 is grounded, the other end of the inductor L310 is respectively connected with one end of a capacitor C329, one end of a capacitor C330 and one end of an inductor L311, the other ends of the capacitor C329 and the capacitor C330 are grounded, the other end of the inductor L311 is respectively connected with one end of a capacitor C333 and an external-12V voltage, and the other end of the capacitor C333 is grounded.
As shown in fig. 4, the transmitting communication circuit includes a communication chip U100 connected to the upper computer, a VCC pin of the communication chip U100 is connected to a DI2 pin through a capacitor C181, the DI2, ED, ER, and GND pins are connected to ground, a DO1 pin and a pin are connected to the signal transmitting main control module, an R11 pin is connected to one end of a resistor R100, the other end of the resistor R100 is connected to one ends of a resistor R101 and a resistor R102, the other end of the resistor R101 is connected to ground, and the other end of the resistor R102 is connected to a pin.
As shown in fig. 4, the conditioning communication circuit includes a communication chip IC1T connected to the upper computer, a VCC pin of the communication chip IC1T is connected to a DI2 pin through a capacitor C1T, the DI2, ED, ER, and GND pins are connected to ground, the DO1 pin and the pins are connected to the signal conditioning main control module, the R11 pin is connected to one end of a resistor R2T, the other end of the resistor R2T is connected to one ends of a resistor R3T and a resistor R4T, the other end of the resistor R3T is connected to ground, and the other end of the resistor R4T is connected to the pins.
As shown in fig. 2, the signal transmission main control module includes a chip IC2TA and a chip XIT, a pulse transmission IO pin of the chip IC2TA is connected to one end of a resistor R5T, the other end of the resistor R5T outputs a square-wave pulse trigger signal, a 3V3IO1 pin, a 3V3INT pin and a 3V3IO2 pin are connected to +3.3V voltage, an IO/GCLK1 pin is connected to one end of a resistor R8T, the other end of the resistor R8T is connected to a CLK pin of the chip XIT, an EN pin of the chip XIT is connected to +3.3V voltage, a GND pin of the chip XIT is connected to ground, a VCC pin of the chip XIT is connected to +3.3V voltage through one ends of capacitors C4T, C5T and C6T, and the other ends of the capacitors C4T, C5T and C6T are connected to ground.
As shown in fig. 5, the square wave pulse control module includes a pulse delay chip IC4T, a pulse width control chip IC5T, a chip IC6T, and a reverse booster IC7T.
The TRIG pin of the chip IC4T is connected with the square wave pulse trigger signal, the RES pin and the GND pin of the chip IC4T are grounded, the P0-P11 pins of the chip IC4T are connected with the signal emission main control module, the AE pin and the VDD pin of the chip IC4T are connected with +5V voltage, the VDD pin is connected with one ends of a capacitor C39T and a capacitor C41T, the other ends of the capacitor C39T and the capacitor C41T are grounded, and the OUTB pin of the chip IC4T is connected with the TRIG pin of the chip IC 5T.
RES pins and GND pins of a chip IC5T are grounded, P0-P11 pins of the chip IC5T are connected with a signal emission main control module, AE pins and VDD pins are connected with +5V voltage, the VDD pin of the chip IC5T is connected with one ends of a capacitor C42T and a capacitor C44T, the other ends of the capacitor C42T and the capacitor C44T are grounded, and an OUT pin of the chip IC5T is connected with 4 pins and 5 pins of a chip IC 6T.
The 14 pin of the chip IC6T is respectively connected with +5V voltage and one end of a capacitor C38T, the other end of the capacitor C38T is grounded, the 6 pin of the chip IC6T is connected with one end of a resistor R30T, the other end of the resistor R30T is connected with the 1 pin of the reverse booster IC7T, the 5 pin of the reverse booster IC7T is connected with one end of a capacitor C47T, the other end of the capacitor C47T is connected with one fixed end of an adjustable resistor R32T and one end of a resistor R33T, the sliding end of the adjustable resistor R32T is connected with one end of a resistor R31T, the other fixed end of the adjustable resistor R32T and the other end of the resistor R33T are connected with one end of a resistor R34T together, the other end of the resistor R31T outputs square wave pulse signals, the other end of the resistor R34T is grounded, the 6 pin of the reverse booster IC7T is respectively connected with one ends of capacitors C81T, C82T, C83T, C45T, C46T and one end of an inductor L16T, and the other end of the capacitors C81T, C82T, C83T and the other end of the inductor L16T is grounded.
The circuit modules IC5T and IC6T can realize that the excitation pulse delay and the excitation pulse width are accurate to nanosecond and adjustable, the excitation pulse delay is adjustable, so that the multichannel ultrasonic system is very accurate in synchronization, the pulse width is adjustable, different probes can be matched more accurately, and the flexibility is very high.
As shown in fig. 6, the high voltage pulse excitation module includes a power chip POEWR1T and a switch K2T.
The square wave pulse signal (input signal) is respectively connected with the base electrodes of a triode V10T and a triode V18T, the emitter electrode of the triode V18T is respectively connected with one end of an inductor L11T, a capacitor C88T, a capacitor C89T and a capacitor C90T, the other end of the inductor L11T is connected with-12V voltage, the other ends of the capacitors C88T, C89T and C90T are grounded, the collector electrode of the triode V18T is respectively connected with one end of a resistor R54T and the emitter electrode of the triode V10T, the other end of the resistor R54T is respectively connected with one end of a resistor R58T and the grid electrode of an MOS tube V14T, the other end of the R58T is grounded, the source electrode of the MOS tube V14T is connected with one end of a resistor R62T, the other end of the resistor R62T is grounded, the drain electrode of the MOS tube V14T is connected with one ends of capacitors C118T and C119T, the other ends of the capacitors C118T and C119T are connected with one end of the resistor R90T and one end of a diode V22T, the other ends of the resistor R90T and the diode V22T are grounded, the drain electrode of the MOS tube V14T is used as an output signal and is connected with the anode of the diode V9T and the source electrode of the MOS tube V7T, the cathode of the diode V9T is connected with the emitter of the triode V8T, the base electrode of the triode V8T is respectively connected with the resistor R6T, the resistor R52T, the capacitors C59T-C63T and one end of the resistor R51T and the grid electrode of the MOS tube, the collector of the triode V8T and the other ends of the resistors R6T, R52T and the capacitors C59T-C63T are grounded, the other end of the resistor R51T is connected with one end of the resistor R44T, the other end of the resistor R44T is connected with one end of the resistor R41T, and the other end of the resistor R41T is respectively connected with one ends of the capacitors C33T, C49T, C48T, C52T and C51T, the cathode of the voltage regulator V2T and the pin 3 of the power supply chip POWR 1T.
The 4 feet of a power supply chip POEWR1T are respectively connected with the other ends of capacitors C33T, C49T, C48T, C52T and C51T, the 1 foot of the chip POEWR1T is connected with the 2 feet through a capacitor C18T, the 2 feet of the POEWR1T are connected with +24V voltage, the anode of a voltage regulator tube V2T is respectively connected with one ends of resistors R42T, R43T and R44T and the drain electrode of a MOS tube V7T, the other ends of the resistors R39T, R42T, R43T and R44T are connected with one end of a capacitor C55T, the other end of the capacitor C55T is connected with the anode of a voltage regulator tube V5T, one ends of a resistor R38T and a resistor R40T, the cathode of the voltage regulator tube V5T is respectively connected with the cathode of a diode V6T, a resistor R48T, capacitors C64T and C58T, the anode of a diode V6T is connected with the other ends of the capacitors C64T and C58T, the other end of the resistor R48T is respectively connected with one end of an inductor L17T, a capacitor C126T and a capacitor T and a C128T, the other ends of capacitors C126T, C127T and C128T are grounded, the other end of an inductor L17T is connected with +12V voltage, the other ends of a resistor R38T and a resistor R40T are connected with one end of a resistor R46T and the cathode of a voltage regulator tube V3T, the other end of the resistor R46T is grounded, the anode of the voltage regulator tube V3T is connected with the cathode of a diode V1T, the anode of a diode V4T and one end of a resistor R47T, the other end of the resistor R47T is grounded, the anode of the diode V1T and the cathode of the diode V4T are connected with a pin 1 of a switch K2T and output high-voltage excitation pulses, a pin 3 of the switch K2T is connected with +12V voltage, a pin 5 of the switch K2T is connected with the drain electrode of a MOS tube Q2T, a pin 7 of the switch K2T is connected with a terminal X9, the grid electrode of the MOS tube Q2T is connected with a signal emission module through a resistor R50T, and the source electrode of the Q2T is connected with the grid electrode of the signal emission module through a capacitor C57T after being grounded.
The circuit can trigger and output high-voltage square wave signals with the pulse width being accurately adjustable, 4 ultra-high-speed field effect transistors are matched to achieve the fact that the falling edge of the pulse is very fast, meanwhile, the current is also very high, the speed and the current are balanced and matched, and the better excitation probe emits ultrasonic waves.
As shown in fig. 7, the transmit impedance matching module includes MOS transistors Q3T to Q6T and switches K3T to K6T. The grid electrode of the MOS tube Q3T is connected with the signal emission main control module through a resistor R71T, the source electrode of the MOS tube Q3T is connected with the grid electrode of the MOS tube Q3T through a capacitor C70T, the drain electrode of the MOS tube Q3T is connected with a pin 5 of a switch K3T, and a pin 3 of the switch K3T is connected with +12V voltage; a pin 1 of the switch K3T is connected with a pin 1 of the switch K4T, a grid electrode of the MOS tube Q4T is connected with the signal emission main control module through a resistor R72T, a source electrode of the MOS tube Q4T is connected with a grid electrode of the MOS tube Q4T through a capacitor C71T, and a drain electrode of the MOS tube Q4T is connected with a pin 5 of the switch K4T; a pin 3 of the switch K4T is connected with a +12V voltage, a pin 7 of the switch K4T is connected with a pin 1 of the switch K5T, a grid electrode of the MOS tube Q5T is connected with the signal emission main control module through a resistor R73T, a source electrode of the MOS tube Q5T is connected with a grid electrode of the MOS tube Q5T through a capacitor C72T, and a drain electrode of the MOS tube Q5T is connected with a pin 5 of the switch K5T; the 3-pin of the switch K5T is connected with the +12V voltage, the 7-pin of the switch K5T is connected with the 7-pin of the switch K6T, the grid electrode of the MOS tube Q6T is connected with the signal emission main control module through the resistor R74T, the source electrode of the MOS tube Q6T is connected with the grid electrode of the MOS tube Q6T through the capacitor C73T, the drain electrode of the MOS tube Q6T is connected with the 5-pin of the switch K6T, the 3-pin of the switch K6T is connected with the +12V voltage, and the 1-pin of the switch K6T outputs a high-voltage pulse excitation signal matched with the impedance of the ultrasonic emission probe.
The invention realizes the continuous adjustment of the impedance matching value from 15 ohms to 500 ohms by the combined design work of the switches Q3T to Q6T and the switches K3T to K6T in the transmitting impedance matching module, thereby ensuring the optimal matching of signals, reducing the noise of the signals and improving the signal ratio.
As shown in fig. 8, the signal conditioning main control module includes a chip U101 and a chip Y100, an IO/GCLK0 pin of the chip U101 is connected to one end of a resistor R108, the other end of the resistor R108 is connected to a CLK pin of the chip Y100, an EN pin of the chip Y100 is connected to +3.3V, a GND pin of the chip Y100 is grounded, a VCC pin of the chip Y100 is connected to one ends of capacitors C136, C137, and C138 and +3.3V, and the other ends of the capacitors C136, C137, and C138 are grounded.
As shown in fig. 9, the receiving impedance matching module includes MOS transistors Q707 and Q700 to Q702 and switches K707 and K700 to K702: the grid of the MOS tube Q707 is connected with the signal conditioning main control module through a resistor R707, the source of the MOS tube Q707 is connected with the grid of the MOS tube Q707 through a capacitor C707, the drain of the MOS tube Q707 is connected with a pin 5 of a switch K707, a pin 3 of the switch K707 is connected with +12V voltage, a pin 1 of the switch K707 is connected with an ultrasonic receiving signal end, a pin 7 of the switch K707 outputs signals after impedance matching, the grid of the MOS tube Q700 is connected with the signal conditioning main control module through a resistor R700, the source of the MOS tube Q700 is connected with the grid of the MOS tube Q700 through a capacitor C700, the drain of the MOS tube Q700 is connected with a pin 5 of the switch K700, a pin 3 of the switch K700 is connected with +12V voltage, and a pin 7 of the switch K700 outputs signals after impedance matching, the pin 1 of the switch K700 is connected with the pin 1 of the switch K701, the grid electrode of the MOS tube Q701 is connected with the signal conditioning main control module through a resistor R701, the source electrode of the MOS tube Q701 is connected with the grid electrode of the MOS tube Q701 through a capacitor C701, the drain electrode of the MOS tube Q701 is connected with the pin 5 of the switch K701, the pin 3 of the switch K701 is connected with +12V voltage, the pin 7 of the switch K701 is connected with the pin 7 of the switch K702, the grid electrode of the MOS tube Q702 is connected with the signal emission main control module through a resistor R702, the source electrode of the MOS tube Q702 is connected with the grid electrode of the MOS tube Q702 through a capacitor C702, the drain electrode of the MOS tube Q702 is connected with the pin 5 of the switch K702, the pin 3 of the switch K702 is connected with +12V voltage, and the pin 1 output of the switch K702 is connected with a 15 ohm resistor and then grounded.
As shown in FIG. 10, the pre-amplification and attenuation module includes chips U402-U404. The signal (input signal) after impedance matching is connected to one end of a resistor R423, a resistor R409 and a resistor R417, the other end of the resistor R423 is connected with a resistor R424 IN series and then connected with a resistor R402 and a pin 3 of a voltage regulator tube U405, the other end of the resistor R409 is connected with a resistor R410 IN series and then connected with a resistor R407 and a pin 3 of a voltage regulator tube U406, the other end of the resistor R417 is connected with a resistor R418 IN series and then connected with a resistor R415 and a pin 3 of a voltage regulator tube U407, the pin 3 of the voltage regulator tube U405 is connected with a pin + IN of a chip U402 through a resistor R403, the pin 3 of the voltage regulator tube U406 is connected with a pin-IN of a chip U403, and the pin 3 of the voltage regulator tube U407 is connected with a pin-IN of a chip U404.
A resistor R401 and a capacitor C400 are connected IN parallel between an FB pin and an IN pin of a chip U402, the-IN pin of the chip U402 is grounded after passing through the resistor R400 and the capacitor C401 respectively, a-5V pin of the chip U402 is grounded after passing through the capacitors C422 and C404 respectively, a GND pin of the chip U402 is grounded, a +5V pin of the chip U402 is grounded after passing through the capacitors C421 and C402 respectively, a VOUT pin of the chip U402 is connected with a 10 pin of a relay K400 through the resistor R404, a CC pin of the chip U402 is connected IN series with the capacitor C405 after passing through the resistor R405 and the capacitor C403 respectively, the 1, 4, 6 and 9 pins of the relay K400 are grounded, a 2 pin of the relay K400 is connected with a 1 pin of the diode D400 and a drain of the MOS tube Q400, a 3 pin of the diode D400 is connected with a 3 pin of the relay K400, a source of the MOS tube Q400 is grounded, a gate of the MOS tube Q400 is connected with the 406R 406 and the capacitor C406 and the other end of the signal conditioning module is connected with the ground, and the other end of the relay K400 outputs an attenuated signal or the signal of the relay K400;
the FB pin of the chip U403 is respectively connected with the-IN pin through a resistor R408 and a capacitor C407, the + IN pin of the chip U403 is respectively grounded through capacitors C424, C410 and a resistor R412, the GND pin of the chip U403 is grounded, the +5V pin of the chip U403 is respectively grounded through capacitors C423 and C408, the VOUT pin of the chip U403 is connected with the 10 pin of the relay K401 through a resistor R411, the CC pin of the chip U403 is respectively grounded after being connected with a resistor R413 and a capacitor C409 IN series and then is grounded, the 1, 4, 6 and 9 pins of the relay K401 are grounded, the 2 pin of the relay K401 is connected with the 1 pin of the diode D401 and the drain electrode of the MOS tube Q401, the 3 pin of the diode D401 is connected with the 3 pin of the relay K401, the source electrode of the MOS tube Q401 is grounded, the grid electrode of the MOS tube Q401 is respectively connected with one ends of the resistor R414 and the capacitor C412, the other end of the resistor R414 is connected with the main control signal conditioning module, the other end of the capacitor C412 is grounded, and the 5 pin of the relay K401 outputs an amplified or attenuated signal;
the FB pin of the chip U404 is connected with the-IN pin through a resistor R416 and a capacitor C413 respectively, the + IN pin of the chip U404 is grounded through capacitors C416, C426 and a resistor R420 respectively, the GND pin of the chip U404 is grounded, the +5V pin of the chip U404 is grounded through capacitors C425 and C414 respectively, the VOUT pin of the chip U404 is connected with the 10 pin of the relay K402 through a resistor R419, the CC pin of the chip U404 is grounded through a resistor R421 and a capacitor C415 respectively and then connected with the capacitor C417 IN series, the pins 1, 4, 6 and 9 of the relay K402 are grounded, the pin 2 of the relay K402 is connected with the pin 1 of the diode D402 and the drain of the MOS tube Q402, the pin 3 of the diode D402 is connected with the pin 3 of the relay K402, the source of the MOS tube Q402 is grounded, the gate of the MOS tube Q402 is connected with one end of the resistor R422 and one end of the capacitor C418 respectively, the other end of the resistor R422 is connected with the main control signal conditioning module, the other end of the capacitor C418 is grounded, and the pin 5 of the relay K402 outputs an amplified or attenuated signal.
The invention uses three prevention amplifier chips in the pre-amplification and attenuation module, and the three prevention amplifier chips amplify different times respectively, so that the system has high dynamic range measurement capability, the attenuation amplifier can accurately measure the initial point of the initial ultrasonic wave, and the high-gain amplifier has higher sensitivity to tiny ultrasonic signals.
As shown in fig. 11, the high-pass filtering control module specifically includes: the output signals of the pre-amplification and attenuation module are respectively connected with a pin 10 of the relay K600 and one ends of capacitors C601, C602, C604 and C605, the other ends of the capacitors C601 and C602 are connected with the pin 10 of the relay K601, and the other ends of the capacitors C604 and C605 are connected with the pin 10 of the relay K602; the pins 1, 4, 6 and 9 of the relay K600 are grounded, the pin 2 of the relay K600 is respectively connected with the pin 1 of the diode D600 and the drain electrode of the MOS tube Q600, the pin 3 of the diode D600 is connected with the pin 3 of the relay K600, the source electrode of the MOS tube Q600 is grounded, the grid electrode of the MOS tube Q600 is connected with one end of the capacitor C600 and one end of the resistor R600, the other end of the capacitor C600 is grounded, and the other end of the resistor R600 is connected with the signal conditioning main control module.
Pins 1, 4, 6 and 9 of the relay K601 are grounded, pin 2 of the relay K601 is respectively connected with pin 1 of the diode D601 and the drain electrode of the MOS tube Q601, pin 3 of the diode D601 is connected with pin 3 of the K601, the source electrode of the MOS tube Q601 is grounded, the grid electrode of the MOS tube Q601 is connected with one end of the capacitor C603 and one end of the resistor R601, the other end of the capacitor C603 is grounded, and the other end of the resistor R601 is connected with the signal conditioning main control module.
Pins 1, 4, 6 and 9 of the relay K602 are grounded, pin 2 of the relay K602 is respectively connected with pin 1 of the diode D602 and the drain electrode of the MOS tube Q602, pin 3 of the diode D602 is connected with pin 3 of the K602, the source electrode of the MOS tube Q602 is grounded, the grid electrode of the MOS tube Q602 is connected with one end of the capacitor C606 and one end of the resistor R602, the other end of the capacitor C606 is grounded, and the other end of the resistor R602 is connected with the signal conditioning main control module.
The 5 pins of the relay K600, the relay K601 and the relay K602 are grounded through a resistor R606 and output to the differential converter as the output end of the high-pass filtering control module, and the single-ended signals after high-pass filtering are converted into two paths of differential signals through the differential converter.
As shown in fig. 12, the programmable secondary amplifying circuit includes a chip U210, a chip U211 and a chip U208. The negative differential signal Sig _ Isolated _ B-sent by the high-pass filtering control module is connected with the pin 3 of the clamping diode U214 through the resistor R210, the pin 3 of the clamping diode U214 is connected with the pin 16 of the chip U210, the positive differential signal Sig _ Isolated _ B + sent by the high-pass filtering control module is connected with the pins 1 and 2 of the clamping diode U214 through the resistor R211, and the pin 1 of the clamping diode U214 is connected with the pin 1 of the chip U210.
Pins 2, 8, 10, 15 and 17 of the chip U210 are grounded, pins 3 and 4 of the chip U210 are grounded through a capacitor C216, pin 6 of the chip U210 is grounded through a capacitor C220, pin 7 of the chip U210 is grounded through a capacitor C218, pin 8 of the chip U210 is connected with pins 1 and 2 of the clamping diode U215 after being connected with a resistor R204 and a capacitor C251 in series, pin 9 of the chip U210 is connected with pin 3 of the clamping diode U215 after being connected with a resistor R200 and a capacitor C248, pin 11 of the chip U210 is grounded through a capacitor C204, and pins 12, 13 and 14 of the chip U210 are connected with the signal conditioning main control module.
Pin 3 of the clamping diode U215 is connected to one end of a capacitor C211 and pin 16 of the chip U211, the other end of the capacitor C211 is connected to pin 1 of the clamping diode U215 and pin 1 of the chip U211, pins 2, 8, 10, 15, and 17 of the chip U211 are grounded, pins 3 and 4 of the chip U211 are grounded through a capacitor C217, pin 6 of the chip U211 is grounded through a capacitor C221, pin 7 of the chip U211 is grounded through a capacitor C219, pin 8 of the chip U211 is connected to pin 6 of the chip U208 through a capacitor C250, pin 9 of the chip U211 is connected to pin 3 of the chip U208 through a capacitor C249, pin 11 of the chip U211 is grounded through a capacitor C205, and pins 12, 13, and 14 of the chip U211 are connected to a signal conditioning main control module.
The 1 and 2 pins of the chip U208 are connected with the capacitors C206, C207 and C208 in parallel and then grounded, the 3 pin of the chip U208 is connected with one ends of the resistor R202 and the capacitor C212, the other end of the resistor R202 is grounded, the other end of the capacitor C212 is connected with the 6 pin of the U208 and one end of the resistor R203, the other end of the resistor R203 is grounded, the 9 pin of the chip U208 is connected with the signal conditioning main control module, the 10 pin of the chip U208 is grounded, the 11, 12 and 13 pins of the chip U208 are connected and then grounded through the capacitors C213, C214 and C215, the 15 pin of the chip U208 is connected with one end of the resistor R201, the other end of the resistor R201 is connected with one ends of the capacitors C209, C260 and C210, the other ends of the capacitors C209 and C260 are grounded, and the other end of the capacitor C210 outputs signals after secondary program control amplification.
This circuit module combines together through chip U210, U211 and U208 and realizes carrying out the enlargiing of different gains to the signal, makes the system possess the controllable enlarged ability in time section, and the section that the echo is high uses low gain, reduces the blind area, and the section that the echo is low uses high gain to enlarge, increases the defect relevance ratio.
The embodiment of the invention is concretely compared with other existing circuit control systems as follows:
Figure BDA0001266393970000181
the high-voltage square wave ultrasonic excitation signal generated by the invention can be compatible with various ultrasonic transducers, and has two modes of receiving and transmitting integration and receiving and separating, the system can be communicated with an upper computer to realize parameter configuration, the ultrasonic echo signal received by the system is accessed to a third-party signal acquisition system for analysis and processing, and the system has stable operation, high reliability and high application value.
Therefore, the technical scheme of the invention realizes the improvement of the overall performance of the ultrasonic signal excitation, control, receiving, conditioning and communication circuits, has high stability and reliability, higher application value, stronger technical innovation and advancement and lays a good foundation for developing high-performance ultrasonic nondestructive testing equipment in the future.
The above detailed description is intended to illustrate the present invention, not to limit the present invention, and any modifications and changes made within the spirit of the present invention and the scope of the claims fall within the scope of the present invention.

Claims (1)

1. An ultrasonic signal excitation, control, reception, conditioning and communication system, characterized by: the ultrasonic signal processing device comprises a signal transmitting circuit, a signal conditioning circuit, a communication module and a power circuit, wherein the signal transmitting circuit is used for transmitting, exciting and controlling ultrasonic signals, the signal conditioning circuit is used for receiving and conditioning ultrasonic signals, the communication module is connected with an upper computer and is respectively communicated with the signal transmitting circuit and the signal conditioning circuit through serial ports, and the power circuit is respectively connected with the signal transmitting circuit and the signal conditioning circuit to supply power;
the signal transmitting circuit is specifically as follows:
the device comprises a signal emission main control module for controlling and processing the emission of an excitation ultrasonic signal, wherein the signal emission main control module is respectively connected with a square wave pulse control module, a high-voltage pulse excitation module and an emission impedance matching module;
the square wave pulse control module is used for receiving a square wave pulse trigger signal from the signal transmission main control module to generate a square wave pulse signal and controlling the time delay and the pulse width of the square wave pulse signal;
the device comprises a high-voltage pulse excitation module, a pulse signal generation module and a pulse signal generation module, wherein the high-voltage pulse excitation module is used for receiving a square wave pulse signal from a square wave pulse control module and modulating the square wave pulse signal to generate a high-voltage excitation pulse signal;
the ultrasonic signal receiving probe comprises a transmitting impedance matching module, a receiving module and a transmitting module, wherein the transmitting impedance matching module is used for receiving a high-voltage excitation pulse signal from the high-voltage pulse excitation module and generating an impedance-matched signal by impedance matching with the ultrasonic signal receiving probe;
the ultrasonic signal transmitting probe is used for receiving the impedance matched signal from the transmitting impedance matching module and generating an ultrasonic transmitting signal;
the signal conditioning circuit is specifically as follows:
comprises an ultrasonic signal receiving probe for receiving ultrasonic echo signals;
the ultrasonic echo signal matching device comprises a receiving impedance matching module, a receiving impedance matching module and a signal processing module, wherein the receiving impedance matching module is used for receiving an ultrasonic echo signal from an ultrasonic signal receiving probe and generating an impedance matched signal by impedance matching with the ultrasonic signal receiving probe;
the device comprises a pre-amplification and attenuation module for amplifying and attenuating an ultrasonic echo signal;
the ultrasonic echo signal processing device comprises a high-pass filtering control module used for receiving the ultrasonic echo signal from the pre-amplifying and attenuating module and filtering;
the ultrasonic echo signal processing device comprises a program-controlled two-stage amplification module for receiving an ultrasonic echo signal from a high-pass filtering control module and performing gain adjustment;
the ultrasonic echo signal processing device comprises a signal conditioning main control module for receiving and processing an ultrasonic echo signal, wherein the signal conditioning main control module is respectively connected with a pre-amplification and attenuation module, a receiving impedance matching module, a high-pass filtering control module and a program-controlled secondary amplification module;
the communication module is specifically:
comprises a transmitting communication circuit connected to the signal transmitting circuit;
including conditioning communications circuitry for connection to signal conditioning circuitry.
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