CN106992235B - Light-emitting diode chip - Google Patents

Light-emitting diode chip Download PDF

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CN106992235B
CN106992235B CN201710292721.8A CN201710292721A CN106992235B CN 106992235 B CN106992235 B CN 106992235B CN 201710292721 A CN201710292721 A CN 201710292721A CN 106992235 B CN106992235 B CN 106992235B
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extending
layer
emitting diode
diode chip
electrode
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CN106992235A (en
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周弘毅
蔡和勋
李耿诚
刘英策
魏振东
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Xiamen Changelight Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier

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Abstract

The invention discloses a light emitting diode chip, comprising: the semiconductor stacking structure sequentially comprises a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and a current expansion layer, wherein the first semiconductor layer and the second semiconductor layer are opposite in conduction type, a groove is formed in the direction from the current expansion layer to the substrate, and the bottom of the groove is exposed out of the first semiconductor layer; a first electrode layer located in the trench and formed on the first semiconductor layer; and the second electrode layer is formed on one side of the current expansion layer, which is far away from the substrate, and comprises a second electrode pin and a plurality of second extending bodies which have the same extending direction and are arranged in the direction vertical to the extending direction, and one end of each second extending body is connected with the second electrode pin. According to the technical scheme provided by the invention, the current distribution in the multi-quantum well layer is more uniform, and the blocked photons can be emitted through the gap between the two adjacent second extending bodies, so that the light-emitting brightness of the light-emitting diode chip is improved.

Description

Light-emitting diode chip
Technical Field
The invention relates to the technical field of light emitting diodes, in particular to a light emitting diode chip.
Background
Light Emitting Diodes (LEDs) are widely used in the fields of illumination, display, backlight, and the like as a new-generation environment-friendly Light source for replacing incandescent lamps and fluorescent lamps. Compared with the traditional lighting source, the LED has the advantages of high efficiency, low energy consumption, long service life, no pollution, small volume, rich colors and the like. Generally, a light emitting diode chip mainly includes a semiconductor stacked structure, and a P-type electrode and an N-type electrode in contact with the semiconductor stacked structure, where the semiconductor stacked structure includes a substrate, an N-type semiconductor layer, a multi-quantum well layer, a P-type semiconductor layer, and a current spreading layer in sequence, and a step is formed on the semiconductor stacked structure to expose the N-type semiconductor layer. The P-type electrode is formed on the surface of the current expansion layer, which is far away from the P-type semiconductor layer, and the N-type electrode is formed on the surface of the N-type semiconductor layer exposed by the step area. When the existing light emitting diode chip works, the current injected between the P-type electrode and the N-type electrode is more concentrated in the multi-quantum well layer, so that the light emitting brightness of the light emitting diode chip is reduced; and the light-emitting of the light-emitting diode chip is shielded by the P-type electrode with larger area, so that the light-emitting brightness of the light-emitting diode chip is further reduced.
Disclosure of Invention
In view of this, the present invention provides a light emitting diode chip, where the second electrode layer includes a second electrode pin and a plurality of second extending bodies, and a plurality of paths for injecting current are formed between the second electrode pin and the plurality of second extending bodies and the first electrode layer, so that current passes through different regions of the multiple quantum well layer, thereby ensuring that current distribution in the multiple quantum well layer is more uniform, and improving the light emitting brightness of the light emitting diode chip; and by optimizing the width of the second extending bodies, photons emitted by the light-emitting diode chip can be emitted through a gap between two adjacent second extending bodies, and the light-emitting brightness of the light-emitting diode chip is further improved.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
a light emitting diode chip comprising:
the semiconductor stacking structure sequentially comprises a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and a current expansion layer, wherein the first semiconductor layer and the second semiconductor layer are opposite in conduction type, a groove is formed in the semiconductor stacking structure from the current expansion layer to the substrate, and the bottom of the groove exposes the first semiconductor layer;
a first electrode layer located in the trench and formed on the first semiconductor layer;
and a second electrode layer formed on a side of the current spreading layer away from the substrate, wherein the second electrode layer includes a second electrode pin and a plurality of second extending bodies having the same extending direction and arranged perpendicular to the extending direction, and one end of each second extending body is connected to the second electrode pin.
Optionally, the slot is arranged opposite to the second electrode pin;
wherein, the plurality of second extending bodies are distributed on two sides of the slot.
Optionally, the distance between every two adjacent second extending bodies of all the second extending bodies on any side of the slot decreases from the slot to the second extending body on the side;
or, the distance between any two adjacent second extending bodies of all the second extending bodies on any side of the slot is the same.
Optionally, the distance between every two adjacent second extending bodies of all the second extending bodies on any side of the slot decreases from the slot to the second extending body on the side, and the difference between every two adjacent second extending bodies is the same.
Optionally, the distance between every two adjacent second extending bodies of all the second extending bodies on any side of the slot ranges from 10 μm to 50 μm, inclusive.
Optionally, the width of the second extending body in the direction perpendicular to the extending direction of the second extending body on any side of the slot increases from the slot to the second extending body on that side;
or, the width of the second extending body along the direction perpendicular to the extending direction is the same for all the second extending bodies on any side of the slot.
Optionally, the widths of the second extending bodies on any side of the slot in the direction perpendicular to the extending direction are increased from the slot to the second extending body on the side, and the difference between the adjacent two widths is the same.
Optionally, the width of all the second extending bodies on any side of the slot along the direction perpendicular to the extending direction is in a range of 10nm to 500nm, inclusive.
Optionally, the number of the second extending bodies on two sides of the slot is the same.
Optionally, the first electrode layer includes a first electrode pin, and a first extension body located between the first electrode pin and the second electrode pin and extending along a direction from the first electrode pin to the second electrode pin, where the first extension body is connected to the first electrode pin.
Compared with the prior art, the technical scheme provided by the invention at least has the following advantages:
the invention provides a light emitting diode chip, comprising: the semiconductor stacking structure sequentially comprises a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and a current expansion layer, wherein the first semiconductor layer and the second semiconductor layer are opposite in conduction type, a groove is formed in the semiconductor stacking structure from the current expansion layer to the substrate, and the bottom of the groove exposes the first semiconductor layer; a first electrode layer located in the trench and formed on the first semiconductor layer; and a second electrode layer formed on a side of the current spreading layer away from the substrate, wherein the second electrode layer includes a second electrode pin and a plurality of second extending bodies having the same extending direction and arranged perpendicular to the extending direction, and one end of each second extending body is connected to the second electrode pin.
According to the technical scheme provided by the invention, the second electrode layer comprises the second electrode pin and the plurality of second extending bodies, and a plurality of paths for injecting current are formed between the second electrode pin and the plurality of second extending bodies and the first electrode layer, so that current passes through different regions of the multiple quantum well layer, the current distribution in the multiple quantum well layer is more uniform, and the light-emitting brightness of the light-emitting diode chip is improved; and by optimizing the width of the second extending bodies, photons emitted by the light-emitting diode chip can be emitted through a gap between two adjacent second extending bodies, and the light-emitting brightness of the light-emitting diode chip is further improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a light emitting diode chip according to an embodiment of the present disclosure;
FIG. 2 is a cross-sectional view taken along AA' of FIG. 1;
fig. 3 is a schematic structural diagram of another led chip according to an embodiment of the present disclosure;
FIG. 4 is a cross-sectional view along AA' of FIG. 3;
fig. 5 is a schematic structural diagram of another light emitting diode chip according to an embodiment of the present disclosure;
FIG. 6 is a cross-sectional view along AA' of FIG. 5.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As described in the background art, the light emitting diode chip mainly includes a semiconductor stacked structure, and a P-type electrode and an N-type electrode in contact with the semiconductor stacked structure, the semiconductor stacked structure sequentially includes a substrate, an N-type semiconductor layer, a multi-quantum well layer, a P-type semiconductor layer, and a current spreading layer, and a step is formed on the semiconductor stacked structure to expose the N-type semiconductor layer. The P-type electrode is formed on the surface of the current expansion layer, which is far away from the P-type semiconductor layer, and the N-type electrode is formed on the surface of the N-type semiconductor layer exposed by the step area. When the existing light emitting diode chip works, the current injected between the P-type electrode and the N-type electrode is more concentrated in the multi-quantum well layer, so that the light emitting brightness of the light emitting diode chip is reduced; and the light-emitting of the light-emitting diode chip is shielded by the P-type electrode with larger area, so that the light-emitting brightness of the light-emitting diode chip is further reduced.
Based on this, the embodiment of the present application provides a light emitting diode chip, where the second electrode layer includes a second electrode pin and a plurality of second extensions, and a plurality of paths for injecting current are formed between the second electrode pin and the plurality of second extensions and the first electrode layer, so that current passes through different regions of the multiple quantum well layer, thereby ensuring that current distribution in the multiple quantum well layer is more uniform, and improving the light emitting brightness of the light emitting diode chip; and by optimizing the width of the second extending bodies, photons emitted by the light-emitting diode chip can be emitted through a gap between two adjacent second extending bodies, and the light-emitting brightness of the light-emitting diode chip is further improved. In order to achieve the above object, the technical solutions provided in the embodiments of the present application are described in detail below, specifically with reference to fig. 1 to 6.
Referring to fig. 1, a schematic structural diagram of a light emitting diode chip provided in an embodiment of the present application is shown, where the light emitting diode chip provided in the embodiment of the present application is a flip chip, that is, a light emitting direction is a direction from a substrate to a current spreading layer, and the light emitting diode chip includes:
the semiconductor device comprises a semiconductor stacked structure, a first semiconductor layer 120, a multiple quantum well layer 130, a second semiconductor layer 140 and a current spreading layer 150, wherein the first semiconductor layer 120 and the second semiconductor layer 140 have opposite conduction types, a slot 160 is formed in the semiconductor stacked structure from the current spreading layer 150 to the substrate 110, and the bottom of the slot 160 exposes the first semiconductor layer 120;
a first electrode layer 200 located in the trench 160 and formed on the first semiconductor layer 120;
and a second electrode layer 300 formed on a side of the current spreading layer 150 away from the substrate 110, wherein the second electrode layer 300 includes a second electrode pin 310 and a plurality of second extending bodies 320 that extend in the same direction and are arranged perpendicular to the extending direction (the extending direction is a first direction X, and the perpendicular extending direction is a second direction Y), and one end of each second extending body 320 is connected to the second electrode pin 310.
In an embodiment of the present application, the slot 160 is disposed opposite to the second electrode pin 310; the second extending bodies 320 are distributed on two sides of the slot 160. And, the first electrode layer 200 includes a first electrode pin 210, and a first extension body 220 located between the first electrode pin 210 and the second electrode pin 310 and extending along a direction from the first electrode pin 210 to the second electrode pin 310, wherein the first extension body 220 is connected to the first electrode pin 210.
In an embodiment of the present application, the material of the substrate 110 includes, but is not limited to, one of sapphire, silicon carbide, and silicon.
In addition, the first semiconductor layer 120 may be an N-type semiconductor layer, specifically, an N-type GaN layer, and the second semiconductor layer 140 may be a P-type semiconductor layer, specifically, a P-type GaN layer, which is not limited in this application; the first electrode layer 200 is an N-type electrode layer, and the second electrode layer is a P-type electrode layer. The first electrode layer 200 and the second electrode layer 300 provided in this embodiment of the application may be a metal or alloy layer, and may specifically include, but not limited to, an alloy of one or more of Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, and W, and have a thickness in a range of about
Figure BDA0001282287230000051
Including the endpoint values.
In addition, the current spreading layer 150 may be made of one or more materials selected from the group consisting of indium tin oxide, Au, aluminum-doped ZnO, and metal nanoparticles, and has a thickness in the range of about
Figure BDA0001282287230000061
Including the endpoint values.
As can be seen from the above, in the technical solution provided in the embodiment of the present application, the second electrode layer includes the second electrode pin and the plurality of second extending bodies, and a plurality of paths for injecting current are formed between the second electrode pin and the plurality of second extending bodies and the first electrode layer, so that current passes through different regions of the multiple quantum well layer, thereby ensuring that current distribution in the multiple quantum well layer is more uniform, and improving the light-emitting luminance of the light-emitting diode chip; and by optimizing the width of the second extension body (preferably, setting the width of the second extension body in the second direction Y to be nano-scale), the photons emitted from the light emitting diode chip can be emitted through the gap between two adjacent second extension bodies, and the light emitting brightness of the light emitting diode chip is further improved.
In an embodiment of the present application, the distance between any two adjacent second extending bodies 320 may be set to be the same for all second extending bodies 320 on either side of the slot 160. Alternatively, the spacing may be optimally designed, and the spacing between two adjacent second extending bodies 320 on all the second extending bodies 320 on any side of the slot 160 decreases in the direction from the slot 160 to the second extending body 320 on that side; because the distance between the adjacent second extending bodies 320 far away from the first electrode layer 200 is small, which is equivalent to that the density of the second extending bodies 320 far away from the first electrode layer 200 is large, the current injected into the multiple quantum well layer can flow to the region of the second extending bodies 320 far away from the first electrode layer 200 more easily, the current injected into the multiple quantum well layer is prevented from being concentrated in the region of the second extending bodies 320 near one side of the first electrode layer 200, the uniformity of the current injected into the multiple quantum well layer is high, and the light-emitting brightness of the light-emitting diode chip is improved.
Specifically, referring to fig. 3 and fig. 4, fig. 3 is a schematic structural diagram of another light emitting diode chip provided in the embodiment of the present application, and fig. 4 is a sectional view along the AA' direction in fig. 3. The distance between every two adjacent second extending bodies 320 of all the second extending bodies 320 on any side of the slot 160 decreases from the slot 160 to the second extending body 320 on that side.
Further, in all the second extending bodies 320 on any side of the slot 160, the distance between two adjacent second extending bodies 320 gradually decreases in the direction from the slot 160 to the second extending body 320 on the side; that is, the distances between every two adjacent second extending bodies 320 of all the second extending bodies 320 on any side of the slot 160 decrease in the direction from the slot 160 to the second extending body 320 on the side, and the difference between the adjacent two distances is the same.
It should be noted that the above-mentioned embodiment is only one of many embodiments of the present application, and the present application is not particularly limited thereto, and needs to be specifically designed according to practical applications. In an optional embodiment of the present application, a distance between every two adjacent second extending bodies 320 of all the second extending bodies 320 on any side of the slot 160 is in a range from 10 μm to 50 μm, including an end point value, where the distance may be specifically 15 μm, 20 μm, 30 μm, 45 μm, and the like, and this specific value is not limited in this application as well. And the pitch with the decreasing trend provided by the embodiment of the present application may be specifically decreased from the pitch of 30 μm of two adjacent second extension bodies 320 close to the first electrode layer 200 to the pitch of 10 μm of two adjacent second extension bodies 320 far from the first electrode layer 200.
And, in addition to the optimized design of the distance between two adjacent second extending bodies 320 as described in the above embodiments, the width of the second extending body 320 in the second direction Y may also be optimized. In an embodiment of the present application, the width of the second extension 320 along the vertical extension direction (the second direction Y) may be the same for all the second extensions 320 on either side of the slot 160. Alternatively, the width may be optimally designed, and the width of the second extending body 320 in the vertical extending direction (the second direction Y) of all the second extending bodies 320 on any side of the slot 160 increases from the slot 160 to the second extending body 320 on that side; the width of the second extension body 320 far away from the first electrode layer 200 is large, and the width of the second extension body 320 near the first electrode layer 200 is small, so that the current injected into the multiple quantum well layer can flow to the region of the second extension body 320 far away from the first electrode layer 200 more easily, the current injected into the multiple quantum well layer is prevented from being concentrated in the region of the second extension body 320 near one side of the first electrode layer 200, the uniformity of the current injected into the multiple quantum well layer is high, and the light-emitting brightness of the light-emitting diode chip is improved.
Specifically, referring to fig. 5 and fig. 6, fig. 5 is a schematic structural diagram of another light emitting diode chip provided in the embodiment of the present application, and fig. 6 is a sectional view along the direction AA' in fig. 5. The width of the second extending body 320 in the direction perpendicular to the extending direction of all the second extending bodies 320 on any side of the slot 160 increases from the slot 160 to the direction of the second extending body 320 on that side.
Further, in all the second extending bodies 320 on any side of the slot 160, the width of the second extending body 320 along the vertical extending direction gradually increases from the slot 160 to the direction of the second extending body 320 on that side; that is, in all the second extending bodies 320 on any side of the slot 160, the width of the second extending body 320 in the direction perpendicular to the extending direction increases from the slot 160 to the second extending body 320 on the side, and the difference between the adjacent two widths is the same.
It should be noted that the optimization scheme of the foregoing embodiment for the width is only one of many embodiments of the present application, and the present application is not particularly limited, and needs to be specifically designed according to practical applications. Optionally, in an embodiment of the present application, all of the second extending bodies 320 on any side of the slot 160, a width of the second extending body 320 in a direction perpendicular to the extending direction is in a range from 10nm to 500nm, including an end point value, wherein the width may be specifically 20nm, 30nm, 100nm, 200nm, 350nm, 450nm, and the like, and the specific value is not limited in this application. The width of the second extension 320 may be increased from 50nm, which is close to the first electrode layer 200, to 500nm, which is far from the first electrode layer 200. The width of the second extending body 320 in the second direction Y is preferably set to be within a preset range (equal to) the difference between the light emitting wavelength of the led chip, so that the photons shielded by the second extending body 320 are emitted by bypassing the second extending body 320 through the diffraction effect, thereby improving the light emitting brightness of the led chip.
In addition, in the light emitting diode chip provided in the embodiment of the present application, in all the second extensions 320 on any side of the trench 160, a distance between two adjacent second extensions 320 and a width of the second extensions 320 in the second direction Y may be optimized at the same time, and the present application is not limited specifically.
In any of the above embodiments, the number of the second extending bodies 320 provided by the present application on both sides of the slot 160 is the same. In addition, in other embodiments of the present application, the number of the second extending bodies 320 on two sides of the slot 160 may also be set to be different, which is not particularly limited in the present application and needs to be specifically designed according to practical applications.
For the light emitting diode chip provided by any of the above embodiments, the manufacturing method may include:
s1, a substrate is first provided.
And S2, forming a laminated layer on the surface of the substrate, wherein the laminated layer comprises a first semiconductor layer, a multi-quantum well layer positioned on the side, away from the substrate, of the first semiconductor layer, and a second semiconductor layer positioned on the side, away from the substrate, of the multi-quantum well layer.
And S3, etching steps on the laminated layer through an etching process, wherein the etched steps not only comprise the grooves, but also further comprise step areas surrounding the laminated layer. The etching process includes, but is not limited to, one or more of an inductively coupled plasma etching process, chemical etching, electrochemical etching, and the like, and the application is not particularly limited; and the height range of the etched step is about
Figure BDA0001282287230000091
Figure BDA0001282287230000092
Including the endpoint values, which may be
Figure BDA0001282287230000093
The first semiconductor layer is exposed.
S4, in the second semiconductorThe surface of the layer on the side facing away from the substrate forms a current spreading layer. Wherein, specifically, can be
Figure BDA0001282287230000094
The indium tin oxide film is sputtered on the surface of one side, away from the substrate, of the second semiconductor layer, and then a photoetching process and indium tin oxide etching liquid are combined to remove redundant parts to form a preset pattern, so that a current expansion layer is obtained, and a semiconductor stack structure is finally obtained.
S5, forming a second electrode layer and a first electrode layer on the side, away from the substrate, of the current expansion layer by methods such as electron beam evaporation coating or nanoimprint, and then carrying out subsequent processes such as packaging to obtain the light-emitting diode chip.
The embodiment of the application provides a light emitting diode chip, include: the semiconductor stacking structure sequentially comprises a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and a current expansion layer, wherein the first semiconductor layer and the second semiconductor layer are opposite in conduction type, a groove is formed in the semiconductor stacking structure from the current expansion layer to the substrate, and the bottom of the groove exposes the first semiconductor layer; a first electrode layer located in the trench and formed on the first semiconductor layer; and a second electrode layer formed on a side of the current spreading layer away from the substrate, wherein the second electrode layer includes a second electrode pin and a plurality of second extending bodies having the same extending direction and arranged perpendicular to the extending direction, and one end of each second extending body is connected to the second electrode pin.
As can be seen from the above, in the technical solution provided in the embodiment of the present application, the second electrode layer includes the second electrode pin and the plurality of second extending bodies, and a plurality of paths for injecting current are formed between the second electrode pin and the plurality of second extending bodies and the first electrode layer, so that current passes through different regions of the multiple quantum well layer, thereby ensuring that current distribution in the multiple quantum well layer is more uniform, and improving the light-emitting luminance of the light-emitting diode chip; and by optimizing the width of the second extending bodies, photons emitted by the light-emitting diode chip can be emitted through a gap between two adjacent second extending bodies, and the light-emitting brightness of the light-emitting diode chip is further improved.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (9)

1. A light emitting diode chip, comprising:
the semiconductor stacking structure sequentially comprises a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and a current expansion layer, wherein the first semiconductor layer and the second semiconductor layer are opposite in conduction type, a groove is formed in the semiconductor stacking structure from the current expansion layer to the substrate, and the bottom of the groove exposes the first semiconductor layer;
a first electrode layer located in the trench and formed on the first semiconductor layer;
the second electrode layer is formed on one side, away from the substrate, of the current expansion layer, wherein the second electrode layer comprises a second electrode pin and a plurality of second extending bodies which are identical in extending direction and are arranged perpendicular to the extending direction, and one ends of the second extending bodies are connected with the second electrode pin;
the plurality of second extending bodies are distributed on two sides of the groove; and all the second extending bodies on any side of the slot, wherein the width of the second extending body along the direction vertical to the extending direction is increased from the slot to the direction of the second extending body on the side.
2. The light-emitting diode chip of claim 1, wherein the slot is disposed opposite to the second electrode pin.
3. The light-emitting diode chip as claimed in claim 2, wherein the spacing between two adjacent second extensions of all the second extensions on either side of the slot decreases in the direction from the slot to the second extension on that side;
or, the distance between any two adjacent second extending bodies of all the second extending bodies on any side of the slot is the same.
4. The light emitting diode chip as claimed in claim 3, wherein the spacing between two adjacent second extensions of all second extensions on either side of said trench decreases in a direction from said trench to said second extensions on that side, and the difference between two adjacent second extensions is the same.
5. The light-emitting diode chip of claim 3, wherein a spacing between two adjacent second extensions of all the second extensions on either side of the trench is in a range from 10 μm to 50 μm, inclusive.
6. The light emitting diode chip as claimed in claim 1, wherein the widths of the second extending bodies on either side of the slot are increased from the slot to the second extending body on the side along the direction perpendicular to the extending direction, and the difference between the widths of the two adjacent second extending bodies is the same.
7. The light-emitting diode chip of claim 1, wherein all of the second extended bodies on either side of the trench have a width in a range from 10nm to 500nm, inclusive, in a direction perpendicular to the extending direction.
8. The light emitting diode chip of claim 2, wherein the number of the second extensions on both sides of the trench is the same.
9. The light emitting diode chip of claim 2, wherein the first electrode layer comprises a first electrode pin and a first extension body located between the first electrode pin and the second electrode pin and extending along a direction from the first electrode pin to the second electrode pin, wherein the first extension body is connected to the first electrode pin.
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