CN106973245A - CIS and use its image capture unit - Google Patents
CIS and use its image capture unit Download PDFInfo
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- CN106973245A CN106973245A CN201610021035.2A CN201610021035A CN106973245A CN 106973245 A CN106973245 A CN 106973245A CN 201610021035 A CN201610021035 A CN 201610021035A CN 106973245 A CN106973245 A CN 106973245A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/50—Constructional details
- H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
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- Transforming Light Signals Into Electric Signals (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The present invention provides a kind of CIS and uses its influence capture device.CIS includes image sensing array and voltage supply array.Image sensing array is coupled to analog-digital converter array with voltage supply array.Image sensing array pick-up image data.Image sensing array is according to one of set supporting rolling shutter mechanism and global shutter mechanism.Voltage supply array includes multiple voltage supply circuits, and voltage is proposed to provide.During automatic correction, voltage supply array provides and proposes voltage to analog-digital converter array.Multiple comparators of analog-digital converter array perform zero offset capability according to voltage is proposed.After comparator completes zero offset capability, image sensing array image output data to analog-digital converter array.Image data is converted into digitized image data by analog-digital converter array.The circuit design of the CIS is more simplified, easily fabricated and manufacturing cost is cheap.
Description
Technical field
The present invention relates to a kind of CIS, and more particularly to one kind can support rolling shutter mechanism with
The CIS of global shutter mechanism, and use its image capture unit.
Background technology
With the development of photovoltaic, the demand of CIS also ceaselessly increases.CIS
Substantially it is divided into two major classes：CMOS (Complementary
Metal-Oxide-Semiconductor, CMOS) CIS and charge coupled cell
(charge-coupled device, CCD) CIS, wherein because CMOS image sensing utensils are low
Power consumption and low manufacture cost and other advantages and used by broad development.
CIS includes the pixel and multiple comparators of multiple matrix arrangements.If image sensing
Device is row analog-digital converter (Column Analog-to-Digital Converter) structure, the multiple
Pixel in pixel positioned at same row is coupled to same comparator.Each pixel is bright to sense one
Spend information and correspondence produces an image data.Each pixel generally comprises photo-sensitive cell and by least
The reading circuit of one output transistor composition.Further say, photo-sensitive cell is used to sensing incident light line,
And accordingly output charge is stored to a floating diffusion region (floating diffusion region).The output
The electric charge that storage is accumulated in floating diffusion region is converted to image data and exported to comparator by transistor.
Image of the comparator further according to image data and the corresponding comparative result of a reference voltage output to rear end
Process circuit, to produce corresponding image.
Current CIS can support two kinds of mechanism, be rolling shutter (Rolling Shutter) respectively
Mechanism and global shutter (Global Shutter) mechanism.When CIS works in rolling shutter mechanism,
Multiple pixels are exposed and produce image data by column, and image data is then provided by column to comparator.Separately
On the one hand, when CIS works in global shutter mechanism, all pixels are exposed, connect simultaneously
The multiple pixel and provide image data by column again to comparator.
Each comparator works in rolling shutter mechanism and global shutter mechanism time-division in CIS
There are not different biass.In general, CIS uses two sets of comparators and image-processing circuit
Come the image data for handling rolling shutter mechanism respectively with being exported under global shutter mechanism.To use
Same set of comparator meets two kinds of different biass from image-processing circuit, can make the design of comparator
Just complexity and be difficult to.However, shadow can be caused again using two sets of comparators and image-processing circuit
As the cost of sensor is improved with area.
The content of the invention
The present invention provides a kind of CIS and uses its image capture unit, to solve existing skill
CIS handles rolling shutter mechanism respectively using two sets of comparators and image-processing circuit in art
With exported under global shutter mechanism image data when the technology that improves of the cost brought and area ask
Topic.
The embodiment of the present invention provides a kind of CIS.The CIS includes image sensing battle array
Row and voltage supply array.Image sensing array is coupled to a simulation numeral with voltage supply array and turned
Converter array.Analog-digital converter array includes multiple comparators.Image sensing array includes multiple
Pixel.Image sensing array is used to pick-up image data.Image sensing array is rolled according to set supporting one
One of dynamic shutter mechanism and a global shutter mechanism.Voltage supply array includes multiple voltage supplies
Circuit, voltage is proposed to provide one.During automatic correction, voltage supply array provides and proposes electricity
It is depressed into analog-digital converter array.The multiple comparator performs a correction automatically according to voltage is proposed
Function.After the multiple comparator completes zero offset capability, image sensing array image output number
According to analog-digital converter array.Image data is converted into digitlization by analog-digital converter array
Image data.
The embodiment of the present invention provides a kind of image capture unit.The image capture unit includes simulation number
Word switch array and CIS.The CIS includes image sensing array and electricity
Pressure supply array.Image sensing array is coupled to analog-digital converter array with voltage supply array.
Analog-digital converter array includes multiple comparators.Image sensing array includes multiple pixels.Image
Sense array and be used to pick-up image data.Image sensing array is according to the rolling shutter mechanism of set supporting one
One of with a global shutter mechanism.Voltage supply array includes multiple voltage supply circuits, is used to
There is provided one and propose voltage.During automatic correction, voltage supply array, which is provided, proposes voltage to simulating number
Word switch array.The multiple comparator performs a zero offset capability according to voltage is proposed.Institute
State multiple comparators to complete after zero offset capabilities, image sensing array image output data are to simulating number
Word switch array.Image data is converted into digitized image data by analog-digital converter array.
In summary, the embodiment of the present invention is provided CIS and filled using its image capture
Put, comparison of the voltage to analog-digital converter array is proposed by voltage supply array offer stabilization
Device, can allow image capture unit to use same set of analog-digital converter array and image-processing circuit
To realize rolling shutter mechanism and global shutter mechanism, and produce corresponding image.Compared to tradition
Image capture unit, CIS that the embodiment of the present invention is provided and use its image capture
The circuit design of device is more simplified, easily fabricated and manufacturing cost is cheap.
To enable the feature and technology contents that are further understood that the present invention, refer to below in connection with this hair
Bright detailed description and accompanying drawing, but these explanations are only used for illustrating the present invention with brief description of the drawings book accompanying drawing,
Rather than any limitation is made to the interest field of the present invention.
Brief description of the drawings
Fig. 1 is the schematic diagram of image capture unit provided in an embodiment of the present invention.
Fig. 2 is the signal of CIS provided in an embodiment of the present invention and analog-digital converter array
Figure.
Fig. 3 is the schematic diagram of comparator provided in an embodiment of the present invention.
Fig. 4 is traditional comparator in rolling shutter mechanism and the running oscillogram of global shutter mechanism.
Fig. 5 is the running oscillogram of comparator provided in an embodiment of the present invention.
Description of reference numerals：
1：Image capture unit
10：CIS
11：Analog-digital converter array
12：Image-processing circuit
100：Row picture element matrix
101：Voltage supply circuit
110：Comparator
111：Counter
VDD：Supply voltage
PD：Photo-sensitive cell
TG：Transfering transistor
FD：Floating diffusion region
RST：Reset transistor
SF：Source electrode following device
RSL：Column selection transistor
RSEL：Array selecting signal
C1：First electric capacity
C2：Second electric capacity
PXO：Image data
RDAC：Ramp voltage
Vdummy：Propose voltage
IS：Current source
M1：The first transistor
M2：Second transistor
M3：Third transistor
M4：4th transistor
SW1：First switch transistor
SW2：Second switch transistor
Vdip：First end point
Vdin：Second end points
T1、T2、T3、T4：Time point
Embodiment
Various exemplary embodiments will be more fully described referring to Figure of description below, in specification
Some exemplary embodiments are shown in accompanying drawing.However, concept of the present invention may be come in many different forms
Embody, and should not be construed as limited by exemplary embodiments set forth herein.Specifically there is provided
These exemplary embodiments cause the present invention to be detailed and complete, and will be filled to those skilled in the art
Divide the category for passing on concept of the present invention.In all accompanying drawings, the size in Ceng Ji areas can be lavished praise on oneself in order to clear
And relative size.Similar numeral indicates similar component all the time.
Although it should be understood that term first, second, third, etc. may be used to describe various members herein
Part or signal etc., but these elements or signal should not be limited by these terms.These terms are to be used to area
Divide an element and another element, or a signal and another signal.In addition, as used herein,
Term "or" potentially includes depending on actual conditions and associated lists any one of project or many persons
All combinations.
Referring to Fig. 1, Fig. 1 is the schematic diagram of image capture unit provided in an embodiment of the present invention.Image
Capture device 1 includes CIS 10, analog-digital converter array 11 and image-processing circuit
12.CIS 10 is coupled to analog-digital converter array 11.Analog-digital converter array
11 are coupled to image-processing circuit 12.
The electronic installation that image capture unit 1 can be applied to have imaging function includes but is not limited to digital phase
Machine (digital camera), digital camera-recorder (camcorder), drive recorder (driving recorder),
Vehicular navigation system (car navigation system), scanning means (scanner), network cameras (web
Camera), visual telephone (video phone) and monitoring system (surveillance system).
CIS 10 is, for example, CMOS (Complementary
Metal-Oxide-Semiconductor, CMOS) CIS and charge coupled cell
(charge-coupled device, CCD) CIS.CIS 10 is to capture an image
Data, and image data is exported to analog-digital converter array 11.CIS 10 it is detailed
Structure will be described in detail in lower section paragraph.
Analog-digital converter array 11 includes appropriate logic, circuit and/or coding, to by image
Image data is converted to two-symbol form by data conversion into digitized image data.Then
Analog-digital converter array 11 exports digitized image data to image-processing circuit 12.Simulation
The detailed construction of digitizer array 11 will be described in detail in lower section paragraph.
Image-processing circuit 12 includes appropriate logic, circuit and/or coding, to from digitized shadow
Image processing is carried out as obtaining real image in data, or to digitized image data.Citing comes
Say, image-processing circuit 12 can be used to carry out pixel intensity compensation and integration to digitized image data
Processing.Image-processing circuit 12 has a pixel compensation mechanism, can be by the digitized of each pixel of correspondence
Image data carries out adequate compensation according to the conversion gain of ambient brightness and each pixel.
Structure and work below for CIS 10 and analog-digital converter array 11 are made
It is further described.Referring to Fig. 2, Fig. 2 is CIS provided in an embodiment of the present invention and simulation number
The schematic diagram of word switch array.CIS 10 includes image sensing array and voltage supply battle array
Row.Image sensing array includes multiple pixels, and forms a pel array.Voltage supply array includes
Multiple voltage supply circuits 101.Analog-digital converter array 11 includes multiple comparators 110, many
Individual counter 111, multiple first electric capacity C1 and multiple second electric capacity C2.The multiple first electric capacity
C1 and multiple second electric capacity C2 be respectively coupled to the reverse input end of the multiple comparator 110 with it is non-
Reverse input end.The output end of the multiple comparator 110 is respectively coupled to the multiple counter 111.
The output end of the multiple counter 111 is respectively coupled to image-processing circuit 12.For convenience of description,
Fig. 2 only illustrates a comparator 110, a counter 111, a first electric capacity C1 and one
Second electric capacity C2.
In the present embodiment, image sensing array is row analog-digital converter (Column
Analog-to-Digital Converter) structure.Therefore, the pixel of same row is located in the multiple pixel
Same comparator 110 is coupled to, and forms multiple row picture element matrixs 100, wherein the multiple row picture
Prime matrix 100 is set parallel to each other and forms image sensing array.In other words, the number of comparator 110
Line number of the amount corresponding to image sensing array.In addition, a voltage supply circuit 101 is coupled to one
Row picture element matrix 100 and a comparator 110, therefore the quantity of voltage supply circuit 101 is equally corresponded to
In the line number of image sensing array.It is noted that Fig. 2 equally only depicts a row picture element matrix
100 and a voltage supply circuit 101.However, the present embodiment does not limit row picture element matrix 100
Pixel quantity and voltage supply circuit 101 quantity.In other embodiment, a voltage is supplied
Circuit 101 is answered also to be coupled to multiple row picture element matrixs 100 and multiple comparators 110.
Image sensing array is to capture an image data PXO.Image sensing array can be according to setting branch
Help a rolling shutter (Rolling Shutter) mechanism and a global shutter (Global Shutter) mechanism wherein it
One.When image sensing array works in rolling shutter mechanism, the multiple pixel exposes and produced by column
Image data PXO, then provides image data PXO to analog-digital converter array 11 by column.
On the other hand, when CIS works in global shutter mechanism, all pixels are exposed simultaneously,
Then the multiple pixel provides image data PXO to analog-digital converter array 11 by column again.
As shown in Figure 2, the pixel of the present embodiment is 4T (four-transistor) structure.Each pixel includes sense
Optical element PD, floating diffusion region FD, source electrode following device (source follower) SF, column selection crystal
Pipe RSL, reset transistor RST and transfering transistor (transfer transistor) TG.Photo-sensitive cell
PD one end is coupled to transfering transistor TG, and the photo-sensitive cell PD other end is grounded.Shift crystal
Pipe TG is coupled between photo-sensitive cell PD and floating diffusion region FD.Source electrode following device SF grid
Floating diffusion region FD is coupled to, and source electrode following device SF drain electrode is coupled to a power source supply end, with
Receive one and supply voltage VDD.Column selection transistor RSL drain electrode is coupled to source electrode following device SF's
Source electrode, and column selection transistor RSL source electrode is coupled to comparator 110.Reset transistor RST couplings
It is connected between power source supply end and floating diffusion region FD.In addition, transfering transistor TG grid, again
The grid of the grid and column selection transistor RSL of putting transistor RST is respectively coupled to drive circuit
(Fig. 2 is not illustrated).
Photo-sensitive cell PD is used to sensing incident light line, and correspondence produces electric charge.Photo-sensitive cell PD can example
Such as it is photodiode, optotransistor, optical gate (photo-gate), nail letter photodiode (Pinned Photo
Diode) or its combination etc. can convert light to the electronic component of electric charge.
Floating diffusion region FD be parasitic capacitance between photo-sensitive cell PD and source electrode following device SF and/or
The plug-in capacitor set in addition is constituted.Floating diffusion region FD is to receive and store photo-sensitive cell PD
Produced electric charge.
Transfering transistor TG is used to the electric charge transfer that optionally produces photo-sensitive cell PD to expansion of floating
Dissipate area FD.In detail, transfering transistor TG is controlled by the transfer signal of drive circuit output.When
When drive circuit exports the transfer signal cut-off transition transistor TG of logic low, photo-sensitive cell PD
Produced electric charge is that can not be transferred into floating diffusion region FD.And when drive circuit produces logically high electricity
When flat transfer signal turns on transfering transistor TG, transfering transistor TG can be by photo-sensitive cell PD institutes
The electric charge transfer of generation is sent to floating diffusion region FD accumulation storages.
Source electrode following device SF can be followed when conducting according to the floating diffusion region FD electric charges exported in source electrode
The grid voltage of device SF grid formation, correspondence produces image data PXO.Column selection transistor RSL
Image data PXO is received, and the array selecting signal RSEL exported according to drive circuit optionally will
Image data PXO is exported to comparator 110.
Reset transistor RST is used to the reset signal exported according to drive circuit, optionally with power supply
The supply voltage VDD of feed end output resets floating diffusion region FD.For example, reset signal is worked as
During for logic low, reset transistor RST can end the negative electrode for operating and pulling down photo-sensitive cell PD
Voltage level, now, photo-sensitive cell PD can sensing incident light line and correspondence produce electric charge be stored in it is floating
Dynamic diffusion region FD.And when reset signal is logic high, reset transistor RST is to be switched on
So that the voltage level of photo-sensitive cell PD negative electrode be reset as initial potential (that is, supply voltage
VDD), so as to discharge the electric charge removed and residued in the FD of floating diffusion region, that is, floating diffusion region is reset
FD。
It is noted that in the present embodiment, the multiple pixel is 4T structures.However, this hair
It is bright to be not limited thereto.In other embodiment, the multiple pixel also can be 3T (three-transistor)
Structure or 5T (five-transistor) structure.If the multiple pixel is 3T structures, the multiple picture
Element does not include transfering transistor TG.If the multiple pixel is 5T structures, the multiple pixel is removed
Photo-sensitive cell PD, floating diffusion region FD, source electrode following device SF, column selection transistor RSL, again
Put outside transistor RST and transfering transistor TG, in addition to a global shutter transistor (global
shutter transistor).The operation principles of the pixel of 3T structures and the pixel of 5T structures are affiliated technology
Field has usual skill, the technology commonly used in image processing field, therefore will not be repeated here.
Voltage supply circuit 101 includes appropriate logic, circuit and/or coding, is proposed to provide one
Voltage VdummyTo comparator 110.Propose voltage VdummyFor a stable fixed voltage.Comparator
110 bases propose voltage VdummyPerform one and correct (Auto Zero) function automatically, to solve comparator 110
Multiple transistors the problem of mismatched because of process variations.
In the present embodiment, voltage supply circuit 101 is a kind of shading pixel.For example, shading
The structure of pixel is identical with foregoing pixel, for example, the pixel of 4T structures.It is different from foregoing pixel
, the photo-sensitive cell PD of shading pixel is shielded without being influenceed by incident ray.Therefore,
The floating diffusion region FD of shading pixel voltage stabilization.Then shading pixel is according to floating diffusion region FD
There is provided stabilization proposes voltage VdummyTo comparator 110, comparator 110 performs zero offset capability again.
The structure of the present embodiment not stop voltage supply circuit 101.In other embodiment, voltage
Supply circuit 101 can be the shading pixel of 3T structures, the shading pixel of 5T structures or other can
The circuit of fixed voltage is provided.However, making for convenience, the structure quilt of voltage supply circuit 101
It is designed to identical with the pixel of image sensing array.
The structure with regard to comparator 110 is described further below.Coordinate Fig. 2, referring to Fig. 3, figure
3 be the schematic diagram of comparator provided in an embodiment of the present invention.Comparator 110 include the first transistor M1,
Second transistor M2, third transistor M3, the 4th transistor M4, first switch transistor SW1,
Second switch transistor SW2 and current source IS.In the present embodiment, the first transistor M1 and
Second transistor M2 is N-type metal-oxide half field effect transistor, and third transistor M3 and the 4th is brilliant
Body pipe M4 is p-type metal-oxide half field effect transistor.
The first transistor M1 source electrode is coupled to current source IS, and the first transistor M1 drain electrode coupling
It is connected to third transistor M3.Second transistor M2 source electrode is coupled to current source IS, and the second crystal
Pipe M2 drain electrode is coupled to the 4th transistor M4.Current source IS flows through the first transistor to control
M1 and second transistor the M2 magnitude of current.The first transistor M1 grid is coupled to the first electric capacity
C1.Second transistor M2 grid is coupled to the second electric capacity C2.4th transistor M4 grid coupling
The 4th transistor M4 drain electrode is connected to, and the 4th transistor M4 drain electrode is further coupled to counter 111.
In addition, first switch transistor SW1 is electrically connected at the first transistor M1 drain electrode and grid
Between.Second switch transistor SW2 is electrically connected between second transistor M2 drain electrodes and grid.
In the present embodiment, first switch transistor SW1 and second switch transistor SW2 is the golden oxygen of p-type
Half field effect transistor.However, the present invention is not limited thereto.In other embodiment, first switch
Transistor SW1 and second switch transistor SW2 can also be N-type metal-oxide half field effect transistor.Institute
The voltage swing that category technical field technical staff can be born according to comparator 110 is brilliant to change first switch
Body pipe SW1 and second switch transistor SW2 type.
Comparator 110 receives ramp voltage RDAC by the first transistor M1 grid, and passes through the
Two-transistor M2 grid receives the image data PXO that row picture element matrix 100 is provided.Comparator 110
Comparative result is exported to counter 111 then according to ramp voltage RDAC and image data PXO.
It is noted that the structure of above-mentioned comparator 110 is by way of example only, and it is not used to limitation originally
Invention.In other embodiment, comparator 110 can also be different structure.
The structure of the comparator 110 according to Fig. 3 is illustrated into rolling shutter mechanism and global shutter machine below
System.Referring to Fig. 4, Fig. 4 is traditional comparator in rolling shutter mechanism and the fortune of global shutter mechanism
Make oscillogram.Ramp voltage RDAC is fixed waveform.Comparator 110 is designed to can be according to setting
Surely rolling shutter mechanism or global shutter mechanism are supported.It is noted that in the present embodiment, image
Sensor 10 does not include the voltage supply circuit 101 of voltage supply array, or voltage supply array
Do not provided to comparator 110 and propose voltage Vdummy。
First, image sensing array operates on being described as follows for rolling shutter mechanism.CIS 10
Image sensing array in pixel be exposed column by column.In time point T1, comparator 110 is performed certainly
Dynamic calibration function.The pixel of first row is completed after exposure in image sensing array, the multiple pixel
Transfering transistor TG is not yet turned on, therefore floating diffusion region FD does not receive any electric charge.In other words,
The image data PXO of now pixel output is reference voltage.The column selection transistor RSL of pixel is received
The array selecting signal RSEL of logic high so that pixel starts to provide the image data of logic high
PXO gives corresponding comparator 110.The first switch transistor SW1 and second switch of comparator 110
Transistor SW2 is on (Turn On) state.Therefore, comparator 110 corrects and records the first crystalline substance
Body pipe M1, second transistor M2, third transistor M3 and the 4th transistor M4 are to each other
Offset voltage Voffset, and by offset voltage VoffsetIt is stored in the first electric capacity C1 and the second electric capacity C2,
To complete zero offset capability.In other words, time point T1 to time point T2 is comparator 110
During automatic correction.
It is noted that the now first end point V of comparator 110dipCurrent potential be supply voltage VDD
With third transistor M3 operating voltage Vth_pDifference, i.e. (VDD-Vth_p).Comparator 110
Second end points VdinCurrent potential for supply voltage VDD and the 4th transistor M4 operating voltage Vth_p
Difference, i.e. (VDD-Vth_p)。
In time point T2, during comparator 110 compares into first.Due in the first electric capacity C1
Store offset voltage Voffset, first end point VdipCurrent potential will be changed into (VDD-Vth_p+Voffset).Connect
, first end point VdipCurrent potential will with ramp voltage RDAC reduce and begin to decline.Counter
111 come into operation, to calculate first end point VdipCurrent potential be decreased below the second end points VdinCurrent potential
Between time for being spent.
Now, transfering transistor TG is not yet turned on by electric charge transfer to floating diffusion region FD, therefore shadow
As the reference voltage that data PXO is logic high.Therefore, the second end points VdinCurrent potential will keep
In (VDD-Vth_p).Until first end point VdipCurrent potential be less than the second end points VdinCurrent potential, count
Device 111 stops counting, and internal count value is exported to image-processing circuit 12.That is,
The count value correspondence offset voltage V that counter 111 is obtained during first comparesoffsetSize.Shadow
As process circuit 12 is converted to count value the shade of gray of image.In other words, image capture unit 1
By counter 111 by the voltage conversion representated by image be the time concept.Image-processing circuit 12
The concept of shade of gray is converted the time into again.
Specifically, ramp signal RDAC is a kind of step signal.The count value pair of counter 111
Ramp signal RDAC every single order should be arrived.For example：Count value is the first rank of 1 corresponding step signal,
Count value is the second-order of 2 corresponding step signals, by that analogy.In addition, count value can be corresponded to again
To the one of which of grey decision-making (0~255).Accordingly, image-processing circuit 12 can be directly according to counting
The count value that device 111 is exported judges the binary bit grey decision-making of image.
Subsidiary one carries, and first switch transistor SW1 enters with second switch transistor SW2 in comparator
Enter comparison pattern (during i.e. first compares or second compares period) to be just cut off afterwards.
In time point T3, during comparator 110 compares into second.Ramp voltage RDAC returns to original
This logic level, that is, first end point VdipCurrent potential will be returned to (VDD-Vth_p+Voffset).Then
Ramp voltage RDAC is begun to decline so that first end point VdipCurrent potential change again.Count
Device 111 resets internal count value, and starts counting up again.Now, in image sensing array
The transfering transistor TG of the pixel of one row is switched on so that the image transfer that pixel is captured to floating diffusion
Area FD.Then, the multiple pixel each exports the image data PXO of logic low.Image number
According to PXO can it is pale pinkish purple enter the second end points VdinSo that the second end points VdinCurrent potential be changed into
(VDD-Vth_p-|ΔV|).Δ V represents real image.
Similarly, counter 111 calculates first end point VdipCurrent potential be decreased below the second end points Vdin
Current potential between time for being spent, and count value is exported to image-processing circuit 12.Counter 111
The count value correspondence offset voltage V obtained during second comparesoffsetWith the absolute value of real image
Summation, i.e. (Voffset+|ΔV|)。
Subsidiary one carries, in order to ensure comparator 110 can be set with normal operation, current source IS current potential
Count into less than the second end points VdinCurrent potential.Because the second end points VdinCurrent potential less than current source IS
If current potential, current source IS can not normally provide current to the element in comparator 110.
In time point T4, comparator 110 terminates second and compares period.Array selecting signal RSEL is changed into
Logic low so that column selection transistor RSL ends.Image-processing circuit 12 compares the phase by first
Between compare with second during the corresponding grey decision-making of the count value that is obtained subtract each other, you can obtain real shadow
Picture | Δ V | grey decision-making.
On the other hand, comparator 110 operates on being described as follows for global shutter mechanism.CIS
All pixels in 10 image sensing array are exposed simultaneously, and then image sensing array is again by column
Image data PXO is provided to corresponding comparator 110.It is noted that being rolled soon to support
The bias of transistor in door mechanism, comparator 110 is set at relatively high level.
In time point T1, comparator 110 performs zero offset capability.Due to the multiple pixel
Image is captured, now that comparator 110 is received is the image data PXO of logic low.Compare
Device 110 corrects and records the first transistor M1, second transistor M2, third transistor M3 and
The offset voltage V of 4th transistor M4 to each otheroffset, and by offset voltage VoffsetIt is stored in first
In electric capacity C1 and the second electric capacity C2, to complete zero offset capability.
It is noted that the now first end point V of comparator 110dipCurrent potential be supply voltage VDD
With third transistor M3 operating voltage Vth_pDifference, i.e. (VDD-Vth_p).Comparator 110
Second end points VdinCurrent potential be similarly supply voltage VDD and the 4th transistor M4 operating voltage
Vth_pDifference, i.e. (VDD-Vth_p)。
In time point T2, during comparator 110 compares into first.First end point VdipCurrent potential be
(VDD-Vth_p+Voffset), and first end point VdipCurrent potential will with ramp voltage RDAC reduction and
Begin to decline.Counter 111 comes into operation, to calculate first end point VdipCurrent potential be decreased below
Two end points VdinCurrent potential between time for being spent.Now, the multiple pixel is exposed finishes,
Therefore image data PXO still maintains logic low.In other words, the second end points VdinCurrent potential will
It is maintained at (VDD-Vth_p), and less than first end point VdipCurrent potential.
In time point T3, during comparator 110 compares into second.Now, the replacement crystal of pixel
Pipe RST is switched on so that floating diffusion region FD is reset.In other words, comparator 110 is received
It is the image data PXO of logic high, i.e. reference voltage.And the electricity corresponding to real image Δ V
Pressure equally can it is pale pinkish purple enter the second end points VdinSo that the second end points VdinCurrent potential be changed into
(VDD-Vth_p+|ΔV|).That is, comparator 110 operates on rolling shutter mechanism and global shutter
During mechanism, the second end points VdinSeveral different biass are had, the difficult design of comparator 110 is caused.
On the other hand, the second electric capacity C2 of analog-digital converter array 11 has stored skew electricity
Press Voffset.The image data PXO of logic high, second switch transistor SW2 are now received again
It can be turned on by false touch so that stored charge loss in the second electric capacity C2.That is, comparing
Device 110 can not complete automatic correction.
In addition, the operation interval of comparator 110 also can be because of the image data PXO for receiving logic high
And be destroyed.For example, the operation interval of comparator 110 is in 0~3.3V, wherein comparator 110
In each element will consume an operating voltage.Current source IS will equally consume a work electricity
Press (such as 0.5V), and the second end points VdinCurrent potential cannot be below current source IS operating voltage.It is false
If the bias in comparator 110 is maintained at 2.8V, the image number for a logic high of now coming in again
According to PXO (such as 0.6V), the voltage that comparator 110 is born can exceed operation interval, cause each member
Part can not be operated normally.
The problem of in order to solve above-mentioned, the operation interval of comparator 110 can be increased.If however, will
It is too big that the operation interval of comparator 110 is done, and the manufacturing cost of comparator 110 can be caused to improve, and
The operation interval of high potential is fresh to be used less.
Therefore, the embodiment of the present invention in different ways to solve above-mentioned the problem of so that image sense
Rolling shutter mechanism or global shutter mechanism can be supported by surveying array and comparator 110.Referring to Fig. 5,
Fig. 5 is the running oscillogram of comparator provided in an embodiment of the present invention.It is different in Fig. 4 embodiment
It is that CIS 10 is also provided to comparator 110 by voltage supply array and proposes voltage Vdummy。
Elder generation is operated on into global shutter mechanism with regard to image sensing array below to illustrate.In time point T1,
During comparator 110 enters automatic correction, to perform zero offset capability.The shadow of CIS 10
As simultaneously all pixels in sensing array are exposed.Now, array selecting signal RSEL keeps patrolling
Collect low level so that column selection transistor RSL ends, and the image number that the multiple pixel is captured
According to PXO not input comparator 110.
Replace, the voltage supply circuit 101 of voltage supply array starts to corresponding comparator 110
There is provided logic high proposes voltage Vdummy.Comparator 110 proposes electricity according to logic high
Press VdummyZero offset capability is completed, and offset voltage is stored in the first electric capacity C1 and the second electric capacity
C2.The now first end point V of comparator 110dipWith the second end points VdinCurrent potential be similarly
(VDD-Vth_p)。
In time point T2, comparator 110 enters comparison pattern.Voltage supply array stops supply and proposed
Voltage Vdummy.First end point VdipCurrent potential be (VDD-Vth_p+Voffset), and first end point Vdip's
Current potential is begun to decline as ramp voltage RDAC is reduced.In addition, array selecting signal RSEL changes
For logic high, to turn on column selection transistor RSL.The multiple pixel starts to capture
Image data PXO input comparators 110.Now the voltage corresponding to real image Δ V can it is pale pinkish purple enter
Second end points VdinSo that the second end points VdinCurrent potential be changed into (VDD-Vth_p-|ΔV|).Now second
End points VdinCurrent potential equivalent to the second of above-mentioned rolling shutter mechanism compare during when the second end points
VdinCurrent potential.
Comparator 110 compares first end point VdipCurrent potential and the second end points VdinCurrent potential, and export the
One comparative result is to counter 111.Counter 111 calculates first end point then according to the first comparative result
VdipCurrent potential be decreased below the second end points VdinCurrent potential between time for being spent, and by corresponding meter
Numerical value is exported to image-processing circuit 12.The count value correspondence offset voltage that counter 111 is obtained
VoffsetWith the summation of the absolute value of real image, i.e. (Voffset+|ΔV|)。
In time point T3, during comparator 110 compares into second.First end point VdipCurrent potential will
Return to (VDD-Vth_p+Voffset).Now, the reset transistor RST of pixel is switched on so that floated
Diffusion region FD is reset.In other words, what comparator 110 was received is the image data of logic high
PXO, i.e. reference voltage.Second end points VdinCurrent potential will be returned to (VDD-Vth_p), equivalent to upper
State the first of rolling shutter mechanism compare during when the second end points VdinCurrent potential.It follows that comparing
Device 110 has identical bias under rolling shutter mechanism and global shutter mechanism.Therefore, image is picked
Device 1 is taken to use same set of analog-digital converter array 11 and the place of image-processing circuit 12
Reason CIS 10 operates on the image data produced when rolling shutter mechanism and global shutter mechanism
PXO。
Comparator 110 compares first end point VdipCurrent potential and the second end points VdinCurrent potential, and export the
Two comparative results are to counter 111.Counter 111 calculates first end point also according to the second comparative result
VdipCurrent potential be decreased below the second end points VdinCurrent potential between time for being spent, and by corresponding meter
Numerical value is exported to image-processing circuit 12.Now, the count value correspondence that counter 111 is obtained is offset
Voltage VoffsetSize.
In time point T4, comparator 110 terminates second and compares period.Array selecting signal RSEL is changed into
Logic low so that column selection transistor RSL ends.Image-processing circuit 12 compares the phase by first
Between compare with second during the corresponding grey decision-making of the count value that is obtained subtract each other, to obtain real image
| Δ V | grey decision-making.
Consequently, it is possible to which when image sensing array fortune works in global shutter mechanism, comparator 110 is still
Can normally it operate so that the image number that image-processing circuit 12 can be provided from image sensing array
According to obtaining real image in PXO | Δ V |.
Subsidiary one carries, when image sensing array operates on rolling shutter mechanism, voltage supply circuit 101
Logic high can be equally provided to corresponding comparator 110 proposes voltage Vdummy, for than
Automatic correction is completed compared with device 110.However, the present invention is limited not to this.The reason for this is that working as
When image sensing array operates on rolling shutter mechanism, the multiple pixel is completed certainly in comparator 110
After dynamic correction, corresponding transfering transistor TG can just be turned on so that electric charge transfer to floating diffusion region
FD.The voltage of the multiple pixel same offer logic high during automatic correction is to comparator 110
Automatically corrected.Therefore, when image sensing array operates on rolling shutter mechanism, voltage supply
Circuit 101, which can not also be provided, proposes voltage VdummyTo comparator 110.
In summary, the embodiment of the present invention is provided CIS and filled using its image capture
Put, comparison of the voltage to analog-digital converter array is proposed by voltage supply array offer stabilization
Device, can allow image capture unit to use same set of analog-digital converter array and image-processing circuit
To realize rolling shutter mechanism and global shutter mechanism, and produce corresponding image.Compared to tradition
Image capture unit, CIS that the embodiment of the present invention is provided and use its image capture
The circuit design of device is more simplified, easily fabricated and manufacturing cost is cheap.
In addition, CIS that the embodiment of the present invention is provided and its image capture unit is used,
Also the image data that CIS is captured is converted to using the counter of analog-digital converter array
Two-symbol form.Because image-processing circuit is same with binary bit progress computing, image-processing circuit
Can be without spending the time in the form of converting image data.
It is described above, it is only the optimal specific embodiment of the present invention, and the feature of the present invention is not limited to
In this, any those skilled in the art in the field of the invention, can think easily and change or modification,
The scope of the claims in following this case can all be covered.
Claims (20)
1. a kind of CIS, is coupled to an analog-digital converter array, the wherein simulation numeral
Switch array includes multiple comparators, it is characterised in that the CIS includes：
One image sensing array, to capture an image data, the image sensing array includes multiple pictures
Element, wherein the image sensing array is according to the rolling shutter mechanism of set supporting one and a global shutter mechanism
One of them；
One voltage supply array, is coupled to the analog-digital converter array, including multiple voltage supplies
Circuit, voltage is proposed to provide one；
Wherein, during an automatic correction, the voltage supply array provides this and proposes voltage to the simulation
Digitizer array, and the multiple comparator proposes voltage one zero offset capability of execution according to this；
After the multiple comparator completes the zero offset capability, the image sensing array exports the image number
According to the analog-digital converter array, then the analog-digital converter array turns the image data
Change the digitized image data into.
2. CIS as claimed in claim 1, it is characterised in that the analog-digital converter
Array also includes：
Multiple counters, the multiple counter is respectively couple in the output end of the multiple comparator,
The count value of the multiple counter increases over time；
The output end of wherein the multiple counter is coupled to an image-processing circuit, and the image processing
The count value that circuit is exported according to the multiple counter judges the GTG of the digitized image data
Value.
3. CIS as claimed in claim 2, it is characterised in that complete the automatic correction
After function, the multiple comparator each enters a comparison pattern；During one first compares, the shadow
As sensing array provides the part of the image data to the analog-digital converter array by column, then
The multiple comparator each compares the image data with a ramp voltage, and exports one first ratio
Compared with result to corresponding counter, the multiple counter is adjusted further according to the multiple first comparative result
Whole the multiple count value；When first comparative result indicate the ramp voltage be less than the image data,
The multiple counter stops counting, and exports current count value to the image-processing circuit.
4. CIS as claimed in claim 3, it is characterised in that during one second compares,
The image sensing array resets the floating diffusion region of each pixel, and provides a reference voltage by column to the mould
Intend digitizer array, then the multiple comparator is each by the reference voltage and the ramp voltage
Compare, and export one second comparative result to corresponding counter；When second comparative result is indicated
The ramp voltage is less than the reference voltage, and the multiple counter stops counting, and exports current meter
Numerical value is to the image-processing circuit.
5. CIS as claimed in claim 4, it is characterised in that the image-processing circuit root
According to the multiple counter in this first compare during with this second compared during in provide count value divide
The grey decision-making of the image data and the grey decision-making of the reference voltage are not calculated, then image processing electricity
The grey decision-making of the grey decision-making of the image data and the reference voltage is subtracted each other on road, to obtain real image
Grey decision-making.
6. CIS as claimed in claim 1, it is characterised in that the multiple comparator
Quantity corresponds to the line number of the image sensing array, and with the described many of a line in the image sensing array
Individual pixel is coupled to same comparator.
7. CIS as claimed in claim 1, it is characterised in that the image sensing array is
One CMOS image sensing arrays.
8. CIS as claimed in claim 1, it is characterised in that the multiple pixel difference
For a 3T structures, a 4T structures or a 5T structures.
9. CIS as claimed in claim 1, it is characterised in that the voltage supply circuit bag
Include：
Multiple shading pixels, are respectively coupled to the multiple comparator, and voltage is proposed extremely to provide this
The multiple comparator；
Wherein, the photo-sensitive cell of the multiple shading pixel is shielded so that the multiple shading pixel
Floating diffusion region voltage stabilization, then the multiple shading pixel is according to the multiple floating diffusion
This of area's offer stabilization proposes voltage.
10. CIS as claimed in claim 9, it is characterised in that the multiple shading pixel
A respectively 3T structures, a 4T structures or a 5T structures.
11. a kind of image capture unit, it is characterised in that including：
One analog-digital converter array, including multiple comparators；
One CIS, is coupled to the analog-digital converter array, including：
One image sensing array, to capture an image data, the image sensing array includes multiple pictures
Element, wherein the image sensing array is according to the rolling shutter mechanism of set supporting one and a global shutter mechanism
One of them；
One voltage supply array, is coupled to the analog-digital converter array, including multiple voltage supplies
Circuit, voltage is proposed to provide one；
Wherein, during an automatic correction, the voltage supply array provides this and proposes voltage to the simulation
Digitizer array, and the multiple comparator proposes voltage one zero offset capability of execution according to this；
After the multiple comparator completes the zero offset capability, the image sensing array exports the image number
According to the analog-digital converter array, then the analog-digital converter array turns the image data
Change the digitized image data into.
12. image capture unit as claimed in claim 11, it is characterised in that the simulation numeral turns
Converter array also includes：
Multiple counters, the multiple counter is respectively couple in the output end of the multiple comparator,
The count value of the multiple counter increases over time；
The output end of wherein the multiple counter is coupled to the image processing electricity of the image capture unit
Road, and the count value that the image-processing circuit is exported according to the multiple counter judges digitized be somebody's turn to do
The grey decision-making of image data.
13. image capture unit as claimed in claim 12, it is characterised in that this is automatic completing
After calibration function, the multiple comparator each enters a comparison pattern；During one first compares,
The image sensing array provides a part for the image data to the analog-digital converter array by column,
Then the multiple comparator each compares the image data with a ramp voltage, and exports one the
One comparative result to corresponding counter, the multiple counter compares knot further according to the multiple first
Fruit adjusts the multiple count value；When first comparative result indicates that the ramp voltage is less than the image number
According to the multiple counter stops counting, and exports current count value to the image-processing circuit.
14. image capture unit as claimed in claim 13, it is characterised in that compare in one second
Period, the image sensing array resets the floating diffusion region of each pixel, and provides a reference voltage by column
To the analog-digital converter array, then the multiple comparator is each oblique with this by the reference voltage
Wave voltage is compared, and exports one second comparative result to corresponding counter；When this second compares knot
Fruit indicates that the ramp voltage is less than the reference voltage, and the multiple counter stops counting, and exports mesh
Preceding count value is to the image-processing circuit.
15. image capture unit as claimed in claim 14, it is characterised in that image processing electricity
Road according to the multiple counter in this first compare during with this second compared during in offer counting
Value calculates the grey decision-making of the image data and the grey decision-making of the reference voltage respectively, then at the image
Reason circuit subtracts each other the grey decision-making of the grey decision-making of the image data and the reference voltage, real to obtain
The grey decision-making of image.
16. image capture unit as claimed in claim 11, it is characterised in that the multiple comparison
The quantity of device corresponds to the line number of the image sensing array, and the institute in the image sensing array with a line
State multiple pixels and be coupled to same comparator.
17. image capture unit as claimed in claim 11, it is characterised in that image sensing battle array
It is classified as a CMOS image sensing arrays.
18. image capture unit as claimed in claim 11, it is characterised in that the multiple pixel
A respectively 3T structures, a 4T structures or a 5T structures.
19. image capture unit as claimed in claim 11, it is characterised in that voltage supply electricity
Road includes：
Multiple shading pixels, are respectively coupled to the multiple comparator, and voltage is proposed extremely to provide this
The multiple comparator；
Wherein, the photo-sensitive cell of the multiple shading pixel is shielded so that the multiple shading pixel
Floating diffusion region voltage stabilization, then the multiple shading pixel is according to the multiple floating diffusion
This of area's offer stabilization proposes voltage.
20. image capture unit as claimed in claim 19, it is characterised in that the multiple shading
Pixel is respectively a 3T structures, a 4T structures or a 5T structures.
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