CN106899386B - Method for demodulating fragmented frame signals based on multi-channel communication receiving system - Google Patents
Method for demodulating fragmented frame signals based on multi-channel communication receiving system Download PDFInfo
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- 125000004122 cyclic group Chemical group 0.000 claims abstract description 12
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- 238000012360 testing method Methods 0.000 claims description 57
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
- H04L1/0007—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length
- H04L1/0008—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length by supplementing frame payload, e.g. with padding bits
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/128—Replacement control using replacement algorithms adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W28/00—Network traffic management; Network resource management
- H04W28/02—Traffic management, e.g. flow control or congestion control
- H04W28/06—Optimizing the usage of the radio link, e.g. header compression, information sizing, discarding information
- H04W28/065—Optimizing the usage of the radio link, e.g. header compression, information sizing, discarding information using assembly or disassembly of packets
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- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W28/00—Network traffic management; Network resource management
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- H04W28/10—Flow control between communication endpoints
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Abstract
The invention discloses a method for demodulating fragmented frame signals based on a multichannel communication receiving system, which comprises the steps of regarding an area for storing received data in a DDR (double data rate) as a cyclic first-in first-out queue with the depth of 3 and the like. The detection method can ensure the integrity of one frame of data, can obtain more processing time by increasing the data volume of each moving of the direct memory access, and only sacrifices the real-time property of the processing. The detection method of the invention also has good self-adaptive characteristic, is beneficial to improving the consistency of the system performance and simplifying the production flow, and has strong anti-interference capability during detection and good receiving performance.
Description
Technical Field
The invention belongs to the technical field of wireless communication. In particular to a method for demodulating fragmented frame signals based on a multi-channel communication receiving system.
Background
Demodulation of the fragmented frame signal is the process of recovering the message from the modulated signal carrying the message. In various information transmission or processing systems, a transmitting end modulates a carrier wave with a message to be transmitted, generating a signal carrying the message. The receiver must recover the transmitted message to be utilized. The frequency spectrum carrying useful information near the carrier wave is moved to the base band, and then the corresponding filter is used for filtering out the base band signal, thus completing the demodulation task. However, in the multichannel communication receiving system, when the fragmented frame signals are correctly demodulated, the start of the interrupter is unsuccessful, and the frequency offset compensation DDS multiplexing is difficult to realize.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned shortcomings and to provide a method for demodulating fragmented frame signals based on a multi-channel communication receiving system.
A method for demodulating fragmented frame signals based on a multi-channel communication receiving system comprises the following steps:
regarding an area storing received data in the DDR as a cyclic first-in first-out queue with the depth of 3;
each time the direct memory access data is moved, one storage unit is consumed, and the cycle is carried out after the direct memory access transmission is carried out for three times, so that the completeness of one frame of data is ensured;
before the access transmission of the direct memory is completed each time, the judgment and the recombination of 1000 paths of effective frame signals are completed, and more processing time is obtained by increasing the data volume moved each time of the access of the direct memory;
and completing the test of the existing module.
The taking the area storing the received data in the DDR as the cyclic first-in first-out queue with the depth of 3 specifically includes:
taking an area of the DDR memory for storing the received data as a data cache area, wherein each cache area can store a frame of received data;
when each frame of received data is written into the DDR memory, the received data is stored in the data cache area in turn according to the sequence;
indicating the number of frames stored in the DDR by a write pointer; after writing one frame of data to the DDR, adding 3 to a writing pointer;
after writing a frame of data, judging whether the written area for storing the received data has a frame of complete data, if not, keeping the pointer unchanged, and continuously rewriting a frame of data of the queue; if so, the pointer is incremented by 3 and the data of the next queue is read.
The step of circulating after three times of direct memory access transmission specifically comprises the following steps:
counting and storing the number of times of cyclic use in the DDR memory in real time in the process of writing the received data of each frame into the DDR memory, and updating a current data cache region in real time according to the counted and stored number of times of cyclic use;
when writing a frame of data to the DDR, adding 3 to a writing pointer, mapping a logic address corresponding to the pointer to an updated current data buffer area address, so that data moving consumes one memory unit;
the cycle is performed after three DMA transfers
Before the access transmission of each direct memory is completed, the steps of completing the judgment and the recombination of 1000 effective frame signals are specifically as follows:
carrying out channel coding, dispersive recombination and modulation on a frame signal to be transmitted, and transmitting the modulated signal to a node;
after receiving the signal, the node makes a decision, and if only the signal of a single information source node is received, the signal is directly amplified and then is sent to the node corresponding to the next topology; otherwise, after network coding and data frame dispersion and recombination, the data frame is sent to the previous node.
The process of completing the test of the existing module specifically comprises the following steps:
after the test controller is electrified, resetting each module, and then checking whether a test control instruction sequence exists or not and whether corresponding test excitation and standard test response exist or not; if yes, selecting an automatic test mode; if not, turning to the next step;
sending manual test configuration information to a test controller through a communication bus;
sending a test control instruction sequence to a cpu, and storing a test stimulus and a standard test response;
sending address information to a test bus to select a specified tested object, wherein the selected tested object sends back response information, and the tested object is determined as a specified test object by a test controller;
starting the test, and checking whether the configuration information contains an instruction for finishing the test after sending a test result report; if yes, the test is finished; if not, returning to the first step of circulation.
The detection method can ensure the integrity of one frame of data, can obtain more processing time by increasing the data volume of each moving of the direct memory access, and only sacrifices the real-time property of the processing. The detection method of the invention also has good self-adaptive characteristic, is beneficial to improving the consistency of the system performance and simplifying the production flow, and has strong anti-interference capability during detection and good receiving performance.
Drawings
FIG. 1 is a schematic flow chart of the method of the present invention.
Detailed Description
The invention is further illustrated by the following specific examples:
a method for demodulating fragmented frame signals based on a multi-channel communication receiving system comprises the following steps:
regarding an area storing received data in the DDR as a cyclic first-in first-out queue with the depth of 3;
each time the direct memory access data is moved, one storage unit is consumed, and the cycle is carried out after the direct memory access transmission is carried out for three times, so that the completeness of one frame of data is ensured;
before the access transmission of the direct memory is completed each time, the judgment and the recombination of 1000 paths of effective frame signals are completed, and more processing time is obtained by increasing the data volume moved each time of the access of the direct memory;
and completing the test of the existing module.
The taking the area storing the received data in the DDR as the cyclic first-in first-out queue with the depth of 3 specifically includes:
taking an area of the DDR memory for storing the received data as a data cache area, wherein each cache area can store a frame of received data;
when each frame of received data is written into the DDR memory, the received data is stored in the data cache area in turn according to the sequence;
indicating the number of frames stored in the DDR by a write pointer; after writing one frame of data to the DDR, adding 3 to a writing pointer;
after writing a frame of data, judging whether the written area for storing the received data has a frame of complete data, if not, keeping the pointer unchanged, and continuously rewriting a frame of data of the queue; if so, the pointer is incremented by 3 and the data of the next queue is read.
The step of circulating after three times of direct memory access transmission specifically comprises the following steps:
counting and storing the number of times of cyclic use in the DDR memory in real time in the process of writing the received data of each frame into the DDR memory, and updating a current data cache region in real time according to the counted and stored number of times of cyclic use;
when writing a frame of data to the DDR, adding 3 to a writing pointer, mapping a logic address corresponding to the pointer to an updated current data buffer area address, so that data moving consumes one memory unit;
the cycle is performed after three DMA transfers
Before the access transmission of each direct memory is completed, the steps of completing the judgment and the recombination of 1000 effective frame signals are specifically as follows:
carrying out channel coding, dispersive recombination and modulation on a frame signal to be transmitted, and transmitting the modulated signal to a node;
after receiving the signal, the node makes a decision, and if only the signal of a single information source node is received, the signal is directly amplified and then is sent to the node corresponding to the next topology; otherwise, after network coding and data frame dispersion and recombination, the data frame is sent to the previous node.
The process of completing the test of the existing module specifically comprises the following steps:
after the test controller is electrified, resetting each module, and then checking whether a test control instruction sequence exists or not and whether corresponding test excitation and standard test response exist or not; if yes, selecting an automatic test mode; if not, turning to the next step;
sending manual test configuration information to a test controller through a communication bus;
sending a test control instruction sequence to a cpu, and storing a test stimulus and a standard test response;
sending address information to a test bus to select a specified tested object, wherein the selected tested object sends back response information, and the tested object is determined as a specified test object by a test controller;
starting the test, and checking whether the configuration information contains an instruction for finishing the test after sending a test result report; if yes, the test is finished; if not, returning to the first step of circulation.
Claims (4)
1. A method for demodulating fragmented frame signals based on a multi-channel communication receiving system, comprising the steps of:
regarding an area storing received data in the DDR as a cyclic first-in first-out queue with the depth of 3;
each time the direct memory access data is moved, one storage unit is consumed, and the cycle is carried out after the direct memory access transmission is carried out for three times, so that the completeness of one frame of data is ensured;
before the access transmission of the direct memory is completed each time, the judgment and the recombination of 1000 paths of effective frame signals are completed, and more processing time is obtained by increasing the data volume moved each time of the access of the direct memory;
completing the test of the existing module; before the access transmission of each direct memory is completed, the steps of completing the judgment and the recombination of 1000 effective frame signals are specifically as follows:
carrying out channel coding, dispersive recombination and modulation on a frame signal to be transmitted, and transmitting the modulated signal to a node;
after receiving the signal, the node makes a decision, and if only the signal of a single information source node is received, the signal is directly amplified and then is sent to the node corresponding to the next topology; otherwise, after network coding and data frame dispersion and recombination, the data frame is sent to the previous node.
2. The method for demodulating fragmented frame signals based on multiple channel communication receiving system as claimed in claim 1, wherein said regarding the area storing the received data in DDR as a circular fifo queue with depth of 3 is specifically:
taking an area of the DDR memory for storing the received data as a data cache area, wherein each cache area can store a frame of received data;
when each frame of received data is written into the DDR memory, the received data is stored in the data cache area in turn according to the sequence;
indicating the number of frames stored in the DDR by a write pointer; after writing one frame of data to the DDR, adding 3 to a writing pointer;
after writing a frame of data, judging whether the written area for storing the received data has a frame of complete data, if not, keeping the pointer unchanged, and continuously rewriting a frame of data of the queue; if so, the pointer is incremented by 3 and the data of the next queue is read.
3. The method according to claim 2, wherein one memory cell is consumed for each dma data transfer, and the loop after three dma transfers comprises:
counting and storing the number of times of cyclic use in the DDR memory in real time in the process of writing the received data of each frame into the DDR memory, and updating a current data cache region in real time according to the counted and stored number of times of cyclic use;
when writing a frame of data to the DDR, adding 3 to a writing pointer, mapping a logic address corresponding to the pointer to an updated current data buffer area address, so that data moving consumes one memory unit;
the cycle is performed after three DMA transfers
4. The method for demodulating fragmented frame signals based on multiple channel communication receiving system as claimed in claim 3, wherein the process of completing the test of the existing module specifically comprises:
after the test controller is electrified, resetting each module, and then checking whether a test control instruction sequence exists or not and whether corresponding test excitation and standard test response exist or not; if yes, selecting an automatic test mode; if not, turning to the next step;
sending manual test configuration information to a test controller through a communication bus;
sending a test control instruction sequence to a cpu, and storing a test stimulus and a standard test response;
sending address information to a test bus to select a specified tested object, wherein the selected tested object sends back response information, and the tested object is determined as a specified test object by a test controller;
starting the test, and checking whether the configuration information contains an instruction for finishing the test after sending a test result report; if yes, the test is finished; if not, returning to the first step of circulation.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0953235B1 (en) * | 1996-12-16 | 2002-06-05 | Cwill Telecommunications, Inc. | Smart antenna cdma wireless communication system |
| CN1889503A (en) * | 2006-06-01 | 2007-01-03 | 东南大学 | Multi-channel high-speed data processor and processing method |
| EP1096695B1 (en) * | 1999-10-28 | 2012-03-21 | STMicroelectronics S.r.l. | Multichannel transceiver of digital signals over power lines |
| CN106130930A (en) * | 2016-06-24 | 2016-11-16 | 西安电子科技大学 | A kind of Frame in advance join the team process device and method |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0953235B1 (en) * | 1996-12-16 | 2002-06-05 | Cwill Telecommunications, Inc. | Smart antenna cdma wireless communication system |
| EP1096695B1 (en) * | 1999-10-28 | 2012-03-21 | STMicroelectronics S.r.l. | Multichannel transceiver of digital signals over power lines |
| CN1889503A (en) * | 2006-06-01 | 2007-01-03 | 东南大学 | Multi-channel high-speed data processor and processing method |
| CN106130930A (en) * | 2016-06-24 | 2016-11-16 | 西安电子科技大学 | A kind of Frame in advance join the team process device and method |
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