CN106886617B - Multi-rate electromagnetic transient networking method with multiple VSCs - Google Patents

Multi-rate electromagnetic transient networking method with multiple VSCs Download PDF

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CN106886617B
CN106886617B CN201510931596.1A CN201510931596A CN106886617B CN 106886617 B CN106886617 B CN 106886617B CN 201510931596 A CN201510931596 A CN 201510931596A CN 106886617 B CN106886617 B CN 106886617B
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CN106886617A (en
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郑伟杰
穆清
张星
徐得超
高峰
徐树文
张艳
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State Grid Corp of China SGCC
China Electric Power Research Institute Co Ltd CEPRI
Electric Power Research Institute of State Grid Ningxia Electric Power Co Ltd
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China Electric Power Research Institute Co Ltd CEPRI
Electric Power Research Institute of State Grid Ningxia Electric Power Co Ltd
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Abstract

The invention relates to a multi-rate electromagnetic transient networking method containing multiple VSCs, which comprises the following steps: dividing the network 1 into a subnet I and a subnet II, and connecting the subnets through a section AA; setting n nodes and m branches in a cross section AA, wherein the nodes are respectively a1 … an, and every two nodes are not connected on the cross section; one branch contains n nodes and establishes m interface systems; establishing an interface system state mode of the subnet I and the subnet II including interface sections; discretizing the subnet I and the subnet II by adopting a preset simulation step length; the dynamic mode of two coupled systems is converted into the state transition mode of two coupled discrete systems, the state variable change is clearly represented by the discrete state transition mode, and when the step X of k is carried outsAnd XfAfter the information is determined, the formula of the whole system does not need to be solved, the information of k +1 time step can be conveniently calculated through a recursion expression, and the interface parallel calculation between the subnets with different step lengths is carried out.

Description

Multi-rate electromagnetic transient networking method with multiple VSCs
Technical Field
The invention relates to a networking parallel simulation method in multi-rate power system electromagnetic transient simulation, in particular to a multi-rate electromagnetic transient networking method containing multiple VSCs.
Background
The multi-rate simulation technology is an accurate multi-rate simulation technology, but the parallelization degree of the algorithm is not high, the system interaction information quantity is large, and the realization of real-time simulation is difficult. The parallel interface algorithm can decouple the networks on two sides, improve the parallelism of multi-rate simulation, reduce system interaction information and is a solution for realizing real-time simulation. At present, a multi-rate electromagnetic transient networking simulation method suitable for containing multiple VSCs is not available.
Disclosure of Invention
In order to solve the defects in the prior art, the invention aims to provide a multi-rate electromagnetic transient networking method containing multiple VSCs, wherein nodes connected among networks are used as boundary points of sub-networks, the whole power system simulation network is naturally divided into the sub-networks, and simulation step sizes of different networks are determined through experience.
The purpose of the invention is realized by adopting the following technical scheme:
the invention provides a multi-rate electromagnetic transient networking method containing a multi-VSC (voltage source converter), and the improvement is that the method comprises the following steps:
step 1: dividing the network 1 into a subnet I and a subnet II, and connecting the subnets through a section AA; setting n nodes and m branches in a cross section AA, wherein the nodes are respectively nodes A1.. An, and no connection exists between every two nodes on the cross section; one branch contains n nodes and the number of nodes,
step 2: establishing m interface systems;
and step 3: establishing an interface system state mode of the subnet I and the subnet II including interface sections;
and 4, step 4: discretizing the subnet I and the subnet II by adopting a preset simulation step length;
and 5: the dynamic mode of two coupled systems is converted into the state transition mode of two coupled discrete systems, the discrete state transition mode clearly represents the state variable change, and the X of the k time stepsAnd XfAfter the information is determined, the formula of the whole system does not need to be solved, the information of k +1 time step can be conveniently calculated through a recursion expression, and the interface parallel calculation between the subnets with different step lengths is carried out.
Further, in the step 1, the section AA includes KVL constraint with equal node voltage and KCL constraint with node current of 0; node A1nThe voltages to ground in the subnetwork I are respectively uA11...uAn1(ii) a Node A1nThe voltages to ground in the subnetwork II are respectively uA12...uAn2Subnet I egress node a1nRespectively is iA11...iAn1(ii) a The currents flowing out of the nodes A1.. An of the sub-network II are i respectivelyA12...iAn2The constraint condition is satisfied as shown in the following formula:
Figure GDA0002598297330000021
wherein: u. ofAj1、uAj2Voltage to ground of node a1.. An in subnet I and subnet II, respectively; i.e. iAj1、iAj2The currents flowing out of the nodes a1.. An for the sub-network I and the sub-network II, respectively, and j is a subscript of the node.
Further, in the step 2, a node correlation matrix of the typical branch circuit with the resistance, the inductance and the capacitance is set to be A, the dimension of A is (n-1) x m, the dimension of a basic loop correlation matrix is B, and the dimension of the basic loop correlation matrix is (m-n +1) x m; n and m respectively represent that 1 branch contains n nodes and m branches, and m system formulas are established according to KVL constraint with equal node voltage and KCL constraint with node current of 0, wherein the expression is as follows:
Figure GDA0002598297330000022
wherein: i issAnd VsRepresenting the current and voltage phasors on the branch circuit elements, the dimensions being m dimensions;
rearranging the unknown phasor group V for each branch element according to the sequence considering the resistance branch, the inductance branch and the capacitance branch, and setting the numbers of the resistance branch, the inductance branch and the capacitance branch as x, y and z respectively as follows:
V＝[i1 ... ixv1 ... vxi1 ... izv1 ... vyi1 ... iyv1 ... vz]T(3)
wherein: i.e. i1...ixRespectively representing the current of each resistance branch; i.e. i1...iyRespectively representing the current of each inductance branch; i.e. i1...izRespectively representing the current of each capacitor branch; v. of1...vxRespectively representing the voltage of each resistance branch; v. of1...vyRespectively representing the voltage of each inductance branch; v. of1...vzRespectively representing the voltage of each capacitor branch;
and knowing:
Figure GDA0002598297330000023
wherein: q is a 2m x 2m transform matrix;
by the above-mentioned know:
Figure GDA0002598297330000024
wherein A is11Representing the node incidence matrix associated with the resistive branch, A12Representing a node correlation matrix associated with the inductive branch, A13Representing a node incidence matrix associated with the capacitive branch; b is11Representing the basic loop correlation matrix associated with the resistive branch, B12Representing the fundamental loop correlation matrix associated with the inductive branch, B13To representA fundamental loop incidence matrix associated with the capacitive branches;
thus, the final relation is obtained by the KVL constraint with equal node voltages and the KCL constraint with node current of 0:
Figure GDA0002598297330000031
meanwhile, the vertical type is established according to the parameter relation of the branch, as follows:
Figure GDA0002598297330000032
in the formula, an R matrix represents a resistance diagonal matrix of x resistance branches; -I represents a diagonal matrix with-1 as an element; l represents an inductance diagonal matrix of y inductance branches, d represents a derivation operator, and C represents a capacitance diagonal matrix of z capacitance branches;
finally, a 2m × 2m coefficient matrix and an unknown phasor formula are obtained, wherein the unknown phasor is the current and voltage of the branch circuit element and is as follows:
Figure GDA0002598297330000033
after the equation (8) is processed, only the state variable i is obtainedyAnd vzThe state of (1):
Figure GDA0002598297330000034
wherein: a. themIs a matrix of coefficients (m + x) × (m + x) representing how closely tributary element connections between networks are, as follows:
Figure GDA0002598297330000041
further, in step 3, the subnet I is a high-speed subnet simulated by a small step, the simulation step is h, subscripts of all variables inside the subnet I are represented by f, the subnet II is a low-speed subnet simulated by a large step, the simulation step is mxh, and subscripts of all variables inside the subnet II are represented by s;
establishing a system state formula of the subnet I including the interface section, which is shown as the following formula:
Figure GDA0002598297330000042
in the formula (I), the compound is shown in the specification,
Figure GDA0002598297330000043
representing state variables in the subnet I, including inductor current, capacitor voltage and integral variables in the controller; a. thefRepresenting the network state matrix in the subnetwork I, BfAnd DfAre coefficient matrices; u shapefIs an input variable of the subnetwork I, where UfintIndicating the injection source, U, inside the subnetwork IfAA‘Representing a subnet injection source at a section interface, wherein the dimension is the number n of nodes of the section; y isfAA’Representing an output variable at a section interface and representing a current; wherein B isfintIs represented by BfAnd U in the matrixfintCorresponding coefficient matrix, DfintRepresents DfAnd U in the matrixfintCorresponding coefficient matrix, BfAA'Is represented by BfAnd U in the matrixfAA’A corresponding coefficient matrix; cfA capacitance diagonal matrix representing the subnet I; dsAA'Represents DsAnd U in the matrixsAA’A corresponding coefficient matrix;
establishing a system state formula of the subnet II including the interface section, as shown in the following formula:
Figure GDA0002598297330000044
in the formula:
Figure GDA0002598297330000045
showing sonState variables in net II including inductor current, capacitor voltage and integral variables in the controller; a. thesRepresenting the network state matrix in subnet II, BsAnd DsAre all coefficient matrices; u shapesIs an input variable of the subnetwork I, where UsintIndicating the injection source, U, inside the subnetwork IsAA‘Representing a subnet injection source at a section interface, wherein the dimension is the number n of nodes of the section; y issAA’Representing an output variable at a section interface and representing a current; wherein B issintIs represented by BsAnd U in the matrixsintCorresponding coefficient matrix, BsAA’Is represented by BsAnd U in the matrixsAA’A corresponding coefficient matrix; csA capacitance diagonal matrix representing subnet II; dsintRepresents DsAnd U in the matrixsintCorresponding coefficient matrix, DsAA' means DsAnd U in the matrixsAA’A corresponding coefficient matrix;
since the section AA needs to satisfy KVL constraint that the node voltages of the circuit are equal and KCL constraint theorem that the node current is 0, the interface formula satisfies the following relationship:
Figure GDA0002598297330000046
establishing a system formula expressed by the state variables of the network I, and describing the dynamic characteristics in the network; according to the derivation process, the dynamic characteristics of the network I can be accurately described, and all information, U, of the system is reservedfAA'Represents the voltage, U, of the subnetwork 1 at the section AAsAA'Represents the voltage, Y, of the subnetwork II at the section AAfAA'Respectively, the equivalent admittance, Y, of the subnetwork 1 at the section AAsAA'Representing the equivalent admittance at section AA for subnet II.
Further, in step 4, discretizing the subnet I and the subnet II by using a preset simulation step size to obtain the following expressions:
Figure GDA0002598297330000051
subnet II is as follows:
Figure GDA0002598297330000052
in the above two formulas, α and β represent two coefficients, which are derived by a backward euler integration method, and α is 0 and β is 1; a. thefRepresenting a network state matrix in a subnet I, wherein m represents m branches, I represents a current vector, h represents a step length, k represents a current calculation time step respectively, and k +1 represents a next calculation time step; b isfintIs represented by BfAnd U in the matrixfintCorresponding coefficient matrix, BfAA'Is represented by BfAnd U in the matrixfAA’A corresponding coefficient matrix; u shapefIs an input variable of the subnetwork I, where UfintIndicating the injection source, U, inside the subnetwork IfAA ‘Representing a subnet injection source at a section interface, wherein the dimension is the number n of nodes of the section; b issintIs represented by BsAnd U in the matrixsintCorresponding coefficient matrix, BsAA’Is represented by BsAnd U in the matrixsAA’A corresponding coefficient matrix; dsintRepresents DsAnd U in the matrixsintCorresponding coefficient matrix, DsAA' means DsAnd U in the matrixsAA’A corresponding coefficient matrix; dfintRepresents DfAnd U in the matrixfintCorresponding coefficient matrix, DfAA'Represents DfAnd U in the matrixfAA’A corresponding coefficient matrix;
simplified formulae (14) and (15):
Figure GDA0002598297330000053
Figure GDA0002598297330000061
the multi-rate simulation algorithm needs to ensure that the circuit constraints (14) and (15) of the section AA are unchanged, and the state transition of the network 1 system is as follows:
Figure GDA0002598297330000062
wherein Δ ═ BsAA'Cs+DfAA'+DsAA'+BfAA'Cf)-1，UsintAnd UfintIs the value of the injected power supply inside the subnet.
Compared with the closest prior art, the technical scheme provided by the invention has the following excellent effects:
the invention provides a multi-rate electromagnetic transient networking simulation method containing multi-VSC, which is characterized in that a whole power system simulation network is naturally divided into sub-networks by taking nodes communicated among the networks as boundary points of the sub-networks, and simulation step lengths of different networks are determined according to precision requirements. The method provided by the invention does not need a decoupling element when dividing the network, and has the advantages of simple and clear network division, strong universality and high network division speed. The electromagnetic transient subnets containing VSC accurate models with different rates and different step lengths can be simulated in parallel to perform real-time and super-real-time simulation.
Drawings
FIG. 1 is a schematic diagram of the basic structure of a multi-rate simulation system provided by the present invention;
FIG. 2 is a schematic diagram of the network segmentation provided by the present invention;
fig. 3 is a diagram of a typical circuit model of the branch circuit provided by the present invention.
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
The following description and the drawings sufficiently illustrate specific embodiments of the invention to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. The examples merely typify possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in or substituted for those of others. The scope of embodiments of the invention encompasses the full ambit of the claims, as well as all available equivalents of the claims. Embodiments of the invention may be referred to herein, individually or collectively, by the term "invention" merely for convenience and without intending to voluntarily limit the scope of this application to any single invention or inventive concept if more than one is in fact disclosed.
The multi-rate simulation system adopts space network segmentation and comprises a slow system, a fast system and a multi-rate simulation interface. A specific multi-rate system architecture is shown in fig. 1.
In the upper diagram, the Main Circuit represents a Main framework in the power system simulation, and includes a large number of power electronic circuits of generators, transformers, loads, transmission lines, LCCs and equivalent circuits, the network scale is large, the structure is complex, the high-speed IGBTs do not act, the time constant of the system is large, the system response is slow, a large step length (for example, 50 μ s) is adopted, and the conventional electromagnetic transient simulation technology is adopted in the part.
The ellipses a, B, C, D, E represent some fast sub-networks comprising VSCs and some components closely coupled thereto, such as phase reactors, converter transformers and transient filters, dc side capacitors and wind turbines or solar power plants. Fast subnets require an accurate response to the trigger pulse and should be simulated using a small simulation step size (e.g., 1-3 mus). The sub-network is connected with the Main Circuit through a multi-rate simulation interface (node or transmission line), and the sub-network are not electrically connected. There are differences between accuracy, stability and computational efficiency with different multi-rate simulation techniques.
The invention naturally divides the simulation network of the whole power system into various sub-networks by taking the nodes communicated among the networks as the boundary points of the sub-networks, and determines the simulation step length of different networks through experience. The invention does not need decoupling elements when dividing the network, and the network division is simple and clear and has strong universality.
The invention provides a multi-rate electromagnetic transient networking simulation method containing multiple VSCs, which comprises the following steps:
step 1: dividing the network 1 into a subnet I and a subnet II, and connecting the subnets through a section AA; setting n nodes in a cross section AA, wherein the n nodes are respectively nodes A1.. An, and no connection exists between every two nodes on the cross section;
for the purpose of theoretical derivation and explanation, it is assumed that the network 1 is divided into a subnetwork I and a subnetwork II, connected by a section AA, as shown in fig. 2. Let n nodes exist in the cross section AA, which is the node a1.. An, and there is no connection between the nodes on the cross section.
The network topology in the cloud pattern in fig. 2 is uncertain and the model of power supply plus resistance is only an example and not a true intra-subnet element. The subnet I and the subnet II have any network topology, and internal elements can be built according to the needs of users. In consideration of simulation efficiency, the electromagnetic transient simulation adopts a piecewise linearization method and an adjoint method for processing nonlinear links, elements in the subnet I and the subnet II are not limited to linear elements any more, and a simulation algorithm has universality.
The physical constraints of the sections between different networks represent the coupling constraints between the networks, and the section AA includes the KVL constraint that the node voltages are equal and the KCL constraint that the node current is 0. For example, assume that the voltages to ground of nodes a1.. An in subnets I,2 are u, respectivelyA11...uAn1And uA12...uAn2The current flowing out of the node is iA11...iAn1And iA12...iAn2The constraint condition is satisfied as shown in the following formula:
Figure GDA0002598297330000081
a typical branch of the resistance inductance and capacitance is present in the circuit, and a typical diagram of the branch can be represented as fig. 3:
in FIG. 3, R (L, C) represents a resistive element (capacitive, inductive), I, on branch ijsRepresenting a current source, VsRepresenting a voltage source, i and j representing nodes across the branch, iijRepresenting the current through the branch element, uijRepresenting the voltage of the components in the branch, the typical expression of the branch is the following three equations:
uij＝Riij
Figure GDA0002598297330000082
Figure GDA0002598297330000083
taking any circuit, and setting the node correlation matrix of the circuit as A, the dimension of A as (n-1) x m, the dimension of the basic loop correlation matrix as B, and the dimension as (m-n +1) x m.
Step 2: establishing m interface systems;
according to KVL and KCL, m system formulas are established:
Figure GDA0002598297330000084
where i and v represent the current and voltage phasors at the branching elements, both in the m dimension.
For each branch component, the unknown phasor group V may be rearranged according to the order of considering the resistance branch, the inductance branch, and the capacitance branch, and assuming that the numbers of the resistance branch, the inductance branch, and the capacitance branch are x, y, and z respectively, as follows:
V＝[i1 ... ixv1 ... vxi1 ... izv1 ... vyi1 ... iyv1 ... vz]T (3)
and is easy to know:
Figure GDA0002598297330000085
q is a 2m × 2m transform matrix.
By way of variation it can be seen that:
Figure GDA0002598297330000086
wherein A is11Representing the node incidence matrix associated with the resistive branch, A12Representing a node correlation matrix associated with the inductive branch, A13Representing a node incidence matrix associated with the capacitive branch; b is11Representing the basic loop correlation matrix associated with the resistive branch, B12Representing the fundamental loop correlation matrix associated with the inductive branch, B13A basic loop correlation matrix associated with the capacitive branches is represented.
From KVL, KCL, the final relation is thus obtained:
Figure GDA0002598297330000091
meanwhile, other equations can be established according to the parameter relationship of the branch, as follows:
Figure GDA0002598297330000092
in the above formula, the R matrix represents a resistance diagonal matrix of x resistance branches; -I represents a diagonal matrix with-1 as an element; l represents the inductance diagonal matrix of y inductance branches, d represents a derivative operator, and C represents the capacitance diagonal matrix of z capacitance branches.
And step 3: establishing an interface system state mode of the subnet I and the subnet II including interface sections;
by combining the above, an expression comprising a coefficient matrix of 2m × 2m and an unknown phasor (branch device current voltage) can be obtained.
Figure GDA0002598297330000093
After processing the formula (11), only the product is obtainedContaining a state variable iyAnd vzThe state of (1):
Figure GDA0002598297330000094
wherein A ismIs a matrix of coefficients (m + x) × (m + x) representing how closely tributary element connections between networks are, as follows:
Figure GDA0002598297330000101
complex multiport network branches not considered in the above derivation can also be easily defined as a multiple-input multiple-output system incorporated into the circuit state space representation.
According to the invention, the network 1 of fig. 2 can be divided into two sub-networks by means of voltage sources: subnet I and subnet II, the constraint of equal voltage is met between the subnets, and the constraint of 0 current is also met.
The invention defines that the subnet I is a high-speed subnet adopting small-step simulation, the simulation step is h, subscripts of all variables in the subnet I are expressed by f (fast), the subnet II is a low-speed subnet adopting large-step simulation, the simulation step is mxh, and subscripts of all variables in the subnet II are expressed by s (slow).
Establishing a system state formula of the subnet I including the interface section, as shown in the formula:
Figure GDA0002598297330000102
in the above formula, XfRepresenting state variables in the subnet I including inductor current, capacitor voltage and integral variables in the controller. A. thefRepresenting the network state matrix in the subnet I, solving the reference formulas (2) to (6), BfAnd DfAre all coefficient matrices. U shapefIs an input variable of the subnetwork I, where UfintIndicating the injection source, U, inside the subnetwork IfAA‘Showing the cross-section interfaceThe number of dimensions of the injected source is n, which is the number of nodes of the cross section. Y isfAA’The output variable at the profile interface is shown, representing the current. Wherein B isfintIs represented by BfAnd U in the matrixfintCorresponding coefficient matrix, BfAA’Is represented by BfAnd U in the matrixfAA’A corresponding coefficient matrix.
Establishing a system state formula of the subnet II including the interface section, as shown in formula (12):
Figure GDA0002598297330000103
the coefficients in this formula have the same meaning as in formula (1). For ease of expressing the system, X in the above formulasRepresenting state variables in subnet II including inductor current, capacitor voltage and integral variables in the controller. A. thesRepresenting the network state matrix in subnet II, BsAnd DsAre all coefficient matrices. U shapesIs an input variable of the subnetwork I, where UsintIndicating the injection source, U, inside the subnetwork IsAA‘And (4) representing a subnet injection source at the interface of the section, wherein the dimension is the node number n of the section. Y issAA’The output variable at the profile interface is shown, representing the current. Wherein B issintIs represented by BsAnd U in the matrixsintCoefficient matrix, BsAA’Is represented by BsAnd U in the matrixsAA’A corresponding coefficient matrix. DsintRepresents DsAnd U in the matrixsintCorresponding coefficient matrix, DsAA'Represents DsAnd U in the matrixsAA’A corresponding coefficient matrix; dfintRepresents DfAnd U in the matrixfintCorresponding coefficient matrix, DfAA'Represents DfAnd U in the matrixfAA’A corresponding coefficient matrix;
since the section AA needs to satisfy the KVL, KCL theorem of the circuit, it can be known that the interface equation satisfies the following relationship:
Figure GDA0002598297330000111
integration of equations (8) to (12) allows to establish a system equation (13) of the state variable representation of the network 1, describing the dynamic behaviour inside the network. According to the derivation process, the formula is not simplified at all, the dynamic characteristics of the network 1 can be accurately described, and all information of the system is reserved.
And 4, step 4: the method is characterized in that a preset simulation step size is adopted for a subnet I and a subnet II (the subnet I is a high-speed subnet adopting small-step simulation, the simulation step size is h (h is generally 1-10us), subscripts of all variables in the subnet I are expressed by f (fast)), and the subnet II is a low-speed subnet adopting large-step simulation, the simulation step size is m x h, (m x h is generally 30-100us)), discretization (the discretization aims at decomposing a large subnet equation into small step size calculation formulas for calculation, and the calculation is a basic calculation form of recursive calculation).
Discretizing the two subnets by adopting a preset simulation step length to obtain the following expression:
subnet I is as follows:
Figure GDA0002598297330000112
subnet II is as follows:
Figure GDA0002598297330000113
in the above two equations, α and β represent two coefficients, which are determined by different integration methods, and when the integration methods are different, the discretization result may be different. In order to simplify the analysis, a backward euler integration method (α is 0 and β is 1) is used in the subsequent derivation process of the present invention.
For simplicity of the formula description, some symbols in formulae (14) and (15) are simplified as follows:
Figure GDA0002598297330000114
Figure GDA0002598297330000121
the multi-rate simulation algorithm needs to ensure that the circuit constraints (14) and (15) of the cross section AA are unchanged, and by combining the equations (16) and (17), the state transition equation of the network 1 system can be deduced as shown in the following:
Figure GDA0002598297330000122
wherein Δ ═ BsAA'Cs+DfAA'+DsAA'+BfAA'Cf)-1，
In the above formula, UsintAnd UfintIs the value of the injected power supply inside the subnet. Since the injection power supply inside the sub-network is completely determined by the function expression of the power supply, and is not determined by the circuit state, the injection power supply can be obtained without disconnecting the network.
And 5: so far, the dynamic mode of two coupled systems can be converted into the state transition mode of two coupled discrete systems, the discrete state transition mode can clearly express the state variable change, and X of k time stepsAnd XfAfter the information is determined, the formula of the whole system does not need to be solved, the information of k +1 time step can be conveniently calculated through a recursion expression, and the interface parallel calculation between the subnets with different step lengths is carried out.
Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art can make modifications and equivalents to the embodiments of the present invention without departing from the spirit and scope of the present invention, which is set forth in the claims of the present application.

Claims (4)

1. A multi-rate electromagnetic transient networking method containing multiple VSCs is characterized in that the VSCs are voltage source converters; the method comprises the following steps:
step 1: dividing the network 1 into a subnet I and a subnet II, and connecting the subnets through a section AA; setting n nodes and m branches in a cross section AA, wherein the nodes are respectively a node A1 … An, and every two nodes are not connected on the cross section; one branch contains n nodes and the number of nodes,
step 2: establishing m interface systems;
and step 3: establishing a subnet I and a subnet II of an interface system state mode containing an interface section;
and 4, step 4: discretizing the subnet I and the subnet II by using a preset simulation step length;
and 5: converting the dynamic mode of two coupled systems into the state transition mode of two coupled discrete systems, wherein the discrete state transition mode explicitly represents the state variable change, and X of k time stepssAnd XfAfter the information is determined, the formula of the whole system does not need to be solved, the information of k +1 time step can be conveniently calculated through a recursion expression, and the interface parallel calculation between subnets with different step lengths is carried out;
wherein, XfRepresenting state variables in the subnet I; xsRepresenting state variables in subnet II;
in the step 2, a node incidence matrix of a typical branch circuit with resistance, inductance and capacitance is set to be A, the dimension of A is (n-1) x m, the dimension of a basic loop incidence matrix is B, and the dimension of B is (m-n +1) x m; n and m respectively represent that 1 branch contains n nodes and m branches, and m system formulas are established according to KVL constraint with equal node voltage and KCL constraint with node current of 0, wherein the expression is as follows:
Figure FDA0002587039140000011
wherein: i issAnd VsRepresenting the current and voltage phasors on the branch circuit elements, the dimensions being m dimensions; i and v represent the current and voltage phasors at the branch elements;
rearranging the unknown phasor group V for each branch element according to the sequence considering the resistance branch, the inductance branch and the capacitance branch, and setting the numbers of the resistance branch, the inductance branch and the capacitance branch as x, y and z respectively as follows:
V＝[i1...ixv1...vxi1...izv1...vyi1...iyv1...vz]T (3)
wherein: i.e. i1...ixRespectively representing the current of each resistance branch; i.e. i1...iyRespectively representing the current of each inductance branch; i.e. i1...izRespectively representing the current of each capacitor branch; v. of1...vxRespectively representing the voltage of each resistance branch; v. of1...vyRespectively representing the voltage of each inductance branch; v. of1...vzRespectively representing the voltage of each capacitor branch;
and knowing:
Figure FDA0002587039140000012
wherein: q is a 2m x 2m transform matrix;
by the above-mentioned know:
Figure FDA0002587039140000021
wherein A is11Representing the node incidence matrix associated with the resistive branch, A12Representing a node correlation matrix associated with the inductive branch, A13Representing a node incidence matrix associated with the capacitive branch; b is11Representing the basic loop correlation matrix associated with the resistive branch, B12Representing the fundamental loop correlation matrix associated with the inductive branch, B13Representing a basic loop incidence matrix related to the capacitance branch;
thus, the final relation is obtained by the KVL constraint with equal node voltages and the KCL constraint with node current of 0:
Figure FDA0002587039140000022
meanwhile, the vertical type is established according to the parameter relation of the branch, as follows:
Figure FDA0002587039140000023
in the formula, an R matrix represents a resistance diagonal matrix of x resistance branches; -I represents a-1 element; l represents an inductance diagonal matrix of y inductance branches, d represents a derivation operator, and C represents a capacitance diagonal matrix of z capacitance branches;
finally, a 2m × 2m coefficient matrix and an unknown phasor formula are obtained, wherein the unknown phasor is the current and voltage of the branch circuit element and is as follows:
Figure FDA0002587039140000024
after the equation (8) is processed, only the state variable i is obtainedyAnd vzThe state of (1):
Figure FDA0002587039140000031
wherein: a. themIs a matrix of coefficients (m + x) × (m + x) representing how closely tributary element connections between networks are, as follows:
Figure FDA0002587039140000032
2. the multi-rate electromagnetic transient networking method of claim 1, wherein in step 1, the cross section AA comprises a KVL constraint that the node voltages are equal and a KCL constraint that the node currents are 0; the voltages to ground of the node A1 … An in the subnet I are respectively uA11…uAn1(ii) a The voltages to ground of the node A1 … An in the subnet II are respectively uA12…uAn2The currents flowing out of the node A1 … An from the subnet I are I respectivelyA11…iAn1(ii) a The currents flowing out of the node A1 … An of the sub-network II are i respectivelyA12…iAn2The constraint condition is satisfied as shown in the following formula:
Figure FDA0002587039140000033
wherein: u. ofAj1、uAj2Voltage to ground in subnet I and subnet II for node a1 … An, respectively; i.e. iAj1、iAj2The currents flowing out of node a1 … An for sub-network I and sub-network II, respectively, j is the subscript of the node.
3. The multirate electromagnetic transient networking method of claim 1 wherein in step 3, subnet I is a high-speed subnet simulated with small step size, the simulation step size is h, subscripts of all variables inside subnet I are represented by f, subnet II is a low-speed subnet simulated with large step size, the simulation step size is mxh, and subscripts of all variables inside subnet II are represented by s;
establishing a system state formula of the subnet I including the interface section, which is shown as the following formula:
Figure FDA0002587039140000034
in the formula (I), the compound is shown in the specification,
Figure FDA0002587039140000035
representing state variables in the subnet I, including inductor current, capacitor voltage and integral variables in the controller; a. thefRepresenting the network state matrix in the subnetwork I, BfAnd DfAre coefficient matrices; u shapefIs an input variable of the subnetwork I, where UfintIndicating the injection source, U, inside the subnetwork IfAA‘Representing sub-annotations at fracture interfacesEntering a source, wherein the dimension is the number n of nodes of the section; y isfAA’Representing an output variable at a section interface and representing a current; wherein B isfintIs represented by BfAnd U in the matrixfintCorresponding coefficient matrix, DfintRepresents DfAnd U in the matrixfintCorresponding coefficient matrix, BfAA'Is represented by BfAnd U in the matrixfAA’A corresponding coefficient matrix; cfA capacitance diagonal matrix representing the subnet I; dfAA'Represents DfAnd U in the matrixfAA’A corresponding coefficient matrix;
establishing a system state formula of the subnet II including the interface section, as shown in the following formula:
Figure FDA0002587039140000041
in the formula:
Figure FDA0002587039140000042
representing state variables in subnet II, including inductor current, capacitor voltage, and integral variables in the controller; a. thesRepresenting the network state matrix in subnet II, BsAnd DsAre all coefficient matrices; u shapesIs an input variable of subnet II, where UsintIndicating the injection source, U, inside the subnet IIsAA‘Representing a subnet injection source at a section interface, wherein the dimension is the number n of nodes of the section; y issAA’Representing an output variable at a section interface and representing a current; wherein B issintIs represented by BsAnd U in the matrixsintCorresponding coefficient matrix, BsAA’Is represented by BsAnd U in the matrixsAA’A corresponding coefficient matrix; csA capacitance diagonal matrix representing subnet II; dsintRepresents DsAnd U in the matrixsintCorresponding coefficient matrix, DsAA'Represents DsAnd U in the matrixsAA’A corresponding coefficient matrix;
since the section AA needs to satisfy KVL constraint that the node voltages of the circuit are equal and KCL constraint theorem that the node current is 0, the interface formula satisfies the following relationship:
Figure FDA0002587039140000043
establishing a system formula expressed by the state variables of the network I, and describing the dynamic characteristics in the network; according to the derivation process, the dynamic characteristics of the network I can be accurately described, and all information, U, of the system is reservedfAA'Represents the voltage, U, of the subnetwork 1 at the section AAsAA'Represents the voltage, Y, of the subnetwork II at the section AAfAA'Respectively representing the equivalent admittance, Y, of the subnetwork I at the section AAsAA'Representing the equivalent admittance at section AA for subnet II.
4. The multirate electromagnetic transient networking method of claim 3, wherein in said step 4, the subnet I and subnet II are discretized by using a preset simulation step size, and the following expressions are obtained respectively:
Figure FDA0002587039140000044
subnet II is as follows:
Figure FDA0002587039140000051
in the above two formulas, α and β represent two coefficients, which are derived by a backward euler integration method, and α is 0 and β is 1; a. thefRepresenting a network state matrix in a subnet I, wherein m represents m branches, I represents a current vector, h represents a step length, k represents a current calculation time step respectively, and k +1 represents a next calculation time step; b isfintIs represented by BfAnd U in the matrixfintCorresponding coefficient matrix, BfAA'Is represented by BfAnd U in the matrixfAA’A corresponding coefficient matrix; u shapefIs an input variable of the subnetwork I, where UfintIndicating the injection source, U, inside the subnetwork IfAA‘Representing a subnet injection source at a section interface, wherein the dimension is the number n of nodes of the section; b issintIs represented by BsAnd U in the matrixsintCorresponding coefficient matrix, BsAA’Is represented by BsAnd U in the matrixsAA’A corresponding coefficient matrix; dsintRepresents DsAnd U in the matrixsintCorresponding coefficient matrix, DsAA'Represents DsAnd U in the matrixsAA’A corresponding coefficient matrix; dfintRepresents DfAnd U in the matrixfintCorresponding coefficient matrix, DfAA'Represents DfAnd U in the matrixfAA’A corresponding coefficient matrix; b isfAnd DfAre coefficient matrices;
simplified formulae (14) and (15):
Figure FDA0002587039140000052
Figure FDA0002587039140000053
the multi-rate simulation algorithm needs to ensure that the circuit constraints (14) and (15) of the section AA are unchanged, and the state transition of the network 1 system is as follows:
Figure FDA0002587039140000054
wherein Δ ═ BsAA'Cs+DfAA'+DsAA'+BfAA'Cf)-1，UsintAnd UfintIs the value of the injected power supply inside the subnet.
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