CN106877840A - A kind of mechanical oscillation error cancelling method and device - Google Patents

A kind of mechanical oscillation error cancelling method and device Download PDF

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Publication number
CN106877840A
CN106877840A CN201710003598.3A CN201710003598A CN106877840A CN 106877840 A CN106877840 A CN 106877840A CN 201710003598 A CN201710003598 A CN 201710003598A CN 106877840 A CN106877840 A CN 106877840A
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input signal
vector
current time
signal
signal vector
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董扬辉
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Shenzhen Yihua Computer Co Ltd
Shenzhen Yihua Time Technology Co Ltd
Shenzhen Yihua Financial Intelligent Research Institute
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Shenzhen Yihua Computer Co Ltd
Shenzhen Yihua Time Technology Co Ltd
Shenzhen Yihua Financial Intelligent Research Institute
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Priority to CN201710003598.3A priority Critical patent/CN106877840A/en
Publication of CN106877840A publication Critical patent/CN106877840A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H21/00Adaptive networks
    • H03H21/0012Digital adaptive filters

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Abstract

The present invention is applied to error concealment technical field, there is provided a kind of mechanical oscillation error cancelling method and device, methods described include:The reference-input signal at current time is obtained, the reference-input signal at moment before determining using the reference-input signal at current time;Reference-input signal according to current time and the before reference-input signal at moment, determine reference-input signal vector X (n);Reference-input signal vector X (n) is filtered based on field programmable gate array and using FIR adaptive filter algorithms, exports useful signal.The mechanical oscillation error cancelling method can eliminate the error that the mechanical oscillation of measuring system under different operating environment are caused.

Description

A kind of mechanical oscillation error cancelling method and device
Technical field
The invention belongs to error concealment technical field, more particularly to a kind of mechanical oscillation error cancelling method and device.
Background technology
When measuring system works, the information such as sensor collection machinery displacement, measuring system is at the data that collect Reason obtains measurement result, but mechanical oscillation can cause measurement result to there is larger error.If by the manufacture work for improving machinery Skill improves certainty of measurement, there is a problem of that high cost and difficulty of processing are big, and in different measuring environments, due to temperature and The influence of the factors such as humidity, the mechanical oscillation frequencies of measuring system are different, therefore, it is difficult to eliminate the measurement knot that mechanical oscillation are caused Fruit error.
Therefore, it is necessary to a kind of new technical scheme is proposed, to solve above-mentioned technical problem.
The content of the invention
In consideration of it, the embodiment of the present invention provides mechanical oscillation error cancelling method and device, it is difficult in the prior art to solve To eliminate the problem of the measuring result error that mechanical oscillation are caused.
A kind of first aspect of the embodiment of the present invention, there is provided mechanical oscillation error cancelling method, including:
The reference-input signal at current time is obtained, the moment before determining using the reference-input signal at the current time Reference-input signal;
Reference-input signal and the reference-input signal at the moment before according to the current time, it is determined that with reference to defeated Enter signal vector X (n);
Reference-input signal vector X (n) is entered based on field programmable gate array and using FIR adaptive filter algorithms Row filtering, exports useful signal.
A kind of second aspect of the embodiment of the present invention, there is provided mechanical oscillation error concealment device, including:
Acquisition module, the reference-input signal for obtaining current time, the reference input using the current time is believed Number determine before the moment reference-input signal;
Determining module, for the reference-input signal according to the current time and the reference input letter at the moment before Number, determine reference-input signal vector X (n);
Filtration module, for based on field programmable gate array and using FIR adaptive filter algorithms to the reference input Signal vector X (n) is filtered, and exports useful signal.
The beneficial effect that the embodiment of the present invention exists compared with prior art is:Mechanical oscillation error provided by the present invention In removing method and device, the reference-input signal at current time is obtained, the reference-input signal using current time determines it The reference-input signal at preceding moment;Reference-input signal according to current time and the before reference-input signal at moment, it is determined that Reference-input signal vector X (n);Based on field programmable gate array and using FIR adaptive filter algorithms to the reference input Signal vector X (n) is filtered, and exports useful signal.The effective letter exported in the mechanical oscillation error cancelling method and device Number, the error that the mechanical oscillation of measuring system under different operating environment are caused can be eliminated.
Brief description of the drawings
Technical scheme in order to illustrate more clearly the embodiments of the present invention, below will be to embodiment or description of the prior art Needed for the accompanying drawing to be used be briefly described, it should be apparent that, drawings in the following description are only more of the invention Embodiment, for those of ordinary skill in the art, without having to pay creative labor, can also be according to these Accompanying drawing obtains other accompanying drawings.
Fig. 1 is a flow chart of the mechanical oscillation error cancelling method that the embodiment of the present invention one is provided;
Fig. 2 is a flow chart of step S10 in mechanical oscillation error cancelling method shown in Fig. 1;
Fig. 3 is a flow chart of step S30 in mechanical oscillation error cancelling method shown in Fig. 1;
Fig. 4 is the schematic diagram of FIR adaptive filter algorithms provided in an embodiment of the present invention;
Fig. 5 is the structured flowchart of mechanical oscillation error concealment device provided in an embodiment of the present invention.
Specific embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples The present invention is described in detail.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not used to Limit the present invention.
The embodiment of the present invention provides a kind of mechanical oscillation error cancelling method.The mechanical oscillation error cancelling method includes: The reference-input signal at current time is obtained, the reference input at moment is believed before determining using the reference-input signal at current time Number;Reference-input signal according to current time and the before reference-input signal at moment, determine reference-input signal vector X (n);Reference-input signal vector X (n) is filtered based on field programmable gate array and using FIR adaptive filter algorithms Ripple, exports useful signal, so that the error that the mechanical oscillation for eliminating measuring system under different operating environment are caused.In order to illustrate this The there is provided mechanical oscillation error cancelling method of invention, illustrates below by specific embodiment.
Embodiment one
Fig. 1 shows a flow chart of the mechanical oscillation error cancelling method that the embodiment of the present invention one is provided, and details are as follows:
In S10, the reference-input signal at current time is obtained, the reference-input signal using the current time determines The reference-input signal at moment before.
The reference-input signal at current time refers to the reference-input signal on frequency domain, if current time is n, preset reference The length of signal vector is k, then the reference-input signal at moment is that (k-1) is individual before being determined according to k values.
In order that reference-input signal vector and the noise signal height correlation produced by measuring system mechanical oscillation, preferably Ground, makes the reference-input signal at acquisition current time, the reference at moment before being determined using the reference-input signal at current time The process of input signal is carried out in the state of the system free time, and the reference-input signal got under system idle condition is more accurate Really and height correlation can be kept with the noise signal produced by measuring system mechanical oscillation all the time.Wherein, the idle shape of system State refers to the working condition that measurement was opened but do not entered into system.
In S20, reference-input signal according to current time and the before reference-input signal at moment, it is determined that with reference to defeated Enter signal vector X (n).
Make X (n)={ x (n), x (n-1), x (n-2) ... ..., x (n-k-2), x (n-k+1) }T,
Wherein, x (n) is the reference-input signal at current time;X (n-1) believes for the reference input of last moment Number ... ..., x (n-k+1) was the reference-input signal at upper (k-1) moment, x (n-1), x (n-2) ... ..., x (n-k-2), x (n-k + 1) reference-input signal at moment before being collectively referred to as;Reference-input signal vector X (n) by current time reference-input signal The reference-input signal at moment is constituted before.
In S30, based on field programmable gate array and using FIR adaptive filter algorithms to reference-input signal vector X N () is filtered, export useful signal.
Field programmable gate array (i.e. Field-Programmable Gate Array, abbreviation FPGA) is a kind of based on N The field programmable gate array of look-up table (LUT) technology of input, the logical resource of rule and interconnection resource with abundant.FPGA Logical cell array LCA (Logic Cell Array) such a concept is employed, inside includes configurable logic blocks CLB (Configurable Logic Block), input/output module IOB (Input Output Block) and interconnector (Interconnect) three parts.Field programmable gate array (FPGA) is programming device, with conventional logic circuit and door Array (such as PAL, GAL and CPLD device) is compared, and FPGA has different structures.FPGA utilizes small-sized look-up table (16 × 1RAM) To realize combinational logic, each look-up table is connected to an input for d type flip flop, and trigger drives other logic circuits again Or I/O is driven, thus constitute the basic logic unit mould that can not only realize combination logic function but also sequential logic function can be realized Block, these intermodules interconnect or are connected to I/O modules using metal connecting line.The logic of FPGA is deposited by internally static state Storage unit loads programming data to realize, storage value in a memory cell determine logic unit logic function and Connecting mode between each module or between module and I/O, and the function achieved by FPGA is finally determined, FPGA allows unlimited Secondary programming.
Reference-input signal vector X (n) is filtered based on field programmable gate array and using FIR adaptive-filterings Ripple includes:Original input signal is not filtered, and directly as desired output signal, the desired output signal at current time is therewith The desired output signal at preceding moment constitutes desired output signal vector;Adaptivity filter is carried out to reference-input signal vector X (n) Ripple, output signal vector is the transposition of adaptive-filtering weight coefficient vector and the product of reference input vector, error signal vector To expect the difference of signal vector and output signal vector, adaptive-filtering power system is progressively adjusted according to the error signal vector for obtaining Number vector, until the value of error vector is minimum.Preferably, step S30 is carried out when system works.System work refers to be System is opened and enters working condition.
In the mechanical oscillation error cancelling method that the present embodiment is provided, the reference-input signal at current time, profit are obtained The reference-input signal at moment before being determined with the reference-input signal at current time;According to the reference-input signal at current time The reference-input signal at moment, determines reference-input signal vector X (n) before;Based on field programmable gate array and use FIR Adaptive filter algorithm is filtered to reference-input signal vector X (n), exports useful signal, eliminates different operating ring The error that the mechanical oscillation difference of measuring system is caused under border.
Further, Fig. 2 shows a flow chart of step S10 in mechanical oscillation error cancelling method shown in Fig. 1, describes in detail such as Under:
In S101, the continuous time signal to collecting carries out analog-to-digital conversion and obtains data signal.
Collection continuous time signal x (t), corresponding data signal is obtained by analog-digital converter.Analog-to-digital conversion includes:It is right Continuous time signal is sampled, and the signal after sampling is quantified.Sampling is to continuous time signal discretization, sampling Process is carried out according to sampling thheorem, and sampling thheorem is when sample frequency is more than 2 times of highest frequency in signal, after sampling Data signal intactly remains the information in primary signal.For the binary representation mode of coupled computer, it is preferable that real Guarantee sample frequency is 2.56 times of signal highest frequency in the application of border.Quantization refers to (or largely may be used the continuous value of signal The discrete value of energy) it is approximately the process of limited multiple (or less) centrifugal pump.Continuous signal turns into discrete after over-sampling Time signal, discrete-time signal becomes data signal by quantization.
In S102, Fast Fourier Transform (FFT) to frequency domain is done to data signal based on field programmable gate array.
Based on field programmable gate array, the data signal to being obtained in S101 does Fast Fourier Transform (FFT) to frequency domain.It is N number of Sampled point, by FFT after, it is possible to obtain the FFT result of N number of point.FFT computings are carried out for convenience, it is preferable that N takes 2 Integer power.
In S103, the spectrum component figure according to frequency domain calculates intrinsic frequency.
Some signals are difficult that what feature is found out in time domain, transform to frequency domain and are just readily seen feature, to reference input Vector carries out the spectrogram that Fast Fourier Transform (FFT) FFT is extracted on frequency domain, and analysis spectrum figure finds out the corresponding point of amplitude highest Corresponding frequency is the frequency of noise signal.Alternatively, if the 51st amplitude highest of point, corresponding frequency on spectrogram 50HZ is the frequency of noise signal;If the 76th amplitude highest of point on spectrogram, corresponding frequency 75HZ is noise signal Frequency.
In S104, the reference-input signal at the current time is synthesized according to intrinsic frequency.
Based on field programmable gate array, by the amplitude of the amplitude peak of above-mentioned acquisition, frequency and phase are input into DDS Reference-input signal is synthesized in (Direct Digital Synthesizer, i.e. Direct Digital Synthesizer).Frequency That is intrinsic frequency.
The advantage that noise frequency is calculated was that measuring system exists before system measures work by the present embodiment Vibration frequency is different intrinsic frequency under different environment, and this method eliminates the influence brought by environmental change, is adapted to Property it is stronger, while it is that FPGA can be in terms of high clock speed to carry out the advantage that FFT and DDS synthesize using FPGA Calculate and can be parallel real-time calculating and synchronized compound signal, it is quick, efficiently.
Further, Fig. 3 shows a flow chart of step S30 in mechanical oscillation error cancelling method shown in Fig. 1, Fig. 4 The schematic diagram of FIR adaptive filter algorithms provided in an embodiment of the present invention is shown, with reference to Fig. 3 and Fig. 4, details are as follows:
In S301, the transposition and reference-input signal of sef-adapting filter weight coefficient vector W (n) according to current time Vectorial X (n) is multiplied, and obtains output signal vector Y (n) at current time.
The step is represented by:Y (n)=WT(n)*X(n)。
Wherein, X (n) is reference-input signal vector, and Y (n) is output signal vector, and W (n) is the self adaptation at current time Wave filter weight coefficient vector, WTN () is the transposition of the sef-adapting filter weight coefficient vector at current time, n is iterations.
Reference-input signal vector X (n), X (n)={ x (n), x (n-1), x (n-2) ... ..., x (n-k-2), x (n-k+ 1)}T, wherein, x (n) is the reference-input signal at current time, and x (n-1) is the reference-input signal ... ... of last moment, x (n-k+1) for upper (k-1) moment reference-input signal, reference-input signal vector X (n) by current time reference input letter Number and before the moment reference-input signal constitute.
Sef-adapting filter weight coefficient vector W (n) at current time, W (n)={ w0(n),w1(n), w2(n) ... ..., wk-2 (n), wk-1(n)}T, it is less complicated while calculating for convenience, it is preferable that k=32.
In S302, it would be desirable to which output signal vector D (n) is subtracted each other with output signal vector Y (n), obtain error signal to Amount E (n).
The step is represented by:E (n)=D (n)-Y (n).Original input signal is not filtered directly as desired output Signal.Preferably, original input signal for be doped with when measuring system works because mechanical oscillation produce noise input signal. D (n)={ d (n), d (n-1), d (n-2) ... ..., d (n-k-2), d (n-k+1) }T, wherein, d (n) is the expectation at current time Output signal, d (n-1) is the desired output signal ... ... of last moment, and d (n-k+1) was the desired output at upper (k-1) moment Signal, desired output signal vector D (n) by current time desired output signal and the desired output signal structure at moment before Into.
In S303, using FIR adaptive filter algorithms to error signal vector E (n) and reference-input signal vector X N () is filtered, obtain sef-adapting filter weight coefficient vector W (n+1) of subsequent time.Wherein, the self adaptation of subsequent time Wave filter weight coefficient vector W (n+1) is error signal vector E (n) and reference-input signal vector X (n) and step factor multiplies Product is sef-adapting filter weight coefficient vector W (n) with current time and is worth.
The step is represented by:W (n+1)=W (n)+2u*E (n) usual very little of * X (n), 2u, in order to improve FIR self adaptations The convergence rate of filtering algorithm, it is preferable that 1/2,1/4,1/8 and 1/16 etc. is taken in practical application.
In S304, by the transposition and reference-input signal of sef-adapting filter weight coefficient vector W (n+1) of subsequent time Vectorial X (n+1) is multiplied, and obtains output signal vector Y (n+1) of subsequent time, is exported as useful signal.
When the value of error vector is minimum, preferably when minimum zero, i.e., error concealment when, export Y (n+1).
The flow of FIR adaptive filter algorithms is exactly the process that a signal postpones step by step, and delay output at different levels is added Power is accumulative, that is, obtain the output of FIR adaptive-filterings, and details are as follows:
When system works, original input signal is not filtered, directly as desired output signal, the expectation at current time Output signal constitutes desired output signal vector D (n) with the desired output signal at moment before;To the reference-input signal to Amount X (n) carries out adaptivity filtering, according to formula Y (n)=WTN () * X (n), output signal vector weighs system for adaptive-filtering The transposition W of number vectorTThe product of (n) and reference input vector X (n);According to formula E (n)=D (n)-Y (n), error signal to Amount E (n) is expectation signal vector D (n) and the difference of output signal vector Y (n);By formula W (n+1)=W (n)+2u*E (n) * X N () progressively adjusts adaptive-filtering weight coefficient vector according to error signal vector E (n) for obtaining, until the value of error vector is most It is small, output output signal vector Y (n+1) this moment.
It is to be appreciated that to the process that adaptive-filtering weight coefficient vector is progressively adjusted being one according to error vector Dynamic process, the said process also initialization including adaptive-filtering weight coefficient vector, as initial vector W (0)={ w0(n),w1 (n), w2(n) ... ..., wk-2(n), wk-1(n)}TWhen meeting certain condition, the value of error vector i.e. error vector mould it is flat Minimum, as zero can be reached just now.
Preferably, the reference-input signal vector sum desired output signal vector at clock control current time is synchronously carried out, Postpone input quantity to cache into the register of the field programmable gate array.When the input quantity is including current time and before The reference-input signal at quarter and current time and before the desired output signal at moment.
Preferably, the multiplication and the calculating process subtracted each other can under the control of clock and meanwhile carry out and need not be according to elder generation Order is performed afterwards, improves operation efficiency.
It should be understood that the size of the sequence number of each step is not meant to the priority of execution sequence, each process in above-described embodiment Execution sequence should determine that the implementation process without tackling the embodiment of the present invention constitutes any limit with its function and internal logic It is fixed.
Corresponding to the mechanical oscillation error cancelling method described in foregoing embodiments, Fig. 5 shows that the embodiment of the present invention is provided Mechanical oscillation error concealment device structured flowchart, details are as follows:
With reference to Fig. 5, the device includes:
Acquisition module 51, the reference-input signal for obtaining current time, using the reference-input signal at current time It is determined that the reference-input signal at moment before;
Determining module 52, for the reference-input signal according to current time and the reference-input signal at moment before, really Determine reference-input signal vector X (n);
Filtration module 53, for believing reference input based on field programmable gate array and using FIR adaptive filter algorithms Number vector X (n) is filtered, and exports useful signal.
Alternatively, acquisition module 51 includes:
Converting unit 510, data signal is obtained for carrying out analog-to-digital conversion to the continuous time signal for collecting;
Converter unit 511, for doing Fast Fourier Transform (FFT) to frequency domain to data signal based on field programmable gate array;
Computing unit 512, the spectrum component figure according to frequency domain calculates intrinsic frequency;
Synthesis unit 513, the reference-input signal at current time is synthesized according to intrinsic frequency.
Alternatively, filtration module 53 includes:
Multiplying unit 530, for transposition and the reference of sef-adapting filter weight coefficient vector W (n) according to current time Input signal vector X (n) is multiplied, and obtains output signal vector Y (n) at current time;
Subtract each other unit 531, for desired output signal vector D (n) to be subtracted each other with output signal vector Y (n), obtain error Signal vector E (n);
Acquiring unit 532, for using FIR adaptive filter algorithms to error signal vector E (n) and reference-input signal Vectorial X (n) is filtered, and obtains sef-adapting filter weight coefficient vector W (n+1) of subsequent time;
Output unit 533, for by the transposition of sef-adapting filter weight coefficient vector W (n+1) of subsequent time with reference Input signal vector X (n+1) is multiplied, and obtains output signal vector Y (n+1) of subsequent time, is exported as useful signal.
Further, sef-adapting filter weight coefficient vector W (n+1) of subsequent time is error signal vector E (n) and ginseng Examine input signal vector X (n) and the product of step factor and the sef-adapting filter weight coefficient vector W (n) of current time and Value.
Alternatively, device also includes:
Clock module 54, the reference-input signal vector sum desired output signal vector for clock control current time is same Step is carried out.
Postponement module 55, for input quantity to be cached into the register of field programmable gate array.
Those of ordinary skill in the art are it is to be appreciated that the list of each example described with reference to the embodiments described herein Unit and algorithm steps, can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually Performed with hardware or software mode, depending on the application-specific and design constraint of technical scheme.Professional and technical personnel Described function, but this realization can be realized it is not considered that exceeding using distinct methods to each specific application The scope of the present invention.
In embodiment provided by the present invention, it should be understood that disclosed apparatus and method, can be by other Mode is realized.For example, system embodiment described above is only schematical, for example, the division of the unit or unit, It is only a kind of division of logic function, there can be other dividing mode when actually realizing, such as multiple units or component can be with With reference to or be desirably integrated into another system, or some features can be ignored, or not perform.It is another, it is shown or discussed Coupling each other or direct-coupling or communication connection can be by some interfaces, the INDIRECT COUPLING of device or unit or Communication connection, can be electrical, mechanical or other forms.
The unit that is illustrated as separating component can be or may not be it is physically separate, it is aobvious as unit The part for showing can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple On NE.Some or all of unit therein can be according to the actual needs selected to realize the mesh of this embodiment scheme 's.
In addition, during each functional unit in each embodiment of the invention can be integrated in a processing unit, it is also possible to It is that unit is individually physically present, it is also possible to which two or more units are integrated in a unit.Above-mentioned integrated list Unit can both be realized in the form of hardware, it would however also be possible to employ the form of SFU software functional unit is realized.
If the integrated unit is to realize in the form of SFU software functional unit and as independent production marketing or use When, can store in a computer read/write memory medium.Based on such understanding, the technical scheme of the embodiment of the present invention The part for substantially being contributed to prior art in other words or all or part of the technical scheme can be with software products Form embody, the computer software product is stored in a storage medium, including some instructions are used to so that one Computer equipment (can be personal computer, server, or network equipment etc.) or processor (processor) perform this hair The all or part of step of bright embodiment each embodiment methods described.And foregoing storage medium includes:USB flash disk, mobile hard disk, Read-only storage (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic Dish or CD etc. are various can be with the medium of store program codes.
Embodiment described above is merely illustrative of the technical solution of the present invention, rather than its limitations;Although with reference to foregoing reality Example is applied to be described in detail the present invention, it will be understood by those within the art that:It still can be to foregoing each Technical scheme described in embodiment is modified, or carries out equivalent to which part technical characteristic;And these are changed Or replace, do not make the spirit and scope of the essence disengaging various embodiments of the present invention technical scheme of appropriate technical solution, all should It is included within protection scope of the present invention.

Claims (10)

1. a kind of mechanical oscillation error cancelling method, it is characterised in that including:
The reference-input signal at current time is obtained, the ginseng at moment before determining using the reference-input signal at the current time Examine input signal;
Reference-input signal and the reference-input signal at the moment before according to the current time, determine that reference input is believed Number vector X (n);
Reference-input signal vector X (n) is filtered based on field programmable gate array and using FIR adaptive filter algorithms Ripple, exports useful signal.
2. the method for claim 1, it is characterised in that the reference-input signal at the acquisition current time, including:
Continuous time signal to collecting carries out analog-to-digital conversion and obtains data signal;
Fast Fourier Transform (FFT) to frequency domain is done to the data signal based on field programmable gate array;
Spectrum component figure according to the frequency domain calculates intrinsic frequency;
Synthesize the reference-input signal at the current time according to the intrinsic frequency.
3. the method for claim 1, it is characterised in that the use FIR adaptive filter algorithms are to described with reference to defeated Enter signal vector X (n) to be filtered, export useful signal, including:
The transposition of sef-adapting filter weight coefficient vector W (n) according to current time and reference-input signal vector X (n) It is multiplied, obtains output signal vector Y (n) at current time;
Desired output signal vector D (n) is subtracted each other with output signal vector Y (n), error signal vector E (n) is obtained;
Error signal vector E (n) and reference-input signal vector X (n) are filtered using FIR adaptive filter algorithms Ripple, obtains sef-adapting filter weight coefficient vector W (n+1) of subsequent time;
By the transposition of sef-adapting filter weight coefficient vector W (n+1) of subsequent time and reference-input signal vector X (n+ 1) it is multiplied, obtains output signal vector Y (n+1) of subsequent time, is exported as the useful signal.
4. method as claimed in claim 3, it is characterised in that
Sef-adapting filter weight coefficient vector W (n+1) of the subsequent time is that error signal vector E (n) and reference are defeated Enter signal vector X (n) and step factor product it is sef-adapting filter weight coefficient vector W (n) with the current time and Value.
5. method as claimed in claim 3, it is characterised in that also include:
The reference-input signal vector sum desired output signal vector at clock control current time is synchronously carried out.
Postpone input quantity to cache into the register of the field programmable gate array.
6. a kind of mechanical oscillation error concealment device, it is characterised in that including:
Acquisition module, the reference-input signal for obtaining current time, the reference-input signal using the current time is true The reference-input signal at moment before fixed;
Determining module, for the reference-input signal according to the current time and the reference-input signal at the moment before, Determine reference-input signal vector X (n);
Filtration module, for based on field programmable gate array and using FIR adaptive filter algorithms to the reference-input signal Vectorial X (n) is filtered, and exports useful signal.
7. device as claimed in claim 6, it is characterised in that the acquisition module includes:
Converting unit, data signal is obtained for carrying out analog-to-digital conversion to the continuous time signal for collecting;
Converter unit, for doing Fast Fourier Transform (FFT) to frequency domain to the data signal based on field programmable gate array;
Computing unit, the spectrum component figure according to the frequency domain calculates intrinsic frequency;
Synthesis unit, the reference-input signal at the current time is synthesized according to the intrinsic frequency.
8. device as claimed in claim 6, it is characterised in that the filtration module includes:
Multiplying unit, for transposition and the reference input of sef-adapting filter weight coefficient vector W (n) according to current time Signal vector X (n) is multiplied, and obtains output signal vector Y (n) at current time;
Subtract each other unit, for desired output signal vector D (n) to be subtracted each other with output signal vector Y (n), obtain error letter Number vector E (n);
Acquiring unit, for using FIR adaptive filter algorithms to error signal vector E (n) and reference-input signal to Amount X (n) is filtered, and obtains sef-adapting filter weight coefficient vector W (n+1) of subsequent time;
Output unit, for by the transposition and the reference input of sef-adapting filter weight coefficient vector W (n+1) of subsequent time Signal vector X (n+1) is multiplied, and obtains output signal vector Y (n+1) of subsequent time, is exported as the useful signal.
9. device as claimed in claim 8, it is characterised in that the sef-adapting filter weight coefficient vector W of the subsequent time (n+1) be the product of error signal vector E (n) and reference-input signal vector X (n) and step factor with it is described current when Sef-adapting filter weight coefficient vector W (n) and the value at quarter.
10. device as claimed in claim 6, it is characterised in that described device also includes:
Clock module, for the reference-input signal vector sum same stepping of desired output signal vector at clock control current time OK.
Postponement module, for input quantity to be cached into the register of the field programmable gate array.
CN201710003598.3A 2017-01-04 2017-01-04 A kind of mechanical oscillation error cancelling method and device Pending CN106877840A (en)

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