CN106849084A - Net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing methods - Google Patents
Net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing methods Download PDFInfo
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- CN106849084A CN106849084A CN201710157026.0A CN201710157026A CN106849084A CN 106849084 A CN106849084 A CN 106849084A CN 201710157026 A CN201710157026 A CN 201710157026A CN 106849084 A CN106849084 A CN 106849084A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/01—Arrangements for reducing harmonics or ripples
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2203/00—Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
- H02J2203/20—Simulating, e g planning, reliability check, modelling or computer assisted design [CAD]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/20—Active power filtering [APF]
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Abstract
The present invention relates to APF without harmonic detecting control technology field, specially net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing methods.Net side fundamental active forward-order current feedforward APF DC voltage fluctuations suppressing method includes 4 steps:Step one, the realization of three phase static coordinate transform link;Step 2, the filtering of current on line side feedforward;Step 3, takes the amplitude of current on line side feed-forward signal;Step 4, current on line side feed-forward signal is added in Voltage loop.Present invention improves APF DC voltage dynamic response characteristics, the shortcoming that tradition is easily influenceed without Harmonic detection DC voltage by the fluctuation of load is overcome.
Description
Technical field
The present invention relates to APF without harmonic detecting control technology field, specially net side fundamental active forward-order current feedforward APF
DC voltage fluctuation suppressing method.
Background technology
Active Power Filter-APF (Active power filter, APF) is to administer the electric energy such as harmonic wave, uneven and idle
The key equipment of quality problems, its suppressing method is divided into Harmonic detection and without the major class of Harmonic detection two, using harmonic detecting
Method needs to measure load-side electric current and APF electric currents simultaneously, the harmonic detecting link for also needing design complicated, and filter design must also roll over
Middle dynamic and steady-state behaviour;Source current need to be only measured without Harmonic detection and harmonic detecting link can be saved, it is to avoid harmonic wave
Influence of the error and time delay of detection to compensation result, simplifies backoff algorithm.But APF direct current of the tradition without Harmonic detection
Pressure is influenceed seriously by load fluctuation, and stability margin is small, can particularly cause APF to exchange output pulsation when load frequent fluctuation,
Influence compensation effect.Prior art by change voltage suppressor zero pole point improve Voltage loop response speed, but suppressor increasing
Benefit must compromise between stability and tracking velocity.By constructing real-time optimization function and stability function, Voltage loop PI is joined
Number is suppressed using sliding formwork and stable region judges, accelerates voltage pulsation recovery process, but the suppression parameter of change is unfavorable for work
Cheng Shixian.
The content of the invention
The technical problem to be solved in the present invention is:Improved without harmonic detecting using the feedforward of net side fundamental positive sequence active current
The dynamic response characteristic of APF DC voltages under method, so that suppress the fluctuation of DC voltage, to simplify the program in rest frame
Under realization, from and devise cascaded delay signal cancellation (Cascaded Delayed Signal Cancellation,
CDSC) wave filter obtains fundamental positive sequence current signal;Because the current on line side of stable state is identical with voltage-phase, devise accordingly
Active approximate algorithm replaces traditional watt current computational methods.
To achieve the above object, the technical solution adopted in the present invention is:
Net side fundamental active forward-order current feedforward APF DC voltage fluctuations suppressing method includes 4 steps:Step one, three
The realization of phase static coordinate transform part;Step 2, the filtering of current on line side feedforward;Step 3, takes current on line side feed-forward signal
Amplitude;Step 4, current on line side feed-forward signal is added in Voltage loop;
Step one, the realization of three phase static coordinate transform link:
Sampling APF three-phase current on line side isa、isb、isc, then become the three-phase current on line side i that changes commanders with Clarke Clarksa、
isb、iscIt is transformed under two-phase rest frame, obtains current on line side i under two-phase rest framesα、isβ, wherein, Clarke
Clark transformation for mula isisαAnd isβIt is isa、isb、iscIt is corresponding in the static seat of two-phase
The lower current on line side of mark system;
Step 2, the filtering of current on line side feedforward:
Current on line side i under the two-phase rest frame that step one is obtainedsαAnd isβBy cascaded delay signal cancellation CDSC
After filter filtering, respective wire side base ripple forward-order current signal i is obtainedsα+、isβ+, CDSC filter filterings take DSC2~DSC6 five
Level;
Step 3, takes the amplitude of current on line side feed-forward signal:
In without Harmonic detection, Dynamic Regulating Process power factor automatically tends to 1, is adjusted using the dynamic without harmonic detecting
Save to approach watt current, therefore the amplitude of current on line side feed-forward signal is isα+、isβ+Effective current value Isα+、Isβ+It is square
Root, the i.e. amplitude of current on line side feed-forward signal
Step 4, current on line side feed-forward signal is added in Voltage loop:
By the amplitude I of current on line side feed-forward signalspWith the output result of pi controller PINet is merged into addition
Side fundamental active current amplitude, then using net side fundamental active current amplitude and voltage on line side phase as net side fundamental active current
Signal ipAmplitude and phase, finally by net side fundamental active current signal ipIt is input in electric current loop, as the new finger of electric current loop
Make electric current.
The beneficial effects of the invention are as follows being improved without harmonic detecting after first, adding net side fundamental active forward-order current to feedover
Suppressing method improves APF DC voltage dynamic response characteristics, overcomes tradition and is easily loaded without Harmonic detection DC voltage
The shortcoming of influence of fluctuations, improvement project reduces APF dynamic loss, improves the regulation effect of current imbalance, secondly CDSC
Filter operation is simple, tracking velocity is fast, it is adaptable to obtain fundamental positive sequence electric current needed for feedforward;Using what is suppressed without harmonic detecting
Dynamic regulation approaches the realization that the complicated active calculating of watt current substitution further simplify feedforward link.
Brief description of the drawings
Fig. 1 is tradition without harmonic detecting APF control system block diagrams;
Fig. 2 is APF control system block diagrams of the invention;
Network side current waveform figure before and after load changing when Fig. 3 is without APF;
Fig. 4 is tradition without APF DC voltages and network side current waveform during load changing under harmonic detecting APF control systems
Figure;
APF DC voltages and network side current waveform figure when Fig. 5 is load changing of the present invention;
Fig. 6 loads dynamic process enlarged drawing for tradition without harmonic detecting APF control systems anticlimax;
Fig. 7 is the dynamic process enlarged drawing of anticlimax load of the present invention.
Specific embodiment
To make advantage of the invention and technical characteristic more understand, with reference to example and accompanying drawing for the present invention makees further
Detailed description.
The present invention is net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing methods.Described APF direct currents
Voltage pulsation refers to that the DC voltage of APF can produce catastrophic fluctuation when using traditional APF without Harmonic detection control.
Wherein, tradition is as shown in Figure 1 without harmonic detecting APF control system block diagrams.It is electric current loop in Fig. 1 dot-dash wire frames, is in dotted line frame
Voltage loop, PI is pi controller, and C (s) is electric current loop transmission function, UdcDC capacitor voltage, Udc *It is DC side electricity
Hold voltage reference value, CdcIt is DC bus capacitor, idcIt is DC bus capacitor electric current, esIt is voltage on line side, EmIt is voltage on line side amplitude,
ipIt is Voltage loop output current, ifIt is the output current of APF, isIt is current on line side, ilIt is load current, kpIt is ifWith idcRatio
Coefficient,Represent UdcAnd IdcProportionality coefficient,Represent comparator,Multiplier is represented, in Fig. 2Expression takes amplitude
Computing.For shortcoming of the tradition without Harmonic detection APF DC voltage fluctuations, the present invention proposes the control system of improvement project
Block diagram, as shown in Figure 2.Improvement project with the addition of net side fundamental active forward-order current feedforward link compared with traditional scheme, comprising cascade
Postpones signal offsets (CDSC) wave filter and takes amplitude computing two parts, by cascaded delay signal cancellation (CDSC) wave filter
After (taking DSC2~DSC6 Pyatyis) filtering, respective wire side positive sequence of fundamental frequency is obtained, then net side electricity is obtained by taking amplitude computing
Flow the amplitude I of feed-forward signalsp, then by IspIt is added in Voltage loop, and the result exported with pi controller (PI)Phase
Plus merge into net side fundamental active current amplitude.Specifically control process step is:Step one, three phase static coordinate transform link
Realize;The filtering of step 2, current feed-forward;Step 3, the amplitude for taking current on line side feed-forward signal;Before step 4, current on line side
Feedback signal is added in Voltage loop.
The realization of step one, three phase static coordinate transform link:
Sampling APF three-phase current on line side isa、isb、isc, then become the three-phase current on line side i that changes commanders with Clarke Clarksa、
isb、iscIt is transformed under two-phase rest frame, obtains current on line side i under two-phase rest framesα、isβ, wherein Clarke
Clark transformation for mula isisαAnd isβIt is isa、isb、iscIt is corresponding in the static seat of two-phase
The lower current on line side of mark system;
Step 2, the filtering of current on line side feedforward:
Current on line side i under the two-phase rest frame that step one is obtainedsαAnd isβBy cascaded delay signal cancellation CDSC
After filter filtering, respective wire side base ripple forward-order current signal i is obtainedsα+、isβ+, CDSC filter filterings take DSC2~DSC6 five
Level;(DSC is bandstop filter, and DSC series is higher, and required time delay is smaller, and the tracking time is faster, cascaded delay used by this step
Signal cancellation (CDSC) wave filter is that 2~6 grades of bandstop filter DSC cascade up formed cascading filter);
Step 3, takes the amplitude of current on line side feed-forward signal:
In without Harmonic detection, Dynamic Regulating Process power factor automatically tends to 1, is adjusted using the dynamic without harmonic detecting
Save to approach watt current, the amplitude of current on line side feed-forward signal is isα+、isβ+Effective current value Isα+、Isβ+Root mean square,
That is the amplitude of current on line side feed-forward signal
Step 4, current on line side feed-forward signal is added in Voltage loop:
By the amplitude I of current on line side feed-forward signalspWith the output result of pi controller PINet is merged into addition
Side fundamental active current amplitude, then using net side fundamental active current amplitude and voltage on line side phase as net side fundamental active current
Signal ipAmplitude and phase, finally by net side fundamental active current signal ipIt is input in electric current loop, as the new finger of electric current loop
Make electric current.
The present invention compared with tradition is without Harmonic detection, with obvious advance.Fig. 3 for do not put into APF when two kinds bear
Network side current waveform under carrying.Fig. 4 is DC voltage and network side current waveform after being put into using the APF of traditional scheme, it is seen then that
Its direct current is pressed with and significantly downwardly and upwardly fluctuates when impact and anticlimax are loaded, and system needs the 1s could again to reach stable state.
Fig. 5 is the APF gained DC voltages and network side current waveform of improvement project, it is seen that DC voltage fluctuation is obviously reduced, and system is only
0.1s is needed to reach stable state.
Fig. 6, Fig. 7 are respectively anticlimax load dynamic process time shaft waveform amplification under two kinds of Restrain measurements, and contrast understands to change
Enter scheme electric current and reached stable state, its adjustment time is shorter;It can also be seen that the current on line side value of traditional scheme is consistently greater than
Current on line side value under improvement project.From the physical significance of virtual value, improvement project has smaller net side than traditional scheme
Power, it is identical because loading, therefore improvement project APF own loss is smaller.After the present invention is implemented, APF DC voltage dynamics are improved
Response characteristic, overcomes the shortcoming that tradition is easily influenceed without Harmonic detection DC voltage by the fluctuation of load, and improvement project is reduced
APF dynamic loss, improves the regulation effect of current imbalance.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all it is of the invention spirit and
Any modification, equivalent and improvement for being made within principle etc., should be included within the scope of the present invention.
Claims (1)
1. net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing methods, it is characterised in that:In tradition without harmonic wave
On the basis of detection APF control systems, addition net side fundamental active forward-order current feedforward link with the addition of cascaded delay signal pair
The CDSC wave filters that disappear include four steps with amplitude computing, specific control process is taken:
The realization of step one, three phase static coordinate transform link:
Sampling APF three-phase current on line side isa、isb、isc, then become the three-phase current on line side i that changes commanders with Clarke Clarksa、isb、isc
It is transformed under two-phase rest frame, obtains current on line side i under two-phase rest framesα、isβ, wherein Clarke Clark conversion
Formula isisαAnd isβIt is isa、isb、iscIt is corresponding off line in two-phase rest frame
Side electric current;
Step 2, the filtering of current on line side feedforward:
Current on line side i under the two-phase rest frame that step one is obtainedsαAnd isβFiltered by cascaded delay signal cancellation CDSC
After device filtering, respective wire side base ripple forward-order current signal i is obtainedsα+、isβ+, CDSC filter filterings take DSC2~DSC6 Pyatyis;
Step 3, takes the amplitude of current on line side feed-forward signal:
In without Harmonic detection, Dynamic Regulating Process power factor automatically tends to 1, using the dynamic regulation without harmonic detecting come
Watt current is approached, the amplitude of current on line side feed-forward signal is isα+、isβ+Effective current value Isα+、Isβ+Root mean square, i.e. net
The amplitude of side current feed-forward signal
Step 4, current on line side feed-forward signal is added in Voltage loop:
By the amplitude I of current on line side feed-forward signalspWith the output result of pi controller PINet side base is merged into addition
Ripple watt current amplitude, then using net side fundamental active current amplitude and voltage on line side phase as net side fundamental active current signal
ipAmplitude and phase, finally by net side fundamental active current signal ipIt is input in electric current loop, as the new command electricity of electric current loop
Stream.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109391209A (en) * | 2018-11-09 | 2019-02-26 | 西南交通大学 | Line inductance electromotor senseless control strategy suitable for middle low speed magnetic suspension |
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CN202759235U (en) * | 2012-08-10 | 2013-02-27 | 常州新惠数控技术有限公司 | High-precision quick-response active power filter |
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2017
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CN202759235U (en) * | 2012-08-10 | 2013-02-27 | 常州新惠数控技术有限公司 | High-precision quick-response active power filter |
CN105449718A (en) * | 2015-11-05 | 2016-03-30 | 山东大学 | Grid-connected synchronous phase-lock method based on improved series signal delay cancellation algorithm |
Non-Patent Citations (1)
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