CN106849024B - The method and apparatus that protective relaying device SV subscribes to function are realized based on FPGA - Google Patents

The method and apparatus that protective relaying device SV subscribes to function are realized based on FPGA Download PDF

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Publication number
CN106849024B
CN106849024B CN201710143040.5A CN201710143040A CN106849024B CN 106849024 B CN106849024 B CN 106849024B CN 201710143040 A CN201710143040 A CN 201710143040A CN 106849024 B CN106849024 B CN 106849024B
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fpga
subscribes
file
function
fpga chip
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CN106849024A (en
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姚浩
李鹏
郭晓斌
习伟
蔡田田
陈波
陈浩敏
王辉
周涛
徐刚
陈秋荣
袁海涛
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Beijing Sifang Automation Co Ltd
Research Institute of Southern Power Grid Co Ltd
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Beijing Sifang Automation Co Ltd
Power Grid Technology Research Center of China Southern Power Grid Co Ltd
Research Institute of Southern Power Grid Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/22—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for distribution gear, e.g. bus-bar systems; for switching devices

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  • Emergency Protection Circuit Devices (AREA)

Abstract

The present invention relates to the method and apparatus for realizing protective relaying device SV subscription function based on FPGA.The method includes：The original CID file of digital relay protection device is converted into .ini file, SV is extracted from the .ini file and subscribes to relevant field information；SV subscription relevant field information is converted into corresponding bin configuration file, the bin configuration file can be identified by the fpga chip of the digital relay protection device；After the digital relay protection device powers on, the bin configuration file is downloaded to the fpga chip；The bin configuration file is parsed by the Command Line Parsing logic of the fpga chip, model information needed for accomplished SV subscribes to function, so that the fpga chip realizes that SV subscribes to function according to the model information.The present invention program can save resource in FPGA piece, and be conducive to simplify the resolving of model information needed for realization SV subscribes to function.

Description

The method and apparatus that protective relaying device SV subscribes to function are realized based on FPGA
Technical field
The present invention relates to technical field of electric power system control, realize protective relaying device based on FPGA more particularly to one kind SV subscribes to the method for function and realizes that protective relaying device SV subscribes to the device of function based on FPGA.
Background technique
With the continuous development and progress of Substation Automation System, intelligent substation due to information digitalization use, It provides the foundation for various advanced applications, has become the Main way of Substation Automation System development.In intelligent substation Requirement of the various automation equipments for high-speed data handling capacity improves rapidly.
The introducing of the network platform is so that intelligent electronic device (Intelligent Electronic Device, abbreviation IED) Height relies on stablizing for network message and transmits, and utilizes FPGA (Field-Programmable Gate Array, field-programmable Gate array) the powerful concurrent operation ability of chip, mainstream DSP processing capacity is compared, can effectively be pressed down for network storm System carries out efficient network message management, while the SV of digitized protective relaying device (Sampled Value, sampling Value) subscribe to ability raising several times.
Traditional protective relaying device generally passes through CID file (also referred to as IED configuration describing document, i.e. intelligent substation institute The resource information file used) parsing of the realization to transformer station model.Use CID file as realize SV subscribe to function original When beginning model file, when parsing, in FPGA piece logic need to by analog quantity/sampled value related with example IED in CID file, open The map informations such as pass amount (such as trip signal) are stripped out, and parsing link and algorithm are more complex in piece, expend a large amount of FPGA Logical resource.
Summary of the invention
Based on this, the embodiment of the invention provides realize that protective relaying device SV subscribes to the method and dress of function based on FPGA It sets, resource in FPGA piece can be saved.
One aspect of the present invention provides the method for realizing protective relaying device SV subscription function based on FPGA, including：
The original CID file of digital relay protection device is converted into .ini file, is extracted from the .ini file SV subscribes to relevant field information；
SV subscription relevant field information is converted into corresponding bin configuration file, the bin configuration file can be by The fpga chip of the digital relay protection device identifies；
After the digital relay protection device powers on, the bin configuration file is downloaded to the fpga chip；
The bin configuration file is parsed by the Command Line Parsing logic of the fpga chip, accomplished SV is ordered Model information needed for wol function, so that the fpga chip realizes that SV subscribes to function according to the model information.
Another aspect of the present invention provides a kind of device that protective relaying device SV subscription function is realized based on FPGA, including：
Information extraction unit, for the original CID file of digital relay protection device to be converted to .ini file, from institute It states and extracts SV subscription relevant field information in .ini file；
File conversion unit, it is described for SV subscription relevant field information to be converted to corresponding bin configuration file Bin configuration file can be identified by the fpga chip of the digital relay protection device；
File download unit, for after the digital relay protection device powers on, downloading the bin configuration file To the fpga chip；And
Resolution unit parses the bin configuration file for the Command Line Parsing logic by the fpga chip, Model information needed for accomplished SV subscribes to function, so that the fpga chip realizes that SV subscribes to function according to the model information Energy.
The method and apparatus for realizing protective relaying device SV subscription function based on FPGA provided based on the above embodiment, lead to It crosses and lossless conversion is carried out to the original CID file of digital relay protection device, and extract wherein SV and subscribe to relevant field information, It is model information that the fpga chip of cooperation digital relay protection device, which parses to obtain SV and subscribe to needed for function, and FPGA is effectively reduced Resource occupation in the piece of chip is conducive to the resolving for simplifying model information needed for realization SV subscribes to function, improves configuration Efficiency.
Detailed description of the invention
Fig. 1 is the schematic flow of the method that protective relaying device SV subscription function is realized based on FPGA of an embodiment Figure；
Fig. 2 is that the FPGA of an embodiment realizes that SV subscribes to logical construction schematic diagram in the piece of function；
Fig. 3 is the data structure schematic diagram that protective relaying device SV subscription function is realized based on FPGA of an embodiment；
Fig. 4 is the schematic structure of the device that protective relaying device SV subscription function is realized based on FPGA of an embodiment Figure.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and It is not used in the restriction present invention.
Fig. 1 is the schematic flow of the method that protective relaying device SV subscription function is realized based on FPGA of an embodiment Figure；As shown in Figure 1, the method for realizing that protective relaying device SV subscribes to function based on FPGA in the present embodiment includes step：
The original CID file of digital relay protection device is converted to .ini file, from the .ini file by S11 It extracts SV and subscribes to relevant field information.
.ini file is the abbreviation of Initialization File, i.e. initialization files, is the system configuration of windows Storage format used by file, every configuration of windows under the overall leadership, the every graphically managing generally provided with windows Interface achieves that identical be configured with.
The original CID file of digital relay protection device, refers to Configured IED Description, i.e. work The IED configuration description document instantiated in journey, for carrying out engineering configuration, the IED instantiated in described project to IED.File The current address of IED is contained in model, may include transformer station model related with the IED, and is assigned engineering spy Fixed title.Under normal conditions, in addition to covering more other information in the original CID file of digital relay protection device, Including realizing that SV subscribes to the configuration information of function.
SV subscribes to the correlation model that function refers to the sampled value concentrated based on publish/subscribe mechanism, exchange sampled data The mapping between ISO/IEC standard frame is arrived in object and service and these model objects and service.In digital transformer substation, Process layer current/voltage sampled value is digital transformer substation difference current transformer substation automation via SV message Digital Transmission The important technology feature of system.The subscription of SV message and analog quantity processing are the important technology composition portions of digital transformer substation application Point.In one embodiment, the realization that SV subscribes to function can specifically be calculated by IEC61850-9-2 packet parsing, analog quantity low-pass filtering Several functional module compositions such as method, sampled value Lagrange's interpolation synchronized algorithm.
SV subscription relevant field information is converted to corresponding bin configuration file, the bin configuration file energy by S12 Enough fpga chips by the digital relay protection device identify.
Bin configuration file is a kind of binary file, and for purposes depending on system or application, usual suffix is entitled " .bin ", it is shown to be binary format.In one embodiment, the identifiable bin of FPGA is completed by the preset end PC software to configure The conversion of .ini the file information to bin configuration file is realized in the conversion of file.Preferably, can also bist data verification to ensure Convert the data integrity of front and back.
FPGA uses logical cell array LCA (Logic Cell Array) such a new concept, and inside includes can Configure logic module CLB (Configurable Logic Block), output input module IOB (Input Output Block) With three parts of interconnector (Interconnect).The logic of FPGA is that programming number is loaded by internally static storage cell It is determined between the logic function and each module of logic unit or module according to value in a memory cell come what is realized, is stored Connecting mode between I/O, and finally determine function achieved by FPGA.The Different Logic of FPGA can execute parallel, Different task is handled simultaneously, so that realizing the SV Message processing in digital relay protection device more efficiently based on FPGA.Institute With, when enabling a device to access more big data quantity ether network packet using fpga chip in digital relay protection device, Break the mode that sequence executes, more processing tasks are completed within each clock cycle, acquisition surmounts DSP (at digital signal Reason) data-handling capacity.
S13 downloads the bin configuration file to the FPGA core after the digital relay protection device powers on Piece.
In one embodiment, SV in the .ini file is subscribed to relevant field information is 3 functional domains, is mentioned respectively The configuration information of 3 functional domains is taken, including：Frame configuration domain and analog quantity channel configuration domain are subscribed in global configuration domain.It is corresponding , the configuration informations of 3 functional domains is successively downloaded to fpga chip.
S14 parses the bin configuration file by the Command Line Parsing logic of the fpga chip, accomplished Model information needed for SV subscribes to function, so that the fpga chip realizes that SV subscribes to function according to the model information.
After the model information needed for obtaining SV and subscribing to function, the fpga chip can be believed by loading the model Breath realizes that SV subscribes to function, realizes that the collection value of the analog quantity channel to several access digital relay protection devices carries out pipe Reason and numerical value distribution.Relevant field information is subscribed to according to the SV extracted due to the bin configuration file to be converted to, compared to The original CID file of digital relay protection device, information overlay capacity are simplified, and downloading data amount and FPGA are saved Storage resource in piece, and be also beneficial to simplify the process of logical analysis in FPGA piece, improve analyzing efficiency.
In one embodiment, matching for built-in piece of memory block (BLOCK RAM) storage downloading can be opened up in fpga chip in advance File is set, and completes to verify.The bin configuration file is parsed in the Command Line Parsing logic by the fpga chip, After model information needed for accomplished SV subscribes to function, model information needed for realizing SV subscription function is according to respective institute It is the reserved block memory field of each functional domain (configuration BLOCK RAM) that the functional domain of category, which is stored respectively into the fpga chip, greatly Width is saved fpga chip internal logic resource and is occupied.As shown in Fig. 2, the fpga chip may include 4 logic functional blocks, point It is not：SV packet parsing module, analog quantity preprocessing module, analog quantity low-pass filtering module and interpolation synchronization module.FPGA 4 logic functional blocks of chip by from corresponding block memory field load SV subscribe to function needed for model information, Realize that SV subscribes to function.
In one embodiment, can also in advance by SV subscribe to function corresponding to as unit of subscription analog quantity channel, described Several addressable standard RAM of setting in fpga chip, and establish the standard RAM and the subscription analog quantity channel one by one Corresponding relationship.
Fig. 3 is the data structure schematic diagram that protective relaying device SV subscription function is realized based on FPGA of an embodiment；Such as Shown in Fig. 3, two dotted lines are divided into three parts：Left part is that analog quantity accesses datapath structure, and sampled value is single from merging 3 subscription analog quantity channels of member：FT3 access (i.e. the FT3 format samples that IEC60044-8 is defined access channel), AD acquisition connect Enter (i.e. device locally sampling access channel) and/or SMV message access (i.e. the SMV format samples that IEC61850-9-2 is defined connect Enter channel).Middle part is analog quantity buffer area (Analog Value) pipe for carrying out data management in FPGA piece according to configuration information Reason；Right part is that FPGA realizes the sampled value distribution after SV subscription function.In one embodiment, also FPGA can be abstracted in advance Analog quantity management configuration is planned to addressable standard RAM mode and carries out configuration packages as unit of subscribing to analog quantity channel, Several addressable standard RAM are set in the fpga chip, and it is logical with the subscription analog quantity to establish the standard RAM The one-to-one relationship in road is conducive to save programmable logic resource (CLB) in fpga chip.
In a preferred embodiment, it is 3 functional domains that SV is extracted from the .ini file and subscribes to relevant field information, In, the configuration information that global configuration domain may include has：Search interpolation correction time coefficient, the filtering parameter of a depth, each piece of memory The information such as (order and coefficient), operating mode, sampling period and the corresponding logical channel number of each piece of memory.The operating mode Networking model, local device including local device access clock synchronization do not access networking model, ad hoc mode and the net of clock synchronization Adopt ad hoc mode.Subscribing to the configuration information that frame configuration domain may include has：Subscribe to frame number, Destination MAC, APPID (Application Identifier, application identifier), version number, SVID (Sampled Value Identifier, sampling Value mark), frame data channel number initial address, frame data initial address, list asdu (Application Service Data Unit, Application service data unit) in effectively analog channel number, delay parameter position in frame, total analog channel number in list asdu And the information such as total analog channel number of asdu in frame.The configuration information that channel configuration domain may include has：It collects channel number, lead to Road is enabled, buffer area identifies and buffer area is originally written into the information such as pointer.Specifically, the configuration information that each functional domain includes shows Under such as：
(1) global configuration domain
[GlobeCfg]；Global configuration
；Search a depth
SearchDepth=16
；RAM0 interpolation correction time coefficient
RAM0_IntpolationTimePara=1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000
；RAM1 interpolation correction time coefficient
RAM1_IntpolationTimePara=1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000
；RAM2 interpolation correction time coefficient
RAM2_IntpolationTimePara=1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000,1000000, 1000000,1000000,1000000,1000000,1000000
；Filter order
FilterOrder=11
；Filter factor
FilterPara=14307450,221413901,358252592,541042614,678261 689, 729612390,678261689,541042614,358252592,221413901,14307450,0,0,0,0,0
；Operating mode:
；The networking model of 0- local device access clock synchronization
；1- local device does not access the networking model of clock synchronization
；2- ad hoc mode
；3- net adopts ad hoc mode
WorkMode=2
；Sampling period, unit ns
SamplePeriod=250000
；The area RAM0 logical channel number
RAM0_LogicChannelNum=64
；The area RAM1 logical channel number
RAM1_LogicChannelNum=64
；The area RAM2 logical channel number
RAM2_LogicChannelNum=64
(2) it subscribes to frame and configures domain
It subscribes to frame configuration and channel configures mixing, one is subscribed to the analog channel configuration that 64 tunnels are followed in frame configuration.
[SVIn]
；Subscribe to frame number=asdu number, Destination MAC, APPID, version number, SVID, frame data channel number initial address, frame Data initial address, effective analog channel number in single ASDU, delay parameter position in frame, total analog channel number in single ASDU, frame The interior total analog channel number of asdu
It is as follows using format sample：
Subscribe1=1,01-0c-cd-ef-01-01,0x4001,4-0-0-0-1, hello, 1,2,0,0,0,0.
(3) channel configures domain
It is as follows using format sample：
SVIn1_1=128,1,0,0
SVIn1_2=128,1,0,1
SVIn1_3=128,1,0,2
SVIn1_4=128,1,0,3.
The method for realizing protective relaying device SV subscription function based on FPGA of above-described embodiment, by CID model text Part carries out lossless conversion, extracts SV therein by the exploitation end PC upper computer software and subscribes to relevant field, provides covering to FPGA Configuration information needed for SV subscribes to function is downloaded, and model information needed for realizing SV subscription function based on FPGA is conducive to save Resource in the piece of FPGA.On the other hand, by the abstract analog quantity management configuration of FPGA, as unit of subscribing to analog quantity channel, It is planned to addressable standard RAM mode and carries out configuration packages, save programmable logic resource (CLB) in fpga chip.And It also supports under digital relay protection device electrifying condition, online reconfiguration function, meets flexible the matching of total system operation Set requirement.
It should be noted that for the various method embodiments described above, describing for simplicity, it is all expressed as a series of Combination of actions, but those skilled in the art should understand that, the present invention is not limited by the sequence of acts described, because according to According to the present invention, certain steps can use other sequences or carry out simultaneously.In addition, also any group can be carried out to above-described embodiment It closes, obtains other embodiments.
Based on realizing that protective relaying device SV subscribes to the identical think of of the method for function based on FPGA with above-described embodiment Think, the present invention also provides realizing that protective relaying device SV subscribes to the device of function based on FPGA, which can be used for executing above-mentioned The method that protective relaying device SV subscribes to function is realized based on FPGA.For ease of description, relay protection dress is realized based on FPGA In the structural schematic diagram for setting the Installation practice that SV subscribes to function, part related to the embodiment of the present invention illustrate only, this Field technical staff is appreciated that the restriction of schematic structure not structure twin installation, may include more more or fewer than illustrating Component perhaps combines certain components or different component layouts.
Fig. 4 is the schematic of the device based on FPGA realization protective relaying device SV subscription function of one embodiment of the invention Structure chart；As shown in figure 4, the device for subscribing to function based on FPGA realization protective relaying device SV of the present embodiment includes：Information Extraction unit 310, file conversion unit 320, file download unit 330 and resolution unit 340, details are as follows for each unit：
The information extraction unit 310, for the original CID file of digital relay protection device to be converted to .ini text Part extracts SV from the .ini file and subscribes to relevant field information；
The file conversion unit 320 configures text for SV subscription relevant field information to be converted to corresponding bin Part, the bin configuration file can be identified by the fpga chip of the digital relay protection device；
The file download unit 330, for downloading the bin after the digital relay protection device powers on Configuration file is to the fpga chip；And
The resolution unit 340, for the Command Line Parsing logic by the fpga chip to the bin configuration file into Row parsing, model information needed for accomplished SV subscribes to function, so that the fpga chip is realized according to the model information SV subscribes to function.
In one embodiment, the information extraction unit 310 may include：
Model Abstraction subelement is 3 functional domains for SV in the .ini file to be subscribed to relevant field information； 3 functional domains include：Frame configuration domain and analog quantity channel configuration domain are subscribed in global configuration domain.And information extraction is single Member, for extracting the configuration information of 3 functional domains respectively.
In one embodiment, described to further include based on what FPGA realized protective relaying device SV subscription function：
Model information administrative unit, for model information needed for realizing SV subscription function according to respectively affiliated function It is the reserved block memory field of each functional domain that domain, which is stored respectively into the fpga chip,.
In one embodiment, described to further include based on what FPGA realized protective relaying device SV subscription function：
Buffer area planning unit, for by SV subscribe to function corresponding to as unit of subscription analog quantity channel, described Several addressable standard RAM of setting in fpga chip, and establish the standard RAM and the subscription analog quantity channel one by one Corresponding relationship.
It should be noted that above-mentioned example realizes that protective relaying device SV subscribes to the implementation of the device of function based on FPGA In mode, the contents such as information exchange, implementation procedure between each unit are same due to being based on preceding method embodiment of the present invention Design, bring technical effect is identical as preceding method embodiment of the present invention, and particular content can be found in the method for the present invention implementation Narration in example, details are not described herein again.
In addition, above-mentioned example realizes that protective relaying device SV is subscribed in the embodiment of the device of function based on FPGA, The logical partitioning of each functional unit is merely illustrative of, and can according to need in practical application, such as matching for corresponding hardware It sets the convenient of the realization of requirement or software to consider, above-mentioned function distribution be completed by different functional units, i.e., by the base Realize that protective relaying device SV subscribes to the internal structure of device of function and is divided into different functional units in FPGA, with complete with The all or part of function of upper description.Wherein each functional unit both can take the form of hardware realization, can also use soft The form of part functional module is realized.
In the above-described embodiments, it all emphasizes particularly on different fields to the description of each embodiment, there is no the portion being described in detail in some embodiment Point, it may refer to the associated description of other embodiments.
The embodiments described above only express several embodiments of the present invention, should not be understood as to the invention patent range Limitation.It should be pointed out that for those of ordinary skill in the art, without departing from the inventive concept of the premise, Various modifications and improvements can be made, and these are all within the scope of protection of the present invention.Therefore, the scope of protection of the patent of the present invention It should be determined by the appended claims.

Claims (10)

1. a kind of method for realizing that protective relaying device SV subscribes to function based on FPGA, which is characterized in that including：
The original CID file of digital relay protection device is converted into .ini file, SV is extracted from the .ini file and is ordered Read relevant field information；
SV subscription relevant field information is converted into corresponding bin configuration file, the bin configuration file can be described The fpga chip of digital relay protection device identifies；
After the digital relay protection device powers on, the bin configuration file is downloaded to the fpga chip；
The bin configuration file is parsed by the Command Line Parsing logic of the fpga chip, accomplished SV subscribes to function Model information needed for energy, so that the fpga chip realizes that SV subscribes to function according to the model information.
2. the method according to claim 1 for realizing that protective relaying device SV subscribes to function based on FPGA, which is characterized in that SV is extracted from the .ini file subscribes to relevant field information, including：
It is 3 functional domains that SV in the .ini file, which is subscribed to relevant field information, extracts 3 functional domains respectively Configuration information；3 functional domains include：Frame configuration domain and analog quantity channel configuration domain are subscribed in global configuration domain.
3. the method according to claim 2 for realizing that protective relaying device SV subscribes to function based on FPGA, which is characterized in that The bin configuration file is parsed by the Command Line Parsing logic of the fpga chip, accomplished SV subscribes to function institute After the model information needed, further include：
Model information needed for realizing SV subscription function is stored respectively according to respectively affiliated functional domain to the fpga chip In be the reserved block memory field of each functional domain.
4. the method according to claim 1 for realizing that protective relaying device SV subscribes to function based on FPGA, which is characterized in that Further include：
By SV subscribe to function corresponding to as unit of subscription analog quantity channel, several seek is preset in the fpga chip The standard RAM of location, and establish the standard RAM and the one-to-one relationship for subscribing to analog quantity channel.
5. the method according to claim 4 for realizing that protective relaying device SV subscribes to function based on FPGA, which is characterized in that The SV subscribes to subscription analog quantity channel corresponding to function：The access of FT3 format samples, AD acquisition access and/or SMV report Text access.
6. the method according to any one of claims 1 to 5 for realizing that protective relaying device SV subscribes to function based on FPGA, special Sign is,
The fpga chip includes 4 logic functional blocks：SV packet parsing module, analog quantity preprocessing module, analog quantity are low Pass filtering module and interpolation synchronization module.
7. a kind of realize that protective relaying device SV subscribes to the device of function based on FPGA, which is characterized in that including：
Information extraction unit, for the original CID file of digital relay protection device to be converted to .ini file, from described .ini SV is extracted in file subscribe to relevant field information；
File conversion unit, for SV subscription relevant field information to be converted to corresponding bin configuration file, the bin Configuration file can be identified by the fpga chip of the digital relay protection device；
File download unit, for after the digital relay protection device powers on, downloading the bin configuration file to institute State fpga chip；And
Resolution unit parses the bin configuration file for the Command Line Parsing logic by the fpga chip, obtains Model information needed for realizing SV subscription function, so that the fpga chip realizes that SV subscribes to function according to the model information.
8. according to claim 7 realize that protective relaying device SV subscribes to the device of function based on FPGA, which is characterized in that The information extraction unit includes：
Model Abstraction subelement is 3 functional domains for SV in the .ini file to be subscribed to relevant field information；It is described 3 functional domains include：Frame configuration domain and analog quantity channel configuration domain are subscribed in global configuration domain；
Information extraction subelement, for extracting the configuration information of 3 functional domains respectively.
9. according to claim 8 realize that protective relaying device SV subscribes to the device of function based on FPGA, which is characterized in that Further include：
Model information administrative unit, for model information needed for realizing SV subscription function according to respectively affiliated functional domain point Not storing into the fpga chip is the reserved block memory field of each functional domain.
10. according to any device for realizing protective relaying device SV subscription function based on FPGA of claim 7 to 9, It is characterized in that, further includes：
Buffer area planning unit, for by SV subscribe to function corresponding to as unit of subscription analog quantity channel, in the FPGA core Several addressable standard RAM of setting in piece, and establish the standard RAM and the one-to-one correspondence pass for subscribing to analog quantity channel System.
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CN1437738A (en) * 2000-01-03 2003-08-20 埃菲克塔技术股份有限公司 Efficient and lossless conversion of data transmission and storage
CN103037032B (en) * 2012-12-20 2016-06-29 北京四方继保自动化股份有限公司 A kind of FPGA of use realizes the method that SV data 32 bit addressing accesses
CN104283746B (en) * 2014-09-26 2017-07-28 中国南方电网有限责任公司电网技术研究中心 The system and method for digital transformer substation unification of three nets is realized using FPGA

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