CN106842740A - A kind of liquid crystal display panel and preparation method thereof - Google Patents
A kind of liquid crystal display panel and preparation method thereof Download PDFInfo
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- CN106842740A CN106842740A CN201611224443.4A CN201611224443A CN106842740A CN 106842740 A CN106842740 A CN 106842740A CN 201611224443 A CN201611224443 A CN 201611224443A CN 106842740 A CN106842740 A CN 106842740A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136277—Active matrix addressed cells formed on a semiconductor substrate, e.g. of silicon
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses a kind of liquid crystal display panel and preparation method thereof, the liquid crystal display panel, including public electrode distribution and the lead loop that is formed by least one not closed coil；Wherein, the lead loop is connected with the public electrode distribution, is used to the electromagnetic noise signal caused by high-frequency signal for public electrode distribution filtering.Can be worked as using this programme can form impedance when having high-frequency signal, be the electromagnetic noise signal that the filtering of public electrode distribution is caused by high-frequency signal.
Description
Technical field
The present invention relates to technical field of liquid crystal display, more particularly to a kind of liquid crystal display panel and preparation method thereof.
Background technology
The features such as liquid crystal display has Low emissivity, low-power consumption and small volume, is increasingly becoming the main flow of display device, extensively
It is general to apply on the products such as mobile phone, notebook computer, flat panel TV.General radio communication or the electronic equipment for running at high speed include
Liquid Crystal Module, CPU, logic circuit and high-frequency circuit etc..In radio communication or the electronic equipment running for running at high speed,
High-frequency circuit can produce some electromagnetic noises, and these electromagnetic noises easily have influence on the control circuit of Liquid Crystal Module so that liquid crystal
The public electrode of module produces voltage pulsation, so as to reduce display quality.
The deficiencies in the prior art are：The electromagnetic noise that high-frequency circuit is produced easily has influence on the control electricity of Liquid Crystal Module
Road so that the public electrode of Liquid Crystal Module produces voltage pulsation.
The content of the invention
For above-mentioned technical problem, the invention provides a kind of liquid crystal display panel, including public electrode distribution and by extremely
The lead loop that a few not closed coil is formed；Wherein, the lead loop is connected with the public electrode distribution, is used to
For the electromagnetic noise signal that public electrode distribution filtering is caused by high-frequency signal.
In one embodiment, the lead loop by each end points of at least two not closed coils by corresponding mistake
Hole is in series with respective pixel electrode wiring.
In one embodiment, at least two not closed coils are distributed in gate metal layer and the source of liquid crystal display panel
In drain metal layer.
In one embodiment, the not closed coil is located at gate metal layer or the source-drain electrode gold of liquid crystal display panel
Category layer.
In one embodiment, the not closed coil is shaped as that not closed plane is monocyclic or snail is more
Ring.
According to another aspect of the present invention, a kind of preparation method of liquid crystal display panel is additionally provided, is comprised the following steps：
Gate metal layer is formed on substrate；
The gate metal layer is patterned, to form gate wirings and public electrode distribution；
Gate insulator is formed in gate metal layer；
Source-drain electrode metal level is formed on gate insulator, and patterns the source-drain electrode metal level, to form source-drain electrode
Distribution；
Passivation layer is formed on source-drain electrode metal level；
Wherein, in pattern gate metal layer and/or patterning source-drain electrode metal level, at least one is formed not closed
Coil, lead loop is formed by described at least one not closed coil；
The conductive coil is connected with the public electrode distribution.
In one embodiment, conductive coil is formed by described at least one not closed coil, including：
By via etch technique and pixel electrode technique, via and pixel electrode distribution are formed respectively；
Each end points of at least two not closed coils is set to be connected with respective pixel electrode wiring by corresponding via, shape
Into lead loop.
In one embodiment, by via etch technique and pixel electrode technique, via and pixel electrode are formed respectively
Distribution, including：
If at least two not closed coils are distributed in the gate metal layer of liquid crystal display panel and source-drain electrode metal level,
Multiple vias are then etched by via etch technique, wherein, make to be located at the not closed of the gate metal layer of liquid crystal display panel
The corresponding via of coil be communicated to public electrode distribution, and make the patent of the source-drain electrode metal level for being located at liquid crystal display panel
The corresponding via of coil of conjunction is communicated to source-drain electrode distribution；
Pixel electrode distribution is formed above each via by pixel electrode technique.
In one embodiment, by via etch technique and pixel electrode technique, via and pixel electrode are formed respectively
Distribution, including：
If at least two not closed coils are located at the gate metal layer or source-drain electrode metal level of liquid crystal display panel, lead to
Cross via etch technique and etch multiple vias, wherein, make the not closed line of the gate metal layer for being located at liquid crystal display panel
Enclose corresponding via and be communicated to public electrode distribution, or make the not closed line of the source-drain electrode metal level for being located at liquid crystal display panel
Enclose corresponding via and be communicated to source-drain electrode distribution；
Pixel electrode distribution is formed above each via by pixel electrode technique.
In one embodiment, the not closed coil is shaped to that not closed plane is monocyclic or snail
It is polycyclic.
Compared with prior art, one or more embodiments of the invention can have the following advantages that：
In liquid crystal display panel provided in an embodiment of the present invention, public electrode distribution and by least one not closed coil
The lead loop series connection of formation, lead loop plays the role of similar to inductance, and impedance can be formed when there is high-frequency signal, is public
The electromagnetic noise signal that the filtering of common electrode distribution is caused by high-frequency signal.
Other features and advantages of the present invention will be illustrated in the following description, also, the partly change from specification
Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights
Specifically noted structure is realized and obtained in claim and accompanying drawing.
Brief description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, with reality of the invention
Apply example to be provided commonly for explaining the present invention, be not construed as limiting the invention.In the accompanying drawings：
Fig. 1 a are the not closed monocyclic loop constructions of plane positioned at gate metal layer according to a second embodiment of the present invention
Schematic diagram；
Fig. 1 b are the not closed many ring coils of snail positioned at gate metal layer according to a second embodiment of the present invention
Structural representation；
Fig. 1 c are the not closed monocyclic coil knots of plane positioned at source-drain electrode metal level according to a second embodiment of the present invention
Structure schematic diagram；
Fig. 1 d are the not closed many loop wires of snail positioned at source-drain electrode metal level according to a second embodiment of the present invention
Coil structures schematic diagram；
Fig. 2 is the monocyclic loop construction schematic diagram of four not closed planes according to a third embodiment of the present invention；
Fig. 3 is illustrated according to the via structure of four monocyclic coils of not closed plane according to a third embodiment of the present invention
Figure；
Fig. 4 is the lead loop structure that four not closed plane single link line circles according to a third embodiment of the present invention are formed
Schematic diagram；
Fig. 5 is the polycyclic loop construction schematic diagram of two not closed snails according to a fourth embodiment of the present invention；
Fig. 6 is that the via structure of two many ring coils of not closed snail according to a fourth embodiment of the present invention is illustrated
Figure；
Fig. 7 is the lead loop formed according to many ring coils of two not closed snails of fourth embodiment of the invention
Structural representation；
Fig. 8 is the polycyclic loop construction schematic diagram of two not closed snails according to a fifth embodiment of the present invention；
Fig. 9 is that the via structure of two many ring coils of not closed snail according to a fifth embodiment of the present invention is illustrated
Figure；
Figure 10 is the wire formed according to many ring coils of two not closed snails of fifth embodiment of the invention
Coil structures schematic diagram；
Figure 11 is the preparation method flow chart of the liquid crystal display panel according to sixth embodiment of the invention；
Figure 12 is the generalized section (a) of the lead loop according to sixth embodiment of the invention；
Figure 13 is the generalized section (b) of the lead loop according to sixth embodiment of the invention；
Figure 14 is the generalized section (c) of the lead loop according to sixth embodiment of the invention；
Figure 15 is the generalized section (d) of the lead loop according to sixth embodiment of the invention；
Figure 16 is the preparation method flow chart of the liquid crystal display panel according to seventh embodiment of the invention；
Figure 17 is the generalized section (a) of the lead loop according to seventh embodiment of the invention；
Figure 18 is the generalized section (b) of the lead loop according to seventh embodiment of the invention；
Figure 19 is the generalized section (c) of the lead loop according to seventh embodiment of the invention；
Figure 20 is the generalized section (d) of the lead loop according to seventh embodiment of the invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, further is made to the present invention below in conjunction with accompanying drawing
Ground is described in detail.
First embodiment
The liquid crystal display panel that the present embodiment is provided, including public electrode distribution and by least one not closed coil shape
Into lead loop；Wherein, the lead loop is connected with the public electrode distribution, and it is the public electrode distribution mistake to be used to
The electromagnetic noise signal that filter is caused by high-frequency signal
Lead loop can form the effect similar to inductance, when there is high-frequency signal, can form impedance, be common electrical
The electromagnetic noise signal that pole distribution filtering is caused by high-frequency signal, so as to ensure display device voltage stabilization.
The quantity of not closed coil can be or multiple that, when the quantity of not closed coil is one, this is not closed
Coil connected with public electrode distribution；When the quantity of not closed coil is for multiple, lead loop is by least two patents
Each end points of the coil of conjunction is in series by corresponding via with respective pixel electrode wiring, is carried out with specific embodiment below
Explanation.
Second embodiment
In the present embodiment, the quantity of not closed coil can be one, its grid that may be located at liquid crystal display panel
Metal level or source-drain electrode metal level, shape can be that not closed plane is monocyclic or snail is polycyclic.Specifically can be such as Fig. 1 a
Shown in Fig. 1 d, Fig. 1 a are the not closed monocyclic coil knot of plane positioned at gate metal layer according to second embodiment of the invention
Structure schematic diagram, Fig. 1 b are the not closed many ring coils of snail positioned at gate metal layer according to second embodiment of the invention
Structural representation, Fig. 1 c are the not closed monocyclic coil of plane positioned at source-drain electrode metal level according to second embodiment of the invention
Structural representation, Fig. 1 d are polycyclic positioned at the not closed snail of source-drain electrode metal level according to second embodiment of the invention
Loop construction schematic diagram.
3rd embodiment
In the present embodiment, the quantity of not closed coil can be four, be only used for teaching originally using four coils here
How art personnel implement the present invention, and the quantity of coil is not limited to four, can be two, three, four etc..Fig. 2 is
The monocyclic loop construction schematic diagram of four not closed planes according to a third embodiment of the present invention, as shown in Fig. 2 coil 201, line
Circle 202 and wire 203 are distributed in gate metal layer, and coil 204 and coil 205 are distributed in source-drain electrode metal level, but are not limited to this
Plant coil distribution scheme.Each end points of this four not closed lines is linked with via, specific as shown in figure 3, coil 201 is connected
There is via 301, coil 202 is communicated with via 302 and 303, and wire 203 is communicated with via 304, and coil 204 is communicated with via 305
With 306, coil 205 is communicated with via 307 and 308.In Fig. 3 four each end points of not closed coil by corresponding via with
Respective pixel electrode wiring connects to form lead loop, specific as shown in figure 4, via 301 passes through pixel electrode 401 and via
306 are electrically connected with, and via 305 is electrically connected with via 302 by pixel electrode 403, and via 303 passes through pixel with via 308
Electrode 402 is electrically connected with, and via 307 is electrically connected with via 304 by pixel electrode 404.Coil 201, coil 202 and wire
203 corresponding vias are communicated to public electrode distribution, and coil 204 and the corresponding via of coil 205 are communicated to source-drain electrode distribution.
Fourth embodiment
In the present embodiment, the shape of not closed coil can also be polycyclic for snail, and its quantity can be two,
Here it is only used for how teaching those skilled in the art implement the present invention using two coils, the quantity of coil is not limited to two,
It can be three, four, five etc..Fig. 5 is two many loop wires of not closed snail according to fourth embodiment of the invention
Coil structures schematic diagram, as shown in figure 5, coil 501, wire 503 are located at gate metal layer, coil 502 is located at source-drain electrode metal level,
But it is not limited to this coil distribution scheme.
Each end points of the two not closed lines opens up via, specific as shown in fig. 6, coil 501 is communicated with via
601, coil 502 is communicated with via 602 and 603, and wire 503 is communicated with via 604.Two not closed coils is each in Fig. 6
The corresponding via that individual end points is opened up and respective pixel electrode wiring are electrically connected with and connect to form lead loop, it is specific as shown in fig. 7,
Via 601 is electrically connected with by pixel electrode 701 with via 602, and via 603 is electrically connected with via 604 by pixel electrode 702
Connect.The corresponding via of coil 501 is communicated to public electrode distribution, and the corresponding via of coil 502 is communicated to source-drain electrode distribution.
5th embodiment
In the present embodiment, it is that two many ring coils of not closed snail are equal with the difference of fourth embodiment
Positioned at gate metal layer, the corresponding via of two not closed coils positioned at the gate metal layer of liquid crystal display panel is communicated to
Public electrode distribution.
Two polycyclic loop constructions of not closed snail are as shown in figure 8, including coil 801, coil 802 and wire
803.Each end points of the two not closed lines is communicated with via, specifically as shown in figure 9, coil 801 is communicated with via 901,
Coil 802 is communicated with via 902 and 903, and wire 803 is communicated with via 904.Two each ends of not closed coil in Fig. 9
Point connects to form lead loop by corresponding via with respective pixel electrode wiring, and specific as shown in Figure 10, via 901 passes through picture
Plain electrode 1001 is electrically connected with via 902, and via 903 is electrically connected with via 904 by pixel electrode 1002.Coil 801,
Coil 802 and the corresponding via of wire 803 are communicated to public electrode distribution.
In specific implementation, two many ring coils of not closed snail can also be respectively positioned on source-drain electrode metal level, position
Source-drain electrode distribution is communicated in the corresponding via of two not closed coils of the source-drain electrode metal level of liquid crystal display panel.
It follows that in liquid crystal display panel provided in an embodiment of the present invention, public electrode distribution and by least one not
The lead loop series connection that the coil of closure is formed, lead loop plays the role of similar to inductance, can be with shape when there is high-frequency signal
It is that public electrode distribution filters the electromagnetic noise signal caused by high-frequency signal into impedance.
In sum, the liquid crystal display panel of the present embodiment, has actual directive significance in technical field of liquid crystal display.
Sixth embodiment
Figure 11 is the preparation method flow chart of the liquid crystal display panel according to sixth embodiment of the invention, as illustrated, can
To comprise the following steps：
Step S1110, forms gate metal layer on substrate；
Step S1120, patterns the gate metal layer, to form gate wirings, public electrode distribution and two patents
The coil of conjunction；
Step S1130, forms gate insulator in gate metal layer；
Figure 12 is the generalized section (a) of the lead loop according to sixth embodiment of the invention, according to above-mentioned steps S1110
The generalized section of the lead loop obtained to the implementation of step S1130 as shown in figure 12, is covered first on glass substrate 1203
One layer of gate metal layer 1202, when photoetching and etching technics is carried out to gate metal layer, forms gate wirings, public electrode and matches somebody with somebody
Line and two not closed coils, are then covered by one layer of gate insulator 1201.
Step S1140, forms source-drain electrode metal level on gate insulator, and patterns the source-drain electrode metal level, with
Form source-drain electrode distribution；
Step S1150, passivation layer is formed on source-drain electrode metal level；
Figure 13 is the generalized section (b) of the lead loop according to sixth embodiment of the invention, according to above-mentioned steps S1140
The generalized section of the lead loop obtained with the implementation of step S1150 as shown in figure 13, is covered on gate insulator 1201
One layer of source-drain electrode metal level 1301, when photoetching and etching technics is carried out to source-drain electrode metal level, forms source-drain electrode distribution, then
One layer of passivation layer 1302 of covering.
Step S1160, two not closed coils form conductive coil；
This step can include following sub-step：
Sub-step S1161, by via etch technique and pixel electrode technique, forms via and pixel electrode is matched somebody with somebody respectively
Line；
Figure 14 is the generalized section (c) of the lead loop according to sixth embodiment of the invention, as shown in figure 14, by mistake
Hole etching technics etches via 1401, and these vias are communicated to public electrode distribution.
Sub-step S1162, makes each end points of at least two not closed coils by corresponding via and respective pixel electricity
Pole distribution series connection, forms lead loop.
Figure 15 is the generalized section (d) of the lead loop according to sixth embodiment of the invention, as shown in figure 15, by picture
Plain electrode process passes through each end points of two not closed coils in the disposed thereon pixel electrode distribution 1501 of via 1401
Corresponding via is connected with respective pixel electrode wiring, forms lead loop.
Step S1170, the conductive coil is connected with the public electrode distribution.
In the present embodiment, the not closed coil is shaped to that not closed plane is monocyclic or snail is more
Ring.
7th embodiment
Figure 16 is the preparation method flow chart of the liquid crystal display panel according to seventh embodiment of the invention, as illustrated, can
To comprise the following steps：
Step S1610, forms gate metal layer on substrate；
Step S1620, patterns the gate metal layer, to form gate wirings, public electrode distribution and two patents
The coil of conjunction；
Step S1630, forms gate insulator in gate metal layer；
Figure 17 is the generalized section (a) of the lead loop according to seventh embodiment of the invention, according to above-mentioned steps S1610
The generalized section of the lead loop obtained to the implementation of step S1630 as shown in figure 17, is covered first on glass substrate 1703
One layer of gate metal layer 1702, when photoetching and etching technics is carried out to gate metal layer, forms gate wirings, public electrode and matches somebody with somebody
Line and two not closed coils, are then covered by one layer of gate insulator 1701.
Step S1640, forms source-drain electrode metal level on gate insulator, and patterns the source-drain electrode metal level, with
Form source-drain electrode distribution and two not closed coils；
Step S1650, passivation layer is formed on source-drain electrode metal level；
Figure 18 is the generalized section (b) of the lead loop according to seventh embodiment of the invention, according to above-mentioned steps S1640
The generalized section of the lead loop obtained with the implementation of step S1650 as shown in figure 18, is covered on gate insulator 1701
One layer of source-drain electrode metal level 1801, when photoetching and etching technics is carried out to source-drain electrode metal level, forms source-drain electrode distribution and two
Individual not closed coil, is then covered by one layer of passivation layer 1802.
Step S1660, four not closed coils form conductive coil；
This step can include following sub-step：
Sub-step S1661, by via etch technique and pixel electrode technique, forms via and pixel electrode is matched somebody with somebody respectively
Line；
Figure 19 is the generalized section (c) of the lead loop according to seventh embodiment of the invention, as shown in figure 19, by mistake
Hole etching technics etches via 1901 and via 1902, not closed positioned at two of the gate metal layer of liquid crystal display panel
The corresponding via of coil is communicated to public electrode distribution, and the source-drain electrode metal level positioned at liquid crystal display panel two patents
The corresponding via of coil of conjunction is communicated to source-drain electrode distribution.
Sub-step S1662, makes each end points of at least two not closed coils by corresponding via and respective pixel electricity
Pole distribution series connection, forms lead loop.
Figure 20 is the generalized section (d) of the lead loop according to seventh embodiment of the invention, as shown in figure 20, by picture
Plain electrode process in via 1901 and the disposed thereon pixel electrode distribution 2001 of via 1902, by each of two not closed coils
Individual end points is electrically connected with respective pixel electrode wiring by corresponding via and connects to form lead loop.
Step S1670, the conductive coil is connected with the public electrode distribution.
In sum, the preparation method of the liquid crystal display panel that the present embodiment is provided, is carrying out lead loop manufacture craft
When, all it is synchronously to be carried out in the manufacture craft of thin film transistor (TFT), it is not necessary to increase extra step and cost.
The above, specific implementation case only of the invention, protection scope of the present invention is not limited thereto, any ripe
Those skilled in the art are known in technical specification of the present invention, modifications of the present invention or replacement all should be in the present invention
Protection domain within.
Claims (10)
1. a kind of liquid crystal display panel, including public electrode distribution and the wire formed by least one not closed coil
Circle；Wherein, the lead loop is connected with the public electrode distribution, is used to be believed by high frequency for public electrode distribution filtering
Number electromagnetic noise signal for causing.
2. liquid crystal display panel according to claim 1, it is characterised in that the lead loop is not closed by least two
Each end points of coil be in series with respective pixel electrode wiring by corresponding via.
3. liquid crystal display panel according to claim 1, it is characterised in that：
At least two not closed coils are distributed in the gate metal layer of liquid crystal display panel and source-drain electrode metal level.
4. liquid crystal display panel according to claim 1, it is characterised in that the not closed coil is located at liquid crystal display
The gate metal layer or source-drain electrode metal level of panel.
5. the liquid crystal display panel according to claim 3 or 4, it is characterised in that the not closed coil is shaped as
Not closed plane is monocyclic or snail is polycyclic.
6. a kind of preparation method of liquid crystal display panel, it is characterised in that comprise the following steps：
Gate metal layer is formed on substrate；
The gate metal layer is patterned, to form gate wirings and public electrode distribution；
Gate insulator is formed in gate metal layer；
Source-drain electrode metal level is formed on gate insulator, and patterns the source-drain electrode metal level, to form source-drain electrode distribution；
Passivation layer is formed on source-drain electrode metal level；
Wherein, in pattern gate metal layer and/or patterning source-drain electrode metal level, at least one not closed line is formed
Circle, lead loop is formed by described at least one not closed coil；
The conductive coil is connected with the public electrode distribution.
7. preparation method according to claim 6, it is characterised in that formed by described at least one not closed coil and led
Electric coil, including：
By via etch technique and pixel electrode technique, via and pixel electrode distribution are formed respectively；
Each end points of at least two not closed coils is set to be connected with respective pixel electrode wiring by corresponding via, formation is led
Line coil.
8. preparation method according to claim 7, it is characterised in that by via etch technique and pixel electrode technique,
Via and pixel electrode distribution are formed respectively, including：
If at least two not closed coils are distributed in the gate metal layer of liquid crystal display panel and source-drain electrode metal level, lead to
Cross via etch technique and etch multiple vias, wherein, make the not closed line of the gate metal layer for being located at liquid crystal display panel
Enclose corresponding via and be communicated to public electrode distribution, and make to be located at the not closed of the source-drain electrode metal level of liquid crystal display panel
The corresponding via of coil is communicated to source-drain electrode distribution；
Pixel electrode distribution is formed above each via by pixel electrode technique.
9. preparation method according to claim 7, it is characterised in that by via etch technique and pixel electrode technique,
Via and pixel electrode distribution are formed respectively, including：
If at least two not closed coils are located at the gate metal layer or source-drain electrode metal level of liquid crystal display panel, passed through
Hole etching technics etches multiple vias, wherein, make the not closed coil pair of the gate metal layer for being located at liquid crystal display panel
The via answered is communicated to public electrode distribution, or makes the not closed coil pair of the source-drain electrode metal level for being located at liquid crystal display panel
The via answered is communicated to source-drain electrode distribution；
Pixel electrode distribution is formed above each via by pixel electrode technique.
10. preparation method according to claim 6, it is characterised in that the not closed coil is shaped to not
The plane of closure is monocyclic or snail is polycyclic.
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| CN201611224443.4A CN106842740A (en) | 2016-12-27 | 2016-12-27 | A kind of liquid crystal display panel and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111462687A (en) * | 2020-06-09 | 2020-07-28 | 上海天马有机发光显示技术有限公司 | Display panel, driving method thereof and display device |
Citations (4)
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| CN102998868A (en) * | 2012-12-12 | 2013-03-27 | 京东方科技集团股份有限公司 | Array substrate and display device |
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| CN111462687A (en) * | 2020-06-09 | 2020-07-28 | 上海天马有机发光显示技术有限公司 | Display panel, driving method thereof and display device |
| CN111462687B (en) * | 2020-06-09 | 2021-05-25 | 上海天马有机发光显示技术有限公司 | Display panel, driving method thereof and display device |
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