CN106793515B - A kind of buried via hole lamination process method of printed circuit board - Google Patents
A kind of buried via hole lamination process method of printed circuit board Download PDFInfo
- Publication number
- CN106793515B CN106793515B CN201611239689.9A CN201611239689A CN106793515B CN 106793515 B CN106793515 B CN 106793515B CN 201611239689 A CN201611239689 A CN 201611239689A CN 106793515 B CN106793515 B CN 106793515B
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- CN
- China
- Prior art keywords
- consent
- printed circuit
- circuit board
- halftone
- pin hole
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
A kind of buried via hole lamination process method of printed circuit board disclosed by the invention, a kind of buried via hole lamination process method of printed circuit board, comprising the following steps: preceding processing procedure process → plating copper process → inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin process → pressing working procedure → rear processing procedure process.The beneficial effects of the present invention are: avoiding pcb board medium thickness deficiency, the plate face recess caused completely using film gummosis consent causes etching difficulty, consent deficiency that bubble expanded by heating in hole is caused to cause the situations such as layering, simplify production procedure, under the premise of guaranteeing product quality, so that Product Process is simplified, that shortens printed circuit board manufactures the time, production cost is reduced, increases economic benefit to a certain extent.
Description
Technical field
The present invention relates to the circuit surface processing technology field of printed circuit board more particularly to a kind of printing electricity
The buried via hole lamination process method of road plate.
Background technique
It is higher and higher to the manufacture precision requirement of printed circuit board with the progress and development of science and technology, to printing
The line requirements of circuit board are also more and more intensive, and the number of plies of printed circuit board is also being constantly increasing.In adding for printed circuit board
During work, since the design of product structure needs, often there is the concatenated design of multilayer interaction, thus one will generate
It is connected between multiple-plate internal layer two or more layers, machine drilling operation need to be carried out on a printed circuit, printed
Circuit board will carry out filler processing to the hole location that machine drilling generates in pressing.
Carrying out filler processing to the hole location of printed circuit board at present, there are two types of modes, and one is film filler modes, specifically
Process are as follows: preceding processing procedure → copper facing → inner figure production → internal layer AOI maintenance → surface treatment → pressing → rear processing procedure.Work as buried via hole
When aperture is larger or relatively high in length and breadth, it is necessary to which a large amount of resins are filled, at this point, leading due in glue inflow hole excessive in film
The problems such as there are the insufficient caused pressings of glue amount to be recessed at pore mouth, medium thickness is insufficient, the system of extreme influence outer graphics
Work and production yield；In addition, there are when bubble cavity, there is greatly lamination by thermally stratified layer in hole when filler deficiency in hole
Risk.
Another kind is consent mode after plating, detailed process are as follows: preceding processing procedure → copper facing → filling holes with resin → baking → resin
Grinding → appearance test → inner figure production → internal layer AOI maintenance → surface treatment → pressing → rear processing procedure.After this plating
The filler mode of consent can avoid the defect of above-mentioned pressing starved recess, but increase the technique stream of grind resin and high-temperature baking
Journey, processing procedure are complicated, increase accordingly production hour and production cost, and printed circuit plate face copper has the wind for subtracting copper when simultaneous grinding
Danger.
For this purpose, having found result of the above problems applicant carried out beneficial exploration and trial, will be detailed below being situated between
The technical solution to continue generates in this background.
Summary of the invention
The technical problems to be solved by the invention: filler treatment process is carried out for the existing hole location to printed circuit board
It is existing insufficient and a kind of buried via hole lamination process method of printed circuit board is provided.
Technical problem solved by the invention can be realized using following technical scheme:
A kind of buried via hole lamination process method of printed circuit board, comprising the following steps: preceding processing procedure process → plating copper process →
Inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin process → pressing working procedure → rear system
Journey process, wherein filling holes with resin process includes following sub-step:
Step 1, according to the consent figure of printed circuit board, consent egative film is made, at the jack position of printed circuit board pair
Answering egative film position is black catch point, and according to consent negative film making consent halftone, the consent halftone is relative to printed circuit board
The pin hole for printing ink is offered at jack position；
Step 2, consent halftone obtained is placed on oblique lamp desktop and is compared with consent egative film, at the light transmission of consent halftone pair
When should correspond at the black catch point on consent egative film, light transmission on consent egative film without black catch point, then it is abnormal pin hole, adopts
These abnormal pin holes are filled with glue；
Step 3, consent halftone made from step 2 is fixed on the base of printing machine, and carries out contraposition adjustment, so that plug
The pin hole position of hole halftone corresponds at the jack position of printed circuit board；
Step 4, consent halftone is covered on printed circuit board surface, pin hole position corresponds to the consent position of printed circuit board
It sets, ink is filled in the hole at printed circuit board jack position by the pin hole position of consent halftone；
Step 5, the printed circuit board printed is toasted, so that the ink solidification of printing on a printed circuit.
Due to using technical solution as above, the beneficial effects of the present invention are: processing method of the invention is in plate
Filling holes with resin is used before being laminated after the surface treatment of face, avoids the pcb board dielectric layer caused completely using film gummosis consent
Thickness is insufficient, plate face recess causes etching difficulty, consent deficiency that bubble expanded by heating in hole is caused to cause the situations such as layering.With electricity
The filler mode of consent is compared after plating, simplifies production procedure, under the premise of guaranteeing product quality, so that Product Process is simple
Change, that shortens printed circuit board manufactures the time, reduces production cost, increases economic benefit to a certain extent.
Specific embodiment
In order to be easy to understand the technical means, the creative features, the aims and the efficiencies achieved by the present invention, further
Illustrate the present invention.
A kind of buried via hole lamination process method of printed circuit board, comprising the following steps: preceding processing procedure process → plating copper process →
Inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin process → pressing working procedure → rear system
Journey process.The particular content of each step is as follows:
Preceding processing procedure process: substrate blanking → machine drilling.
Plate copper process: copper facing on the hole wall of machine drilling on a printed circuit is not led for each layer of printed circuit board
It is logical.
Inner figure production process: covering dry film on printed circuit board, by image transfer, inner line figure is shifted
It is dissolved to printed circuit board dry film, then by the dry film except figure by chemical medicinal liquid, printed circuit board etching, by printing electricity
The dry film of covering on the plate of road removes.
Internal layer AOI overhaul process: figure and customer profile after printed circuit board is etched, which compare, finds out difference.To difference
Point is overhauled or is scrapped processing.
Surface treatment procedure: brownification or Darkening process are carried out to the copper face of printed circuit board circuitry patterned surface, make to be laminated
Copper face and PP film binding force are stronger afterwards, prevent from being layered.
Filling holes with resin process includes following sub-step:
Step 1, according to the consent figure of printed circuit board, consent egative film is made, at the jack position of printed circuit board pair
Answering egative film position is black catch point, and according to consent negative film making consent halftone, the consent halftone is relative to printed circuit board
The pin hole for printing ink is offered at jack position；
Step 2, consent halftone obtained is placed on oblique lamp desktop and is compared with consent egative film, at the light transmission of consent halftone pair
When should correspond at the black catch point on consent egative film, light transmission on consent egative film without black catch point, then it is abnormal pin hole, adopts
These abnormal pin holes are filled with glue；
Step 3, consent halftone made from step 2 is fixed on the base of printing machine, and carries out contraposition adjustment, so that plug
The pin hole position of hole halftone corresponds at the jack position of printed circuit board；
Step 4, consent halftone is covered on printed circuit board surface, pin hole position corresponds to the consent position of printed circuit board
It sets, ink is filled in the hole at printed circuit board jack position by the pin hole position of consent halftone；
Step 5, the printed circuit board printed is toasted, so that the ink solidification of printing on a printed circuit.
Pressing working procedure: PP film is padded in the printed wiring board front and back sides after consent is toasted, then spreads copper foil on the outside of PP film,
It is combined together printed wiring board, PP film, copper foil by pressing, achievees the purpose that printed wiring board once layer.
Processing procedure process afterwards: cutting edge → machine drilling → plating → outer graphics production → outer layer AOI maintenance after pressing → outer
Anti-welding production → outer layer PCB surface the processing of layer → cutting plate molding.
The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and the above embodiments and description only describe this
The principle of invention, without departing from the spirit and scope of the present invention, various changes and improvements may be made to the invention, these changes
Change and improvement all fall within the protetion scope of the claimed invention.The claimed scope of the invention by appended claims and its
Equivalent thereof.
Claims (1)
1. a kind of buried via hole lamination process method of printed circuit board, which comprises the following steps: preceding processing procedure process → plating
Copper process → inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin process → pressing work
Sequence → rear processing procedure process, wherein filling holes with resin process includes following sub-step:
Step 1, according to the consent figure of printed circuit board, consent egative film is made, corresponds to bottom at the jack position of printed circuit board
Piece position is black catch point, according to consent negative film making consent halftone, consent of the consent halftone relative to printed circuit board
The pin hole for printing ink is offered at position；
Step 2, consent halftone obtained is placed on oblique lamp desktop and is compared with consent egative film, corresponded at the light transmission of consent halftone
Black catch point on consent egative film is then abnormal pin hole, using water when corresponding at light transmission on consent egative film without black catch point
Glue fills these abnormal pin holes；
Step 3, consent halftone made from step 2 is fixed on the base of printing machine, and carries out contraposition adjustment, so that consent net
The pin hole position of version corresponds at the jack position of printed circuit board；
Step 4, consent halftone being covered on printed circuit board surface, pin hole position corresponds to the jack position of printed circuit board,
Ink is filled in the hole at printed circuit board jack position by the pin hole position of consent halftone；
Step 5, the printed circuit board printed is toasted, so that the ink solidification of printing on a printed circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611239689.9A CN106793515B (en) | 2016-12-28 | 2016-12-28 | A kind of buried via hole lamination process method of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611239689.9A CN106793515B (en) | 2016-12-28 | 2016-12-28 | A kind of buried via hole lamination process method of printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106793515A CN106793515A (en) | 2017-05-31 |
| CN106793515B true CN106793515B (en) | 2019-05-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611239689.9A Active CN106793515B (en) | 2016-12-28 | 2016-12-28 | A kind of buried via hole lamination process method of printed circuit board |
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| CN (1) | CN106793515B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108808263A (en) * | 2018-06-05 | 2018-11-13 | 成都赛康宇通科技有限公司 | A kind of suction wave layer and preparation process for antenna |
| CN109605919A (en) * | 2018-12-29 | 2019-04-12 | 江苏日托光伏科技股份有限公司 | A kind of printing process of brush coating halftone and MWT photovoltaic module conducting resinl |
| CN111315145A (en) * | 2020-04-20 | 2020-06-19 | 深圳市汇和精密电路有限公司 | Lamination process for multilayer PCB |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000025559A1 (en) * | 1998-10-26 | 2000-05-04 | Telefonaktiebolaget Lm Ericsson | Method for manufacturing a circuit board |
| CN1277797A (en) * | 1998-10-07 | 2000-12-20 | 松下电器产业株式会社 | Manufacturing method of circuit board, manufacturing apparatus for it, and porous sheet used in it |
| CN104883827A (en) * | 2015-06-05 | 2015-09-02 | 成都航天通信设备有限责任公司 | Manufacturing process for plugging conductive holes of circuit board with resin |
| CN105101661A (en) * | 2014-05-21 | 2015-11-25 | 深圳崇达多层线路板有限公司 | Manufacturing method of printed circuit board ink plug hole |
-
2016
- 2016-12-28 CN CN201611239689.9A patent/CN106793515B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1277797A (en) * | 1998-10-07 | 2000-12-20 | 松下电器产业株式会社 | Manufacturing method of circuit board, manufacturing apparatus for it, and porous sheet used in it |
| WO2000025559A1 (en) * | 1998-10-26 | 2000-05-04 | Telefonaktiebolaget Lm Ericsson | Method for manufacturing a circuit board |
| CN105101661A (en) * | 2014-05-21 | 2015-11-25 | 深圳崇达多层线路板有限公司 | Manufacturing method of printed circuit board ink plug hole |
| CN104883827A (en) * | 2015-06-05 | 2015-09-02 | 成都航天通信设备有限责任公司 | Manufacturing process for plugging conductive holes of circuit board with resin |
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| Publication number | Publication date |
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| CN106793515A (en) | 2017-05-31 |
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Effective date of registration: 20200618 Address after: No.99, hope Avenue, high tech Zone, Nantong City, Jiangsu Province, 226300 Patentee after: Shanghai Zhanhua Electronics (Nantong) Co., Ltd Address before: 201702 Shanghai city Qingpu District Xujing town industrial area west Huqingping No. 1750 Patentee before: SHANGHAI UNITECH ELECTRONICS Co.,Ltd. |
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