CN106791740B

CN106791740B - A kind of DMD data fault detection method, equipment and system

Info

Publication number: CN106791740B
Application number: CN201611110744.4A
Authority: CN
Inventors: 赵石; 赵一石; 王振; 肖纪臣
Original assignee: Hisense Group Co Ltd
Current assignee: Hisense Group Co Ltd
Priority date: 2016-12-06
Filing date: 2016-12-06
Publication date: 2019-03-08
Anticipated expiration: 2036-12-06
Also published as: CN106791740A

Abstract

The invention discloses a kind of DMD data fault detection method, equipment and systems.The first image projection for being used for fault detection is obtained the second image by DMD in the present invention；First image includes N number of data line fault detection area, a detection zone, Q check plot；According to the difference of the second image and the first image, the data fault of DMD is positioned.Since DMD is written according to N data channel row scan sequences, it is shown again by the Q address line traffic control load of DMD, for one detection line of label in the position the N data channel of the data cell of detection data line failure in the present invention each data line fault detection area, color change occurs for detection line to location data line failure when which breaks down；Corresponding block check plot is designed according to Q address wire, the imaging results of the image of detection zone are identical when the image of each check plot breaks down with the address wire of the check plot, therefore by address wire detection zone and check plot comparison and location address alignment fault.

Description

DMD data fault detection method, equipment and system

Technical Field

The invention relates to the field of projection, in particular to a method, equipment and a system for detecting DMD data faults.

Background

In the Digital Light Processing (DLP) projection technology, a display video signal is encoded into a driving signal of a Digital Micromirror Device (DMD) by a DLP control chip, and the driving signal is input to a DMD core Device (hereinafter, the core Device is referred to as a DMD). The DMD, which is a digital micromirror device based on digital micromirror device to display digital visual information, is a core in DLP technology system, i.e., a digital micromirror wafer used in the heart of optical engine, and is a device formed by adding a rotating mechanism capable of modulating the reflective surface to the standard semiconductor process of CMOS.

The principle of the DLP projection technology is that a light source passes through a Color Wheel (Color Wheel) with three primary colors, in a laser light source, the Color Wheel usually corresponds to two Color wheels, namely a fluorescent Wheel and a Color filter Wheel, light beams are output according to the time sequence of R, G, B three primary colors and then irradiated onto a DMD, continuous light is converted into gray scale in a synchronous signal direction, the colors are expressed by matching with R, G, B, and finally, the gray scale is projected and imaged through a lens. The DMD is a bistable spatial light modulator composed of thousands of micro-mirrors (precise, micro-mirrors), and each mirror can deflect at a certain angle of positive and negative by adding a rotation mechanism capable of modulating a reflection surface to a standard semiconductor process of a Complementary Metal Oxide Semiconductor (CMOS), wherein light in a reflection light source can enter a lens at a positive deflection angle, light of the reflection light source does not enter the lens at a negative deflection angle, and the light quantity entering the lens is determined by the angle and duration of the non-divided mirror turnover. As shown in fig. 1, the different reflection results of the light rays by the two different deflection angles of the mirror plates are exemplarily shown.

Fig. 1 shows the light transmission schematic for two deflection situations of the micromirrors of the DMD in the prior art. As shown in fig. 1, the micro mirror 101 is deflected at a different angle from the micro mirror 102, the micro mirror 101 reflects light emitted from the light source 103 onto the light absorption unit 104 by the deflected angle, and the micro mirror 102 reflects light emitted from the light source 103 onto the lens 105 by the deflected angle.

The laser projection display process: the laser light source beam projects on the DMD, is reflected by the DMD and is imaged and displayed on a screen through the lens. The control of the DMD is realized by inputting a driving control signal to the DMD, a data channel of the DMD is divided into n pairs of Low-Voltage Differential Signaling (LVDS for short), data transmitted by each pair of LVDS Differential data signals is 1-bit binary data and represents a switch of an array mirror (namely a small reflector which represents a pixel point in an image) on the DMD, and if the value is 1, the DMD array mirror is opened; if the value is 0, the galvanometer is turned off, and the color of each pixel point of the projection picture is adjusted by controlling the time for which the array mirror is turned on under the irradiation of different primary color light.

The DMD Printed board and the DLP Printed board are mostly connected through a Flexible Printed Circuit (FPC for short), and the FPC enables gold fingers at two ends to be in pressure connection with sockets on the corresponding Printed boards so as to ensure that the paths are conducted. There are several reasons for this:

(1) the golden finger of the FPC is not matched with the socket in place;

(2) the copper sheet of the data line of the FPC is broken, the printed board is torn or the gold finger falls off;

(3) and poor welding of the printed board socket.

The DMD data transmission is poor due to the conditions, and a data line fault or an address line fault occurs, so that the research on a DMD data fault detection method for rapidly positioning the data fault of the DMD is a problem which is urgently needed to be solved at present.

Disclosure of Invention

The embodiment of the invention provides a DMD data fault detection method, equipment and a system, which are used for positioning DMD data faults.

The digital micromirror device DMD data fault detection method provided by the embodiment of the invention comprises the following steps:

the method comprises the steps that a projection device projects a first image used for fault detection to a receiving screen to obtain a second image displayed on the receiving screen; wherein the first image comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line failure detection area of the N data line failure detection areas contains one or more data units having N-bit data channels for detecting data line failures, the N data channels correspond to N data lines of a DMD of the projection equipment one by one, each data unit for detecting the data line fault comprises a detection line, the data channel corresponding to the detection line in the data unit for detecting the data line fault in each data line fault detection area is different from the data channels corresponding to the detection lines in other data line fault detection areas, N is an integer larger than or equal to 1, the Q comparison areas correspond to Q address lines of the DMD one by one, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails;

locating a data failure of the DMD based on a difference between the second image and the first image.

Optionally, the locating the data failure of the DMD according to the difference between the second image and the first image includes:

if the display difference exists between the detection line in the K-th data line fault detection area in the second image and the detection line in the corresponding data fault detection area in the first image, determining the data line fault corresponding to the data channel according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the K-th data fault detection area, wherein K is an integer greater than or equal to 1 and less than or equal to N; and/or

And if the image in the address line detection area in the second image is the same as the image in the Kth contrast area in the second image, determining that the address line corresponding to the Kth contrast area has a fault, wherein K is an integer which is greater than or equal to 1 and less than Q.

Optionally, if the detection line in the kth data line fault detection area in the second image is displayed as the color displayed when the corresponding data line has an open circuit fault, determining that the data line corresponding to the data channel has the open circuit fault according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the kth data line fault detection area; or,

and if the detection line in the Kth data line fault detection area in the second image is displayed as the color displayed when the corresponding data line is in short circuit fault, determining that the data line corresponding to the data channel has the short circuit fault according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the Kth data line fault detection area.

Optionally, in the first image, a data channel corresponding to a detection line in each data line fault detection area is a first color, colors of other data channels are second colors, and the first color is different from the second color; or,

in the first image, a data unit for detecting a data line failure in each data line failure detection area is divided into a first part and a second part, wherein:

the data channels corresponding to the detection lines in the first part of data units are in a first color, the colors of other data channels are in a second color, the first color is different from the second color, and the second color is the color of the data channels in the case of open circuit fault;

and the data channels corresponding to the detection lines in the second part of data units are in a third color, the colors of other data channels are in a fourth color, the third color is different from the fourth color, and the fourth color is the color of the data channels in short circuit fault.

Alternatively, the data unit for detecting the data line fault in the data line fault detection region is all or part of the data units contained in the data line fault detection region.

Optionally, the number of the data channel corresponding to the detection line in the data unit for detecting the data line fault in the data line fault detection area is the same as the number of the data line fault detection area.

Optionally, the resolution of the first image is equal to the resolution of the DMD.

Optionally, each control zone comprises an open circuit fault control zone and/or a short circuit fault control zone;

the image of the open circuit fault comparison area is the same as the imaging result of the image of the address line detection area when the address line corresponding to the comparison area is in open circuit fault;

and the image of the short-circuit fault comparison area is the same as the imaging result of the image of the address line detection area when the address line corresponding to the comparison area is in short-circuit fault.

Optionally, if the image in the address line detection area in the second image is the same as the image in the short-circuit fault comparison area in the kth comparison area in the second image, determining that the address line corresponding to the kth comparison area has a short-circuit fault; or,

and if the image in the address line detection area in the second image is the same as the image of the open-circuit fault comparison area in the Kth comparison area in the second image, determining that the address line corresponding to the Kth comparison area has the open-circuit fault.

Optionally, the groundThe address line detection region comprises 2^QAnd each block is identified by using the Q bit address output by the Q address lines, and the colors of two adjacent blocks are different.

The digital micromirror device DMD data fault detection device provided by the embodiment of the invention comprises:

the acquisition module is used for acquiring a second image obtained by projecting the first image by the projection equipment; wherein the first image comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line failure detection area of the N data line failure detection areas contains one or more data units having N-bit data channels for detecting data line failures, the N data channels correspond to N data lines of a DMD of the projection equipment one by one, each data unit for detecting the data line fault comprises a detection line, the data channel corresponding to the detection line in the data unit for detecting the data line fault in each data line fault detection area is different from the data channels corresponding to the detection lines in other data line fault detection areas, N is an integer larger than or equal to 1, the Q comparison areas correspond to Q address lines of the DMD one by one, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails;

and the detection module is used for positioning the data fault of the DMD according to the difference between the first image and the second image.

Optionally, the detection module is specifically configured to:

Optionally, the detection module is specifically further configured to:

if the detection line in the K-th data line fault detection area in the second image is displayed as the color displayed when the corresponding data line is in open circuit fault, determining that the data line corresponding to the data channel has open circuit fault according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the K-th data line fault detection area; or,

Optionally, the detection module is specifically further configured to:

if the image in the address line detection area in the second image is the same as the image in the short-circuit fault comparison area in the Kth comparison area in the second image, determining that the address line corresponding to the Kth comparison area has a short-circuit fault; or,

The digital micromirror device DMD data fault detection system provided by the embodiment of the invention comprises:

the projection device comprises a DMD and is used for projecting a first image used for fault detection to a receiving screen to obtain a second image displayed on the receiving screen; wherein the first image comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line failure detection area of the N data line failure detection areas contains one or more data units having N-bit data channels for detecting data line failures, the N data channels correspond to N data lines of the DMD one by one, each data unit for detecting data line faults comprises a detection line, the data channel corresponding to the detection line in the data unit for detecting the data line faults in each data line fault detection area is different from the data channels corresponding to the detection lines in other data line fault detection areas, N is an integer greater than or equal to 1, the Q comparison areas correspond to Q address lines of the DMD one by one, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails;

and the fault detection equipment is used for acquiring a second image displayed on the receiving screen, comparing the second image with the first image and positioning the data fault of the DMD.

Optionally, the fault detection device is specifically configured to:

if the display difference exists between the detection line in the K-th data line fault detection area in the second image and the detection line in the corresponding data fault detection area in the first image, determining the data line fault corresponding to the data channel according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the K-th data fault detection area, wherein K is an integer greater than or equal to 1 and less than or equal to N;

Optionally, the fault detection device is specifically configured to:

Optionally, the address line detection area comprises 2^QAnd each block is identified by using the Q bit address output by the Q address lines, and the colors of two adjacent blocks are different.

In the above embodiment of the present invention, the projection device projects the first image for fault detection onto the receiving screen to obtain the second image displayed on the receiving screen; the first image comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line fault detection area of the N data line fault detection areas comprises one or more data units which are provided with N-bit data channels and used for detecting data line faults, the N-bit data channels correspond to the N data lines of a DMD of the projection equipment one by one, each data unit used for detecting the data line faults comprises one detection line, the data channel corresponding to the detection line in the data unit used for detecting the data line faults in each data line fault detection area is different from the data line fault detection areas of other data lines, N is an integer larger than or equal to 1, the Q comparison areas correspond to the Q address lines of the DMD one by one, and the image of each comparison area is the same as the image imaging result of the image of the address line detection area when the address line corresponding to the comparison area fails; and positioning the data fault of the DMD according to the difference between the second image and the first image. In the scheme provided by the invention, one detection line is marked in the N bit data channel of the data unit for detecting the data line fault in each data line fault detection area, and the correspondingly marked detection line can generate corresponding color change when the data line has a specific fault, so that the data line fault is positioned according to the color change of the detection line; corresponding comparison areas are designed according to the address lines, the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails, and therefore the address line detection area is compared with the Q comparison areas, and the address line fault is located.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

FIG. 1 is a schematic diagram of micromirror offset and projection on a DMD in the prior art;

FIG. 2a is a schematic flow chart illustrating a method for detecting a DMD data line fault according to the present invention;

FIG. 2b is a schematic flow chart illustrating a method for detecting address line failure according to the present invention;

FIG. 2c is a schematic flow chart of a method for detecting a failure of both the data line and the address line of the DMD according to the present invention;

FIG. 3 is a diagram illustrating a diagram of a DMD data line fault detection according to an embodiment of the present invention;

FIG. 4 is a detailed diagram of the detection region 5 in the graphics card shown in FIG. 3 according to an embodiment of the present invention;

FIG. 5 is a detailed diagram of the data units in the detection area shown in FIG. 3 according to an embodiment of the present invention;

FIG. 6 is a schematic diagram illustrating a phenomenon in the detection zone 5 shown in FIG. 3 when an open-circuit fault occurs in the 5 th data channel according to an embodiment of the present invention;

fig. 7 is a schematic diagram illustrating a phenomenon in the detection area 5 shown in fig. 3 when a short-circuit fault occurs in the 5 th data channel according to an embodiment of the present invention;

FIG. 8 is a diagram illustrating a graphics card for detecting loading failure of a DMD block according to an embodiment of the present invention;

FIG. 9 is a diagram illustrating a phenomenon of the graphics card shown in FIG. 8 when a short-circuit fault occurs on a second address line according to an embodiment of the present invention;

FIG. 10 is a diagram of a graphics card capable of detecting both data line failure and address line failure according to an embodiment of the present invention;

FIG. 11 is a diagram illustrating a card with an open data channel 5 and an open second address line according to an embodiment of the present invention;

fig. 12 is a schematic structural diagram of an apparatus of a fault detection device according to an embodiment of the present invention;

fig. 13 is a schematic diagram of a system that can detect a failure of a data line and a failure of an address line according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

As described in the background art, when the DMD data transmission is poor, a data line failure or an address line failure may occur, and the specific explanation of the data line failure and the address line failure is as follows:

data line failure: the DMD makes an error in a specific position every time a row is written, and the phenomenon is that after the entire image is completely loaded, a plurality of bright lines or dark lines appear in a specific column position in the projected image.

The reason for the appearance of the vertical line barrier is as follows: the DMD data is received and transmitted by a parallel n-bit data channel, the n-bit data channel is sequentially written into a cache of the DMD in a line scanning mode, data in the cache corresponds to a switch of each pixel point, and the writing mode determines that any point in every continuous n pixel points in any line is fixed to be corresponding to a fixed bit of the n-bit data channel. When one or more of the n-bit data paths fail, there will be a fixed data line failure in the formed image. Taking the resolution of the DMD as 1920 × 1080 as an example, the data channel is 32 bits, and assuming that the first data line is open-circuited, the DMD makes an error at a specific position during each row writing, so that 1920/32 in the formed image is 60 white vertical lines, and one vertical line appears every 31 pixels, and the failed data line has no influence on other data lines that are not failed. For example, the number of columns is represented by x, and when 0. ltoreq. x.ltoreq.n, the line of the x-th, x +32 × 2-th, … …, and x +32 × (n ÷ 32-1) are all lines indicating a failure in the x-th data channel.

Specifically, when a data line fault occurs, if a vertical line appears white, it indicates that the DMD galvanometer at the vertical line is in a fully open state, and the fault type of the corresponding fault data channel is LVDS differential line open circuit, and the value is 1; if the vertical line appears black, the DMD galvanometer at the vertical line is in a fully-off state, and the fault type of the corresponding fault data channel is LVDS differential line short circuit and has a value of 0. A data line fault may also be referred to as a vertical line fault.

Address line failure: when the DMD block displays, the address line is loaded wrongly, and all pixel points in a specific area are completely white. An address line failure may also be referred to as a block failure.

Cause of address line failure: the DMD image is loaded in a block loading mode, namely the whole image is divided into 1 column of m blocks, the m blocks are addressed through 4 address lines, and the number of the blocks does not exceed 2^4 ^ 16 blocks. For example, taking the DMD resolution of 1920 × 1080 as an example, and m of 15, the pixels per block are 1920 × 72. When a block is loaded, each data unit is written into a cache firstly, and when all data of the block are ready to be loaded, the block is loaded, the data range of an address line is (0000-1110) B, which represents that the 1 st block-15 th block is loaded, and if one address line or a plurality of address lines have problems, the address line fails in image loading.

In the embodiment of the invention, 4 address lines are provided, and 16 blocks can be controlled at most by binary combination. When one address line fails, the address line fails, for example, the first address line is disconnected, the signal line is always 1, the last digit of the binary address of 4 address lines is always 1, if the normally displayed address line is represented as: 0001. 0010, 0011, 0100, 0101, … …, 1110, 1111, when the open circuit fault occurs on the first address line, the number ending with 1 is kept at 1, the number ending with 0 is displayed as 0, if the address line is normally displayed as: 0000. 0001, 0010, 0011, 0100, … …, 1110 and the like, when the block is loaded, the open circuit of the first address line fails, and the address line at the time of the failure is shown as: 0001. 0001, 0011, and 1111, wherein the failed block is as follows: 1. 3, 5, … …, 15, it can be seen that if an address line has an open circuit fault, half of the blocks will show abnormal, and the specific address line with fault can be determined by the arrangement and combination mode of the blocks with abnormal.

Embodiments of the present invention provide for using a specific test pattern to aid in detecting data failures of the DMD.

In the embodiment of the invention, aiming at the DMDs with different resolutions, test images with corresponding resolutions can be designed for detecting data faults of the DMD. Generally, the resolution of the test image needs to be the same as the resolution of the DMD.

The following embodiments take data line failure detection for a DMD as an example, and a test image for detecting the data line failure of the DMD is given, and may also be referred to as a graphic card. The graph card comprises N data line fault detection areas, each data line fault detection area comprises one or more data units which are provided with N-bit data channels and used for detecting data line faults, the N-bit data channels correspond to the N data lines of the DMD one to one, each data unit used for detecting the data line faults comprises one detection line, the data channels corresponding to the detection lines in the data units used for detecting the data line faults in each data line fault detection area are different from other data line fault detection areas, and N is an integer larger than or equal to 1.

Furthermore, the number of the data channel corresponding to the detection line in the data unit for detecting the data line fault in the data line fault detection area is the same as the number of the data line fault detection area. When the data units for detecting the data line faults are selected, the number of the data units selected by each data fault detection area may be the same or different, and all or part of the data units may be selected by each data fault detection area for performing the data line fault detection.

The colors of the data channels corresponding to the detection lines in the data line fault detection area of the graph card comprise the following two conditions:

case 1: in the graph card, a data channel corresponding to a detection line in each data line fault detection area is of a first color, the colors of other data channels are of a second color, and the first color is different from the second color. For example, the first color may be red, the second color may be white, and for a data line failure detection area having 10 data cells for data line failure detection, if the number of the data line failure detection area is n, the color of the nth data channel in each data cell in the area is red, and the colors of the other data channels are white, that is, in the failure detection area, 10 red detection lines are formed in a white background.

Case 2: in the graphic card, a data unit for detecting a data line failure in each data line failure detection area is divided into a first part and a second part, wherein: the data channels corresponding to the detection lines in the first part of data units are in a first color, the colors of other data channels are in a second color, the first color is different from the second color, and the second color is the color of the data channels in the case of open circuit fault; and the data channels corresponding to the detection lines in the second part of data units are in a third color, the colors of other data channels are in a fourth color, the third color is different from the fourth color, and the fourth color is the color of the data channels in short circuit fault. For example, the first color is red, the second color is white, the third color is black, the fourth color is green, and for a data line failure detection area having 10 data units for data line failure detection, if the number of the data line failure detection area is n, the color of the nth data channel of the first part of data units in the area is red, and the colors of the other data channels are white; the color of the nth data channel of the second part of data units is green, and the color of the other data channels is black, that is, in the fault detection area, 5 red detection lines are formed in a part of white background, and 5 green detection lines are formed in another part of black background.

Referring to fig. 2a, a schematic flow chart of a method for detecting a DMD data line fault according to the above designed graphics card provided by the present invention specifically includes the following steps:

step 101 a: the projection device including the DMD projects a graphic card (i.e., the above-described graphic card) for detecting a data line failure onto the receiving screen to obtain a second image displayed on the receiving screen.

In this step, in some embodiments, a projection device including a DMD projects a graphic card for failure detection onto a receiving screen upon receiving an indication. Specifically, the indication may be sent by the fault detection device or a device with a similar function, and after the projection device including the DMD receives the indication and projects the graphic card to the receiving screen to obtain the second image, the fault detection device obtains the second image, and performs step 102 a.

Step 102 a: and positioning the data line fault of the DMD according to the display difference between the detection line in the data line fault detection area in the second image and the detection line in the corresponding data fault detection area in the graphic card.

In this step, the data line fault of the DMD is located by the following method:

and if the display difference exists between the detection line in the Kth data line fault detection area in the second image and the detection line in the corresponding data fault detection area in the graphic card, determining the data line fault corresponding to the data channel according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the Kth data fault detection area, wherein K is an integer which is more than or equal to 1 and less than or equal to N.

Further, the data line fault includes two situations, namely a data line open circuit and a data line short circuit, and whether the data line of the DMD is open circuit or short circuit fault is located by the following method:

positioning data line open circuit fault: and if the detection line in the K-th data line fault detection area in the second image is displayed as the color displayed when the corresponding data line is in the open circuit fault state, determining that the open circuit fault occurs in the data line corresponding to the data channel according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the K-th data line fault detection area.

Positioning a data line short-circuit fault: and if the detection line in the Kth data line fault detection area in the second image is displayed as the color displayed when the corresponding data line is in short circuit fault, determining that the data line corresponding to the data channel has the short circuit fault according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the Kth data line fault detection area.

It can be seen that the projection device including the DMD projects the graphic card for failure detection onto the receiving screen to obtain a second image displayed on the receiving screen; and positioning the data line fault of the DMD according to the display difference between the detection line in the data line fault detection area in the second image and the detection line in the corresponding data fault detection area in the graphic card. In the scheme provided by the invention, one detection line is marked in the N-bit data channel of the data unit for detecting the data line fault in each data line fault detection area, and the corresponding detection line has corresponding color change when the data line has a specific fault, so that the data line fault is positioned.

The following embodiments take address line failure detection for a DMD as an example, and another type of graphics card for detecting address line failure of the DMD is given. The image of each contrast area is the same as the imaging result of the image of the address line detection area when the address line corresponding to the contrast area fails; address line detection zone including 2^QEach block is identified by using a Q bit address output by Q address lines, and the colors of two adjacent blocks are different; each comparison area comprises an open circuit fault comparison area and/or a short circuit fault comparison area, wherein the image of the open circuit fault comparison area is the same as the imaging result of the image of the address line detection area when the address line corresponding to the comparison area is subjected to open circuit fault; and the image of the short-circuit fault comparison area is the same as the imaging result of the image of the address line detection area when the address line corresponding to the comparison area is in short-circuit fault.

Referring to fig. 2b, a schematic flow chart of a method for detecting a DMD address line fault by using a graphic card according to the above design is provided, where the flow chart includes the following steps:

a step 101 b; the projection equipment comprising the DMD projects the graphic card (namely, the graphic card for detecting the fault of the address line of the DMD) to the receiving screen to obtain a second image displayed on the receiving screen.

Step 102 b: and comparing the image in the address line detection area in the second image with the image in the comparison area in the second image, and positioning the fault of the address line of the DMD according to the comparison result.

In this step, the address line fault of the DMD is located by the following method:

Further, the address line fault is further divided into an address line open circuit or an address line short circuit, and specific positioning methods for the two cases are as follows:

and if the image in the address line detection area in the second image is the same as the image of the short-circuit fault comparison area in the Kth comparison area in the second image, determining that the address line corresponding to the Kth comparison area has the short-circuit fault.

And if the image in the address line detection area in the second image is the same as the image in the open-circuit fault comparison area in the Kth comparison area in the second image, determining that the open-circuit fault occurs to the address line corresponding to the Kth comparison area.

It can be seen that the projection device including the DMD projects the graphic card for failure detection onto the receiving screen to obtain a second image displayed on the receiving screen; and comparing the image in the address line detection area in the second image with the image in the comparison area in the second image, and positioning the fault of the address line of the DMD according to the comparison result. In the scheme provided by the invention, an address line detection area is designed, and a corresponding block comparison area is designed according to the Q address lines of the DMD, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails, so that the address line detection area is compared with the Q comparison areas, and the address line fault is positioned.

In some embodiments, after the projection device projects the failure-detected graphics card onto the receiving screen to obtain a second image, the display difference between the first image and the second image is observed by human eyes, and the data failure of the DMD is determined, or the second image obtained by projection is transmitted to a computer with a processing and analyzing function through a device with a camera shooting function, the first image is stored in the computer, and the computer compares the difference between the first image and the second image through the processing and analyzing function of the computer to determine the data failure of the DMD.

The following embodiments take data line failure and address line failure detection for a DMD as examples, and provide another type of graphics card that can detect both data line failure and address line failure. The graphic card comprises N data line fault detection areas, an address line detection area and Q comparison areas, wherein specific principles of design of the N data line fault detection areas, the address line detection areas and the Q comparison areas can be referred to the related description, and specific explanations are omitted.

Referring to fig. 2c, a schematic flow chart of a method for detecting a data line fault and an address line fault for another graphic card according to the above design is provided, where the method flow includes the following steps:

step 101 c: the projection device including the DMD projects a first image for failure detection (i.e., the above-described graphic card that can detect both a data line failure and an address line failure) onto the receiving screen to obtain a second image displayed on the receiving screen.

Step 102 c: and positioning the data fault of the DMD according to the difference between the second image and the first image.

In this step, data failures of the DMD are specifically divided into data line failures and address line failures, and a specific method for locating the data line failures and the address line failures is consistent with the method in fig. 2a and fig. 2b, which can be referred to the related descriptions in fig. 2a and fig. 2b, and will not be described in detail here.

In the above embodiment of the present invention, the projection device including the DMD projects the first image for fault detection onto the receiving screen to obtain the second image displayed on the receiving screen; and positioning the data fault of the DMD according to the display difference between the second image and the first image. In the scheme provided by the invention, a detection line is marked in the N bit data channel of the data unit for detecting the data line fault in each data line fault detection area, and when the data line has a specific fault, the detection line can generate corresponding color change, so that the data line fault is quickly positioned; corresponding Q block comparison areas are designed according to Q address lines, the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails, and therefore the address line detection area is compared with the Q comparison areas, and the address line fault positioning is achieved.

In the embodiment of the invention, for DMDs with different resolutions, a graphic card with corresponding resolution can be designed for detecting data faults of the DMD. The following embodiment exemplifies the failure detection of a DMD with a resolution of 1920 x 1080, and shows a graphic card for detecting data failure of the DMD. The DMD has 32 data lines, 32 bits of data channels, 4 address lines and 15 longitudinal blocks. The graphic card shown in fig. 2 is used for detecting a data line fault of the DMD, the graphic card shown in fig. 7 is used for detecting an address line fault of the DMD, and the graphic card shown in fig. 9 may be used for detecting both a data line fault of the DMD and an address line fault of the DMD.

As shown in fig. 3, the resolution of the graphic card is 1920 × 1080, which is divided into 32 data line failure detection areas, and there are 4 detection areas in each row direction, so that each detection area may contain 1920/32/4 ═ 15 data units, and each data unit has 32 bit data channels (not shown in the figure). And selecting 10 data units from the 15 data units in each detection area for fault detection, wherein the purpose is to change data lines simultaneously when the selected 10 data units are observed subsequently, so that the phenomenon is more obvious.

In each data cell for data line failure detection in each detection zone, there is one detection line (the detection lines are not shown in fig. 3, and the detection lines can be specifically seen in fig. 4). The detection line in a data unit is located on one of the 32-bit data channels of the data unit, and the number of the data channel is the same as that of the detection area in which the data unit is located. Referring to fig. 4, which is a specific schematic diagram of the detection area 5 in the graphic card shown in fig. 3, the detection line is located in the 5 th data channel of 10 data units for vertical line detection in the detection area 5. The background color of the graphic card is white and the detection lines for detecting DMD data line failures are red.

Similarly, the schematic diagram of the other detection regions is similar to that of fig. 4, except that the positions of the red detection lines in the detection regions are different from those in fig. 4, the data channel position of the red detection line in each data unit is consistent with the number of the detection region in which the data unit is located, and the other detection regions are not specifically described herein.

Referring to fig. 5, a detailed diagram of one data unit of the 10 data units of the detection area 5 shown in fig. 4 is shown. Since the data cell shown in fig. 5 is located in the detection area 5, the red detection line in fig. 5 is located in the 5 th bit data channel among the 32-bit data channels in the data cell. Fig. 5 shows a schematic diagram of only one data unit in the detection area 5, and the schematic diagram of the other 9 data units is the same as that in fig. 5, and will not be described in detail here.

Similarly, the schematic diagram of each data unit in the other detection areas is similar to that in fig. 5, except that the red detection line is located in a different position from that in fig. 5, and the position of the red detection line in each data unit is consistent with the number of the detection area in which the data unit is located, that is, the red detection line in the data unit in the detection area 1 is located in the first data channel, the red detection line in the data unit in the detection area 2 is located in the second data channel, and the positions of the red detection lines in the data units in the other detection areas are analogized in turn, and the data units in the other detection areas are not specifically described herein.

The graphic card shown in fig. 3 is outputted as an image, and is projected and displayed by the DMD. In the projection process, the DMD receives the driving signal corresponding to the graphic card and projects the graphic card onto the receiving screen. By comparing the image projected onto the receiving screen with the graphic card, it is possible to detect a data line failure of the DMD. If a black vertical line appears in the projection display image or the position where the red detection line should be displayed fails to display the red detection line (because the background color in the embodiment of the present invention is white, if an open circuit fault occurs, the red detection line becomes a white vertical line, and the white vertical line is integrated with the background color, so the position where the red detection line is displayed fails to display the red detection line), it indicates that the DMD has a data line fault. Further, the data channel in which the data line failure occurs may be determined, and specifically, the following conditions may be included:

1. if the 5 th data channel is open, the graph card will show the following phenomena: the detection zone 5 appears fully white throughout the card shown in fig. 3, and the other detection zones appear unchanged. The explanation of this phenomenon is specifically as follows: when the 5 th data channel is broken, 60 white vertical lines appear on the whole graphic card, 10 red detection lines are changed into white vertical lines in the detection area 5 of the corresponding 5 th data channel, and the white vertical lines are integrated with the white background color, so that the detection area 5 displays full white at the moment; the other detection zones showed no change, in particular because: there are 10 white vertical lines in other detection areas, only because the background color of the graphic card is white, the 10 white vertical lines and the white background color are merged together, therefore, only 10 red detection lines are seen in other detection areas, and thus the display is unchanged.

Referring to fig. 6, a phenomenon (only the detection area 5 is shown) shown in the detection area 5 when the 5 th data channel has an open circuit fault occurs, and the red detection line disappears compared to the detection area 5 shown in fig. 4.

2. If the 5 th data channel is short-circuited, the graph card will show the following phenomena: in the detection area 5 of the graphic card shown in fig. 3, 10 red detection lines are changed into black detection lines, and in other detection areas, there are 10 red detection lines and 10 black vertical lines. A specific explanation of this phenomenon is as follows: when the 5 th data channel is short-circuited, 60 black vertical lines appear on the whole graphic card, 10 red detection lines become 10 black vertical lines in the detection area 5 corresponding to the 5 th data channel, 10 black vertical lines are added in other detection areas except the 10 red detection lines which originally exist, and the 10 black vertical lines are used for indicating that the 5 th data channel in the corresponding detection area is short-circuited.

Referring to fig. 7, in order to detect a phenomenon displayed by the detection section 5 when the 5 th data channel has a short-circuit failure (only the detection section 5 is displayed), the red detection line is changed to the black detection line as compared with the detection section 5 shown in fig. 4.

3. And if the data line fault occurs in the multi-bit data channel, observing whether the red detection line disappears in the detection area in the graph card, and if the red detection line disappears, indicating that the data channel corresponding to the detection area has an open circuit fault. For example, if red detection line disappears in detection zone 1, detection zone 2, detection zone 3, detection zone 1, detection zone 2, detection zone 3 show completely white, then indicate that 1 st data channel, 2 nd data channel, 3 rd data channel break down. Similarly, in the detection area 1, another two white vertical lines may appear, and these two white vertical lines are used to indicate that the corresponding 2 nd data channel and 3 rd data channel have open circuit faults; another two white vertical lines also appear in the detection area 2, and are used for indicating that the 1 st data channel and the 3 rd data channel have open circuit faults; two other white vertical lines may also appear in the detection area 3 to indicate that the 1 st data channel and the 2 nd data channel have open circuit faults, and three white vertical lines may appear in the detection areas other than the detection areas 1, 2, and 3.

The number of the red detection lines and the number of the red detection lines in the graphic card can be adjusted according to specific conditions, so that the inspection personnel can conveniently observe and take pictures. For example, when the faults of the data lines occur, the red detection line is changed into the white detection line and is integrated with the background color, so that the 1 st data channel can be quickly and accurately determined to have the open circuit fault in the detection area 1 without being influenced by the open circuit faults of the 2 nd data channel and the 3 rd data channel, and the red detection line in the detection area disappears, but the red detection line still exists in the detection area without the faults. Similarly, in the detection areas 2 and 3, the red detection line disappears, it can be quickly and accurately determined that the 2 nd and 3 rd data channels have open circuit faults, and correspondingly, in the detection area 1, another two white vertical lines also appear, and these two white vertical lines are used for indicating that the corresponding 2 nd and 3 rd data channels have open circuit faults, so that when the graphic card is set, the color of the detection line can be changed into another color according to the actual situation, and of course, the color of the background color can be changed according to the actual situation, so as to facilitate observation and recording of the inspector.

In the above embodiment, 10 data units are selected from each data unit, and the number of the selected data units is not specifically limited in the embodiment of the present invention.

Referring to fig. 8, a diagram of a graph card for detecting a block loading fault according to an embodiment of the present invention is shown.

As shown in fig. 8, the resolution of the graph card is 1920 × 1080, and the graph card is divided into 5 blocks, wherein one block detection area and 4 block control areas (block control area 1 to block control area 4) are included. Each block comparison area is divided into two comparison areas with address line faults. As shown in the figure, the block comparison area 1 includes a control area for short-circuit failure phenomenon of the first address line (e.g., an area indicated by "1 short" in the figure) and a control area for open-circuit failure phenomenon (e.g., an area indicated by "1 open" in the figure), the block comparison area 2 includes a control area for short-circuit failure phenomenon of the second address line (e.g., an area indicated by "2 short" in the figure) and a control area for open-circuit failure phenomenon (e.g., an area indicated by "2 open" in the figure), the block comparison area 3 includes a control area for short-circuit failure phenomenon of the third address line (e.g., an area indicated by "3 short" in the figure) and a control area for open-circuit failure phenomenon (e.g., an area indicated by "3 open" in the figure), and the block comparison area 4 includes a control area for short-circuit failure phenomenon of the fourth address line (e.g., an area indicated by "4 open" in the figure).

As can be seen from fig. 8, the arrangement of the black and gray patches in the 4 patch control areas is different. This is because, for a binary 4-bit address line, for example, if the first address line fails, for example, a short circuit occurs, the address line is always 0, and if a normal address shows that: 0000. 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101 and 1110, when the first bit address line has a short-circuit fault, the first bit address line is 0 and still displays according to 0, the first bit address line is 1 and also displays according to 0, and then the address line display is changed to: 0000. 0000, 0010, 0100, 0110, 1000, 1010, 1100, 1110, so that when the first bit address line fails in a short circuit, a failure occurs every other address block, as compared to normal display; if the first address line is disconnected, the first address line is 1 and still displays according to 1, and the first address line is 0 and also displays according to 1, so that the address lines become 0001, 0011, 0101, 0111, 1001, 1011, 1101, 1111, compared with the normal display of the address lines, when the first address line is disconnected, a fault occurs in every other block, and compared with the first address line when short-circuit fault occurs, the block where the fault occurs when the first address line is disconnected is just opposite to the block where the fault occurs when the first address line is short-circuit, as can be seen from fig. 8, when 1 is short, the arrangement mode of the black blocks and the gray blocks is as follows: grey piece, black piece, grey piece, 1 when disconnected, the arrangement of black piece and grey piece is: black blocks, gray blocks, black blocks, gray blocks, black blocks, and black blocks, therefore, the arrangement of 1 short and 1 broken block is just opposite. When other address lines have open circuit and short circuit faults, the arrangement principle of the black blocks and the gray blocks is the same as that of the first address line, and the faulty blocks are opposite, so the arrangement mode of the black blocks and the gray blocks of other address lines is not specifically described. In the embodiment of the present invention, the definition of the address line is: the address line is 4 bits, the lowest bit address line is the first address line, the second bit address line is the second address line, the third bit address line is the third address line, and the highest bit address line is the fourth address line.

Specifically, when an address line fault is detected, the graphic card is input into the DMD as image content to be displayed, if the DMD has a block loading fault, a fault phenomenon occurs in a block detection area, and the arrangement mode of black blocks and gray blocks detected by the block is compared with the arrangement mode of the black blocks and gray blocks in a block comparison area, so that which fault occurs is judged according to the block comparison area. Specifically, when the display of the block detection area is consistent with that of a certain block comparison area, it indicates that the DMD has a fault corresponding to the comparison area, for example, when the short display of the block detection area is consistent with that of 1 in the block comparison area 1, it indicates that the first address line controlling the DMD has a short-circuit fault. The block loading is controlled by 4 address lines, if a certain address line is short-circuited, the numerical value of the address line is always 0, and if the certain address line is open-circuited, the numerical value of the address line is always 1.

The graphic card shown in fig. 8 is outputted as one image, and is projected and displayed by a DMD. In the projection process, the DMD receives the driving signal corresponding to the graphic card and projects the graphic card onto the receiving screen. By comparing the image projected onto the receiving screen with the graphic card, it is possible to detect a data line failure of the DMD. If all white pixel points appear in the projection display image, the DMD is indicated to have address line faults. Further, a particular address line at which an address line failure occurred may be determined, including in particular the following:

if the second address line has an open circuit fault, the display phenomenon of the graphic card is as follows: the arrangement of grey piece and black piece in the piece detection area is unanimous with the arrangement of grey piece and black piece under 2 disconnected contrast areas in the piece contrast area 2, when the piece trouble appears, not only the piece detection area (that is the image leftmost) breaks down, whole image will break down altogether, but because the phenomenon that the trouble appears will be unanimous with the contrast area, consequently can refer to the contrast area, contrast left side detection area, confirm the address line of trouble, and many address lines break down, then need contrast piece contrast area and piece detection area through the permutation and combination, it is complicated only to image, in addition can influence data line when the piece loading trouble appears and detect, data line can probably be covered by the piece loading trouble detection area.

Referring to fig. 9, for the phenomenon displayed by the graphic card when the second address line has an open circuit fault, it can be seen from fig. 9 that the arrangement of the gray blocks and the black blocks in the block detection area is consistent with the arrangement of the gray blocks and the black blocks in the contrast area 2 under the condition of 2 breaks, and the display phenomena are sequentially from top to bottom: two black blocks, two grey blocks, two black blocks and one grey block, thereby judging that the second address line has an open circuit fault, and as seen from fig. 9, when the second address line has a fault, the phenomenon of the second fault can be continued to the whole graphic card, namely, the block detection area is completely black, and the corresponding line displays completely black.

It should be noted that, in the graph card shown in fig. 8, 4 block comparison areas are listed to show the phenomenon when each address line has an open circuit or a short circuit fault, and when detecting which address line has a fault, it is possible to determine which address line has a fault by comparing the phenomenon in the block detection area with the block comparison area.

When a plurality of address lines fail, there are 16 combinations (in this example, the DMD is divided into 15 blocks in the column direction, so the case of the combination in 15 is described) according to the permutation combination, and if a plurality of address lines fail, the short-circuit or open-circuit comparison area of each address line can be compared to determine which address line fails. Therefore, the graphic card can detect the faults of a single address line and can also detect the faults of a plurality of address lines.

When the resolution of the DMD is other resolutions, the number of vertical lines in the case of a data line failure is determined by the number n of data channels and the number of horizontal pixels, and when the resolution of the DMD is 1920 × 1080, for example, the number of data channels is 32, and the number of horizontal pixels is 1920, the number of vertical lines in the case of a data line failure is 1920/32 — 60; the number of blocks and the number of vertical pixels determine the width of the block, and still taking the resolution of the DMD as 1920 × 1080 as an example, the DMD is divided into 15 blocks according to the above embodiment, and the width of each block is 1080/15 — 72.

It can be seen from the above embodiments that, in the embodiments of the present invention, the specific test chart is used to assist in quickly locating the data fault of the DMD, and the detection method makes the fault phenomenon display more intuitive, improves the detection accuracy, and can quickly locate the position and type of the fault, and save the fault finding time.

Referring to fig. 10, a diagram of a card capable of detecting a failure of both a data line and an address line according to an embodiment of the present invention is shown.

As shown in fig. 10, the resolution of the graph card is 1920 × 1080, and the graph card is divided into 32 data line failure detection areas, 1 block detection area, and 4 block comparison areas (block comparison area 1 to block comparison area 4). The operation principle of the 32 data line fault detection areas is the same as that of the graph card shown in fig. 2, the specific description of each detection area and the data units and detection lines therein can be referred to the above related description of fig. 3, and the operation principle of the 1 block detection area and the 4 block comparison area is the same as that of the graph card shown in fig. 7, specifically, the above related description can be referred to, and no specific description is made here.

When the graphic card shown in fig. 10 is used to detect a data failure of the DMD, the graphic card is similarly input to the DMD as image content for display, and based on the phenomenon displayed on the graphic card, the type of the failure can be determined, and the method and principle for determining the data line failure and the address line failure are the same as those in fig. 3 and 8, and will not be specifically explained here.

Referring to fig. 11, a schematic diagram of a graphic card when the data channel 5 is disconnected and the second address line is disconnected according to an embodiment of the present invention is shown.

As shown in FIG. 11, the card is similar to the card shown in FIG. 10, and is divided into 32 vertical line fault detection areas, 1 block detection area and 4 block comparison areas. The operation principle of the 32 vertical line fault detection areas is the same as that of the graph card shown in fig. 2, the specific description of each detection area and the data units and detection lines therein can be referred to the above related description of fig. 3, and the operation principle of the 1 block detection area and the 4 block comparison area is the same as that of the graph card shown in fig. 7, specifically, the above related description can be referred to, and no specific description is made here.

When the data fault of the DMD is detected, the graphic card is input into the DMD as image content to be displayed, the type of the fault can be judged according to the phenomenon displayed by the graphic card, and the position of the fault can be quickly positioned.

For example, as shown in fig. 11, the block detection area displays the following blocks in sequence from top to bottom: two black blocks, two grey blocks, two black blocks, a grey block, and the row that the piece detection zone shows complete black corresponds and shows complete black, and detection zone 5 shows complete white. From this phenomenon, it can be determined that the data failure of the DMD is: the 5 th data channel is open and the second address line is open.

In the above embodiment of the present invention, the DMD is used to project the graphic card for fault detection to the receiving screen, so as to obtain the second image displayed on the receiving screen; the image processing method comprises the steps that a graphic card comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line fault detection area of the N data line fault detection areas comprises one or more data units which are provided with N-bit data channels and used for detecting data line faults, the N-bit data channels correspond to the N data lines of the DMD one by one, each data unit used for detecting the data line faults comprises a detection line, the data channels corresponding to the detection lines in the data units used for detecting the data line faults in each data line fault detection area are different from the other data line fault detection areas, N is an integer larger than or equal to 1, the Q comparison areas correspond to the Q address lines of the DMD one by one, and the image of each comparison area is the same as the image imaging result of the image of the address line detection area when the address line corresponding to the comparison area fails; and comparing the second image with the graphic card to locate the data fault of the DMD. In the scheme provided by the invention, a detection line is marked in the N bit data channel of the data unit for detecting the data line fault in each data line fault detection area, and when the data line has a specific fault, the detection line can generate corresponding color change, so that the data line fault can be positioned; corresponding Q block comparison areas are designed according to Q address lines, the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails, and therefore the address line detection area is compared with the Q comparison areas, and the address line fault positioning is achieved.

Based on the same technical concept, the embodiment of the invention provides equipment and a system for detecting data line faults and detecting address line faults.

Referring to fig. 12, a schematic device structure diagram of a fault detection apparatus according to an embodiment of the present invention is provided.

As shown in fig. 12, the fault detection apparatus includes: an obtaining module 1201 and a detecting module 1202.

An obtaining module 1201, configured to obtain a second image obtained by projecting the first image by the projection device; wherein the first image comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line failure detection area of the N data line failure detection areas contains one or more data units having N-bit data channels for detecting data line failures, the N data channels correspond to N data lines of a DMD of the projection equipment one by one, each data unit for detecting the data line fault comprises a detection line, the data channel corresponding to the detection line in the data unit for detecting the data line fault in each data line fault detection area is different from the data channels corresponding to the detection lines in other data line fault detection areas, N is an integer larger than or equal to 1, the Q comparison areas correspond to Q address lines of the DMD one by one, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails;

a detection module 1202, configured to locate a data failure of the DMD according to a difference between the first image and the second image.

Optionally, the detection module 1202 is specifically configured to:

Optionally, the detection module 1202 is further specifically configured to:

Optionally, the detection module is specifically further configured to:

Referring to fig. 13, a schematic diagram of a system that can detect a failure of a data line and a failure of an address line according to an embodiment of the present invention is provided.

Referring to fig. 13, the system includes: a projection device 1101 and a fault detection device 1102.

The projection device 1101 comprising a DMD, configured to project a graphic card for failure detection onto a receiving screen to obtain a second image displayed on the receiving screen; wherein, the graphic card comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line failure detection area of the N data line failure detection areas contains one or more data units having N-bit data channels for detecting data line failures, the N data channels correspond to N data lines of the DMD one by one, each data unit for detecting data line faults comprises a detection line, the data channel corresponding to the detection line in the data unit for detecting the data line faults in each data line fault detection area is different from the data channels corresponding to the detection lines in other data line fault detection areas, N is an integer greater than or equal to 1, the Q comparison areas correspond to Q address lines of the DMD one by one, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails;

and the fault detection device 1102 is used for comparing the second image with the graphic card and positioning the data fault of the DMD.

Optionally, the fault detection device is configured to:

if display difference exists between a detection line in a K-th data line fault detection area in the second image and a detection line in a corresponding data fault detection area in the graphic card, determining a data line fault corresponding to a data channel according to the data channel corresponding to the detection line in a data unit for detecting the data line fault in the K-th data fault detection area, wherein K is an integer greater than or equal to 1 and less than or equal to N;

Optionally, the fault detection device is specifically configured to:

Optionally, in the graph card, a data channel corresponding to a detection line in each data line fault detection area is a first color, the colors of other data channels are second colors, and the first color is different from the second color; or,

in the graph card, a data unit for detecting a data line fault in each data line fault detection region is divided into a first part and a second part, wherein:

Optionally, the resolution of the graphics card is equal to the resolution of the DMD.

Optionally, the fault detection device is specifically configured to:

In the above embodiment, when the fault detection device locates the fault of the DMD, the following methods may be included:

mode 1: the fault detection equipment is provided with a device with a camera shooting function, the device can shoot a second image which is projected and displayed on the receiving screen by the projection equipment, so that after the fault detection equipment obtains the second image, the first image and the second image can be compared, the data fault of the DMD is positioned, wherein the first image can be stored in the fault detection equipment in advance, and can also be sent to the fault detection equipment by other terminals when the data fault of the DMD is detected.

Mode 2: the projection equipment transmits the second image projected and displayed on the receiving screen to the fault detection equipment, and after the fault detection equipment obtains the second image, the first image and the second image can be compared to locate the data fault of the DMD.

Mode 3: and shooting the second image on the receiving screen through other terminals, transmitting the shot image to the fault detection equipment, and comparing the image with the first image after the fault detection equipment obtains the image shot by the terminal to position the data fault of the DMD.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims

1. A Digital Micromirror Device (DMD) data fault detection method is characterized by comprising the following steps:

the method comprises the steps that a projection device projects a first image used for fault detection to a receiving screen to obtain a second image displayed on the receiving screen; wherein the first image comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line failure detection area of the N data line failure detection areas contains one or more data units having N-bit data channels for detecting data line failures, the N data channels correspond to N data lines of a DMD in the projection equipment one by one, each data unit for detecting the data line fault comprises a detection line, the data channel corresponding to the detection line in the data unit for detecting the data line fault in each data line fault detection area is different from the data channels corresponding to the detection lines in other data line fault detection areas, N is an integer greater than or equal to 1, the Q comparison areas correspond to Q address lines of the DMD one by one, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails;

a data line fault and/or an address line fault of the DMD is located according to a difference between the second image and the first image.

2. The method of claim 1, wherein said locating a data line fault and/or an address line fault of the DMD based on a difference between the second image and the first image comprises:

3. The method according to claim 2, wherein if the detection line in the kth data line fault detection area in the second image is displayed as a color displayed when the corresponding data line has an open circuit fault, determining that the data line corresponding to the data channel has an open circuit fault according to the data channel corresponding to the detection line in the data unit for detecting the data line fault in the kth data fault detection area; or,

4. The method of any of claims 1 to 3, wherein in the first image, the data channel corresponding to the detection line within each data line fault detection zone is a first color, the color of the other data channels is a second color, the first color and the second color being different; or,

5. The method of claim 1, wherein the data units in the data line failure detection region for detecting the data line failure are all or some of the data units contained in the data line failure detection region.

6. The method of claim 1, wherein a number of data lanes corresponding to detection lines in data cells within the data line fault detection region for detecting data line faults is the same as a number of the data line fault detection region.

7. The method of claim 1, wherein a resolution of the first image is equal to a resolution of the DMD.

8. The method of claim 2, wherein each control zone comprises an open fault control zone and/or a short fault control zone;

9. The method of claim 2, wherein if the image in the address line detection area in the second image is the same as the image in the short-circuit fault comparison area in the Kth comparison area in the second image, determining that the address line corresponding to the Kth comparison area has the short-circuit fault; or,

10. The method of claim 1, wherein the address line detection area comprises 2^QAnd each block is identified by using the Q bit address output by the Q address lines, and the colors of two adjacent blocks are different.

11. A Digital Micromirror Device (DMD) data failure detection apparatus, comprising:

and the detection module is used for positioning the data line fault and/or the address line fault of the DMD according to the difference between the first image and the second image.

12. The device of claim 11, wherein the detection module is specifically configured to:

13. The device of claim 12, wherein the detection module is further specifically configured to:

14. The apparatus of claim 12, wherein each control zone comprises an open fault control zone and/or a short fault control zone;

15. The device of claim 12, wherein the detection module is further specifically configured to:

16. A digital micromirror device DMD data failure detection system, comprising:

a projection device including a DMD for projecting a first image for failure detection to a receiving screen; wherein the first image comprises N data line fault detection areas, an address line detection area and Q comparison areas, each data line failure detection area of the N data line failure detection areas contains one or more data units having N-bit data channels for detecting data line failures, the N data channels correspond to N data lines of the DMD one by one, each data unit for detecting data line faults comprises a detection line, the data channel corresponding to the detection line in the data unit for detecting the data line faults in each data line fault detection area is different from the data channels corresponding to the detection lines in other data line fault detection areas, N is an integer greater than or equal to 1, the Q comparison areas correspond to Q address lines of the DMD one by one, and the imaging result of the image of each comparison area is the same as that of the image of the address line detection area when the address line corresponding to the comparison area fails;

and the fault detection equipment is used for acquiring a second image displayed on the receiving screen, comparing the second image with the first image and positioning the fault of the data line or the fault of the address line of the DMD.

17. The system of claim 16, wherein the fault detection device is specifically configured to:

18. The system of claim 17, wherein the fault detection device is specifically configured to:

19. The system of any of claims 16 to 18, wherein in the first image, the data channel corresponding to the detection line in each data line fault detection zone is a first color, the color of the other data channels is a second color, the first color and the second color being different; or,

20. The system of claim 17, wherein each control zone comprises an open fault control zone and/or a short fault control zone;

21. The system of claim 17, wherein the fault detection device is specifically configured to:

22. The system of claim 16, wherein the address line detection area includes 2^QAnd each block is identified by using the Q bit address output by the Q address lines, and the colors of two adjacent blocks are different.