The content of the invention
Present invention seek to address that aviation CCD imaging systems volume and weight are big in the prior art, there is heterogeneity in image
Technical problem, there is provided a kind of aviation CCD imaging systems, to a certain extent reduce system volume and weight, while effectively
The heterogeneity of correction chart picture.
The embodiment provides a kind of aviation CCD imaging systems, the CCD imaging systems include:
Ccd sensor, for converting optical signals to electric signal;
Pre-arcing road, is connected with ccd sensor, and the electric signal for ccd sensor to be exported is amplified operation;
A/D change-over circuits, are connected with pre-arcing road, for the electric signal after amplification to be converted into data signal;
FPGA circuitry, is connected with A/D change-over circuits, for data signal to be carried out into Nonuniformity Correction treatment after pass through
The image output interface output image signal for setting thereon;
RS422 communication interface circuits, are communicated for FPGA circuitry with external host computer;
Also include power circuit, for being powered to the CCD imaging systems;
Wherein, the FPGA circuitry, is additionally operable to send CCD timing control signals to the ccd sensor, and send AD controls
Signal processed gives the A/D change-over circuits;
The ccd sensor and pre-arcing road are arranged on first circuit board, and the power circuit is arranged on second circuit
On plate, the FPGA circuitry, A/D change-over circuits and RS422 communication interface circuits are arranged on tertiary circuit plate, first electricity
Mutually orthogonal arrangement is set between road plate, second circuit board and tertiary circuit plate, first circuit board, second circuit board and the 3rd electricity
It is connected by rigid-flex board respectively between the plate of road.
Preferably, the FPGA circuitry embedded images homogeneity correction algorithm, for passing through diameter in laboratory conditions
20cm exports the integrating sphere in homogeneous radiation source and combines the uniformity by measuring the spectral radiance meter of output radiation brightness
Correcting algorithm calculates correction parameter.
Preferably, the FPGA circuitry is imaged for CCD imaging systems under the conditions of ten kinds of different reference lights shine, according to every
Plant the view data gathered under illumination condition and calculate corresponding correction parameter.
Preferably, isolation buffer circuit is additionally provided with the tertiary circuit plate, the isolation buffer circuit is passed respectively at CCD
Sensor and FPGA circuitry are connected, and the CCD timing control signals for FPGA to be produced enter after over level conversion to be sent to described
Ccd sensor.
Preferably, optical coupling isolation circuit, the optical coupling isolation circuit and the FPGA are additionally provided with the second circuit board
Circuit is connected, for the mechanical shutter control signal of isolation input FPGA circuitry, while for isolating FPGA circuitry output
Mechanical shutter feedback signal.
Preferably, the length of the first circuit board, second circuit board and tertiary circuit plate × a width of 3cm × 3cm.
Preferably, the power circuit includes multiple voltage-stablizers, and power circuit will export the bus electricity in CCD imaging systems
Source is transformed into+1.2V, the power supply of+2.5V ,+5V ,+15V, -1.2V by the voltage-stablizer.
Preferably, the power circuit gives the ccd sensor, pre-arcing road, A/D change-over circuits, FPGA circuitry respectively
And RS422 communication interface circuits are powered.
Preferably, image output circuit is additionally provided with the tertiary circuit plate, described image output circuit passes through the figure
As output interface is connected with the FPGA circuitry, the described image signal for that will receive is converted into view data and is passed
It is defeated.
Embodiments of the invention also provide a kind of aircraft, and the aircraft is equipped with above-mentioned aviation CCD imaging systems.
Compared with prior art, beneficial effect is technical scheme:By by the first circuit board, second
Mutually orthogonal arrangement is set between circuit board and tertiary circuit plate, is connected by rigid-flex board respectively each other, effectively reduces
System bulk, effectively reduces system weight, while there is image non-uniformity correction function in the FPGA circuitry, effectively
The heterogeneity of correction chart picture, improves conventional demarcation efficiency.
Specific embodiment
Specific embodiment of the invention is described further below in conjunction with the accompanying drawings.
As shown in Fig. 2 The embodiment provides a kind of aviation CCD imaging systems, the CCD imaging systems include
Ccd sensor 10, pre-arcing road 20, A/D change-over circuits 30, FPGA circuitry 50, RS422 communication interface circuits 70, power circuit
90;
The ccd sensor 10 is the core devices for realizing opto-electronic conversion, for converting optical signals to electric signal.This reality
In applying example, it is preferable that the ccd detector KAI-1050 of the selection of the ccd sensor 10 KODAK companies of U.S. production.Its is specific
Parameter is as shown in the table:
Parameter |
KAI-1050 |
Valid pixel |
1024(H)×1024(V) |
Scan mode |
Line by line |
Spectral response range |
Visible ray |
Highest frame frequency (full frame) |
120 frames/second |
Whether integrated drive electronics |
It is no |
Whether integrated CDS |
It is no |
Encapsulation |
68pin PGA |
Pre-arcing road 20, is connected with ccd sensor 10, for the electric signal that ccd sensor 10 is exported to be amplified
After treatment, matched with the A/D change-over circuits of rear end.The analog signal of ccd sensor output is for after CDS (correlated-double-sampling)
Signal, output signal range is 0-500mV.In the present embodiment, the prevention circuit 20 is preferably as the high speed of TI companies is double
Channel operation amplifier OPA2282.
A/D change-over circuits 30, are connected with pre-arcing road 20, for the electric signal after amplification to be converted into data signal.
In embodiments of the invention, the out-put dynamic range according to ccd sensor 10 is 58dB, therefore needs the converter circuit of 10 to enter
Row quantifies.Therefore in the present embodiment, it is preferable that the A/D change-over circuits are the binary channels of AD companies, sampling rate reaches 40MSPS
The high-speed AD converter ADS5204 with PGA functions.
FPGA circuitry 50, is connected with A/D change-over circuits 30, after data signal is carried out into Nonuniformity Correction treatment
By the image output interface output image signal for setting thereon.FPGA is the control core of whole system, the FPGA circuitry
50 embedded images homogeneity correction algorithms, the integrating sphere for exporting homogeneous radiation source by diameter 20cm in laboratory conditions
Homogeneity correction algorithm calculating correction parameter is combined with by measuring the spectral radiance meter of output radiation brightness.
RS422 communication interface circuits 70, are communicated for FPGA circuitry 50 with external host computer;RS422 communicating circuits
Complete the communication with master system.FPGA circuitry 50 receives control command by this communicating circuit, while by the state of system
Return to host computer.In the present embodiment, it is preferable that the transmission chip of the RS422 communication interface circuits 70 selects model
The chip of DS26LV31T, the reception chip of the RS422 communication interface circuits 70 selects the chip of model DS26LV32AT,
This is powered to chip using 3.3V, is not only adapted to the RS422 buses of 3.3V, and can be total with the RS422 difference of compatible 5V
The signal of line.
Also include power circuit 90, it is used to be powered to the CCD imaging systems;
Wherein, the FPGA circuitry 50, is additionally operable to send CCD timing control signals to the ccd sensor 10, and send
AD control signals give the A/D change-over circuits 30;
As shown in figure 1, the ccd sensor 10 and pre-arcing road 20 are arranged on first circuit board 1, the power circuit
90 are arranged on second circuit board 2, and the FPGA circuitry 50, A/D change-over circuits 30 and RS422 communication interface circuits 70 are arranged on
On tertiary circuit plate 3, mutually orthogonal arrangement is set between the first circuit board 1, second circuit board 2 and tertiary circuit plate 3, the
One circuit board 1, being connected by rigid-flex board respectively between second circuit board 2 and tertiary circuit plate 3 is powered and transmission signal.
This setup realizes the highly integrated of the circuit components of aviation CCD imaging systems, effectively saves the structure of system
Space, the volume for reducing system and the weight for reducing system.
In the present embodiment, it is preferable that the length of the first circuit board, second circuit board and tertiary circuit plate × wide is respectively
It is 3cm × 3cm.
Further, in an embodiment of the present invention, with FPGA as control centre, by RS422 communication interface circuits 70
Receive control command ccd sensor 10 and A/D change-over circuits 30 are controlled and parameter loading.What FPGA circuitry 50 was produced
By being sent to ccd sensor 10, ccd sensor 10 is passed through by the electric signal that opto-electronic conversion is exported to be put CCD clock signals in advance
Circuit 20 is amplified into A/D change-over circuits 30 and carries out digital quantization, and the data is activation after quantization is to FPGA circuitry 50.Finally
Sent by image output interface after the correcting image signals treatment that FPGA circuitry 50 will finally get.
Because of FPGA embedded images homogeneity correction algorithms, homogeneous radiation source is exported by diameter 20cm in laboratory conditions
Integrating sphere and for measure output radiation brightness spectral radiance meter combining camera system homogeneity correction algorithm calculate
Correction parameter, specially:The FPGA circuitry is imaged for CCD imaging systems under the conditions of ten kinds of different reference lights shine, according to
The view data gathered under every kind of illumination condition calculates corresponding correction parameter.
Further, isolation buffer circuit 40 is additionally provided with the tertiary circuit plate 3, the isolation buffer circuit 40 is distinguished
It is connected in ccd sensor 10 and FPGA circuitry 50, the CCD timing control signals for FPGA circuitry 50 to be produced enter line level
The ccd sensor is sent to after conversion.Ccd signal is it is desirable that the Transistor-Transistor Logic level of 5V standards, and FPGA circuitry is produced is
The Transistor-Transistor Logic level of 3.3V standards, it is therefore desirable to level conversion.In the present embodiment, it is preferable that the isolation buffer circuit selects model
It is the chip of SN74LVC8T245.The chip has the signal switch bus of 8bit.
Preferably, in embodiments of the invention, optical coupling isolation circuit 80, the light are additionally provided with the second circuit board 2
Coupling isolation circuit 80 is connected with the FPGA circuitry 50, for the mechanical shutter control signal of isolation input FPGA circuitry 50,
It is used to isolate the mechanical shutter feedback signal of the output of FPGA circuitry 50 simultaneously;System has mechanical shutter control interface and mechanical shutter
Feedback signal, to avoid influencing each other between imaging system and other systems, control signal uses the optical coupling isolation circuit
50 carry out signal transmission, in this implementation, it is preferable that the optical coupling isolation circuit type selecting is Toshiba Corp's production
TLP621-2。
Further, image output circuit 60 is additionally provided with the tertiary circuit plate 3, described image output circuit 60 passes through
Described image output interface is connected with the FPGA circuitry 50, and the described image signal for that will receive is converted into picture number
According to being transmitted.It is CML that image output uses interface level standard, and it sends chip selection MAX3892 and TLK2501.
MAX3892 serializers are suitable for that 4 bit wides, 622Mbps parallel datas are converted into 2.5Gbps in DWDM and SONET/SDH applications
Serial data.Any static delay between 4x4 FIFO permission parallel output clock and parallel input clock.TLK2501 can
Realize that the high speed image data that serial transmission speed is 1.5Gbps to 2.5Gbps is transmitted.
With reference to shown in Fig. 3, the power circuit 90 includes multiple voltage-stablizers and DC/DC modules, and power circuit 90 will be exported
+ 12V buses power supply in CCD imaging systems passes through the voltage-stablizer and DC/DC block transforms into+1.2V ,+2.5V ,+5V ,+
For whole system, each function component is used the power supply of 15V, -1.2V.As shown in figure 3, the bus power supply of+12V passes through voltage stabilizing
Device LT1936, voltage-stablizer LT1764 and voltage-stablizer FN1112 are converted to+1.2V ,+2.5V;The bus power supply of+12V passes through voltage-stablizer
LT1936 is converted to+5V;The bus power supply of+12V is converted to by DC/DCLT3471, voltage-stablizer LT1936 and DC/DCLT1964
+ 15V, -1.2V.
The power circuit 90 gives the ccd sensor 10, pre-arcing road 20, A/D change-over circuits 30, FPGA circuitry respectively
50 and RS422 communication interface circuits 70 are powered.
Embodiments of the invention also provide a kind of aircraft, and the aircraft is equipped with above-mentioned aviation CCD imaging systems.
The aircraft includes civilian manned aircraft, civilian unmanned plane, military manned aircraft, military unmanned air vehicle and spaceship etc..
The advantage of the aviation CCD imaging systems of the embodiment of the present invention is:
(1), imaging system circuit height is integrated, and three pieces of board designs realize connection using rigid-flex board, to the full extent
The volume and weight of reduction system.
(2), all power supplies of imaging system circuit are provided by bus power supply+12V, and changing the system that obtains by voltage-stablizer needs
The multiple power sources wanted, reduce the power reguirements to airborne platform.
(3), system embedment heterogeneity correcting algorithm, improves conventional demarcation efficiency.
Merely illustrating the principles of the invention described in above-described embodiment and specification and most preferred embodiment, are not departing from this
On the premise of spirit and scope, various changes and modifications of the present invention are possible, and these changes and improvements both fall within requirement and protect
In the scope of the invention of shield.