Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The system architecture and the service scenario described in the embodiment of the present invention are for more clearly illustrating the technical solution of the embodiment of the present invention, and do not form a limitation on the technical solution provided in the embodiment of the present invention, and it can be known by those skilled in the art that the technical solution provided in the embodiment of the present invention is also applicable to similar technical problems along with the evolution of the system architecture and the appearance of a new service scenario.
Technical terms used by embodiments of the present invention include the following:
The ACL is an access control list, and a message identification function implemented by using a TCAM (ternary content addressable memory) lookup device of the switch chip is a general function, and functions of each switch chip of different manufacturers are generally the same.
Internal loopback: the protocol message sent from the port of the switch chip is looped back to the inside of the port of the switch chip.
The basic principle of the invention is as follows: the characteristics of a CPU queue to which a matched message is uploaded can be specified by utilizing a redirect behavior mode, a uploading destination port of the copy behavior mode is firstly modified to be an internal loopback port, the message received by a first port is copied to the internal loopback port through a first ACL rule, then the internal loopback port redirects the protocol message to the specified CPU queue specified by the CPU port through a second ACL rule in the redirect behavior mode, and the behavior of forwarding the protocol message to other second ports is not influenced in the process of uploading the protocol message in the copy behavior mode. Therefore, the queue of the protocol message uploaded to the CPU in a copy behavior mode is reconfigured, and the priority scheduling of the protocol message is ensured.
The above method is described in detail with reference to specific examples. Referring to fig. 1, an embodiment of the present invention is applied to a switching device architecture including: the CPU11 and the switch chip 12, wherein the CPU PORT 121 of the switch chip 12 is connected to the CPU11 through the PCI bus 13, the switch chip 12 further includes a first PORT1 and a second PORT2, and an internal loopback PORT loopback1, wherein the CPU PORT 121, the first PORT1, the second PORT2, and the internal loopback PORT loopback1 may be PORTs that are not distinguished on the switch chip, but are named differently according to the difference of their functions in the embodiment of the present invention.
Based on the above switching device architecture, an embodiment of the present invention provides a message uploading method, which is shown in fig. 2 and includes the following steps:
101. The exchange chip receives the protocol message through the first port, the protocol message is copied to the destination port at the first port according to the first ACL rule, and the destination port is an internal loopback port of the exchange chip.
Wherein, the internal loopback port may be an internal loopback port dedicated for logic of the switch chip, or an internal loopback port set by a physically idle port, where when the idle port is adopted as the internal loopback port, step 101 further includes 100 before, the switch chip configures any idle port of the switch chip as the internal loopback port.
in addition, in step 101, the protocol packet is copied to the internal loopback port by means of copy behavior, and is also forwarded, specifically, the switching chip sends the protocol packet to the second port at the first port, and sends the protocol packet to other devices through the second port. Therefore, the forwarded protocol message is not influenced to be forwarded normally through the second port.
102. And the internal loopback port of the switching chip redirects the protocol message to a specified CPU queue of the CPU port according to a second ACL rule.
Optionally, the above scheme further includes that the switching chip receives a first ACL rule and a second ACL rule issued by the CPU, where the CPU issues the first ACL rule and the second ACL rule to a TCAM space of the switching chip, the priority of the first ACL rule is lower than the priority of the second ACL rule, that is, the first ACL rule is applied to the entire switching chip and does not match any port, that is, any port that receives the protocol packet may match the first ACL rule for subsequent processing, and the second ACL rule is only applied to the ingress direction of the internal loopback port, that is, the step 102 is only executed on the internal loopback port. Thus, after the processing of step 102, the switch chip can assign different CPU queues to the identified different protocol packets, without the behavior of copy to CPU at ACL in the prior art, and because the destination port is the CPU port, the packet to be sent can only be in one queue, and cannot be distinguished from the queue to be sent to CPU (as shown by the dotted arrow in fig. 1). Therefore, under the condition that the CPU port is congested, the protocol message of the CPU queue with low priority is discarded, and the protocol message in the CPU queue with high priority is scheduled.
In the scheme, the exchange chip receives the protocol message through the first port, the protocol message is copied to the target port at the first port according to the first ACL rule, and the target port is an internal loopback port of the exchange chip; firstly copying the protocol message to an internal loopback port by a copy mode according to a first ACL rule, then redirecting the protocol message to a specified CPU queue of a CPU port by an exchange chip according to a second ACL rule at the internal loopback port, namely redirecting the protocol message received by the internal loopback port to the specified CPU queue of the CPU port by a redirect mode, and reconfiguring the queue of the protocol message uploaded to the CPU by the copy mode in the process because the redirect mode can modify the queue of the protocol message uploaded to the CPU, thereby ensuring the priority scheduling of the protocol message.
An embodiment of the invention shown in fig. 2 provides a switch chip, comprising: a first PORT1, an internal loopback PORT loopback1, and a CPU PORT 3;
The first PORT1 is configured to receive a protocol packet, and copy the protocol packet to a destination PORT according to a first ACL rule, where the destination PORT is an internal loopback PORT of the switch chip
loopback1;
The internal loopback PORT loopback1 is configured to redirect the protocol packet copied by the first PORT to a specified CPU queue of the CPU PORT3 according to a second ACL rule.
Optionally, the apparatus further includes a configuration unit CU, configured to configure any idle port of the switch chip as an internal loopback port.
optionally, the switch chip further includes a second PORT2, where the first PORT1 is further configured to send the protocol packet to the second PORT 2; the second PORT2 is configured to send the protocol packet sent by the first PORT to other devices.
Further, the first ACL rule has a lower priority than the second ACL rule. The CPU PORT3 is further configured to receive a first ACL rule and a second ACL rule issued by the CPU.
in the scheme, the exchange chip receives the protocol message through the first port, the protocol message is copied to the target port at the first port according to the first ACL rule, and the target port is an internal loopback port of the exchange chip; firstly copying the protocol message to an internal loopback port by a copy mode according to a first ACL rule, then redirecting the protocol message to a specified CPU queue of a CPU port by an exchange chip according to a second ACL rule at the internal loopback port, namely redirecting the protocol message received by the internal loopback port to the specified CPU queue of the CPU port by a redirect mode, and reconfiguring the queue of the protocol message uploaded to the CPU by the copy mode in the process because the redirect mode can modify the queue of the protocol message uploaded to the CPU, thereby ensuring the priority scheduling of the protocol message.
additionally, a computer-readable medium (or media) is also provided, comprising computer-readable instructions that when executed perform the operations of the method in the above-described embodiments.
Additionally, a computer program product is also provided, comprising the above-described computer-readable medium (or media).
It should be understood that, in various embodiments of the present invention, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
in the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus, and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, and for example, the division of the units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
the above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.