CN106783950B - Gallium nitride semiconductor device and method for manufacturing the same - Google Patents
Gallium nitride semiconductor device and method for manufacturing the same Download PDFInfo
- Publication number
- CN106783950B CN106783950B CN201611180049.5A CN201611180049A CN106783950B CN 106783950 B CN106783950 B CN 106783950B CN 201611180049 A CN201611180049 A CN 201611180049A CN 106783950 B CN106783950 B CN 106783950B
- Authority
- CN
- China
- Prior art keywords
- gallium nitride
- layer
- layers
- doped
- carbon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 95
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 92
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 238000000034 method Methods 0.000 title description 5
- 239000000758 substrate Substances 0.000 claims abstract description 16
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 13
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 10
- 229910052733 gallium Inorganic materials 0.000 claims description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052799 carbon Inorganic materials 0.000 claims description 6
- 230000000873 masking effect Effects 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052594 sapphire Inorganic materials 0.000 claims description 4
- 239000010980 sapphire Substances 0.000 claims description 4
- 230000015556 catabolic process Effects 0.000 abstract description 6
- 238000002360 preparation method Methods 0.000 abstract description 4
- 230000000630 rising effect Effects 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000003446 memory effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
Abstract
The invention relates to a gallium nitride semiconductor device and a preparation method thereof, wherein the gallium nitride semiconductor device comprises a substrate, a buffer layer, a high-impedance layer, an unintentionally doped gallium nitride layer, a channel layer and an electrode which are sequentially laminated; the high-impedance layer comprises a plurality of undoped gallium nitride layers and carbon-doped gallium nitride layers which are alternately grown. In order to improve the breakdown voltage and leakage (leakage) characteristics of the gallium nitride semiconductor device, a plurality of undoped gallium nitride layers (Un-doped GaN) and carbon-doped gallium nitride layers (C-doped GaN) are cross-grown, so that the quality of a high-resistance layer can be improved, the high-resistance layer can be grown thicker, and dislocation with rising bottom can be bent.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a gallium nitride semiconductor device and a preparation method thereof.
Background
Gallium nitride (GaN) semiconductors have the advantage of having a wider energy band gap (eg=3.4 eV) and higher stability at high temperatures (700 ℃) than silicon plates or gallium arsenide (GaAs). GaN power semiconductors also feature low temperature resistance compared to silicon (Si) power semiconductors, which has the advantage of minimizing switching losses and minimizing system power consumption when the power semiconductor is started.
As new generation power devices capable of realizing miniaturization, high voltage, low loss at high conversion, and high efficiency, gaN semiconductor devices are in increasing demand in fields such as industry, power grid, information Communication (ICT), and the like. However, since high quality GaN required for GaN power semiconductors is difficult to purchase, it is difficult to grow the GaN film by using a different substrate such as sapphire or a silicon substrate, and it is difficult to achieve a high breakdown voltage due to the low quality of the GaN film itself caused by the difference in physical characteristics (Breakdown voltage).
High quality buffer (buffer) layer growth is required in order to achieve high breakdown voltage in power devices using GaN.
GaN film growth relies on the natural property of prime with N-type, and a method of doping iron (Fe) or carbon (C) as a receptor (receptor) is used for flexible application, so that a high-impedance layer is realized through N-hole (N-vacuum) compensation.
However, it is difficult to ensure uniform characteristics by virtue of the memory effect in the chamber (chamber), and the carbon-doped gallium nitride layer is grown at a low temperature with a rapid growth rate, which has problems of low quality and difficulty in thickening.
Disclosure of Invention
Based on this, it is an object of the present invention to provide a gallium nitride semiconductor device with improved high-resistance layer quality.
The specific technical scheme is as follows:
a gallium nitride semiconductor device comprises a substrate, a buffer layer, a high-impedance layer, an unintentionally doped gallium nitride layer, a channel layer, an aluminum gallium nitride layer and an electrode layer which are sequentially stacked; the high-impedance layer comprises a plurality of undoped gallium nitride layers and carbon-doped gallium nitride layers which are alternately grown.
In some embodiments, the total number of layers of the undoped gallium nitride layer and the carbon-doped gallium nitride layer is more than or equal to 10, the thickness of the undoped gallium nitride layer is 1nm-500nm, and the thickness of the carbon-doped gallium nitride layer is 1nm-500nm.
In some of these embodiments, the carbon doped gallium nitride layer has a carbon doping level of 1×10 16 /cm 3 -1×10 20 /cm 3 。
In some of these embodiments, the high impedance layer has a thickness of 100nm-5 μm.
In some of these embodiments, the unintentionally doped gallium nitride layer comprises a plurality of strain control layers and a plurality of masking layers, the number of layers of the strain control layers being greater than or equal to 0; the number of the masking layers is more than or equal to 0.
In some embodiments, the buffer layer is made of gallium nitride, aluminum nitride or gallium aluminum nitride.
In some of these embodiments, the channel layer is an unintentionally doped gallium nitride layer.
In some embodiments, the substrate is made of sapphire, gallium nitride or silicon.
Another object of the present invention is to provide a method for manufacturing the above gallium nitride semiconductor device.
The specific technical scheme is as follows:
the preparation method of the gallium nitride semiconductor device comprises the following steps:
providing a substrate;
forming a buffer layer on the substrate;
forming a high-resistance layer on the buffer layer, wherein the high-resistance layer comprises a plurality of layers of undoped gallium nitride layers and carbon-doped gallium nitride layers which are alternately grown;
forming an unintentionally doped gallium nitride layer on the high-resistance layer;
forming a channel layer on the unintentionally doped gallium nitride layer;
forming a gallium aluminum nitride layer on the channel layer;
and forming an electrode layer on the gallium aluminum nitride layer.
In order to improve the breakdown voltage and leakage (leakage) characteristics of the gallium nitride semiconductor device, multiple layers of undoped gallium nitride layers (Un-doped GaN) and carbon-doped gallium nitride layers (C-doped GaN) are cross-grown, so that the quality of the high-resistance layer can be improved, the high-resistance layer can be grown thicker, and dislocation with raised bottom can be bent.
Drawings
Fig. 1 is a schematic cross-sectional view of a conventional gallium nitride semiconductor device;
fig. 2 is a schematic cross-sectional view of an embodiment gallium nitride semiconductor device.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Referring to fig. 2, a gallium nitride semiconductor device (fig. 2) includes a substrate, a buffer layer, a high-resistance layer, an unintentionally doped gallium nitride layer, a channel layer, an aluminum gallium nitride layer, and an electrode layer, which are sequentially stacked;
the substrate is a sapphire, gallium nitride or silicon substrate;
the buffer layer is made of gallium nitride, aluminum nitride or gallium aluminum nitride;
the high-impedance layer comprises a plurality of undoped gallium nitride layers and carbon-doped gallium nitride layers which are alternately grown; the total number of layers of the undoped gallium nitride layer and the carbon-doped gallium nitride layer is more than or equal to 10, the thickness of the undoped gallium nitride layer is 1nm-500nm, and the thickness of the carbon-doped gallium nitride layer is 1nm-500nm; the doping amount of carbon in the carbon-doped gallium nitride layer is 1 multiplied by 10 16 /cm 3 -1×10 20 /cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the high-impedance layer is 100nm-500um;
it can be appreciated that, in order to improve the thickness and crystallinity of the unintentionally doped gallium nitride layer, the unintentionally doped gallium nitride layer further comprises a plurality of strain control layers and a plurality of masking layers, wherein the number of the strain control layers is more than or equal to 0; the number of the masking layers is more than or equal to 0;
the channel layer is an unintentionally doped gallium nitride layer.
The preparation method of the gallium nitride semiconductor device comprises the following steps:
providing a substrate;
forming a buffer layer on the substrate;
forming a high-resistance layer on the buffer layer, wherein the high-resistance layer comprises a plurality of layers of undoped gallium nitride layers and carbon-doped gallium nitride layers which are alternately grown;
forming an unintentionally doped gallium nitride layer on the high-resistance layer;
forming a channel layer on the unintentionally doped gallium nitride layer;
forming a gallium aluminum nitride layer on the channel layer;
and forming an electrode layer on the gallium aluminum nitride layer.
The gallium nitride semiconductor device of the prior art (fig. 1) stacks a carbon-doped gallium nitride layer on an unintentionally doped gallium nitride layer, which has low quality and large thickness. In the gallium nitride semiconductor device of this embodiment, in order to improve the breakdown voltage and leakage (leakage) characteristics, multiple layers of undoped gallium nitride layers (Un-doped GaN) and carbon-doped gallium nitride layers (C-doped GaN) are cross-grown, so that the quality of the high-resistance layer can be improved, the high-resistance layer can be grown thicker, and the dislocation with the raised bottom can be bent.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (2)
1. The gallium nitride semiconductor device is characterized by comprising a substrate, a buffer layer, a high-impedance layer, an unintentional doped gallium nitride layer, a channel layer, a gallium aluminum nitride layer and an electrode layer which are sequentially stacked; the high-impedance layer comprises a plurality of undoped gallium nitride layers and carbon-doped gallium nitride layers which are alternately grown;
the total number of layers of the undoped gallium nitride layer and the carbon-doped gallium nitride layer is more than or equal to 10, the thickness of the undoped gallium nitride layer is 1nm-500nm, and the thickness of the carbon-doped gallium nitride layer is 1nm-500nm; the thickness of the high-impedance layer is 100nm-5 mu m;
the carbon is doped with nitrogenThe doping amount of carbon in the gallium nitride layer is 1×10 16 /cm 3 -1×10 20 /cm 3 ;
The unintentional doped gallium nitride layer comprises a plurality of strain control layers and a plurality of masking layers, wherein the number of layers of the strain control layers is more than 0; the number of layers of the masking layer is more than 0;
the buffer layer is made of gallium nitride, aluminum nitride or gallium aluminum nitride;
the channel layer is an unintentionally doped gallium nitride layer;
the substrate is made of sapphire, gallium nitride or silicon.
2. A method of manufacturing a gallium nitride semiconductor device according to claim 1, comprising the steps of:
providing a substrate;
forming a buffer layer on the substrate;
forming a high-resistance layer on the buffer layer, wherein the high-resistance layer comprises a plurality of layers of undoped gallium nitride layers and carbon-doped gallium nitride layers which are alternately grown;
forming an unintentionally doped gallium nitride layer on the high-resistance layer;
forming a channel layer on the unintentionally doped gallium nitride layer;
forming a gallium aluminum nitride layer on the channel layer;
and forming an electrode layer on the gallium aluminum nitride layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611180049.5A CN106783950B (en) | 2016-12-19 | 2016-12-19 | Gallium nitride semiconductor device and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611180049.5A CN106783950B (en) | 2016-12-19 | 2016-12-19 | Gallium nitride semiconductor device and method for manufacturing the same |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106783950A CN106783950A (en) | 2017-05-31 |
CN106783950B true CN106783950B (en) | 2024-02-13 |
Family
ID=58890790
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201611180049.5A Active CN106783950B (en) | 2016-12-19 | 2016-12-19 | Gallium nitride semiconductor device and method for manufacturing the same |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106783950B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108054097B (en) * | 2017-12-13 | 2020-12-18 | 英诺赛科(珠海)科技有限公司 | GaN semiconductor device and preparation method thereof |
CN110643934A (en) * | 2019-09-20 | 2020-01-03 | 深圳市晶相技术有限公司 | Semiconductor device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103489896A (en) * | 2012-06-12 | 2014-01-01 | 三星电子株式会社 | Gallium nitride based semiconductor device and method of manufacturing the same |
CN106158946A (en) * | 2014-10-02 | 2016-11-23 | 株式会社东芝 | There is the HEMT of the periodically gallium nitride of carbon doping |
CN206532782U (en) * | 2016-12-19 | 2017-09-29 | 英诺赛科(珠海)科技有限公司 | Gallium nitride semiconductor device |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6239499B2 (en) * | 2012-03-16 | 2017-11-29 | 古河電気工業株式会社 | Semiconductor laminated substrate, semiconductor element, and manufacturing method thereof |
-
2016
- 2016-12-19 CN CN201611180049.5A patent/CN106783950B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103489896A (en) * | 2012-06-12 | 2014-01-01 | 三星电子株式会社 | Gallium nitride based semiconductor device and method of manufacturing the same |
CN106158946A (en) * | 2014-10-02 | 2016-11-23 | 株式会社东芝 | There is the HEMT of the periodically gallium nitride of carbon doping |
CN206532782U (en) * | 2016-12-19 | 2017-09-29 | 英诺赛科(珠海)科技有限公司 | Gallium nitride semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
CN106783950A (en) | 2017-05-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2009260397A5 (en) | ||
US8878248B2 (en) | Semiconductor device and fabrication method | |
CN103035791B (en) | A kind of epitaxial wafer of light-emitting diode and manufacture method thereof | |
JP2014053639A (en) | Manufacturing method of epitaxial substrate for semiconductor element | |
CN106024914A (en) | GaN-based schottky diode having hybrid anode electrode structure and preparation method thereof | |
CN106098757B (en) | Field effect transistor | |
JP2009158528A (en) | Semiconductor device | |
JPWO2012026396A1 (en) | Epitaxial substrate for semiconductor element, semiconductor element, method for producing epitaxial substrate for semiconductor element, and method for producing semiconductor element | |
CN103828030A (en) | Semiconductor element, HEMT element, and method for manufacturing semiconductor element | |
CN103003931A (en) | Epitaxial substrate for semiconductor element, semiconductor element, pn junction diode, and production method for epitaxial substrate for semiconductor element | |
CN102623494A (en) | Nitride semiconductor device and method for manufacturing same | |
JP2011082331A (en) | Semiconductor element | |
CN106783950B (en) | Gallium nitride semiconductor device and method for manufacturing the same | |
JP2019208022A (en) | Iii-n semiconductor structure and formation method of iii-n semiconductor structure | |
TW201831741A (en) | Nitride semiconductor epitaxial stack structure and power device thereof | |
JP2015179781A (en) | Method for producing silicon carbide epitaxial substrate, method for producing semiconductor device, and semiconductor device | |
JP2010267658A (en) | Epitaxial substrate for semiconductor device, semiconductor device, and method of manufacturing epitaxial substrate for semiconductor device | |
Zubair et al. | First demonstration of GaN vertical power FinFETs on engineered substrate | |
CN115842042A (en) | Epitaxial layer structure and preparation method and application thereof | |
JP5415668B2 (en) | Semiconductor element | |
CN102576679A (en) | Semiconductor element, hemt element, and production method for semiconductor element | |
US20180240877A1 (en) | Transistor | |
CN112750904B (en) | Semiconductor element with stress relaxation layer | |
JP2019186316A (en) | Transistor manufacturing method | |
KR101377165B1 (en) | High electron mobility transistor in serial connection and method for forming thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |