CN106776428B - Terminal device, read-write device, data transmission system and hardware initialization method - Google Patents
Terminal device, read-write device, data transmission system and hardware initialization method Download PDFInfo
- Publication number
- CN106776428B CN106776428B CN201611110061.9A CN201611110061A CN106776428B CN 106776428 B CN106776428 B CN 106776428B CN 201611110061 A CN201611110061 A CN 201611110061A CN 106776428 B CN106776428 B CN 106776428B
- Authority
- CN
- China
- Prior art keywords
- resistor
- controller
- serial bus
- universal serial
- bus interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Information Transfer Systems (AREA)
Abstract
The embodiment of the invention discloses a terminal device, a read-write device, a data transmission system and a hardware initialization method, wherein a first universal serial bus interface, an uplink port, a downlink port, a change-over switch, a first controller, a first switch circuit and other circuit devices are configured in the terminal device, a second universal serial bus interface, a second controller, a trigger circuit, a second switch circuit, a third switch circuit and other circuit devices are configured in the read-write device, so that after the terminal device is connected with the read-write device, the terminal device can be controlled by the read-write device through the first universal serial bus interface and the second universal serial bus interface, and the terminal device transmits data according to a command sent by the read-write device. The technical scheme of the embodiment of the invention realizes that when the equipment configured with the universal serial bus interface is connected with the external equipment through the universal serial bus interface, the external equipment can actively read the internal data of the equipment configured with the universal serial bus interface.
Description
Technical Field
The embodiment of the invention relates to a data transmission technology, in particular to a terminal device, a read-write device, a data transmission system and a hardware initialization method.
Background
USB (Universal Serial Bus) is an external Bus standard for standardizing the connection and communication between a computer and external devices. USB has been successfully substituted for serial and parallel ports since its release in 1996 and has become one of the necessary interfaces for personal computers and a large number of intelligent devices in the twenty-first century.
With the popularization of USB interfaces, more and more devices (e.g., smart phones, tablets, etc.) are configured with USB interfaces and transmit data through the USB interfaces. When data is transmitted through the USB interface, generally, the device configured with the USB female port controls the whole data transmission process, and the external device connected to the device configured with the USB female port through the USB male port only completes the related operations of data transmission according to the command of the device configured with the USB female port, and does not play any leading role.
No matter the equipment configured with the USB female port has any fault, the data stored in the equipment cannot be read by other equipment through the USB connection.
Disclosure of Invention
In view of this, embodiments of the present invention provide a terminal device, a read-write device, a data transmission system, and a hardware initialization method, so as to solve the technical problem in the prior art that no matter what kind of fault occurs to a device configured with a usb interface, internal data cannot be read through usb interface connection.
In a first aspect, an embodiment of the present invention provides a terminal device, including:
the device comprises a first universal serial bus interface, an uplink port, a downlink port, a selector switch, a first controller and a first switch circuit;
the first universal serial bus interface is used for being connected with a second universal serial bus interface of external equipment, and a signal pin of the first universal serial bus interface is grounded; the uplink port and the downlink port are both connected with the data transmission end of the first universal serial bus interface through the selector switch, and the on-off state is switched through the selector switch; the first end of the first switch circuit is connected with a power pin of the first universal serial bus interface, and the second end of the first switch circuit is connected with a power supply;
a first control end of the first controller is connected with a controlled end of the selector switch, and sends a signal to control the selector switch to switch between the uplink port and the downlink port; the second control end of the first controller is connected with the controlled end of the first switch circuit, and sends a signal to control the on-off of the first switch circuit; and the signal input end of the first controller is accessed to the voltage detection data of the power supply pin of the first universal serial bus interface, and sends signals to the selector switch and the first switch circuit according to the voltage detection data.
In the above apparatus, it is preferable that the apparatus further comprises:
and a first end of the current limiting circuit is connected with a power pin of the first universal serial bus interface, a third end of the current limiting circuit is connected with a signal input end of the first controller, and a second end of the current limiting circuit is connected with a first end of the first switch circuit.
In the above device, preferably, the current limiting circuit includes: a current limiting switch, a resistor R1 and a resistor R2; a first end of the current limiting switch is connected with a first end of the resistor R1 and a power pin of the first universal serial bus interface, and a second end of the current limiting switch is connected with a first end of the first switch circuit; a second terminal of the resistor R1 is connected to a first terminal of the resistor R2 and a signal input terminal of the first controller; the second end of the resistor R2 is connected to ground.
In the above apparatus, it is preferable that the first switching circuit includes: the resistor R3, the resistor R4, the resistor R5, the triode Q2 and the MOS transistor Q1; a first end of the resistor R3 is connected with a second control end of the first controller; the second end of the resistor R3 is connected with the base of the triode Q2; the emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected with the first end of the resistor R4 and the first end of the resistor R5; the second end of the resistor R4 is connected with the source electrode of the MOS transistor Q1 and is connected with a power supply; the second end of the resistor R5 is connected with the gate of the MOS transistor Q1; the drain electrode of the MOS tube Q1 is connected with the second end of the current limiting circuit.
In a second aspect, an embodiment of the present invention provides a read/write device, including:
the second universal serial bus interface, the second controller, the trigger circuit, the second switch circuit and the third switch circuit; a signal pin of the second universal serial bus interface is connected with a detection end of the trigger circuit, a signal input end of the second controller is connected with a feedback end of the trigger circuit, and a signal is sent to the third switch circuit according to the change of the voltage of the feedback end of the trigger circuit;
the signal pin of the second universal serial bus interface is used for being connected with the signal pin of the first universal serial bus interface; the data processing end of the second controller is connected with the data transmission end of the second universal serial bus interface so as to read and write data through the second universal serial bus interface; the first control end of the second controller is connected with the controlled end of the second switch circuit and sends a signal to control the on-off of the second switch circuit; a second control end of the second controller is connected with a controlled end of the third switch circuit and sends a signal to control the on-off of the third switch circuit; a first end of the second switch circuit is connected with a power supply, and a second end of the second switch circuit is connected with a power supply pin of the second universal serial bus interface; the first end of the third switch circuit is connected with the power pin of the second universal serial bus interface, and the second end of the third switch circuit is grounded.
In the above device, preferably, the trigger circuit includes a transistor Q3, a resistor R6, a resistor R7, and a resistor R8, and a first end of the resistor R6 is connected to a signal pin of the second universal serial bus interface; the second end of the resistor R6 is connected with the base of the triode Q3 and the first end of the resistor R7; the second end of the resistor R7 is connected with the first end of the resistor R8 and is connected with +5V voltage; a second terminal of the resistor R8 is connected to a collector of the transistor Q3 and a signal input terminal of the second controller; the emitter of the transistor Q3 is grounded.
In the above apparatus, it is preferable that the second switch circuit includes a resistor R9, a resistor R10, a resistor R11, a transistor Q4, and a MOS transistor Q5; a first end of the resistor R9 is connected with a first control end of the second controller; the second end of the resistor R9 is connected with the base of the triode Q4; the emitter of the transistor Q4 is grounded, and the collector of the transistor Q4 is connected with the first end of the resistor R10 and the first end of the resistor R11; the second end of the resistor R10 is connected with the source electrode of the MOS transistor Q5 and is connected with a power supply; the second end of the resistor R11 is connected with the gate of the MOS transistor Q5; and the drain electrode of the MOS tube Q5 is connected with a power supply pin of the second universal serial bus interface.
In the above apparatus, it is preferable that the third switching circuit includes a resistor R13, a resistor R12, and a transistor Q6; a first end of the resistor R13 is connected with a second control end of the second controller, and a second end of the resistor R13 is connected with a base electrode of the triode Q6; the emitter of the transistor Q6 is grounded, the collector of the transistor Q6 is connected to the first terminal of the resistor R12, and the second terminal of the resistor R12 is connected to the power pin of the second usb interface.
In a third aspect, an embodiment of the present invention provides a data transmission system, including the terminal device and the read-write device described above.
In a fourth aspect, an embodiment of the present invention provides a hardware initialization method, used in the foregoing data transmission system, including:
the first controller conducts the first switch circuit and switches the selector switch to conduct the downlink port; the second controller turns off the second switching circuit and the third switching circuit;
when the second controller receives an effective signal which is detected by the trigger circuit and indicates that the second universal serial bus interface is inserted into the first universal serial bus interface, the second controller conducts the third switch circuit and starts timing;
when the power pin of the first universal serial bus interface is grounded, the signal input end of the first controller detects that the input is 0, the change-over switch is switched to be connected with the uplink port, and the first switch circuit is disconnected;
when the timing reaches the preset duration, the second controller conducts the second switch circuit and disconnects the third switch circuit.
In the above method, preferably, after the timing reaches a preset time period, the second controller turns on the second switch circuit and turns off the third switch circuit, the method further includes:
when the signal input end of the first controller detects that the input is changed from high level to low level, the change-over switch is switched to conduct the downlink port;
when the second controller receives a valid signal which is detected by the trigger circuit and represents that the second universal serial bus interface is disconnected from the first universal serial bus interface, the second controller disconnects the second switch circuit and the third switch circuit.
The terminal device, the read-write device, the data transmission system and the hardware initialization method provided by the embodiment of the invention have the advantages that by configuring circuit devices such as the first universal serial bus interface, the uplink port, the downlink port, the switch, the first controller, the first switch circuit and the like in the terminal device, and configuring circuit devices such as the second universal serial bus interface, the second controller, the trigger circuit, the second switch circuit, the third switch circuit and the like in the read-write device, after the terminal device is connected with the read-write device, the terminal device can be controlled by the read-write device through the first universal serial bus interface and the second universal serial bus interface, and the terminal device transmits data according to a command sent by the read-write device, so that the technical problem that no matter what kind of fault occurs to the device configured with the universal serial bus interface in the prior art, the data in the terminal device can not be read through the universal serial bus interface connection is solved, when the device configured with the universal serial bus interface is connected with the external device through the universal serial bus interface, the external device can actively read the internal data of the device configured with the universal serial bus interface.
Drawings
Fig. 1a is a structural diagram of a terminal device according to an embodiment of the present invention;
fig. 1b is a structural diagram of a first switch circuit according to an embodiment of the present invention;
fig. 1c is a connection diagram between a usb interface and a usb device using the usb interface as an uplink port according to an embodiment of the present invention;
fig. 2 is a structural diagram of another terminal device according to a second embodiment of the present invention;
fig. 3a is a structural diagram of a read-write device according to a third embodiment of the present invention;
fig. 3b is a structural diagram of a second switching device according to a third embodiment of the present invention;
fig. 4 is a flowchart of a hardware initialization method according to a fifth embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in further detail below with reference to the accompanying drawings. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention.
It should be further noted that, for the convenience of description, only some but not all of the relevant aspects of the present invention are shown in the drawings. Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the operations (or steps) as a sequential process, many of the operations can be performed in parallel, concurrently or simultaneously. In addition, the order of the operations may be re-arranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.
In the present invention, the terms "connected", "connecting", and the like mean electrically connected, and mean directly or indirectly electrically connected unless otherwise specified.
It should be noted that those skilled in the art can make modifications to the specific embodiments of the invention without departing from the scope of the claims. Accordingly, the scope of the claimed invention is not limited to the foregoing embodiments.
Example one
Fig. 1a is a structural diagram of a terminal device according to an embodiment of the present invention, where the structure of the terminal device in this embodiment specifically includes:
a first universal serial bus interface 110, an upstream port 150, a downstream port 160, a switch 170, a first controller 140, and a first switch circuit 130;
a first usb interface 110 for connecting with a usb interface of an external device, and a signal pin thereof is grounded; the uplink port 150 and the downlink port 160 are both connected with the data transmission end of the first usb interface 110 through the switch 170, and the on-off state is switched through the switch 170; a first end of the first switch circuit 130 is connected to a power pin of the first usb interface 110, and a second end of the first switch circuit 130 is connected to a power supply, which is a System power supply of 5V, i.e., System 5V;
a first control end of the first controller 140 is connected to a controlled end of the Switch 170, and the transmit signal Switch CTL controls the Switch 170 to Switch between the upstream port and the downstream port; a second control end of the first controller 140 is connected to a controlled end of the first switch circuit 130, and sends a signal 5V _ CTL to control on/off of the first switch circuit 130; the signal input terminal of the first controller 140 receives the voltage detection data of the power pin of the first usb interface 110, and sends signals Switch CTL and 5V _ CTL to the Switch 170 and the first Switch circuit 130 according to the voltage detection data.
Further, as shown in fig. 1b, the first switch circuit 130 is optimized to: the circuit comprises a resistor R3, a resistor R4, a resistor R5, a triode Q2 and a MOS transistor Q1; a first terminal of the resistor R3 is connected to a second control terminal of the first controller 140 for receiving the signal 5V _ CTL; the second end of the resistor R3 is connected with the base of the triode Q2; the emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected with the first end of the resistor R4 and the first end of the resistor R5; the second end of the resistor R4 is connected with the source electrode of the MOS tube Q1 and is connected with a power System 5V; the second end of the resistor R5 is connected with the gate of the MOS transistor Q1; the drain of the MOS transistor Q1 is connected to the second terminal of the current limiting circuit 120 for receiving the power VCC _ out.
As shown in fig. 1a and 1b, when the terminal device is in the initial state, the output signal 5V _ CTL at the second control end of the first controller 140 is at a high level, so that the input of the controlled end of the first switch circuit 130 is at a high level, that is, the input of the first end of the resistor R3 is at a high level, so that the transistor Q2 is turned on, and meanwhile, the second end of the resistor R4 is connected to the power System 5V, so that the MOS transistor Q1 is turned on, and further the connected power System 5V is output from the drain of the Q1 to the power pin of the first usb interface 110 through the MOS transistor Q1.
Since the input of the power pin of the first usb interface 110 is high level System 5V, that is, the voltage detection data of the power pin of the first usb interface 110 is high level, in this embodiment, the voltage detection data of the power pin of the first usb interface 110 is defined as 5V Det, therefore, the signal 5V Det input by the signal input end of the first controller 140 is high level, when the first controller 140 detects that the input signal 5V Det is high level, the first controller 140 controls the Switch 170 to Switch to the downlink port 160 through the first control end output control signal Switch CTL, so that the data transmission end of the first usb interface 110 is connected to the downlink port 160.
FIG. 1c shows the device 310 with the USB interface as the upstream port, where the housing and signal pins of the USB interface are grounded. After the usb interface in fig. 1c is inserted into the first usb interface 110 in fig. 1a, the inside of the terminal device in fig. 1a does not change, and the terminal device continues to maintain the initial state, and can normally communicate with the device in fig. 1c that uses the usb interface as the uplink port to perform data transmission.
In addition, when the terminal device in this embodiment needs to be read by another device, after the first usb interface 110 in fig. 1a is inserted into the usb interface of the dedicated reading device, the power supply pin of the first usb interface 110 is grounded, so that the input signal 5V Det of the first controller 140 is 0, and when the first controller 140 detects that the input signal 5V Det is 0, the first controller 140 changes the output signal 5V _ CTL to 0, so that the input of the controlled end of the first switch circuit 130 is 0, which causes the transistor Q2 to be turned off, and the MOS transistor Q1 to be turned off, and the power supply System 5V accessed by the resistor R4 cannot be output to the power supply pin of the first usb interface 110 through the MOS transistor Q1. When the first controller 140 detects that the input signal 5V Det is changed to 0, it also controls the switch 170 to switch to the uplink port 150, so that the transition from the downlink port to the uplink port of the first usb interface 110 is completed.
It should be noted that, in this embodiment and all the following embodiments, the downlink port specifically refers to a usb interface that supplies power to another usb interface that is connected to the usb interface during data transmission through the usb interface, and plays a dominant role during data transmission. Accordingly, the "another usb interface" is the upstream port. That is, the terms "upstream" and "downstream" are not used to refer to the flow direction of data during data transmission, but are named for the difference between the master status and the slave status of two usb interfaces that are connected to each other during data transmission.
According to the terminal device provided by the embodiment of the invention, the first universal serial bus interface 110, the uplink port 150, the downlink port 160, the change-over switch 170, the first controller 140, the first switch circuit 130 and other circuit devices are configured in the terminal device, so that the first universal serial bus interface 110 can be multiplexed into the downlink port 160 or the uplink port 150, the technical problem that data in the device configured with the universal serial bus interface cannot be read through the universal serial bus interface connection no matter what kind of fault occurs in the device in the prior art is solved, and the external device can actively read the internal data of the device configured with the universal serial bus interface when the device configured with the universal serial bus interface is connected with the external device through the universal serial bus interface.
Example two
The second embodiment of the invention provides a structure diagram of terminal equipment. The present embodiment is optimized based on the above embodiment, and in the present embodiment, as shown in fig. 2, the method further includes: a current limiting circuit 120, a first end of the current limiting circuit 120 is connected to a power supply pin (i.e. a pin outputting or accessing + 5V) of the first usb interface 110, a third end of the current limiting circuit 120 is connected to a signal input end of the first controller 140 for outputting a signal 5V Det, and a second end of the current limiting circuit 120 is connected to a first end of the first switch circuit 130;
further, current limit circuit 120 is optimized to: the current limiting switch 180, the resistor R1 and the resistor R2 are included; a first terminal of the current limiting switch 180 is connected to a first terminal of the resistor R1 and a power pin of the first USB interface 110, and is configured to output a power supply voltage USB5V to the power pin of the first USB interface 110, and a second terminal of the current limiting switch 180 is connected to a first terminal of the first switch circuit 130; a second terminal of the resistor R1 is connected to a first terminal of the resistor R2 and a signal input terminal of the first controller 140; the second terminal of resistor R2 is connected to ground.
As shown in fig. 2, when the terminal device is in the initial state, the second control terminal output signal 5V _ CTL of the first controller 140 is at a high level, so that the controlled terminal input of the first switch circuit 130 is at a high level, that is, the first terminal input of the resistor R3 is at a high level, so that the transistor Q2 is turned on, and meanwhile, the second terminal of the resistor R4 is connected to the power System 5V, so that the MOS transistor Q1 is turned on, and further, the connected power System 5V is output from the drain of the Q1 to the second terminal of the current limiting circuit 120, that is, the second terminal of the current limiting switch 180 through the MOS transistor Q1.
After the second terminal of the current limiting Switch 180 is connected to the power System 5V output by the drain of the MOS transistor Q1, the System 5V is output to the power pin of the first usb interface 110 through the current limiting Switch 180, and meanwhile, the System 5V is grounded through the resistor R1 and the resistor R2, so that the second terminal of the resistor R1 (connected to the first terminal of the resistor R2) is at a high level, therefore, the input signal 5V Det of the first controller 140 is at a high level, when the first controller 140 detects that the input signal 5V Det is at a high level, the first controller 140 outputs the control signal Switch CTL to control the Switch 170 to Switch to the downlink port 160 through the first control terminal, so that the data transmission terminal of the first usb interface 110 is connected to the downlink port 160.
After the device 310 in fig. 1c that uses the usb interface as the uplink port is inserted into the first usb interface 110 in fig. 2, the internal state of the terminal device in fig. 2 does not change, and the terminal device continues to maintain the initial state, and can normally communicate with the device in fig. 1c that uses the usb interface as the uplink port to perform data transmission.
In addition, there is also a case where, when the terminal device in the present embodiment needs to be read by other devices, after the first usb interface 110 in fig. 2 is plugged into the usb interface of the dedicated reading device, the power pin of the first usb interface 110 is grounded, and then triggers the current limit switch 180 of fig. 2, so that the first terminal output of the current limit switch 180 is 0, i.e., the first terminal input of the resistor R1 is 0, therefore, the input signal 5V Det of the first controller 140 is 0, when the first controller 140 detects that the input signal 5V Det becomes 0, the first controller 140 changes the output signal 5V _ CTL to 0, and the input to the controlled terminal of the first switching circuit 130 becomes 0, causing transistor Q2 to turn off, further, the MOS transistor Q1 is turned off, and the power System 5V connected to the resistor R4 cannot be output to the second terminal of the current limiting circuit 120 through the MOS transistor Q1. When the first controller 140 detects that the input signal 5V Det is changed to 0, it also controls the switch 170 to switch to the uplink port 150, so that the transition from the downlink port to the uplink port of the first usb interface 110 is completed. The current limiting switch 180 is used to automatically turn off the current limiting switch when the current passing through the current limiting switch is greater than a preset threshold, so that the circuits at the two ends of the current limiting switch are broken. Since the current limiting switch belongs to the prior art, it will not be described in detail here.
According to the terminal device provided by the embodiment of the invention, the first universal serial bus interface 110, the uplink port 150, the downlink port 160, the change-over switch 170, the first controller 140, the current limiting circuit 120, the first switch circuit 130 and other circuit devices are configured in the terminal device, so that the first universal serial bus interface 110 can be multiplexed into the downlink port 160 or the uplink port 150, the technical problem that in the prior art, no matter what kind of fault occurs to the device configured with the universal serial bus interface, the internal data cannot be read through the universal serial bus interface connection is solved, and when the device configured with the universal serial bus interface is connected with an external device through the universal serial bus interface, the external device can actively read the internal data of the device configured with the universal serial bus interface.
EXAMPLE III
Fig. 3a is a structural diagram of a read-write device according to a third embodiment of the present invention, which specifically includes:
a second universal serial bus interface 230, a second controller 250, a trigger circuit 240, a second switch circuit 210, and a third switch circuit 220; a Signal pin Signal _ GND of the second universal serial bus interface 230 is connected to a detection end of the trigger circuit 240, and a feedback end of the trigger circuit 240 is connected to a Signal input end of the second controller 250, where a Signal transmitted between the two is defined as an Insert Det in this embodiment, and is specifically used for describing a voltage state accessed by the second universal serial bus interface 230;
the signal pin of the second universal serial bus interface 230 is used for being connected with the signal pin of the first universal serial bus interface 110; the data processing terminal of the second controller 250 is connected to the data transmission terminal of the second universal serial bus interface 230 to read and write data through the second universal serial bus interface 230; a first control end of the second controller 250 is connected with a controlled end of the second switch circuit 210, and sends a signal ON/OFF _ CTL to control the ON/OFF of the second switch circuit 210; a second control end of the second controller 250 is connected with a controlled end of the third switch circuit 220, and sends a signal CTL to control the ON-OFF of the third switch circuit 220, and the second controller 250 determines specific control contents of ON/OFF _ CTL and CTL according to the signal Insert Det; a first end of the second switch circuit 210 is connected to the +5V power supply, a second end of the second switch circuit 210 is connected to a power supply pin (i.e., a pin outputting or connected to + 5V) of the second universal serial bus interface 230, and outputs the power supply VCC _ out' to the power supply pin of the second universal serial bus interface 230; a first terminal of the third switch circuit 220 is connected to the power pin of the second usb interface 230, and a second terminal of the third switch circuit 220 is grounded.
Further, the trigger circuit 240 is optimized to: the circuit comprises a triode Q3, a resistor R6, a resistor R7 and a resistor R8, wherein the first end of the resistor R6 is connected with a signal pin of the second universal serial bus interface 230; the second end of the resistor R6 is connected with the base of the triode Q3 and the first end of the resistor R7; the second end of the resistor R7 is connected with the first end of the resistor R8 and is connected with +5V voltage; a second end of the resistor R8 is connected to the collector of the transistor Q3 and a signal input end of the second controller 250, and outputs a signal Insert Det; the emitter of transistor Q3 is connected to ground.
Further, the second switching circuit 210 is optimized to: the circuit comprises a resistor R9, a resistor R10, a resistor R11, a triode Q4 and a MOS transistor Q5; a first terminal of the resistor R9 is connected to a first control terminal of the second controller 250 for receiving ON/OFF _ CTL; the second end of the resistor R9 is connected with the base of the triode Q4; the emitter of the transistor Q4 is grounded, and the collector of the transistor Q4 is connected with the first end of the resistor R10 and the first end of the resistor R11; the second end of the resistor R10 is connected with the source electrode of the MOS transistor Q5 and is connected with a power supply; the second end of the resistor R11 is connected with the gate of the MOS transistor Q5; the drain of the MOS transistor Q5 is connected to the power pin of the USB male port 230, and outputs the power VCC _ out' to the power pin.
Further, the third switching circuit 220 is optimized to: the circuit comprises a resistor R13, a resistor R12 and a triode Q6; a first end of the resistor R13 is connected to the second control end of the second controller 250, and is configured to output CTL to the first end of the resistor R13, and a second end of the resistor R13 is connected to the base of the transistor Q6; the emitter of the transistor Q6 is grounded, the collector of the transistor Q6 is connected to a first terminal of a resistor R12, and a second terminal of the resistor R12 is connected to the power pin of the second universal serial bus interface 230.
In the present embodiment, the initial state of the read/write device in fig. 3a is that both the ON/OFF _ CTL and CTL output from the first control terminal and the second control terminal of the second controller 250 are at low level. As shown in fig. 3b, since the first control terminal output ON/OFF _ CTL of the second controller 250 is at a low level, the first terminal input of the resistor R9 is at a low level, the transistor Q4 is turned OFF, the MOS transistor Q5 is also turned OFF, i.e., the drain of the transistor Q5 has no voltage output, and therefore the power pin of the second universal serial bus interface 230 has no voltage input. As shown in fig. 3a, the CTL output from the second control terminal of the second controller 250 is low, so the first terminal of the resistor R13 is low, and the transistor Q6 is turned off. As shown in fig. 3a, the +5V power supply is connected to the trigger circuit 240, so that the transistor Q3 is turned on, the collector of the transistor Q3 is at a low level, and therefore, the second controller 250 inputs Insert Det to a low level.
The read-write device in this embodiment uses the second universal serial bus interface 230 as an external port, and sets the trigger circuit 240 in the second universal serial bus interface 230, and when data needs to be read from an unconventional storage device (for example, a terminal device) provided with a universal serial bus interface, the establishment of a data channel based on the universal serial bus interface is realized through the trigger circuit 240 and a plurality of switch circuits inside the read-write device, and the data is read from the storage device provided with the universal serial bus interface.
Example four
A fourth embodiment of the present invention further provides a data transmission system, which may specifically include the terminal device in fig. 2 and the read-write device in fig. 3a, and the structures in fig. 2 and fig. 3a can already embody the basic architecture of the data transmission system, and are not separately illustrated herein.
When the second usb interface 230 of the read/write device in fig. 3a is inserted into the first usb interface 110 of the terminal device in fig. 2 (generally, when the terminal device in fig. 2 fails and cannot control data transmission), after the terminal device in fig. 2 and the read/write device in fig. 3a are connected as a data transmission system, the interiors of the terminal device and the read/write device may change correspondingly, and the specific process is as follows:
when the reader/writer device shown in fig. 3a is inserted into the terminal device shown in fig. 2, since the signal pin of the first usb interface 110 is grounded and the second usb interface 230 is connected to the first usb interface 110, the signal pin of the second usb interface 230 is also grounded, so that the first end of the resistor R6 is grounded, and since the ratio of the resistor R6 and the resistor R7 satisfies the following relationship [5/(R6+ R7) ] × R6<0.5, the transistor Q3 is turned off, the collector of the transistor Q3 outputs a high level, and the input Insert Det of the second controller 250 becomes a high level.
When the second controller 250 detects that the input Insert Det changes from low level to high level, the second controller 250 starts timing and simultaneously changes the output CTL to high level, at this time, the first end of the resistor R13 inputs high level, the transistor Q6 is turned on, because the power pin of the second universal serial bus interface 230 is connected to the power pin of the first universal serial bus interface 110 at this time, the power pin of the second universal serial bus interface 230 is connected to the power System 5V, so that the power System 5V is grounded through the resistor R12 and the transistor Q6, the current flowing through the current limiting switch 180 in the current limiting circuit 120 is greater than the preset current threshold, and further the current limiting switch 180 is triggered, so that the current limiting switch 180 turns off the input, the output of the third end of the current limiting circuit 120 is 0, and therefore the input 5V Det of the first controller 140 is also 0.
When the first controller 140 detects the above change of the voltage of the input 5V Det, the output 5V _ CTL is changed to a low level, and at the same time, the Switch 170 is connected to the upstream port 150 by sending a command Switch CTL to the Switch 170, so that the first usb interface 110 is connected to the upstream port 150. After the output 5V _ CTL of the first controller 140 goes low, the transistor Q2 is turned off, and the MOS transistor Q1 is turned off, so that the power Systme 5V cannot be transmitted to the second terminal of the current limiting circuit 120 through the Q2.
As mentioned above, when the second controller 250 detects that the input Insert Det changes from low level to high level, the second controller 250 starts timing, and when the timing of the second controller 250 reaches a preset time period, the output CTL changes to low level, and the output ON/OFF _ CTL changes to high level. The preset duration specifically refers to a time required from the collector of the Q3 becoming high level to the connection of the switch 170 and the uplink port 150, and a specific value of the preset duration may be obtained through an actual debugging process test, and of course, the preset duration may also be greater than a time required from the collector of the Q3 becoming high level to the connection of the switch 170 and the uplink port 150. It can be understood by those skilled in the art that, when data communication is performed through the usb interface, the usb interface as the downlink port supplies power to the usb interface as the uplink port, so that the power pin of the second usb interface 230 in the read/write device can be connected to the +5V power source connected to the first end of the second switch circuit 210 only after the switch 170 is connected to the uplink port 150.
When the second controller 250 counts the time and reaches the preset time, the output CTL of the second controller 250 becomes low level, and the output ON/OFF _ CTL of the second controller 250 becomes high level. When the output CTL of the second controller 250 becomes low, the transistor Q6 is turned off, and the power pins of the second usb interface 230 and the first usb interface 110 are no longer grounded through the resistor R12 and the transistor Q6. Wherein, when the second controller 250 outputs the ON/OFF _ CTL changed to a high level, the transistor Q4 and the MOS transistor Q5 are both turned on, the +5V power supply connected to the second terminal of the resistor R10 is output to the power supply pin of the second usb interface 230 through the MOS transistor Q5, therefore, the power pin of the first usb interface 110 is connected to +5V through the second usb interface 230, the power connected to the first usb interface 110 is grounded through the resistor R1 and the resistor R2, so that the second terminal of the resistor R1 is at a high level, thus, the input 5VDet at the signal input of the first controller 140 is switched from low level to high level, and thus, the data transmission system consisting of the terminal device and the read/write device, the transition from the downstream port 160 to the upstream port 150 of the first usb interface 110 inside the terminal device is completed through a hardware initialization method.
Next, when the read/write device is disconnected from the terminal device, the power pin of the first usb interface 110 cannot access the +5V power through the second usb interface 230, so that the first controller 140 inputs 5V Det and converts from high level to low level, when the first controller 140 detects again that the input 5V Det is converted from high level to low level, the first controller 140 sends a command Switch CTL to the Switch 170, so that the Switch 170 is switched to the downlink port 160, so that the first usb interface 110 is connected to the downlink port 160, and at the same time, the first controller 140 also converts the output 5V _ CTL to high level, so that the first Switch circuit 130 is turned on, the power System 5V is transmitted to the power pin of the first usb interface 110 through the first Switch circuit 130 and the current limiting circuit 120, and at the same time, the first controller 140 inputs 5V Det and converts from low level to high level, at this point, the terminal device is restored to the initial state.
When the read-write device is disconnected from the terminal device, the signal pin of the second universal serial bus interface 230 of the read-write device is no longer grounded, the +5V power supply in the trigger circuit 240 turns ON the transistor Q3 again, and the collector of the transistor Q3 outputs a high level, so that the input Insert Det of the second controller 250 is converted from a low level to a high level, and when the second controller 250 detects the change of the input Insert Det, the second controller 250 sets the output ON/OFF _ CTL to a low level and returns to the initial state.
The terminal device, the read-write device, the data transmission system and the hardware initialization method provided by the embodiment of the invention configure the first universal serial bus interface 110, the uplink port 150, the downlink port 160, the switch 170, the first controller 140, the current limiting circuit 120, the first switch circuit 130 and other circuit devices in the terminal device, configure the second universal serial bus interface 230, the second controller 250, the trigger circuit 240, the second switch circuit 210, the third switch circuit 220 and other circuit devices in the read-write device, so that after the terminal device is connected with the read-write device to form the data transmission system, the terminal device can be controlled by the read-write device through the first universal serial bus interface 110 and the second universal serial bus interface 230 by the hardware initialization method, the terminal device performs data transmission according to the command sent by the read-write device, and solves the problem that no matter what kind of universal serial bus interface is configured in the prior art, the technical problem that the internal data can not be read through the universal serial bus interface is solved, and the external equipment can actively read the internal data of the equipment provided with the universal serial bus interface when the equipment provided with the universal serial bus interface is connected with the external equipment through the universal serial bus interface.
EXAMPLE five
The fifth embodiment of the present invention further provides a hardware initialization method, which is used in the data transmission system, so that the data transmission system completes designed usb interface connection to achieve data reading in an abnormal state, and a specific process is described in the embodiment of the data transmission system, and only summarized here. As shown in fig. 4, the hardware initialization method includes:
step 410, the first controller 140 turns on the first switch circuit 130, switches the switch 170 to turn on the downlink port 160, and the second controller 250 turns off the second switch circuit 210 and the third switch circuit 220;
step 420, when the second controller 250 receives the valid signal indicating that the second usb interface 230 is inserted into the first usb interface 110, which is detected by the trigger circuit, the second controller 250 turns on the third switch circuit 220 and starts timing;
step 430, when the power pin of the first usb interface 110 is grounded, the signal input terminal of the first controller 140 detects that the input is 0, switches the switch 170 to turn on the uplink port 150, and turns off the first switch circuit 130;
step 440, when the timing reaches the preset duration, the second controller 250 turns on the second switch circuit 210 and turns off the third switch circuit 220;
step 450, when the signal input end of the first controller 140 detects that the third end of the current limiting circuit 120 changes from the high level to the low level, the switch 170 is switched to the on downlink port;
when the second controller 250 receives the valid signal indicating that the second universal serial bus interface 230 is pulled out from the first universal serial bus interface 110, which is detected by the trigger circuit, step 460, the second controller 250 turns off the second switch circuit 210 and the third switch circuit 220.
Before the terminal device is connected with the read-write device, the first controller 140 and the second controller 250 control the on-off of the first to third switch circuits and the on-off object of the switch 170, and after the terminal device is connected with the read-write device and is disconnected, the first controller 140 and the second controller 250 control the change of the output signals of the respective control signal output ends according to the change condition of the input signals of the respective signal input ends, so as to control the on-off of the first to third switch circuits and the on-off object of the switch 170, solve the technical problem that in the prior art, no matter what kind of fault occurs to the device configured with the universal serial bus interface, the data in the device cannot be read through the universal serial bus interface connection, and realize that when the device configured with the universal serial bus interface is connected with the external device through the universal serial bus interface, the external device may actively read internal data of the device configured with the universal serial bus interface.
It will be apparent to those skilled in the art that the modules or steps of the present invention described above may be implemented by a server as described above. Alternatively, the embodiments of the present invention may be implemented by programs executable by a computer device, so that they can be stored in a storage device and executed by a processor, where the programs may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.; or separately as individual integrated circuit modules, or as a single integrated circuit module from a plurality of modules or steps within them. Thus, the present invention is not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A terminal device, comprising: the device comprises a first universal serial bus interface, an uplink port, a downlink port, a selector switch, a first controller, a first switch circuit and a current limiting circuit;
the first universal serial bus interface is used for being connected with a second universal serial bus interface of external equipment, and a signal pin of the first universal serial bus interface is grounded; the uplink port and the downlink port are both connected with the data transmission end of the first universal serial bus interface through the selector switch, and the on-off state is switched through the selector switch; the first end of the first switch circuit is connected with a power pin of the first universal serial bus interface, and the second end of the first switch circuit is connected with a power supply;
a first control end of the first controller is connected with a controlled end of the selector switch, and sends a signal to control the selector switch to switch between the uplink port and the downlink port; the second control end of the first controller is connected with the controlled end of the first switch circuit, and sends a signal to control the on-off of the first switch circuit; the signal input end of the first controller is connected to voltage detection data of a power supply pin of the first universal serial bus interface, and signals are sent to the selector switch and the first switch circuit according to the voltage detection data;
the first end of the current limiting circuit is connected with a power supply pin of the first universal serial bus interface, the third end of the current limiting circuit is connected with the signal input end of the first controller, and the second end of the current limiting circuit is connected with the first end of the first switch circuit.
2. The terminal device of claim 1, wherein the current limiting circuit comprises a current limiting switch, a resistor R1, and a resistor R2; a first end of the current limiting switch is connected with a first end of the resistor R1 and a power pin of the first universal serial bus interface, and a second end of the current limiting switch is connected with a first end of the first switch circuit; a second terminal of the resistor R1 is connected to a first terminal of the resistor R2 and a signal input terminal of the first controller; the second end of the resistor R2 is connected to ground.
3. The terminal device of claim 1, wherein the first switch circuit comprises a resistor R3, a resistor R4, a resistor R5, a transistor Q2, and a MOS transistor Q1; a first end of the resistor R3 is connected with a second control end of the first controller; the second end of the resistor R3 is connected with the base of the triode Q2; the emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected with the first end of the resistor R4 and the first end of the resistor R5; the second end of the resistor R4 is connected with the source electrode of the MOS transistor Q1 and is connected with a power supply; the second end of the resistor R5 is connected with the gate of the MOS transistor Q1; the drain electrode of the MOS tube Q1 is connected with the second end of the current limiting circuit.
4. A read-write device, characterized in that it comprises: the second universal serial bus interface, the second controller, the trigger circuit, the second switch circuit and the third switch circuit; a signal pin of the second universal serial bus interface is connected with a detection end of the trigger circuit, a signal input end of the second controller is connected with a feedback end of the trigger circuit, and a signal is sent to the third switch circuit according to the change of the voltage of the feedback end of the trigger circuit;
the signal pin of the second universal serial bus interface is used for being connected with the signal pin of the first universal serial bus interface; the data processing end of the second controller is connected with the data transmission end of the second universal serial bus interface so as to read and write data through the second universal serial bus interface; the first control end of the second controller is connected with the controlled end of the second switch circuit and sends a signal to control the on-off of the second switch circuit; a second control end of the second controller is connected with a controlled end of the third switch circuit and sends a signal to control the on-off of the third switch circuit; a first end of the second switch circuit is connected with a power supply, and a second end of the second switch circuit is connected with a power supply pin of the second universal serial bus interface; the first end of the third switch circuit is connected with the power pin of the second universal serial bus interface, and the second end of the third switch circuit is grounded.
5. The device of claim 4, wherein the trigger circuit comprises a transistor Q3, a resistor R6, a resistor R7, and a resistor R8, and a first terminal of the resistor R6 is connected to the signal pin of the second USB interface; the second end of the resistor R6 is connected with the base of the triode Q3 and the first end of the resistor R7; the second end of the resistor R7 is connected with the first end of the resistor R8 and is connected with +5V voltage; a second terminal of the resistor R8 is connected to a collector of the transistor Q3 and a signal input terminal of the second controller; the emitter of the transistor Q3 is grounded.
6. The reader device according to claim 4, wherein the second switch circuit includes a resistor R9, a resistor R10, a resistor R11, a transistor Q4, and a MOS transistor Q5; a first end of the resistor R9 is connected with a first control end of the second controller; the second end of the resistor R9 is connected with the base of the triode Q4; the emitter of the transistor Q4 is grounded, and the collector of the transistor Q4 is connected with the first end of the resistor R10 and the first end of the resistor R11; the second end of the resistor R10 is connected with the source electrode of the MOS transistor Q5 and is connected with a power supply; the second end of the resistor R11 is connected with the gate of the MOS transistor Q5; and the drain electrode of the MOS tube Q5 is connected with a power supply pin of the second universal serial bus interface.
7. The reader device according to claim 4, wherein the third switching circuit includes a resistor R13, a resistor R12, and a transistor Q6; a first end of the resistor R13 is connected with a second control end of the second controller, and a second end of the resistor R13 is connected with a base electrode of the triode Q6; the emitter of the transistor Q6 is grounded, the collector of the transistor Q6 is connected to the first terminal of the resistor R12, and the second terminal of the resistor R12 is connected to the power pin of the second usb interface.
8. A data transmission system comprising a terminal device according to any one of claims 1 to 3 and a read-write device according to any one of claims 4 to 7.
9. A hardware initialization method for the data transmission system of claim 8, comprising:
the first controller turns on the first switch circuit, switches the switch to turn on the downlink port, and the second controller turns off the second switch circuit and the third switch circuit;
when the second controller receives an effective signal which is detected by the trigger circuit and indicates that the second universal serial bus interface is inserted into the first universal serial bus interface, the second controller conducts the third switch circuit and starts timing;
when the power pin of the first universal serial bus interface is grounded, the signal input end of the first controller detects that the input is 0, the change-over switch is switched to be connected with the uplink port, and the first switch circuit is disconnected;
when the timing reaches the preset duration, the second controller conducts the second switch circuit and disconnects the third switch circuit.
10. The method of claim 9, wherein when the timer reaches a preset duration, the second controller turns on the second switch circuit, and after turning off the third switch circuit, the method further comprises:
when the signal input end of the first controller detects that the input is changed from high level to low level, the change-over switch is switched to conduct the downlink port;
when the second controller receives a valid signal which is detected by the trigger circuit and represents that the second universal serial bus interface is disconnected from the first universal serial bus interface, the second controller disconnects the second switch circuit and the third switch circuit.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611110061.9A CN106776428B (en) | 2016-12-06 | 2016-12-06 | Terminal device, read-write device, data transmission system and hardware initialization method |
| PCT/CN2017/103290 WO2018103417A1 (en) | 2016-12-06 | 2017-09-25 | Terminal apparatus, read-write apparatus, data transmission system and hardware initialization method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611110061.9A CN106776428B (en) | 2016-12-06 | 2016-12-06 | Terminal device, read-write device, data transmission system and hardware initialization method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106776428A CN106776428A (en) | 2017-05-31 |
| CN106776428B true CN106776428B (en) | 2020-05-08 |
Family
ID=58878341
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611110061.9A Active CN106776428B (en) | 2016-12-06 | 2016-12-06 | Terminal device, read-write device, data transmission system and hardware initialization method |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN106776428B (en) |
| WO (1) | WO2018103417A1 (en) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106776428B (en) * | 2016-12-06 | 2020-05-08 | 广州视源电子科技股份有限公司 | Terminal device, read-write device, data transmission system and hardware initialization method |
| CN108153626B (en) * | 2017-11-15 | 2020-12-01 | 中国电子科技集团公司第三十二研究所 | USB, serial port multiplexing and safety isolation system |
| CN112313928B (en) * | 2018-06-29 | 2024-04-05 | 荣耀终端有限公司 | USB seat operation circuit and terminal |
| CN109217847A (en) * | 2018-11-13 | 2019-01-15 | 东莞钜威动力技术有限公司 | A kind of digital output circuit and automobile |
| CN111309663A (en) * | 2018-12-12 | 2020-06-19 | 浦登有限公司 | Power adapter with dual role ports |
| CN109581227A (en) * | 2019-01-24 | 2019-04-05 | 广东科徕尼智能科技有限公司 | A kind of intelligent door lock energy-saving voltage detection circuit |
| CN111090605B (en) * | 2019-10-10 | 2023-07-28 | 惠州市德赛西威汽车电子股份有限公司 | USB-to-UART circuit for MCU software upgrade |
| CN111124987B (en) * | 2019-12-30 | 2021-06-22 | 京信通信***（中国）有限公司 | PCIE-based data transmission control system and method |
| CN113868167A (en) * | 2020-06-30 | 2021-12-31 | 华为技术有限公司 | Chip module, communication system and port distribution method |
| CN112100104B (en) * | 2020-08-05 | 2022-07-19 | 深圳市广和通无线股份有限公司 | Universal serial bus device, system and communication equipment |
| CN114697144B (en) * | 2020-12-30 | 2023-11-10 | 美的集团股份有限公司 | Communication device, control device and communication equipment |
| CN112904122A (en) * | 2021-01-22 | 2021-06-04 | 维沃移动通信有限公司 | Insertion detection circuit and electronic device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369259A (en) * | 2008-09-05 | 2009-02-18 | 深圳创维数字技术股份有限公司 | Switch control method and apparatus and electronic equipment for USB interface master-salve equipment mode |
| CN101989246A (en) * | 2009-07-29 | 2011-03-23 | 鸿富锦精密工业（深圳）有限公司 | Electronic device capable of automatically switching master and slave equipment modes of universal serial bus (USB) |
| CN102750248A (en) * | 2012-06-21 | 2012-10-24 | 中兴通讯股份有限公司 | USB (Universal Serial Bus) equipment working mode switching method and USB equipment |
| CN105095132A (en) * | 2014-04-30 | 2015-11-25 | 名硕电脑(苏州)有限公司 | Electronic device capable of automatically switching Universal Serial Bus master-slave device modes and operating method of electronic device |
| CN105824771A (en) * | 2015-10-28 | 2016-08-03 | 维沃移动通信有限公司 | Electronic device and master-slave switching method and apparatus thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000196986A (en) * | 1998-12-25 | 2000-07-14 | Olympus Optical Co Ltd | Electronic image pickup device |
| TW591509B (en) * | 2003-01-28 | 2004-06-11 | Via Tech Inc | USB control circuit and operation method applied in computer-to-computer transmission |
| CN104765705B (en) * | 2015-04-22 | 2017-11-07 | 广东欧珀移动通信有限公司 | Read method, device and a kind of mobile terminal for the mobile terminal stored data do not started shooting |
| CN106776428B (en) * | 2016-12-06 | 2020-05-08 | 广州视源电子科技股份有限公司 | Terminal device, read-write device, data transmission system and hardware initialization method |
-
2016
- 2016-12-06 CN CN201611110061.9A patent/CN106776428B/en active Active
-
2017
- 2017-09-25 WO PCT/CN2017/103290 patent/WO2018103417A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369259A (en) * | 2008-09-05 | 2009-02-18 | 深圳创维数字技术股份有限公司 | Switch control method and apparatus and electronic equipment for USB interface master-salve equipment mode |
| CN101989246A (en) * | 2009-07-29 | 2011-03-23 | 鸿富锦精密工业（深圳）有限公司 | Electronic device capable of automatically switching master and slave equipment modes of universal serial bus (USB) |
| CN102750248A (en) * | 2012-06-21 | 2012-10-24 | 中兴通讯股份有限公司 | USB (Universal Serial Bus) equipment working mode switching method and USB equipment |
| CN105095132A (en) * | 2014-04-30 | 2015-11-25 | 名硕电脑(苏州)有限公司 | Electronic device capable of automatically switching Universal Serial Bus master-slave device modes and operating method of electronic device |
| CN105824771A (en) * | 2015-10-28 | 2016-08-03 | 维沃移动通信有限公司 | Electronic device and master-slave switching method and apparatus thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2018103417A1 (en) | 2018-06-14 |
| CN106776428A (en) | 2017-05-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106776428B (en) | Terminal device, read-write device, data transmission system and hardware initialization method | |
| CN103259999B (en) | HPD signal output control method, HDMI receiving device and system | |
| US10552366B2 (en) | Method of communication for master device and slave device on synchronous data bus wherein master and slave devices are coupled in parallel | |
| CN103293969B (en) | Control chip | |
| CN103237189A (en) | Electronic equipment, MHL (mobile high-definition link) connector, MHL system and connector detection method | |
| EP1092194B1 (en) | Device for use as stand-alone device and as slave device in a data bus system | |
| CN108093329B (en) | Peripheral type detection circuit and mobile terminal based on shared interface | |
| TWI623836B (en) | Control chip, method and connection device utilizing the same | |
| CN108733609B (en) | Switching circuit, intelligent switching device and switching method of double USB interfaces | |
| KR101706906B1 (en) | Communication device and method | |
| CN104704445A (en) | Electronic device, communication system, and hot-plug control method | |
| US20150269110A1 (en) | Cable with multiple functions | |
| JP2017097688A (en) | Port connection circuit, port connection control method, electronic apparatus | |
| CN104834246A (en) | Automobile controller and state synchronization method applied to automobile controller | |
| US8433837B2 (en) | System for connecting electronic devices | |
| CN104967806A (en) | Switching circuit based on HDMI interface | |
| JP2008065364A (en) | Extension system, add-in card, and external device | |
| CN105320634A (en) | Data conversion system and control method thereof | |
| US20170220097A1 (en) | Power supply system for electronic device | |
| US9195627B2 (en) | Apparatus and method of controlling clock signals | |
| CN105893296B (en) | A kind of transmitting device and its method of data information | |
| CN211375595U (en) | Solid state disk recognition device | |
| US20170220096A1 (en) | Power supply system for electronic device | |
| CN203760209U (en) | MHL cable and MHL cable hot plug detecting system | |
| CN113541121A (en) | Hot plug protection circuit, plug device and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |