CN106771940B - The circuit and method held time using signal single-phase monitoring inductance breaking arc - Google Patents
The circuit and method held time using signal single-phase monitoring inductance breaking arc Download PDFInfo
- Publication number
- CN106771940B CN106771940B CN201710119881.2A CN201710119881A CN106771940B CN 106771940 B CN106771940 B CN 106771940B CN 201710119881 A CN201710119881 A CN 201710119881A CN 106771940 B CN106771940 B CN 106771940B
- Authority
- CN
- China
- Prior art keywords
- resistance
- circuit
- voltage
- comparator
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
- G01R31/14—Circuits therefor, e.g. for generating test voltages, sensing circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
- G01R31/1227—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Relating To Insulation (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The invention discloses a kind of circuit held time using signal single-phase monitoring inductance breaking arc and method, circuit includes that sequentially connected voltage signal processing circuit, split-phase delay circuit, compare output circuit, arc duration test and display driver circuit and arc duration display circuit；It includes that the first split-phase delays circuit and the second split-phase to delay circuit that split-phase, which delays circuit, and it includes capacitor C1, the first proportion resistor network and the second proportion resistor network that the first split-phase, which delays circuit,；It includes capacitor C2, third proportion resistor network and the 4th proportion resistor network that second split-phase, which delays circuit,；Its method is comprising steps of one, detection circuit connects, two, voltage signal processing, and three, inductance breaking arc holds time detection.Circuit structure of the present invention is simple, and rationally, it is convenient and at low cost to realize for design, stable and reliable in work, can quickly and effectively detect inductance breaking arc and hold time, applied widely, practical, has good application value.
Description
Technical field
It holds time detection technique field the invention belongs to inductance breaking arc, and in particular to a kind of to be examined using signal split-phase
Survey the circuit and method that inductance breaking arc is held time.
Background technique
Safety spark experimental rig is the basic equipment for studying circuit essential safety performance, according to what is obtained on the apparatus
The various curves of lighting that test result is drawn are the foundations for designing intrinsicallysafecircuit.It is tested and is felt using safety spark experimental rig
Property circuit, discharge time is exactly the duration that circuital current decays to zero from the steady-state value before disconnection when igniting, it determine
In the feature of the material of device electrode, structure, switch speed and circuit transitional processes and concentration, temperature, the pressure of test gas
Power etc..If the mathematical models of discharge time and electrode gap voltage, curent change rule can be established, its volt-ampere is established
Characteristic equation, discharge time are also just readily solved.But at present due to the complexity of actual discharge process, the mechanism ignited is discharged still
It is not fully aware of, complete theory can not be established and carry out quantitative description electric discharge ignition Process, and inductive circuit inductance breaking arc is put
The electric time is an implicit function relevant to circuit parameter, it is thus possible to when accurate measurement inductive circuit inductance breaking arc electric discharge
Between become problem key.
Have at present to the research method of discharge time: the method for 1. utilizing mathematical model, by establishing inductance breaking arc
The characteristics of mathematical model of electric discharge according to current attenuation during inductance disjunction is zero, calculate the electric discharge of inductance breaking arc when
Between；2. using computer method measured directly, main operational principle is to be counted using counter to discharge pulse number
Number, and then determine discharge period when inductance disjunction.The method of employing mode 1., advantage are simply, convenient for calculating.But by
After inductance disjunction, actual Current Voltage changing rule is nonlinear, thus it there is a certain error.Employing mode is 2.
Method, working principle is simple, using convenient, but since several factors may cause the time between two break sparks
Interval has error so as to cause the deviation of counting.
In order to solve problem above, application No. is 201611261074.6 Chinese patents to disclose a kind of inductive circuit point
Arc discharge time detection circuit and method are powered off, circuit structure is simple, and it is convenient to realize, still, its inductive circuit detected
Breaking arc electric discharge start/stop time is the voltage to jump that detection front and back generates twice, but according to the disjunction of small inductor inductive circuit
It is found that when inductance is smaller, breaking arc discharge voltage is rising always arc discharge characteristics curve, without apparent second
Jump phenomenon, therefore discharges for the breaking arc of small inductor, using application No. is 201611261074.6 patent circuit and
Method cannot accurately detect its breaking arc electric discharge finish time.
Summary of the invention
In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is that providing a kind of circuit structure
Simply, design is rationally, realization is convenient and at low cost, stable and reliable in work, can quickly and effectively detect inductance breaking arc dimension
Hold time, use signal single-phase monitoring inductance disjunction electricity applied widely, practical, with good application value
The circuit that arc is held time.
In order to solve the above technical problems, the technical solution adopted by the present invention is that: it is a kind of using signal single-phase monitoring inductance point
The circuit held time of power-off arc, it is characterised in that: including sequentially connected voltage signal processing circuit, split-phase delay circuit,
Compare output circuit, arc duration test and display driver circuit and arc duration display circuit；
The voltage signal processing circuit includes instrumentation amplifier U1, resistance R1, resistance R2, resistance R3, resistance R4, resistance
One end of R17 and zener diode D1, the resistance R1 are the sample point cathode voltage input terminal of voltage signal processing circuit
One end of VIN-, the resistance R3 are the sample point cathode voltage input terminal VIN+ of voltage signal processing circuit, sample point cathode
Voltage input end VIN- is connected to ground, the resistance R1 and electricity by the resistor voltage divider network that concatenated resistance R1 and resistance R2 are constituted
The connecting pin of resistance R2 is connect with the inverting input terminal of instrumentation amplifier U1, and sample point cathode voltage input terminal VIN+ is by concatenated electricity
The resistor voltage divider network that resistance R3 and resistance R4 is constituted is connected to ground, connecting pin and the instrumentation amplifier of the resistance R3 and resistance R4
The non-inverting input terminal of U1 connects, and is connected to gain setting resistor between two gain resistor connecting pins of the instrumentation amplifier U1
RG, the plus earth of the zener diode D1, the cathode of the zener diode D1 and the Voltage Reference of instrumentation amplifier U1
End connection, the Voltage Reference end of the instrumentation amplifier U1 also passes through resistance R17 and the output end VCC of external power supply power supply connects
It connects；
It includes that the first split-phase delays circuit and the second split-phase to delay circuit that the split-phase, which delays circuit, and first split-phase is prolonged
Slow circuit includes capacitor C1, the first proportion resistor network being made of resistance R5 and resistance R7, and by resistance R6 and resistance R8
Second proportion resistor network of composition；One end of the resistance R5 is connect with the output end of instrumentation amplifier U1, the resistance R5
The other end be grounded by resistance R7, one end of the resistance R6 is connect with the output end of instrumentation amplifier U1, the resistance R6
The other end be grounded by resistance R8, one end of the capacitor C1 is connect with the connecting pin of resistance R6 and resistance R8, the capacitor
The other end of C1 is grounded；It includes capacitor C2 that second split-phase, which delays circuit, the third ratio being made of resistance R11 and resistance R13
Example resistor network, and the 4th proportion resistor network being made of resistance R12 and resistance R14；The resistance value of the resistance R11, electricity
The resistance value for hindering the resistance value of R12, the resistance value of resistance R13 and resistance R14 meets relational expressionThe electricity
One end of resistance R11 is connect with the output end of instrumentation amplifier U1, and the other end of the resistance R11 is grounded by resistance R13, described
One end of resistance R12 is connect with the output end of instrumentation amplifier U1, and the other end of the resistance R12 is grounded by resistance R14, institute
The one end for stating capacitor C2 is connect with the connecting pin of resistance R12 and resistance R14, the other end ground connection of the capacitor C2；
The relatively output circuit includes comparator U2, comparator U3, d type flip flop U4, switching diode D2, two pole of switch
The non-inverting input terminal and resistance R5 and resistance R7 of pipe D3, resistance R9, resistance R10, resistance R16 and resistance R15, the comparator U2
Connecting pin connection, the inverting input terminal of the comparator U2 connect with the connecting pin of resistance R6 and resistance R8, the comparator
The output end of U2 is connect by resistance R9 with the output end VCC of external power supply power supply；The non-inverting input terminal of the comparator U3 with
Resistance R12 is connected with the connecting pin of resistance R14, the inverting input terminal of the comparator U3 and the connection of resistance R11 and resistance R13
The output end of end connection, the comparator U3 is connect by resistance R10 with the output end VCC of external power supply power supply；The switch
The anode of diode D2 is connect with the output end of the comparator U2, the anode of the switching diode D3 and the comparator U3
Output end connection, the cathode of the cathode of the switching diode D2 and switching diode D3 with the d type flip flop U4 when
The CLD connection of clock pin, the clearing pin of the d type flip flop U4Pass through the output end of resistance R16 and external power supply power supply
VCC connection, and be grounded by capacitor C3, the power pins Vcc and preset pin of the d type flip flop U4And external power supply
The output end VCC connection of power supply, the grounding pin GND ground connection of the d type flip flop U4, the signal input part of the d type flip flop U4
Pin D and signal output end pinConnection, the signal output end pin Q of the d type flip flop U4 are the relatively output circuit
The inverting input terminal of output end OUT, the comparator U2 drawn by resistance R15 and the signal output end of the d type flip flop U4
Foot Q connection；The resistance of the resistance value, the resistance value of resistance R6, the resistance value of resistance R7, the resistance value of resistance R8 and resistance R15 of the resistance R5
Value meets relational expression
The above-mentioned circuit held time using signal single-phase monitoring inductance breaking arc, it is characterised in that: the electric arc
Time test and display driver circuit are single-chip microcontroller, and the arc duration display circuit is liquid crystal display.
The above-mentioned circuit held time using signal single-phase monitoring inductance breaking arc, it is characterised in that: the monolithic
The model STC89C51 of machine, the model LCD1602 of the liquid crystal display are connected to clock circuit on the single-chip microcontroller, institute
It states clock circuit to be made of capacitor C2, capacitor C3 and crystal oscillator Y1, one end of the crystal oscillator Y1 and the 18th pin of the single-chip microcontroller
Connection and public capacitance C2 ground connection, the other end of the crystal oscillator Y1 is connect with the 19th pin of the single-chip microcontroller and public capacitance C3
Ground connection；29th pin of the single-chip microcontroller and the 40th pin are connect with the output end VCC1 of external power supply power supply, the monolithic
20th pin of machine is grounded, the output end OUT connection of the 13rd pin of single-chip microcontroller output circuit compared with described, the liquid
The 6th pin, the 5th pin and the 4th pin of crystal display screen successively draw with the 32nd pin, the 33rd pin and the 34th of the single-chip microcontroller
Foot connection, the 1st pin of the liquid crystal display and the 16th pin are grounded, the 2nd pin of the liquid crystal display and the 15th
Pin is connect with the output end VCC1 of external power supply power supply, and the 3rd pin of the liquid crystal display is grounded by resistance R13.
The above-mentioned circuit held time using signal single-phase monitoring inductance breaking arc, it is characterised in that: the instrument is used
The model AD623 of amplifier U1.
The above-mentioned circuit held time using signal single-phase monitoring inductance breaking arc, it is characterised in that: the comparison
The model of device U2 and comparator U3 are LM2903.
The above-mentioned circuit held time using signal single-phase monitoring inductance breaking arc, it is characterised in that: the D triggering
The model DM74S74 of device U4.
Rationally, realization is convenient, can quickly and effectively detect electricity for simple, design that the present invention also provides a kind of method and steps
The inductance breaking arc held time of sense breaking arc is held time detection method, which is characterized in that this method includes following step
It is rapid:
Step 1: detection circuit connects: by the sample point anode of inductive circuit and the sample point of voltage signal processing circuit
Cathode voltage input terminal VIN+ connection, by the sample point negative electricity of the sample point cathode of inductive circuit and voltage signal processing circuit
Press input terminal VIN- connection；And safety spark experimental rig G is connect between the sample point positive electrode and negative electrode of inductive circuit；
Step 2: voltage signal is handled: in the inductive circuit course of work, voltage signal processing circuit takes inductive circuit
After the double-width grinding differential signal of sampling point positive electrode and negative electrode voltage amplifies processing, it is converted into single-ended voltage signal and is divided into four tunnels
It exports and delays circuit to split-phase, the first via is defeated after first split-phase delays the first proportion resistor network in circuit to divide
Out to the non-inverting input terminal for comparing comparator U2 in output circuit, the second tunnel delays second in circuit by first split-phase
The inverting input terminal for comparing comparator U2 in output circuit is output to after proportion resistor network partial pressure, third road passes through described second
Split-phase is output to the anti-phase input for comparing comparator U3 in output circuit after delaying the third proportion resistor network in circuit to divide
End, the 4th tunnel is output to after second split-phase delays the 4th proportion resistor network in circuit to divide compares output circuit
The non-inverting input terminal of middle comparator U3；
The detection Step 3: inductance breaking arc is held time, detailed process are as follows:
When safety spark experimental rig G two electrodes in the closure state, inductive circuit work normally, at this point, sense
Property circuit in induction charging energy storage, until inductive current reach maximum value RVINWhen L, the sample point anode of inductive circuit with take
Voltage between sampling point cathode is zero, and the output voltage of instrumentation amplifier U1 is instrumentation amplifier U1 in voltage signal processing circuit
Voltage Reference end voltage；Due to the resistance of the resistance value of the resistance R5, the resistance value of resistance R6, the resistance value of resistance R7, resistance R8
Value and the resistance value of resistance R15 meet relational expressionTherefore the comparator U2
Inverting input terminal voltage be greater than non-inverting input terminal voltage, therefore comparator U2 export low level；Due to the resistance of the resistance R11
Value, the resistance value of resistance R12, the resistance value of the resistance value of resistance R13 and resistance R14 meet relational expressionCause
The inverting input terminal voltage of this comparator U3 is greater than non-inverting input terminal voltage, therefore comparator U3 exports low level；D triggering
The clock pins CLD of device U4 is low level, and output keeps low level；Wherein, VINFor the input voltage of inductive circuit, RL is sense
The resistance value of current-limiting resistance RL in property circuit；
When explosibility test is opened and closed using safety spark experimental rig G, two electricity of safety spark experimental rig G
Pole is initially separated by being closed, and since the loop current of inductive circuit cannot be mutated, causes breakpoint that voltage jump, perception electricity occurs
Road starts to generate arc discharge, produces the voltage to jump；Although the resistance of the resistance value of resistance R5, the resistance value of resistance R6, resistance R7
The resistance value of value, the resistance value of resistance R8 and resistance R15 meets relational expressionBut by
The variation of the voltage exported after capacitor C1 has delayed the second proportion resistor network to divide, so that comparator U2's is same mutually defeated
The voltage for entering end is greater than the voltage of its inverting input terminal, and comparator U2 exports high level；Due to the resistance value of resistance R11, resistance R12
Resistance value, the resistance value of the resistance value of resistance R13 and resistance R14 meet relational expressionTherefore comparator U3
Non-inverting input terminal voltage still less than its inverting input terminal voltage, comparator U3 output keep low level；D type flip flop U4
The high level for detecting comparator U2 output starts to export high level, and the high level output that d type flip flop U4 is exported is to arc duration
Test and display driver circuit start timing when arc duration is tested and display driver circuit detects that high level arrives；It
Afterwards, the high level of d type flip flop U4 output feeds back the inverting input terminal to comparator U2 by resistance R15, so that comparator U2
The voltage of inverting input terminal is greater than the voltage of its non-inverting input terminal, and comparator U2 exports low level, and the output of d type flip flop U4 is still
Maintain high level；
With the propulsion of time, the degree of two electrode separations of safety spark experimental rig G is gradually increased, arc current
Approximately linear decaying, the arc voltage at disjunction slowly rises at this time, due to the resistance value of resistance R5, the resistance value of resistance R6, resistance
The resistance value of the resistance value of R7, the resistance value of resistance R8 and resistance R15 meets relational expressionTherefore the voltage of the non-inverting input terminal of comparator U2 is less than its anti-phase input
The voltage at end, comparator U2 output keep low level；Due to the resistance value of resistance R11, the resistance value of resistance R12, the resistance value of resistance R13
Meet relational expression with the resistance value of resistance R14Therefore the voltage of the non-inverting input terminal of comparator U3 is small
In the voltage of its inverting input terminal, comparator U3 output keeps low level；D type flip flop U4 output keeps high level；
As two electrode distances of safety spark experimental rig G further increase, arc current falls to zero suddenly, peace
Two electrodes of full spark test apparatus G are completely separated, and generate a bust at the separation of two electrodes of inductive circuit at this time
Voltage signal, although the resistance value of resistance R11, the resistance value of resistance R12, the resistance value of the resistance value of resistance R13 and resistance R14 meet relationship
FormulaBut the voltage exported after having delayed the 4th proportion resistor network to divide due to capacitor C2
Variation, therefore the voltage of the non-inverting input terminal of comparator U3 be greater than its inverting input terminal voltage so that comparator U3 export
High level；D type flip flop U4 detects this high level signal, and the overturning of output state logic is low level, and inductive circuit electric arc is put
Electricity terminates；When d type flip flop U3 exports logic state overturning, generates a failing edge and export to arc duration test and show driving
Circuit, arc duration test and display driver circuit stop timing, and arc duration test and display driver circuit obtain timing
Time be denoted as inductance breaking arc and hold time, and export and shown to arc duration display circuit.
Above-mentioned method, it is characterised in that: the inductive circuit is made of concatenated inductive circuit and current-limiting resistance RL, institute
The one end for stating inductance in inductive circuit is the sample point anode of inductive circuit, and the current-limiting resistance RL does not connect with the inductive circuit
The one end connect is the sample point cathode of inductive circuit.
Compared with the prior art, the present invention has the following advantages:
1, the circuit structure for the circuit that the present invention is held time using signal single-phase monitoring inductance breaking arc is simple, design
Rationally, it is convenient and at low cost to realize, stable and reliable in work.
2, the circuit of the invention held time using signal single-phase monitoring inductance breaking arc, compensates for mathematical model method
The deficiency held time with computer direct method of measurement measurement inductance breaking arc, can be in arc duration display circuit directly
It shows measurement result, is provided convenience to scientific research personnel.
3, the circuit of the invention held time using signal single-phase monitoring inductance breaking arc is according to inductive circuit electricity
Feel the detection circuit of the Variation Features design of breaking arc discharge voltage waveform, the instrumentation amplifier of selection, comparator response speed
Degree is fast, and the arc discharge time error measured is small, and precision is high.
4, the circuit of the invention held time using signal single-phase monitoring inductance breaking arc, not only can be adapted for reality
In the spark-testing on border, it can be applicable in various inductive circuit inductance breaking arc electric discharge l-G simulation tests, by means of imitative
True software can quickly extract inductance breaking arc discharge waveform, applied widely.
5, the circuit of the invention held time using signal single-phase monitoring inductance breaking arc, to split-phase delay circuit with
And compare output circuit and expanded, the branch formed comprising two-way proportion resistor network and a comparator is increased,
Using detection the arc-over voltage bust moment as breaking arc discharge finish time, due to no matter inductance value size,
As long as discharging finish time in breaking arc, arc-over voltage is bound to generate a bust, so, it is put using detection electric arc
The piezoelectric voltage bust moment is more accurate and reliable as breaking arc electric discharge finish time, and testing result can be made more accurate.
6, inductance breaking arc of the invention hold time detection method method and step it is simple, design rationally, realization side
Just, it can quickly and effectively detect inductance breaking arc to hold time, applying it to can in the detection of inductive circuit essential safety
To establish corresponding arc discharge model, inductance breaking arc discharge waveform is extracted, the judgement of essential safety is carried out.
7, of the invention practical, there is good application value.
In conclusion circuit structure of the present invention is simple, design rationally, realizes convenient and at low cost, stable and reliable in work, energy
Enough quickly and effectively detection inductance breaking arcs are held time, applied widely, practical, have good popularization and application valence
Value.
Below by drawings and examples, technical scheme of the present invention will be described in further detail.
Detailed description of the invention
Fig. 1 is the schematic block circuit diagram for the circuit that the present invention is held time using signal single-phase monitoring inductance breaking arc.
Fig. 2 is the method flow block diagram that the present invention is held time using signal single-phase monitoring inductance breaking arc.
Fig. 3 is the circuit diagram for the circuit that the present invention is held time using signal single-phase monitoring inductance breaking arc.
Fig. 4 is the present invention using the signal single-phase monitoring inductance breaking arc circuit held time and the application example of method
Figure.
Description of symbols:
1-inductive circuit；2-voltage signal processing circuits；3-split-phases delay circuit；
4-compare output circuit；The test of 5-arc durations and display driver circuit；
6-arc duration display circuits.
Specific embodiment
As shown in Figure 1, the circuit of the invention held time using signal single-phase monitoring inductance breaking arc, including successively
The voltage signal processing circuit 2 of connection, split-phase delay circuit 3, compare output circuit 4, arc duration test and display driving electricity
Road 5 and arc duration display circuit 6；
As shown in figure 3, the voltage signal processing circuit 2 include instrumentation amplifier U1, resistance R1, resistance R2, resistance R3,
One end of resistance R4, resistance R17 and zener diode D1, the resistance R1 are the sample point cathode of voltage signal processing circuit 2
One end of voltage input end VIN-, the resistance R3 are the sample point cathode voltage input terminal VIN+ of voltage signal processing circuit 2,
Sample point cathode voltage input terminal VIN- is connected to ground by the resistor voltage divider network that concatenated resistance R1 and resistance R2 are constituted, described
The connecting pin of resistance R1 and resistance R2 are connect with the inverting input terminal of instrumentation amplifier U1, sample point cathode voltage input terminal VIN+
Ground is connected to by the resistor voltage divider network that concatenated resistance R3 and resistance R4 are constituted, the connecting pin of the resistance R3 and resistance R4 with
The non-inverting input terminal of instrumentation amplifier U1 connects, and is connected to gain between two gain resistor connecting pins of the instrumentation amplifier U1
Resistance RG is adjusted, the plus earth of the zener diode D1, the cathode of the zener diode D1 is with instrumentation amplifier U1's
The connection of Voltage Reference end, the Voltage Reference end of the instrumentation amplifier U1 also passes through the output of resistance R17 Yu external power supply power supply
Hold VCC connection；
As shown in figure 3, it includes that the first split-phase delays circuit and the second split-phase to delay circuit that the split-phase, which delays circuit 3, institute
Stating the first split-phase to delay circuit includes capacitor C1, the first proportion resistor network being made of resistance R5 and resistance R7, and by electricity
Hinder the second proportion resistor network of R6 and resistance R8 composition；One end of the resistance R5 and the output end of instrumentation amplifier U1 connect
It connects, the other end of the resistance R5 is grounded by resistance R7, and one end of the resistance R6 and the output end of instrumentation amplifier U1 connect
It connects, the other end of the resistance R6 is grounded by resistance R8, one end of the capacitor C1 and the connecting pin of resistance R6 and resistance R8
Connection, the other end ground connection of the capacitor C1；It includes capacitor C2 that second split-phase, which delays circuit, by resistance R11 and resistance R13
The third proportion resistor network of composition, and the 4th proportion resistor network being made of resistance R12 and resistance R14；The resistance
The resistance value of R11, the resistance value of resistance R12, the resistance value of the resistance value of resistance R13 and resistance R14 meet relational expressionOne end of the resistance R11 is connect with the output end of instrumentation amplifier U1, the resistance R11's
The other end is grounded by resistance R13, and one end of the resistance R12 is connect with the output end of instrumentation amplifier U1, the resistance R12
The other end be grounded by resistance R14, one end of the capacitor C2 is connect with the connecting pin of resistance R12 and resistance R14, the electricity
Hold the other end ground connection of C2；
As shown in figure 3, the relatively output circuit 4 includes comparator U2, comparator U3, d type flip flop U4, switching diode
The non-inverting input terminal and electricity of D2, switching diode D3, resistance R9, resistance R10, resistance R16 and resistance R15, the comparator U2
Resistance R5 is connected with the connecting pin of resistance R7, and the inverting input terminal of the comparator U2 and the connecting pin of resistance R6 and resistance R8 connect
It connects, the output end of the comparator U2 is connect by resistance R9 with the output end VCC of external power supply power supply；The comparator U3's
Non-inverting input terminal is connect with the connecting pin of resistance R12 and resistance R14, the inverting input terminal of the comparator U3 and resistance R11 and
The connecting pin of resistance R13 connects, and the output end of the comparator U3 passes through the output end VCC of resistance R10 and external power supply power supply
Connection；The anode of the switching diode D2 is connect with the output end of the comparator U2, the anode of the switching diode D3
Connect with the output end of the comparator U3, the cathode of the cathode of the switching diode D2 and switching diode D3 with it is described
The clock pins CLD connection of d type flip flop U4, the clearing pin of the d type flip flop U4Pass through resistance R16 and external power supply electricity
The output end VCC connection in source, and be grounded by capacitor C3, the power pins Vcc and preset pin of the d type flip flop U4?
It is connect with the output end VCC of external power supply power supply, the grounding pin GND ground connection of the d type flip flop U4, the d type flip flop U4's
Signal input part pin D and signal output end pinConnection, the signal output end pin Q of the d type flip flop U4 are the ratio
Inverting input terminal compared with the output end OUT, the comparator U2 of output circuit 4 passes through the letter of resistance R15 and the d type flip flop U4
Number output pin Q connection；Resistance value, the resistance value of resistance R6, the resistance value of resistance R7, the resistance value and electricity of resistance R8 of the resistance R5
The resistance value of resistance R15 meets relational expression
When it is implemented, the power end of the instrumentation amplifier U1 is connect with the output end VCC of external power supply power supply, it is described
The ground terminal of instrumentation amplifier U1 is grounded；The power end of the comparator U2 is connect with the output end VCC of external power supply power supply, institute
State the ground terminal ground connection of comparator U2.The voltage of the output end VCC output of the external power supply power supply is 5V.
In the present embodiment, the arc duration test and display driver circuit 5 are single-chip microcontroller, the arc duration display electricity
Road 7 is liquid crystal display.
In the present embodiment, as shown in figure 3, the model STC89C51 of the single-chip microcontroller, the model of the liquid crystal display
For LCD1602, it is connected to clock circuit on the single-chip microcontroller, the clock circuit is made of capacitor C2, capacitor C3 and crystal oscillator Y1, institute
The one end for stating crystal oscillator Y1 connect with the 18th pin of the single-chip microcontroller and public capacitance C2 be grounded, the other end of the crystal oscillator Y1 with
19th pin of the single-chip microcontroller connects and public capacitance C3 is grounded；29th pin of the single-chip microcontroller and the 40th pin are and outside
The output end VCC1 connection of portion's power supply, the 20th pin ground connection of the single-chip microcontroller, the 13rd pin of the single-chip microcontroller and institute
State the output end OUT connection for comparing output circuit 4, the 6th pin, the 5th pin and the 4th pin of the liquid crystal display successively with
The 32nd pin, the 33rd pin and the 34th pin of the single-chip microcontroller connect, the 1st pin of the liquid crystal display and the 16th pin
It is grounded, the 2nd pin of the liquid crystal display and the 15th pin are connect with the output end VCC1 of external power supply power supply, described
3rd pin of liquid crystal display is grounded by resistance R13.
When it is implemented, the voltage that the output end VCC1 of the external power supply power supply is exported is 5V.
In addition, when it is implemented, the resistance value of resistance R16 and the capacitance of capacitor C3 should meet R16C3 > R6C1, thus
So that the power-on reset time long enough of d type flip flop U4, it is ensured that during d type flip flop U4 electrification reset, external power supply power supply pair
Capacitor C1 charges, so that comparator U2 inverting input terminal voltage is greater than non-inverting input terminal, comparator U2 stablizes output
For low level.
In the present embodiment, the model AD623 of the instrumentation amplifier U1.The instrumentation amplifier U1's of model AD623
Pin 2 is inverting input terminal, and pin 3 is non-inverting input terminal, and pin 4 is ground terminal, and pin 7 is power end, and pin 6 is output
End.
In the present embodiment, the model of the comparator U2 and comparator U3 are LM2903.
In the present embodiment, the model DM74S74 of the d type flip flop U4.
As shown in Fig. 2, inductance breaking arc of the invention holds time and carries out detection method, comprising the following steps:
Step 1: detection circuit connects: by the sampling of the sample point anode of inductive circuit 1 and voltage signal processing circuit 2
Point cathode voltage input terminal VIN+ connection, the sample point cathode of inductive circuit 1 and the sample point of voltage signal processing circuit 2 are born
The VIN- connection of pole tension input terminal；And by safety spark experimental rig G connect inductive circuit 1 sample point positive electrode and negative electrode it
Between；
The inductive circuit 1 is made of concatenated inductive circuit and current-limiting resistance RL, the one of inductance in the inductive circuit
End is the sample point anode of inductive circuit 1, and one end that the current-limiting resistance RL is not connect with the inductive circuit is inductive circuit 1
Sample point cathode.
Step 2: voltage signal is handled: in 1 course of work of inductive circuit, voltage signal processing circuit 2 is to inductive circuit 1
Sample point positive electrode and negative electrode voltage double-width grinding differential signal amplify processing after, be converted into single-ended voltage signal and be divided into
Four tunnels, which are exported, delays circuit 3 to split-phase, and the first via delays the first proportion resistor network in circuit point by first split-phase
The non-inverting input terminal for comparing comparator U2 in output circuit 4 is output to after pressure, the second tunnel delays circuit by first split-phase
In the second proportion resistor network partial pressure after be output to the inverting input terminal for comparing comparator U2 in output circuit 4, third road warp
It crosses after second split-phase delays the third proportion resistor network in circuit to divide to be output to and compares comparator U3 in output circuit 4
Inverting input terminal, the 4th tunnel by second split-phase delay the 4th proportion resistor network in circuit divide after be output to ratio
Compared with the non-inverting input terminal of comparator U3 in output circuit 4；
The detection Step 3: inductance breaking arc is held time, detailed process are as follows:
When safety spark experimental rig G two electrodes in the closure state, inductive circuit 1 work normally, at this point, sense
Property circuit 1 in induction charging energy storage, until inductive current reach maximum valueWhen, the sample point anode of inductive circuit 1 with take
Voltage between sampling point cathode is zero, and the output voltage of instrumentation amplifier U1 is instrumentation amplifier in voltage signal processing circuit 2
The voltage at the Voltage Reference end of U1；Due to the resistance value of the resistance R5, the resistance value of resistance R6, the resistance value of resistance R7, resistance R8
Resistance value and the resistance value of resistance R15 meet relational expressionTherefore the comparator
The inverting input terminal voltage of U2 is greater than non-inverting input terminal voltage, therefore comparator U2 exports low level；Due to the resistance R11's
Resistance value, the resistance value of resistance R12, the resistance value of the resistance value of resistance R13 and resistance R14 meet relational expression
Therefore the inverting input terminal voltage of the comparator U3 is greater than non-inverting input terminal voltage, therefore comparator U3 exports low level；D touching
The clock pins CLD for sending out device U4 is low level, and output keeps low level；Wherein, VINFor the input voltage of inductive circuit 1, RL
For the resistance value of the current-limiting resistance RL in inductive circuit 1；
When explosibility test is opened and closed using safety spark experimental rig G, two electricity of safety spark experimental rig G
Pole is initially separated by being closed, and since the loop current of inductive circuit 1 cannot be mutated, causes breakpoint that voltage jump, perception occurs
Circuit 1 starts to generate arc discharge, produces the voltage to jump；Although the resistance value of resistance R5, the resistance value of resistance R6, resistance R7's
The resistance value of resistance value, the resistance value of resistance R8 and resistance R15 meets relational expressionBut
The variation of the voltage exported after having delayed the second proportion resistor network to divide due to capacitor C1, so that the same phase of comparator U2
The voltage of input terminal is greater than the voltage of its inverting input terminal, and comparator U2 exports high level；Due to the resistance value of resistance R11, resistance
The resistance value of the resistance value of R12, the resistance value of resistance R13 and resistance R14 meets relational expressionTherefore compare
Voltage of the voltage of the non-inverting input terminal of device U3 still less than its inverting input terminal, comparator U3 output holding low level；D triggering
Device U4 detects the high level of comparator U2 output, starts to export high level, the high level output that d type flip flop U4 is exported is to electric arc
Time test and display driver circuit 5 start when arc duration is tested and display driver circuit 5 detects that high level arrives
Timing；Later, the high level of d type flip flop U4 output feeds back the inverting input terminal to comparator U2 by resistance R15, so that comparing
The voltage of the inverting input terminal of device U2 is greater than the voltage of its non-inverting input terminal, and comparator U2 exports low level, and d type flip flop U4's is defeated
High level is still maintained out；
With the propulsion of time, the degree of two electrode separations of safety spark experimental rig G is gradually increased, arc current
Approximately linear decaying, the arc voltage at disjunction slowly rises at this time, due to the resistance value of resistance R5, the resistance value of resistance R6, resistance
The resistance value of the resistance value of R7, the resistance value of resistance R8 and resistance R15 meets relational expressionTherefore the voltage of the non-inverting input terminal of comparator U2 is less than its anti-phase input
The voltage at end, comparator U2 output keep low level；Due to the resistance value of resistance R11, the resistance value of resistance R12, the resistance value of resistance R13
Meet relational expression with the resistance value of resistance R14Therefore the voltage of the non-inverting input terminal of comparator U3 is small
In the voltage of its inverting input terminal, comparator U3 output keeps low level；D type flip flop U4 output keeps high level；
As two electrode distances of safety spark experimental rig G further increase, arc current falls to zero suddenly, peace
Two electrodes of full spark test apparatus G are completely separated, and generate a bust at the separation of 1 two electrodes of inductive circuit at this time
Voltage signal, although the resistance value of resistance R11, the resistance value of resistance R12, the resistance value of the resistance value of resistance R13 and resistance R14 meet relationship
FormulaBut the voltage exported after having delayed the 4th proportion resistor network to divide due to capacitor C2
Variation, therefore the voltage of the non-inverting input terminal of comparator U3 be greater than its inverting input terminal voltage so that comparator U3 export
High level；D type flip flop U4 detects this high level signal, and the overturning of output state logic is low level, and 1 electric arc of inductive circuit is put
Electricity terminates；When d type flip flop U3 exports logic state overturning, generates a failing edge and export to arc duration test and show driving
Circuit 5, arc duration test and display driver circuit 5 stop timing, and arc duration test and display driver circuit 5 obtain timing
To time be denoted as inductance breaking arc and hold time, and export and shown to arc duration display circuit 6.
For example, as shown in figure 4, the inductive circuit 1 is made of inductive circuit and current-limiting resistance RL, the inductive circuit by
Concatenated DC voltage source Vi and inductance L composition, one end of the inductance L are connect with DC voltage source Vi cathode output end, institute
The other end for stating inductance L is the sample point anode of inductive circuit 1, one end of the current-limiting resistance RL and DC voltage source Vi cathode
Output end connection and ground connection, the other end of the current-limiting resistance RL are the sample point cathode of inductive circuit 1.
When safety spark experimental rig G two electrodes in the closure state, inductive circuit 1 work normally, at this point, electric
Feel L1 charging energy-storing, comparator U2 exports low level, and comparator U3 exports low level, and the clock pins CLD of d type flip flop U4 is low
Level, output keep low level；
When explosibility test is opened and closed using safety spark experimental rig G, two electricity of safety spark experimental rig G
Pole is initially separated by being closed, and the resistance in inductive circuit 1 increases suddenly, since the loop current of inductive circuit 1 cannot be mutated, is caused
Make breakpoint that voltage jump occur, inductive circuit 1 starts to generate arc discharge, produces the voltage to jump；Comparator U2 output
High level, d type flip flop U4 detect the high level of comparator U2 output, start to export high level, the height electricity of d type flip flop U3 output
Flat output is to arc duration test and display driver circuit, when arc duration test and display driver circuit detect that high level arrives
When coming, start timing；Later, the high level of d type flip flop U4 output feeds back the anti-phase input to comparator U2 by resistance R15
End, so that the voltage of the inverting input terminal of comparator U2 is greater than the voltage of its non-inverting input terminal, comparator U2 exports low level, D
The output of trigger U4 still maintains high level；
With the propulsion of time, the degree of two electrode separations of safety spark experimental rig G is gradually increased, arc current
Approximately linear decaying, the arc voltage at disjunction slowly rises at this time, comparator U2 output keeps low level, and comparator U3 is defeated
Low level is kept out, and d type flip flop U4 output keeps high level；
As two electrode distances of safety spark experimental rig G further increase, arc current falls to zero suddenly, this
When inductive circuit 1 two electrodes separation at generate the voltage signal of a bust, therefore the non-inverting input terminal of comparator U3
Voltage is greater than the voltage of its inverting input terminal, so that comparator U3 exports high level, d type flip flop U4 detects that this high level is believed
Number, the overturning of output state logic is low level, and 1 arc discharge of inductive circuit terminates；D type flip flop U4 exports logic state overturning
When, it generates a failing edge and exports to arc duration test and display driver circuit 5, arc duration test and display driver circuit
5 stop timing, when the time that arc duration test and display driver circuit 5 obtain timing is denoted as the maintenance of inductance breaking arc
Between, and export and shown to arc duration display circuit 6.
The above is only presently preferred embodiments of the present invention, is not intended to limit the invention in any way, it is all according to the present invention
Technical spirit any simple modification to the above embodiments, change and equivalent structural changes, still fall within skill of the present invention
In the protection scope of art scheme.
Claims (8)
1. a kind of circuit held time using signal single-phase monitoring inductance breaking arc, it is characterised in that: including being sequentially connected
Voltage signal processing circuit (2), split-phase delay circuit (3), compare output circuit (4), arc duration test and display driving
Circuit (5) and arc duration display circuit (6)；
The voltage signal processing circuit (2) includes instrumentation amplifier U1, resistance R1, resistance R2, resistance R3, resistance R4, resistance
One end of R17 and zener diode D1, the resistance R1 are the sample point cathode voltage input terminal of voltage signal processing circuit (2)
One end of VIN-, the resistance R3 are the sample point cathode voltage input terminal VIN+ of voltage signal processing circuit (2), and sample point is negative
Pole tension input terminal VIN- by the resistor voltage divider network that concatenated resistance R1 and resistance R2 are constituted be connected to ground, the resistance R1 and
The connecting pin of resistance R2 is connect with the inverting input terminal of instrumentation amplifier U1, and sample point cathode voltage input terminal VIN+ is by concatenated
The resistor voltage divider network that resistance R3 and resistance R4 is constituted is connected to ground, and the connecting pin and instrument of the resistance R3 and resistance R4 are amplified
The non-inverting input terminal of device U1 connects, and is connected to gain setting resistor between two gain resistor connecting pins of the instrumentation amplifier U1
RG, the plus earth of the zener diode D1, the cathode of the zener diode D1 and the Voltage Reference of instrumentation amplifier U1
End connection, the Voltage Reference end of the instrumentation amplifier U1 also passes through resistance R17 and the output end VCC of external power supply power supply connects
It connects；
It includes that the first split-phase delays circuit and the second split-phase to delay circuit that the split-phase, which delays circuit (3), and first split-phase is prolonged
Slow circuit includes capacitor C1, the first proportion resistor network being made of resistance R5 and resistance R7, and by resistance R6 and resistance R8
Second proportion resistor network of composition；One end of the resistance R5 is connect with the output end of instrumentation amplifier U1, the resistance R5
The other end be grounded by resistance R7, one end of the resistance R6 is connect with the output end of instrumentation amplifier U1, the resistance R6
The other end be grounded by resistance R8, one end of the capacitor C1 is connect with the connecting pin of resistance R6 and resistance R8, the capacitor
The other end of C1 is grounded；It includes capacitor C2 that second split-phase, which delays circuit, the third ratio being made of resistance R11 and resistance R13
Example resistor network, and the 4th proportion resistor network being made of resistance R12 and resistance R14；The resistance value of the resistance R11, electricity
The resistance value for hindering the resistance value of R12, the resistance value of resistance R13 and resistance R14 meets relational expressionThe electricity
One end of resistance R11 is connect with the output end of instrumentation amplifier U1, and the other end of the resistance R11 is grounded by resistance R13, described
One end of resistance R12 is connect with the output end of instrumentation amplifier U1, and the other end of the resistance R12 is grounded by resistance R14, institute
The one end for stating capacitor C2 is connect with the connecting pin of resistance R12 and resistance R14, the other end ground connection of the capacitor C2；
Relatively output circuit (4) include comparator U2, comparator U3, d type flip flop U4, switching diode D2, two pole of switch
The non-inverting input terminal and resistance R5 and resistance R7 of pipe D3, resistance R9, resistance R10, resistance R16 and resistance R15, the comparator U2
Connecting pin connection, the inverting input terminal of the comparator U2 connect with the connecting pin of resistance R6 and resistance R8, the comparator
The output end of U2 is connect by resistance R9 with the output end VCC of external power supply power supply；The non-inverting input terminal of the comparator U3 with
Resistance R12 is connected with the connecting pin of resistance R14, the inverting input terminal of the comparator U3 and the connection of resistance R11 and resistance R13
The output end of end connection, the comparator U3 is connect by resistance R10 with the output end VCC of external power supply power supply；The switch
The anode of diode D2 is connect with the output end of the comparator U2, the anode of the switching diode D3 and the comparator U3
Output end connection, the cathode of the cathode of the switching diode D2 and switching diode D3 with the d type flip flop U4 when
The CLD connection of clock pin, the clearing pin of the d type flip flop U4Pass through the output end VCC of resistance R16 and external power supply power supply
Connection, and be grounded by capacitor C3, the power pins Vcc and preset pin of the d type flip flop U4It is electric with external power supply
The output end VCC connection in source, the grounding pin GND ground connection of the d type flip flop U4, the signal input part of the d type flip flop U4 draw
Foot D and signal output end pinThe signal output end pin Q of connection, the d type flip flop U4 compares output circuit (4) to be described
The inverting input terminal of output end OUT, the comparator U2 drawn by resistance R15 and the signal output end of the d type flip flop U4
Foot Q connection；The resistance of the resistance value, the resistance value of resistance R6, the resistance value of resistance R7, the resistance value of resistance R8 and resistance R15 of the resistance R5
Value meets relational expression
2. the circuit described in accordance with the claim 1 held time using signal single-phase monitoring inductance breaking arc, feature are existed
In: the arc duration is tested and display driver circuit (5) is single-chip microcontroller, and the arc duration display circuit (6) is liquid crystal
Display screen.
3. the circuit held time according to claim 2 using signal single-phase monitoring inductance breaking arc, feature are existed
It is connected on the model STC89C51 of the single-chip microcontroller, the model LCD1602 of the liquid crystal display, the single-chip microcontroller
Clock circuit, the clock circuit are made of capacitor C2, capacitor C3 and crystal oscillator Y1, one end of the crystal oscillator Y1 and the single-chip microcontroller
The 18th pin connection and public capacitance C2 be grounded, the other end of the crystal oscillator Y1 connect with the 19th pin of the single-chip microcontroller and
Public capacitance C3 ground connection；29th pin of the single-chip microcontroller and the 40th pin connect with the output end VCC1 of external power supply power supply
It connects, the 20th pin ground connection of the single-chip microcontroller, the output end of the 13rd pin output circuit (4) compared with described of the single-chip microcontroller
OUT connection, the 6th pin, the 5th pin and the 4th pin of the liquid crystal display successively with the 32nd pin of the single-chip microcontroller,
33 pins and the connection of the 34th pin, the 1st pin of the liquid crystal display and the 16th pin are grounded, the liquid crystal display
2nd pin and the 15th pin are connect with the output end VCC1 of external power supply power supply, and the 3rd pin of the liquid crystal display passes through
Resistance R13 ground connection.
4. the circuit described in accordance with the claim 1 held time using signal single-phase monitoring inductance breaking arc, feature are existed
In: the model AD623 of the instrumentation amplifier U1.
5. the circuit described in accordance with the claim 1 held time using signal single-phase monitoring inductance breaking arc, feature are existed
In: the model of the comparator U2 and comparator U3 is LM2903.
6. the circuit described in accordance with the claim 1 held time using signal single-phase monitoring inductance breaking arc, feature are existed
In: the model DM74S74 of the d type flip flop U4.
7. a kind of hold time the method detected to inductance breaking arc using detection circuit as described in claim 1,
It is characterized in that, method includes the following steps:
Step 1: detection circuit connects: by the sampling of the sample point anode of inductive circuit (1) and voltage signal processing circuit (2)
Point cathode voltage input terminal VIN+ connection, by the sampling of the sample point cathode of inductive circuit (1) and voltage signal processing circuit (2)
Point cathode voltage input terminal VIN- connection；And safety spark experimental rig G is connect in the sample point anode of inductive circuit (1) and negative
Between pole；
Step 2: voltage signal is handled: in inductive circuit (1) course of work, voltage signal processing circuit (2) is to inductive circuit
(1) after the double-width grinding differential signal of sample point positive electrode and negative electrode voltage amplifies processing, it is converted into single-ended voltage signal
It is divided into four tunnels and exports and delay circuit (3) to split-phase, the first via delays the first proportion resistor in circuit by first split-phase
The non-inverting input terminal for comparing comparator U2 in output circuit (4) is output to after network partial pressure, first split-phase is passed through on the second tunnel
The anti-phase input for comparing comparator U2 in output circuit (4) is output to after delaying the second proportion resistor network in circuit to divide
End, third road is output to after second split-phase delays the third proportion resistor network in circuit to divide compares output circuit
(4) inverting input terminal of comparator U3 in, the 4th tunnel delay the 4th proportion resistor network in circuit by second split-phase
The non-inverting input terminal for comparing comparator U3 in output circuit (4) is output to after partial pressure；
The detection Step 3: inductance breaking arc is held time, detailed process are as follows:
When safety spark experimental rig G two electrodes in the closure state, inductive circuit (1) work normally, at this point, perceptual
Induction charging energy storage in circuit (1), until inductive current reaches maximum valueWhen, the sample point anode of inductive circuit (1) with
Voltage between sample point cathode is zero, and the output voltage of instrumentation amplifier U1 is instrument with putting in voltage signal processing circuit (2)
The voltage at the Voltage Reference end of big device U1；Due to the resistance value of the resistance R5, the resistance value of resistance R6, the resistance value of resistance R7, resistance
The resistance value of R8 and the resistance value of resistance R15 meet relational expressionTherefore the ratio
Inverting input terminal voltage compared with device U2 is greater than non-inverting input terminal voltage, therefore comparator U2 exports low level；Due to the resistance
The resistance value of R11, the resistance value of resistance R12, the resistance value of the resistance value of resistance R13 and resistance R14 meet relational expressionTherefore the inverting input terminal voltage of the comparator U3 is greater than non-inverting input terminal voltage, therefore compares
Low level is exported compared with device U3；The clock pins CLD of d type flip flop U4 is low level, and output keeps low level；Wherein, VINFor sense
Property circuit (1) input voltage, RL be inductive circuit (1) in current-limiting resistance RL resistance value；
When explosibility test is opened and closed using safety spark experimental rig G, two electrodes of safety spark experimental rig G by
Closure is initially separated, and since the loop current of inductive circuit (1) cannot be mutated, causes breakpoint that voltage jump, perception electricity occurs
Road (1) starts to generate arc discharge, produces the voltage to jump；Although the resistance value of resistance R5, the resistance value of resistance R6, resistance R7's
The resistance value of resistance value, the resistance value of resistance R8 and resistance R15 meets relational expressionBut
The variation of the voltage exported after having delayed the second proportion resistor network to divide due to capacitor C1, so that the same phase of comparator U2
The voltage of input terminal is greater than the voltage of its inverting input terminal, and comparator U2 exports high level；Due to the resistance value of resistance R11, resistance
The resistance value of the resistance value of R12, the resistance value of resistance R13 and resistance R14 meets relational expressionTherefore compare
Voltage of the voltage of the non-inverting input terminal of device U3 still less than its inverting input terminal, comparator U3 output holding low level；D triggering
Device U4 detects the high level of comparator U2 output, starts to export high level, the high level output that d type flip flop U4 is exported is to electric arc
Time test and display driver circuit (5), when arc duration is tested and display driver circuit (5) detects that high level arrives,
Start timing；Later, the high level of d type flip flop U4 output feeds back the inverting input terminal to comparator U2 by resistance R15, so that
The voltage of the inverting input terminal of comparator U2 is greater than the voltage of its non-inverting input terminal, and comparator U2 exports low level, d type flip flop U4
Output still maintain high level；
With the propulsion of time, the degree of two electrode separations of safety spark experimental rig G is gradually increased, and arc current is approximate
Linear attenuation, the arc voltage at disjunction slowly rises at this time, due to the resistance value of resistance R5, the resistance value of resistance R6, resistance R7
The resistance value of resistance value, the resistance value of resistance R8 and resistance R15 meets relational expressionCause
The voltage of the non-inverting input terminal of this comparator U2 is less than the voltage of its inverting input terminal, and comparator U2 output keeps low level；By
Meet relational expression in the resistance value of the resistance value of resistance R11, the resistance value of resistance R12, the resistance value of resistance R13 and resistance R14Therefore the voltage of the non-inverting input terminal of comparator U3 is less than the voltage of its inverting input terminal, compares
Device U3 output keeps low level；D type flip flop U4 output keeps high level；
As two electrode distances of safety spark experimental rig G further increase, arc current falls to zero suddenly, safety fire
Two electrodes of flower experimental rig G are completely separated, and generate the electricity of a bust at the separation of (1) two electrode of inductive circuit at this time
Signal is pressed, although the resistance value of resistance R11, the resistance value of resistance R12, the resistance value of the resistance value of resistance R13 and resistance R14 meet relational expressionBut the voltage exported after having delayed the 4th proportion resistor network to divide due to capacitor C2
Variation, therefore the voltage of the non-inverting input terminal of comparator U3 is greater than the voltage of its inverting input terminal, so that comparator U3 output is high
Level；D type flip flop U4 detects this high level signal, and the overturning of output state logic is low level, and inductive circuit (1) electric arc is put
Electricity terminates；When d type flip flop U3 exports logic state overturning, generates a failing edge and export to arc duration test and show driving
Circuit (5), arc duration test and display driver circuit (5) stop timing, and arc duration test and display driver circuit (5) will
The time that timing obtains is denoted as inductance breaking arc and holds time, and exports and shown to arc duration display circuit (6).
8. according to the method for claim 7, it is characterised in that: the inductive circuit (1) is by concatenated inductive circuit and limit
Leakage resistance RL is formed, and one end of inductance is the sample point anode of inductive circuit (1), the current-limiting resistance RL in the inductive circuit
The one end not connecting with the inductive circuit is the sample point cathode of inductive circuit (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710119881.2A CN106771940B (en) | 2017-03-01 | 2017-03-01 | The circuit and method held time using signal single-phase monitoring inductance breaking arc |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710119881.2A CN106771940B (en) | 2017-03-01 | 2017-03-01 | The circuit and method held time using signal single-phase monitoring inductance breaking arc |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106771940A CN106771940A (en) | 2017-05-31 |
| CN106771940B true CN106771940B (en) | 2019-06-18 |
Family
ID=58958965
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710119881.2A Expired - Fee Related CN106771940B (en) | 2017-03-01 | 2017-03-01 | The circuit and method held time using signal single-phase monitoring inductance breaking arc |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106771940B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108107736B (en) * | 2017-12-27 | 2021-01-29 | 福州大学 | Single-pole switch breaking time feedback self-correction control method |
| CN109085484B (en) * | 2018-10-24 | 2023-11-10 | 广州赛宝计量检测中心服务有限公司 | Method and circuit for measuring voltage holding time of voltage endurance tester |
Citations (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001013402A1 (en) * | 1999-08-13 | 2001-02-22 | Hüttinger Elektronik GmbH & Co. KG | Electric supply unit for plasma installations |
| CN1987490A (en) * | 2005-12-22 | 2007-06-27 | 许廷格电子有限及两合公司 | Method and device for detecting arcs |
| CN101573847A (en) * | 2006-10-31 | 2009-11-04 | 西门子能量及自动化公司 | Systems and methods for arc fault detection |
| CN201828634U (en) * | 2010-08-25 | 2011-05-11 | 重庆大学 | Electric arc detection device of high-voltage cabinet |
| CN102528224A (en) * | 2011-12-19 | 2012-07-04 | 湖南科技大学 | Alternating and direct current and voltage signal detection device for double-wire welding |
| EP2539723B1 (en) * | 2010-02-24 | 2015-04-01 | Siemens Aktiengesellschaft | Electric arc discharge evaluation method, and associated test stand |
| CN204575811U (en) * | 2015-04-07 | 2015-08-19 | 石家庄汉迪电子仪器有限公司 | A kind of test macro of high-voltage switch contact |
| CN204706888U (en) * | 2015-06-02 | 2015-10-14 | 魏建华 | A kind of overvoltage protection with circuit checker |
| CN105353302A (en) * | 2015-11-20 | 2016-02-24 | 清华大学 | Switch equipment arcing time detection device and switch equipment arcing time detection method |
| CN105522238A (en) * | 2014-10-28 | 2016-04-27 | 佛山科学技术学院 | Discharging gap state detection module based on pulse sequence analysis |
| CN105954673A (en) * | 2016-04-29 | 2016-09-21 | 国网浙江省电力公司绍兴供电公司 | High-voltage alternating-current circuit breaker arc burning time measuring system and method |
| CN205620492U (en) * | 2015-10-23 | 2016-10-05 | 丰郅(上海)新能源科技有限公司 | Photovoltaic arc detection sensor |
| CN205691654U (en) * | 2016-06-16 | 2016-11-16 | 广州开能电气实业有限公司 | A kind of synchronization signal detection circuit |
| CN106154147A (en) * | 2016-04-20 | 2016-11-23 | 桂林理工大学 | Electro-explosive opening switch experimental technique in inductive energy storage type pulse power system |
| CN205809202U (en) * | 2016-06-23 | 2016-12-14 | 深圳市中智盛安安全技术有限公司 | A kind of fault arc detection device |
| CN106410739A (en) * | 2016-11-02 | 2017-02-15 | 云南电力试验研究院(集团)有限公司 | Arc protection device and fault diagnosis method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6633824B2 (en) * | 2001-03-29 | 2003-10-14 | Siemens Energy & Automation, Inc. | Direct current electrical system arc detection apparatus and method |
-
2017
- 2017-03-01 CN CN201710119881.2A patent/CN106771940B/en not_active Expired - Fee Related
Patent Citations (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001013402A1 (en) * | 1999-08-13 | 2001-02-22 | Hüttinger Elektronik GmbH & Co. KG | Electric supply unit for plasma installations |
| CN1987490A (en) * | 2005-12-22 | 2007-06-27 | 许廷格电子有限及两合公司 | Method and device for detecting arcs |
| CN101573847A (en) * | 2006-10-31 | 2009-11-04 | 西门子能量及自动化公司 | Systems and methods for arc fault detection |
| EP2539723B1 (en) * | 2010-02-24 | 2015-04-01 | Siemens Aktiengesellschaft | Electric arc discharge evaluation method, and associated test stand |
| CN201828634U (en) * | 2010-08-25 | 2011-05-11 | 重庆大学 | Electric arc detection device of high-voltage cabinet |
| CN102528224A (en) * | 2011-12-19 | 2012-07-04 | 湖南科技大学 | Alternating and direct current and voltage signal detection device for double-wire welding |
| CN105522238A (en) * | 2014-10-28 | 2016-04-27 | 佛山科学技术学院 | Discharging gap state detection module based on pulse sequence analysis |
| CN204575811U (en) * | 2015-04-07 | 2015-08-19 | 石家庄汉迪电子仪器有限公司 | A kind of test macro of high-voltage switch contact |
| CN204706888U (en) * | 2015-06-02 | 2015-10-14 | 魏建华 | A kind of overvoltage protection with circuit checker |
| CN205620492U (en) * | 2015-10-23 | 2016-10-05 | 丰郅(上海)新能源科技有限公司 | Photovoltaic arc detection sensor |
| CN105353302A (en) * | 2015-11-20 | 2016-02-24 | 清华大学 | Switch equipment arcing time detection device and switch equipment arcing time detection method |
| CN106154147A (en) * | 2016-04-20 | 2016-11-23 | 桂林理工大学 | Electro-explosive opening switch experimental technique in inductive energy storage type pulse power system |
| CN105954673A (en) * | 2016-04-29 | 2016-09-21 | 国网浙江省电力公司绍兴供电公司 | High-voltage alternating-current circuit breaker arc burning time measuring system and method |
| CN205691654U (en) * | 2016-06-16 | 2016-11-16 | 广州开能电气实业有限公司 | A kind of synchronization signal detection circuit |
| CN205809202U (en) * | 2016-06-23 | 2016-12-14 | 深圳市中智盛安安全技术有限公司 | A kind of fault arc detection device |
| CN106410739A (en) * | 2016-11-02 | 2017-02-15 | 云南电力试验研究院(集团)有限公司 | Arc protection device and fault diagnosis method thereof |
Non-Patent Citations (2)
| Title |
|---|
| BUCK变换器的输出短路火花放电能量及输出本质安全判据;刘树林 等;《物理学报》;20130625;第62卷(第16期);全文 * |
| 电容电路短路火花放电特性及其建模研究;刘树林 等;《煤炭学报》;20121231;第37卷(第12期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106771940A (en) | 2017-05-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104865513B (en) | A kind of surge electric current test circuit for carrying detection function | |
| CN106771940B (en) | The circuit and method held time using signal single-phase monitoring inductance breaking arc | |
| CN103344897A (en) | Non-destructive power MOS tube single-event burnout effect detecting circuit and non-destructive power MOS tube single-event burnout effect detecting method | |
| CN208384073U (en) | A kind of protection board test apparatus | |
| CN107069688A (en) | A kind of surge restraint circuit and Surge suppression method | |
| CN206281942U (en) | A kind of inductance open-circuit arc time detection circuit | |
| CN205384326U (en) | Electric charge amount measuring device | |
| CN106646199B (en) | Inductive circuit breaking arc discharge time detection circuit and method | |
| CN106546895A (en) | A kind of diode surge capability test circuit and its control method | |
| CN201662583U (en) | Ultrahigh-frequency pulse generator | |
| CN201590659U (en) | Surge response protection circuit of induction cooker | |
| CN106771531B (en) | Inductance disconnects electric arc start/stop time detection circuit and method | |
| CN204945287U (en) | A kind of capacitor testing instrument | |
| CN107477610A (en) | A kind of igniter fire frequency target test device | |
| CN106707005B (en) | Inductive circuit disconnects electric arc start/stop time detection circuit and method | |
| CN206470323U (en) | A kind of inductance disconnects electric arc and set up and finish time detection circuit | |
| CN201352249Y (en) | Secondary pulse circuit for detecting electric power cable fault | |
| CN207691759U (en) | A kind of tension measuring circuit | |
| CN103939256A (en) | Self-adaptation ionic current detecting device | |
| CN114545165B (en) | Special high-voltage insulation detection device for capacitive load | |
| CN103185489B (en) | The detection method of head of electronic detonator welding quality and device | |
| CN109061348A (en) | Extra-high voltage project no residual voltage lightning arrester monitor detection device through-flow greatly | |
| CN103728482A (en) | Gas appliance flame ionization current detecting circuit and detecting method thereof | |
| CN204649879U (en) | The intermittent pick-up unit of capacitor | |
| CN206411178U (en) | A kind of inductance open-circuit arc is set up to jump detection circuit with extinction voltage |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190618 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |