CN106685633A - Full-digital phase shift weak signal phase lock detection method and equipment - Google Patents

Full-digital phase shift weak signal phase lock detection method and equipment Download PDF

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Publication number
CN106685633A
CN106685633A CN201611261891.1A CN201611261891A CN106685633A CN 106685633 A CN106685633 A CN 106685633A CN 201611261891 A CN201611261891 A CN 201611261891A CN 106685633 A CN106685633 A CN 106685633A
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signal
sine wave
digital phase
phase shift
adc
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CN106685633B (en
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王璐
陈杰
陈国平
王红
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Chongqing University of Post and Telecommunications
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Chongqing University of Post and Telecommunications
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

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  • Computer Networks & Wireless Communication (AREA)
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  • Analogue/Digital Conversion (AREA)

Abstract

The invention belongs to the field of weak signal detection, and relates to a full-digital phase shift weak signal phase lock detection method. The full-digital phase shift weak signal phase lock detection method includes the steps: phase lock detection is performed on a mixed signal including a fixed frequency weak signal to be detected and ambient noise and a reference signal through digital phase shift; a singlechip ADC unit acquires a phase lock detection result and sends the phase lock detection result to a singlechip input unit; a singlechip signal generation unit generates an excitation signal and a digital phase shift signal which is in cofrequency with the excitation signal; multiplication of the digital phase shift signal and the mixed signal is performed, and the result of multiplication can obtain a direct current component through a low pass filter; the singlechip ADC unit is used to acquire a continuously changed direct current component signal and obtains a preset number of sampling average values; and according to the sampling average value, the weak signal is detected and determined. The full-digital phase shift weak signal phase lock detection method can perform high-accuracy quality detection on passive equipment in a severe working environment, and provided is a simple and efficient weak signal detection method.

Description

Full-digital phase-shifting micro-signal phase lock-in detecting method and apparatus
Technical field
The present invention relates to Detection of Weak Signals field, more particularly to a kind of full-digital phase-shifting micro-signal detection method
Background technology
With the fast-developing and application of mobile communication technology, enterprise is useful in complicated and adverse circumstances to communication equipment The identification of signal, collection and Utilization ability require more and more higher.When communication equipment is applied in adverse circumstances, its useful signal phase Often very low compared with environment noise, in order to ensure communication quality, high performance Detection of Weak Signals method is particularly important.At certain The big applied environment (such as industrial premises) of a little high-temperature high-humidity noises, due to the complexity and uncertainty of noise, small-signal Detection and gather it is more difficult, while device hardware by humiture vibration etc. such environmental effects, so as to cause the region lead to Letter cannot be normally completed, so need badly that high-quality detection and collection are carried out to the small-signal in complex environment, so as to carry out The communication work of equipment.In addition, the reliability of mass communication terminal generally requires effectively guarantee in applied environment, but there is no double It is a difficult point to terminal (such as the speaker and alarm) guaranteed reliability of communication function.The long-range single of this equipment is to logical In letter system, the working condition of terminal may be subject to the shadow of the factors such as environment noise, vibration equipment, humiture and electromagnetic radiation Ring, this exactly needs the reason for ensureing its reliability.Up to ten thousand speakers being such as distributed in Nuclear Power Station Factory Building, due to its environment spy Different property, in order to avoid dangerous situation, manufacturer to ensure each speaker at any time can normal work, timely trouble shooting speaker, this Generally need to expend a large amount of manpower and materials, therefore it is remote unidirectional to realize to need a kind of efficient active Detection of Weak Signals method badly Equipment dependability detection in communication.
Detect strong noise environment under small-signal when, conventional correlation detection is analog detecting method, mainly Correlation analysiss are carried out to signal and noise, is determined that value does not typically have stronger dependency to signal in the same time, and is disturbed and make an uproar Sound randomness is stronger, not poor as the Relativity of value in the same time, using the difference of correlation function, determination signal and interference Noise effectively makes a distinction.And common phase lock-in detecting method is a kind of cross-correlation test method of constant time lag (i.e. phase contrast), The extraction of useful signal information is realized using phase-sensitive detection, signal frequency can be utilized simultaneouslyExamined with phase difference θ Survey, noise is very low with the probability of signal together frequency and homophase.For direct current or gradual small-signal to be measured need to be modulated and put Phase lock-in detecting is carried out again after big.Its conventional method is:1. by the mixing of interfering noise signal n (t) and small-signal s (t) to be measured Signal x (t) sends into the input all the way of multiplier;2. the square wave with small-signal to be measured with frequency is produced by single-chip microcomputer, through monolithic Another road that multiplier is sent into after sine wave change-over circuit and phase-shift circuit outside machine is input into as reference signal;3. by multiplication Device operation result is sent into low pass filter and a fixed output direct current signal V is obtained0, by detecting that the value can just be treated The amplitude and phase information of micrometer weak signal, so as to realize the detection of small-signal in Low SNR signal.
Above-mentioned existing phase lock-in detecting method haves the shortcomings that following using upper:1. with small-signal s (t) to be measured with frequency ginseng Examine signal to produce to needing, through outside sine wave change-over circuit and phase-shift circuit, to cause which into before multiplier from single-chip microcomputer Necessarily lead to uncontrollable change with the phase contrast between small-signal to be measured, affect the accuracy of testing result;2. it is sinusoidal The analog circuit such as ripple change-over circuit and phase-shift circuit is easily subject to ambient noise interference;3. sine wave change-over circuit and phase-shift circuit Higher Deng analog circuit complexity, power consumption is larger.
The content of the invention
In order to realize identification, detection and the utilization of low signal-to-noise ratio small-signal under the complex environments such as strong noise, improve existing Phase lock-in detecting method phase contrast is uncontrollable to cause testing result inaccurate, and phase-shift circuit is easily disturbed, power consumption is big, complexity is high for simulation The shortcomings of, accuracy, practicality and the convenience of detection method are improved, the present invention proposes a kind of SCM Based digital Phase shift micro-signal phase lock-in detecting method.The convenience and accuracy of full-digital phase-shifting is this process employs, is combined with phase lock-in detecting method Carry out the detection of small-signal in Low SNR signal.
To solve above-mentioned technical problem, the present invention proposes a kind of full-digital phase-shifting micro-signal phase lock-in detecting method, including step: Mixed signal comprising small-signal and environment noise carries out phase lock-in detecting, single-chip microcomputer modulus with the reference signal of Jing digital phase shifts Transducer ADC units collection phase lock-in detecting result sends into single-chip microcomputer signal comparing unit;Single-chip microcomputer signal generation unit is produced and is swashed Encourage signal and with its with frequency digital phase shift signal, digital phase shift signal is multiplied with mixed signal, is obtained by low pass filter DC component in multiplication result, gathers the continually varying direct current signal using Chip Microcomputer A/D C cell, obtains sample mean Value, calculates the maximum MAX and peak-to-average force ratio PAR of sample mean, and judges MAX and PAR whether in preset threshold range, if Judge to detect the small-signal and output it in, judging unit, if not in threshold range, judgement is not detected by any micro- Weak signal.Wherein, digital phase shift signal meets the sine wave for making which there are 32 Phase Continuation changes in individual signals sequence, It is that each sine wave phase changes (1/32) * 2 π.
Wherein, pumping signal is produced using single-chip microcomputer signal generating unit, configure a sine wave table first, using list The direct memory access DMA channel of piece machine transmits a circulation sine wave table in units of byte, weight in circulation sine wave table Multiple sine wave block sends DAC12_0 (digital to analog converter 12_0) module to;Meanwhile, the comparator B of sixteen bit produces pulse width Modulating wave PWM ripples, adjust PWM duty cycle and cycle according to the cycle of direct memory access DMA channel transmission data, by filter Ripple device realizes that D/A (D/A switch) is changed.I.e. when PWM rising edges are triggered, loaded by the control of comparand register CCR0 and passed Transmission of data gives DAC12_0 modules, after DAC12_0 modules carry out including the process of examination and correction, converts the result to analogue signal, Sine wave exciting signal is obtained.
Further, the digital phase shift sinusoidal signal with pumping signal with frequency is produced using single-chip microcomputer signal generating unit, One is respectively transmitted with the synchronous PWM of frequency in comparator TB_1 and TB_2, therefore the excitation that digital to analog converter DAC12_0 modules spread out of The data of signal and the collection passback of analog-digital converter ADC12_0 modules are synchronous data.Concretely, configure original first Sine wave table, after direct memory access DMA interrupts transmission flag bit set, changes the source address data of DMA, will sine wave Phase place of the table to (1/32) * 2 π of right translation;Again digital to analog converter DAC12_1 modules are to each sine wave period Imitation conveyance 32 Point, that is, obtain 32 phase gt sinusoidal reference signals with frequency;The data that ADC12_0 modules are collected carry out meansigma methodss Calculate, i.e., sued for peace to obtain accumulated value TEMP_SUM to adopting back data accumulation by circulation, then division arithmetic is done to TEMP_SUM, obtained The meansigma methodss (ADC_RES_PHASE_AVERAGE) of ADC12_0 modules acquiring datas;32 adopted back to ADC12_0 modules are just The meansigma methodss of string change direct current signal are averaged (AVERAGE_32) and maximum (MAX) again, according to formula PAR=MAX/ AVERAGE_32 calculates PAR (peak-to-average force ratio) value, and judges whether MAX and PAR meets predetermined threshold value model by single-chip microcomputer judging unit Enclose, if meeting, single-chip microcomputer judges to detect the small-signal and output it, if not meeting, judgement is not detected by any micro- Weak signal.
The present invention also provides a kind of full-digital phase-shifting micro-signal phse lock detecting apparatus, including:Automatic gain control circuit, band Bandpass filter, multiplication unit, low pass filter, ADC, information source end launch a measure frequency weak signal to be checked, comprising micro- The mixed signal of weak signal and environment noise enters band filter through automatic growth control, and multiplication unit is believed to digital phase shift Number carrying out multiplying with mixed signal produces two frequencys multiplication and direct current signal, and multiplication result is obtained directly by low pass filter Flow component;Into ADC units produce pumping signal and with its with frequency digital phase shift reference signal, mixed signal and Jing numeral moves The reference signal of phase carries out phase lock-in detecting, and ADC units collection phase lock-in detecting result simultaneously sends into ADC units, and ADC units gather the company The DC component signal of continuous change, obtains predetermined number sample mean, judges small-signal according to sample mean detection.
Wherein, the generation of the pumping signal is specifically included, and DAC units configure a sine wave table first, logical using DMA Road is recycled sine wave table in units of byte, obtains the sine wave block for repeating and sends DAC12_0 units to;While comparator Produce PWM ripples, adjustment PWM ripples dutycycle and cycle;Sine wave block and PWM ripples are sent into into wave filter and realizes that D/A is changed, just obtained String wave excitation signal.
Produce digital phase shift signal to specifically include:Comparator TB_1 and TB_2 are respectively transmitted a PWM with frequency synchronization, In interrupt function change DMA source address data, will sine wave table to (1/32) * 2 π phase places of right translation, obtain 32 times with frequency Phase gt sinusoidal reference signal;ADC units gather the meansigma methodss of sinusoidal reference signal, and circulation is carried out to ADC units Sue for peace to obtain accumulated value TEMP_SUM, then right
TEMP_SUM carries out meansigma methodss AVERAGE that division arithmetic obtains ADC gathered datas;32 adopted back to ADC put down Average is averaged (AVERAGE_32) again, according to formula:PAR=MAX/AVERAGE_32 calculates peak-to-average force ratio PAR values.
The present invention causes testing result inaccurate for existing phase lock-in detecting method phase contrast is uncontrollable, simulates phase-shift circuit Easily be disturbed, the shortcomings of power consumption is big, complexity is high, it is proposed that a kind of phase lock-in detecting method of full-digital phase-shifting, the numeral for being adopted Phase shift can travel through the phase contrast of small-signal to be measured and reference signal, so as to effectively prevent the uncontrollable caused detection of phase contrast As a result it is inaccurate, while full-digital phase-shifting can improve interference free performance, complexity and detection hardware power consumption are reduced, height is can apply to A kind of high accuracy quality testing of the passive audio frequency apparatus under noise circumstance, there is provided simple efficient Detection of Weak Signals side Method.
Description of the drawings
In order that the purpose of the present invention, technical scheme become more apparent, below in conjunction with accompanying drawing, the present invention is done further Describe in detail, wherein:
Fig. 1 is full-digital phase-shifting micro-signal phase lock-in detecting method implementing procedure figure;
Fig. 2 (a) is the code structure figure for producing digital phase shift reference signal;B () is schemed for the detection of digital phase shift reference signal;
Fig. 3 (a) is the code structure figure for producing sine wave exciting signal;B () is schemed for sine wave exciting signal detection;
Fig. 4 is full-digital phase-shifting micro-signal phase lock-in detecting structure chart.
Specific embodiment
In order to realize identification, detection and the utilization of low signal-to-noise ratio small-signal under the complex environments such as strong noise, detection is improved The practicality and convenience of method, the present invention propose a kind of SCM Based full-digital phase-shifting micro-signal phase lock-in detecting method. This process employs the convenience and accuracy of full-digital phase-shifting, combined with phase lock-in detecting method carry out it is faint in Low SNR signal The detection of signal.
Below in conjunction with the accompanying drawings the technical scheme in the embodiment of the present invention is carried out it is clear, describe in detail.
Full-digital phase-shifting micro-signal phase lock-in detecting of the present invention realizes that process includes:Using single-chip microcomputer (with single-chip microcomputer Related description is carried out as a example by MSP430F169) directly produce determine frequency sine-wave and Active spurring signal is provided for speaker, then by number Word phase shift reference signal carries out phase lock-in detecting with by the pumping signal of pollution from environmental noise, and testing result is continually varying direct current Signal, and the signal is adopted back by ADC send single-chip microcomputer back to and carry out process judgement, it is illustrated in figure 1 full-digital phase-shifting micro-signal lock phase Detection method implementing procedure figure, including:Information source end launches a measure frequency weak signal to be checked, and mike receives small-signal and ring Border the formation of noise mixed signal.Mixed signal enters band filter through automatic growth control, produces through analog multiplier Two frequencys multiplication and direct current signal, obtain DC component by low pass filter, into Chip Microcomputer A/D C0 module, produce pumping signal and Reference signal, mixed signal carry out phase lock-in detecting with the reference signal of Jing digital phase shifts, and ADC collection phase lock-in detecting results are simultaneously sent into Single-chip microcomputer comparator judges whether the judgement for detecting small-signal.
Can using external power amplifying circuit will determine frequency sine-wave pumping signal send into information source end, speaker sounding, Mike It is mixed signal that sound of the wind sound sensor is received by the pumping signal of sound pollution, and mixed signal is through automatic growth control module AGC enters band filter, filters partial noise;The digital to analog converter DAC of single-chip microcomputer produces one with pumping signal with frequency Digital phase shift signal, the digital phase shift signal optimum can be to make which there are 32 Phase Continuation changes in individual signals sequence Sine wave, i.e. each sine wave phase change turn to (1/32) * 2 π;Analog multiplier will filter the mixed signal and number of partial noise Word phase shift signal carries out multiplication process, obtains carrying two frequency multiplication sinusoidal signals of DC component, two times of the output of analog multiplier Frequency and direct current send into the direct current signal that low pass filter obtains sinusoidal variations, and above-mentioned direct current signal is adopted back by analog-digital converter ADC 32 sample means are calculated to single-chip microcomputer computing unit, the maximum MAX and peak-to-average force ratio PAR of 32 sample means is obtained, And judge whether MAX and PAR meets preset threshold range according to single-chip microcomputer judging unit, if meeting, single-chip microcomputer judges to detect The small-signal simultaneously outputs it, if not meeting, judgement is not detected by any small-signal.
Wherein, single-chip microcomputer can adopt MSP430F169, can complete phase lock-in detecting using analog multiplier, perform multiplier work( Can, will mixed signal and digital phase shift reference signal carry out multiplication process, obtain carrying the sinusoidal letter of two frequencys multiplication of DC component Number.
The acquisition of the digital phase shift reference signal is illustrated below by a specific example, such as Fig. 2 (a) show number The acquisition structure chart of word phase shift reference signal.
User's initialization and sine wave table configuration first;To used D direct memory access MA, digital to analog converter DAC, DMA interrupt modes are entered after analog-digital converter ADC, comparator TB initialization, constantly changes the laggard line flag position of source address of DMA Judge, you can the reference signal after phase shift is exported by DAC, low-power consumption and interrupt routine is then log out, is reentered mastery routine.Tool Body includes:
The digital phase shift sinusoidal signal with pumping signal with frequency is produced using single-chip microcomputer signal generating unit, in comparator One pulse width modulation (PWM) with frequency synchronization of TB_1 and TB_2 transmission, therefore the excitation that digital to analog converter 12_0DAC12_0 spreads out of Signal and analog-digital converter 12_0ADC12_0 collection return datas would is that synchronous data.
As Fig. 2 (b) is schemed for the detection of digital phase shift reference signal.It is the digital phase shift sinusoidal signal with pumping signal with frequency.
1kHz sine wave exciting signal structure charts are produced directly as Fig. 3 (a) show MSP430F169.Electrification reset, uses Family initializes and sine wave table configuration, to entering in DMA after used DMA, DAC (digital to analog converter), ADC, TB initialization Disconnected pattern, exports 1kHz sine wave exciting signals by DAC after carrying out flag bit judgement, is then log out low-power consumption and interrupt routine, Reenter main program cycle.Fig. 3 (b) is schemed for sine wave exciting signal detection, is 1kHz sine wave exciting signals.
Configure original 1kHz sine wave tables first, will one the dispersion number code table of sine wave discretization is stored in In depositing, for forming the prototype of 1kHz sine waves, after direct memory access DMA interrupts transmission flag bit set, change DMA's Source address data, will phase place from sine wave table to (1/32) * 2 π of right translation;Digital to analog converter 12_1DAC12_1 is to each again 32 points of sine wave period Imitation conveyance, that is, obtain 32 phase gt sinusoidal reference signals with frequency.Reference waveform signal As shown in Fig. 2 (b).
Fig. 4 is full-digital phase-shifting micro-signal phase lock-in detecting structure chart.Initialization, interrupts into DMA, puts interrupt flag bit, Change DMA0 source address input datas, sine wave output reference signal and with frequency displacement phase sine wave.ADC is adopted back, carries out meansigma methodss With the calculating of peak-to-average force ratio, DMA is carried out, DAC, ADC, TB reset.Specifically include,
Analog-digital converter 12_0DC12_0 modules will gather sinusoidal variations direct current signal (the i.e. 32 discrete direct current letters returned The signal in sinusoidal variations that number point is constituted) load random access memory ram and temporarily store, the sinusoidal variations in recursive call RAM Direct current signal point, carries out the cumulative accumulation result TEMP_SUM that sues for peace to obtain, then does division arithmetic to TEMP_SUM, division is transported to which Calculate result to load in meansigma methodss storage of array device (ADC_RES_PHASE_AVERAGE), that is, obtain the sinusoidal change that ADC collections are returned Change the meansigma methodss of direct current signal data.32 sinusoidal variations direct current signals that analog-digital converter 12_0ADC12_0 is adopted back it is flat Mean data is averaged (AVERAGE_32), extracts the maximum (MAX) of 32 average datas, according to formula PAR= MAX/AVERAGE_32 calculates peak-to-average force ratio PAR values.And judge whether MAX and PAR meets predetermined threshold value model by single-chip microcomputer comparator Enclose, if meeting, single-chip microcomputer judges to detect the small-signal and output it, if not meeting, judgement is not detected by any micro- Weak signal.
The Active spurring signal producing method of information source end speaker has various, can be completed using single-chip microcomputer code, as A kind of embodiment, the present invention are further illustrated by following instance,
Excitation sine wave is produced using single-chip microcomputer MSP430F169, adoptable embodiment is specifically, just configure one String wave table, user's initialization, into low-power consumption mode.Using direct memory access DMA channel transmit one in units of byte Circulation sine wave table, send the sine wave block repeated in sine wave table to DAC12_0 modules.Use sixteen bit comparator simultaneously B produces pulse width modulation wave PWM ripples, adjustment PWM duty cycle and cycle, realizes that D/A is changed by filtering device.I.e. in DMA After interrupt flag bit set, DMA begins preparing for transmitting data, triggers if any PWM rising edges, then by comparand register CCR0's Operation loading transmits data to DAC12_0, and calculation process (is included repairing the inspection of rectifiable offset error by DAC12_0 modules Result just) is converted to analog quantity, obtains the 1kHz sine wave exciting signals as shown in Fig. 3 (b).
The present invention directly produces digital phase shift signal using single-chip microcomputer, with reference to coherent detection, realizes the lock phase of small-signal Detection;Public address equipment that can be more than, quantity wide to scope under adverse circumstances carries out high accuracy quality testing, there is provided a kind of simple Efficient method for detecting weak signals, the status monitoring and guaranteed reliability for passive voice frequency terminal provide a kind of enforceable Solution.
Be should be understood that embodiment provided above or embodiment are only the preferred embodiment of the present invention, Not to limit the present invention, all any modifications that within the spirit and principles in the present invention present invention is made, equivalent, Improve etc., should be included in protection scope of the present invention.

Claims (8)

1. a kind of full-digital phase-shifting micro-signal phase lock-in detecting method, it is characterised in that include:Comprising measure frequency weak signal to be checked With the mixed signal of environment noise, phase lock-in detecting, ADC units collection phase lock-in detecting knot are carried out through the reference signal of digital phase shift Fruit simultaneously sends into input block;Signal generation unit produce a pumping signal, and with its with frequency digital phase shift signal, numeral move Phase signals carry out multiplying with mixed signal, and multiplication result obtains DC component by low pass filter, mono- using ADC Unit gathers the continually varying DC component signal, obtains predetermined number sample mean, is judged according to sample mean detection Small-signal.
2. method according to claim 1, it is characterised in that the digital phase shift signal is to make which in individual signals sequence The middle sine wave that there are 32 Phase Continuation changes, each sine wave phase change (1/32) * 2 π.
3. method according to claim 1, it is characterised in that the generation of the pumping signal is specifically included, and DAC units are matched somebody with somebody A sine wave table is put, sine wave table is recycled in units of byte using DMA channel, obtain the sine wave block transmission for repeating Give DAC12_0 units;Comparator produces PWM ripples, adjustment PWM ripples dutycycle and cycle simultaneously;Sine wave block and PWM ripples are sent into Wave filter realizes that D/A is changed, and obtains sine wave exciting signal.
4. method according to claim 3, it is characterised in that described to realize that D/A is changed specifically, in PWM ripple rising edges During triggering, loaded by the control of comparand register CCR0 and transmit data to DAC12_0 modules, DAC12_0 modules are corrected The examination and correction computing of offset error, and analog quantity is converted the result to, obtain sine wave exciting signal.
5. method according to claim 1, it is characterised in that produce digital phase shift signal and specifically include:Single-chip microcomputer compares Device TB_1 and TB_2 are respectively transmitted one with the synchronous PWM of frequency, change the source address data of DMA, Ji Jiangzheng in interrupt function String wave table obtains 32 phase gt sinusoidal reference signals with frequency to (1/32) * 2 π phase places of right translation;ADC units are gathered The meansigma methodss of sinusoidal reference signal, circulation carry out the accumulated value TEMP_SUM that sues for peace to obtain to ADC units, then TEMP_SUM is carried out Division arithmetic obtains meansigma methodss AVERAGE of ADC gathered datas;32 meansigma methodss adopted back to ADC are averaged again (AVERAGE_32), according to formula:PAR=MAX/AVERAGE_32 calculates peak-to-average force ratio PAR values, and PAR values are carried out with predetermined threshold value Digital phase shift signal is obtained relatively, wherein, MAX is the maximum in 32 meansigma methodss.
6. a kind of full-digital phase-shifting micro-signal phse lock detecting apparatus, it is characterised in that include:Automatic gain control circuit, band logical Wave filter, multiplication unit, low pass filter, ADC, information source end launch a measure frequency weak signal to be checked, comprising faint The mixed signal of signal and environment noise enters band filter through automatic growth control, and multiplication unit is to digital phase shift signal Multiplying is carried out with mixed signal and produces two frequencys multiplication and direct current signal, multiplication result obtains direct current by low pass filter Component;Into ADC units, signal generating unit produces pumping signal and with which with the digital phase shift reference signal of frequency, mixes letter Number phase lock-in detecting is carried out with the reference signal of Jing digital phase shifts, ADC units collection phase lock-in detecting result simultaneously sends into ADC units, ADC Unit gathers the continually varying DC component signal, obtains predetermined number sample mean, is sentenced according to sample mean detection Determine small-signal.
7. equipment according to claim 6, it is characterised in that the generation of the pumping signal is specifically included, the configuration of DAC units One sine wave table, is recycled sine wave table in units of byte using DMA channel, obtains the sine wave block for repeating and sends to DAC12_0 units;Comparator produces PWM ripples, adjustment PWM ripples dutycycle and cycle simultaneously;Sine wave block and PWM ripples are sent into into filter Ripple device realizes that D/A is changed, and obtains sine wave exciting signal.
8. equipment according to claim 6, it is characterised in that produce digital phase shift signal and specifically include:Comparator TB_1 and TB_2 is respectively transmitted one and changes the source address data of DMA in interrupt function with the synchronous PWM of frequency, will sine wave table to (1/32) * 2 π phase places of right translation, obtain 32 phase gt sinusoidal reference signals with frequency;ADC units collection sine wave ginseng The meansigma methodss of signal are examined, and circulation carries out the accumulated value TEMP_SUM that sues for peace to obtain to ADC units, then division arithmetic is carried out to TEMP_SUM Obtain meansigma methodss AVERAGE of ADC gathered datas;32 meansigma methodss adopted back to ADC are averaged (AVERAGE_32) again, root According to formula:PAR=MAX/AVERAGE_32 calculates peak-to-average force ratio PAR values, and PAR values are compared with predetermined threshold value and obtain digital phase shift Signal, wherein, MAX is the maximum in 32 meansigma methodss.
CN201611261891.1A 2016-12-30 2016-12-30 Full digital phase-shift micro signal phase-lock detection method and equipment Active CN106685633B (en)

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CN111148008A (en) * 2019-12-31 2020-05-12 中国广核电力股份有限公司 Detection system and method for cable broadcasting system

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