CN106682352B - Clamping dual-submodule equivalent simulation method - Google Patents

Clamping dual-submodule equivalent simulation method Download PDF

Info

Publication number
CN106682352B
CN106682352B CN201710018865.4A CN201710018865A CN106682352B CN 106682352 B CN106682352 B CN 106682352B CN 201710018865 A CN201710018865 A CN 201710018865A CN 106682352 B CN106682352 B CN 106682352B
Authority
CN
China
Prior art keywords
clamping
equivalent
sub
submodule
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710018865.4A
Other languages
Chinese (zh)
Other versions
CN106682352A (en
Inventor
周保荣
吴金龙
行登江
王先为
熊卿
赵海丽
高仕龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China South Power Grid International Co ltd
Xuji Group Co Ltd
XJ Electric Co Ltd
Xian XJ Power Electronics Technology Co Ltd
Original Assignee
China South Power Grid International Co ltd
Xuji Group Co Ltd
XJ Electric Co Ltd
Xian XJ Power Electronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China South Power Grid International Co ltd, Xuji Group Co Ltd, XJ Electric Co Ltd, Xian XJ Power Electronics Technology Co Ltd filed Critical China South Power Grid International Co ltd
Priority to CN201710018865.4A priority Critical patent/CN106682352B/en
Publication of CN106682352A publication Critical patent/CN106682352A/en
Application granted granted Critical
Publication of CN106682352B publication Critical patent/CN106682352B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

The invention relates to an equivalent simulation method of a clamping dual-sub module, which treats a switch device as a controlled resistor, performs Thevenin equivalent on the clamping dual-sub module, realizes the simulation of the clamping dual-sub module by utilizing a controlled voltage source and the controlled resistor, and realizes the equivalent simulation of the states of all sub-modules of the clamping dual-sub module under different working conditions by introducing different assignment schemes. The simulation model established by the method only uses three controllable voltage sources, one controlled resistor and two diodes, so that the number of designed components is small, the simulation model is simpler, and the improvement of the simulation efficiency of the simulation model is facilitated.

Description

Clamping dual-submodule equivalent simulation method
Technical Field
The invention belongs to the technical field of power system simulation, and particularly relates to an equivalent simulation method for a clamping dual-submodule.
Background
Modular Multilevel Converters (MMC) are widely used because of their high output levels, low harmonic content, and independent control of active and reactive power. The submodules are three types: a half bridge sub-module (HBSM), a clamped double sub-module (CDSM), and a full bridge sub-module (FBSM). The research is mostly HBSM that topological structure is simple nowadays, but because it can't keep apart direct current side trouble, often need set up the circuit breaker in the side of exchanging, increased engineering cost. CDSM is a new research hotspot because it can isolate dc side faults by blocking and requires much fewer IGBTs to be added to achieve the same number of levels compared to FBSM, thereby achieving a balance of economy and functionality.
The system simulation modeling is the basis for the MMC topology research. The MMC topology includes a large number of power electronic devices, which are frequently turned on and off during normal operation, which may cause a large burden on simulation calculation of the system, and particularly, when the voltage level and the capacity of the MMC increase, the number of sub-modules required to be connected in series by a single bridge arm increases. If each submodule is built by a real model by adopting a traditional method, not only is the building difficulty large, but also the subsequent simulation calculation of the model takes a long time.
Disclosure of Invention
The invention aims to provide an equivalent simulation method of a clamping bimodule, which is used for solving the problems of high difficulty and low simulation efficiency of building the clamping bimodule by using a real model in the traditional method at present.
In order to solve the above technical problem, the present invention provides an equivalent simulation method for a clamping dual sub-module, which includes the following nine schemes:
in a first aspect, the method comprises the steps of:
acquiring operating parameters of the clamping double sub-module, establishing a simulation circuit of the clamping double sub-module, and simulating the simulation circuit according to the operating parameters;
the clamping dual-sub-module simulation circuit comprises three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqAnd two diodes D1And D2Wherein the controllable voltage source Ueq1The positive pole of the voltage source is the positive pole of the full-bridge sub-module simulation circuit, and the controllable voltage source Ueq1By a controlled resistance ReqIs connected with a controllable voltage source Ueq2Positive pole and controllable voltage source Ueq3Positive electrode of (1), controllable voltage source Ueq2Negative electrode of (2) is connected with a diode D1Negative electrode of (1), controllable voltage source Ueq3Negative electrode of (2) is connected with a diode D2Anode of (2), diode D1Anode and diode D2And the negative electrodes of the clamping double-submodule simulation circuit are connected and form the negative electrode of the clamping double-submodule simulation circuit.
And determining the operation parameters of the clamping double-submodule on the basis of the scheme one according to the operation condition and the switching state of the clamping double-submodule, wherein the operation parameters comprise three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance Req；
(1) When the operation condition is normal operation state, three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe calculation formula of (2) is as follows:
Figure BDA0001207603520000031
(2) when the switching state is a positive switching state, the three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe calculation formula of (2) is as follows:
Figure BDA0001207603520000032
(3) when the switching state is a negative input state, the three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe calculation formula of (2) is as follows:
Figure BDA0001207603520000033
in the formula, Vsm_CDSM1、Vsm_CDSM2、Rsm_CDSMThe clamping dual-sub module is respectively equivalent to a first equivalent voltage source, a second equivalent voltage source and an equivalent resistor of the Thevenin circuit.
And in a third scheme, on the basis of the second scheme, the sub-modules are equivalent to a first equivalent voltage source V of the Thevenin circuitsm_CDSM1A second equivalent voltage source Vsm_CDSM2The calculation formula of (2) is as follows:
Figure BDA0001207603520000041
Figure BDA0001207603520000042
Figure BDA0001207603520000043
Figure BDA0001207603520000051
in the formula, r1、r2、r3、r4、r7Are respectively a switch tube T1、T2、T3、T4、T7Equivalent resistance of r5、r6Are respectively a diode D5、D6Equivalent resistance of, VcEQ1For clamping equivalent calendar of first capacitor in first sub-moduleVoltage source of history, VcEQ2For clamping an equivalent history voltage source, R, of a second capacitor in a second submodulec1For clamping a first capacitor C in a first sub-module1Size, simulation step size related equivalent resistance, Rc2For clamping a second sub-module with a second capacitor C2Size, simulation step size related equivalent resistance, Rsm1、Rsm2Is an intermediate variable.
And in a fourth scheme, on the basis of the second scheme, the sub-modules are equivalent to equivalent resistors R of the Thevenin circuitsm_CDSMThe calculation formula of (2) is as follows:
in the formula, req1、req2、req3、req4、req5、req6、req7Are intermediate variables, and the calculation formula is as follows:
Figure BDA0001207603520000061
a fifth scheme and a sixth scheme, wherein r is based on the third scheme and the fourth scheme respectively1、r2、r3、r4、r5、r6、r7The calculation formula is as follows:
Figure BDA0001207603520000062
in the formula, RonIs the on-resistance of the switching device, RoffIs the off-state resistance of the switching device; coefficient of state k1、k2The value of p is related to the operation condition and switching state of the clamping dual-sub-module, and the coefficient representing the state of the clamping first sub-module is k1And 1 denotes a first capacitance C1A first submodule of a clamp is switched in, and 0 represents a first capacitor C1Not accessing the clamped first sub-module; the coefficient representing the state of clamping the second sub-module is k2And 1 represents a second capacitance C2Access clamping the firstTwo submodules, 0 for a second capacitance C2The clamped second submodule is not accessed; a value of p 1 indicates that the clamped dual submodule is operating normally or the system is locked and the current direction is positive, and a value of p 0 indicates that the system is locked and the current direction is negative.
A seventh scheme and an eighth scheme, wherein on the basis of the fifth scheme and the sixth scheme, when the operation working condition is a normal operation state, the clamping double-submodule comprises three states of double-submodule input, single-submodule input and double-submodule cutting;
when the clamping bimodule is in the bimodule-on state,
when the clamping dual sub-module is in the single sub-module on state,
Figure BDA0001207603520000072
or
When the clamping bimodule is in the bimodule cut-off state,
when the operation working condition is a system locking state, the clamping dual sub-module comprises a positive input state and a negative input state;
when the clamping bimodule is in the positive throw state,
Figure BDA0001207603520000081
when the clamping bimodule is in the negative throw state,
scheme nine, based on scheme three, the formula VcEQ1、VcEQ2And Rc1、Rc2Calculated by the following formula:
Figure BDA0001207603520000083
in the formula,. DELTA.T1、ΔT2For simulation step size, ic1(t-ΔT1) Is (T- Δ T)1) At the moment, the first capacitor C flows through the first clamping submodule1Current of (u)c1(t-ΔT1) Is (T- Δ T)1) First capacitor C in time first clamping submodule1A voltage value of a historical voltage source; i.e. ic2(t-ΔT2) Is (T- Δ T)2) At the moment of time, the second capacitor C flows through the second clamping submodule2Current of (u)c2(t-ΔT2) Is (T- Δ T)2) Second capacitor C in second clamping submodule at time2The voltage values of the historical voltage sources.
The invention has the beneficial effects that: the invention provides an equivalent simulation method of a clamping dual-sub-module, which treats a switch device as a controlled resistor, performs Thevenin equivalent on the clamping dual-sub-module, realizes the simulation of the clamping dual-sub-module by utilizing a controlled voltage source and the controlled resistor, and realizes the equivalent simulation of the states of all sub-modules of the clamping dual-sub-module under different working conditions by introducing different assignment schemes. The simulation model established by the method only uses three controllable voltage sources and one controlled resistor, so that the number of designed components is small, the simulation model is simpler, and the improvement of the simulation efficiency of the simulation model is facilitated.
Drawings
FIG. 1 is a schematic diagram of an equivalent simulation model of a clamping dual submodule;
FIG. 2 shows two equivalent voltage sources V for clamping a dual submodulesm_CDSM1、Vsm_CDSM2And an equivalent resistance Rsm_CDSMSchematic diagram of equivalent process of (a);
FIG. 3 is a schematic diagram of a clamped dual submodule equivalent voltage source calculation process;
FIG. 4 is a schematic diagram of another exemplary clamped dual submodule equivalent voltage source calculation process;
FIG. 5 is a diagram of the equivalent resistance r in a clamped bimodule1～r7Related intermediate variable req1～req7Schematic diagram of the equivalent process of (1).
Detailed Description
The following further describes embodiments of the present invention with reference to the drawings.
The embodiment of the invention relates to an equivalent simulation method of a clamping dual-submodule, which comprises the following steps: and acquiring operating parameters of the clamping double sub-module, establishing a simulation circuit of the clamping double sub-module, and simulating the simulation circuit according to the operating parameters. The clamping dual-sub-module simulation circuit comprises three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqAnd two diodes D1And D2Wherein the controllable voltage source Ueq1The positive pole of the voltage source is the positive pole of the full-bridge sub-module simulation circuit, and the controllable voltage source Ueq1By a controlled resistance ReqIs connected with a controllable voltage source Ueq2Positive pole and controllable voltage source Ueq3Positive electrode of (1), controllable voltage source Ueq2Negative electrode of (2) is connected with a diode D1Negative electrode of (1), controllable voltage source Ueq3Negative electrode of (2) is connected with a diode D2Anode of (2), diode D1Anode and diode D2And the negative electrodes of the clamping double-submodule simulation circuit are connected and form the negative electrode of the clamping double-submodule simulation circuit.
Specifically, as shown in fig. 2, an equivalent model of a switching device in a clamping bimodule is established, and the switching device includes a fully-controlled device and an anti-parallel diode thereof, and has two states: when current flows through the switch device, the resistance is equivalent to an on-state resistance Ron(ii) a When no current flows through the switch device, the switch device is in a high-resistance state and is equivalent to an off-state resistor Roff；
According to the Thevenin equivalent method and the operation conditions and switching states of the clamping dual-submodule, the equivalent voltage source and the equivalent electricity of the submodule are calculatedResistance value, i.e. Vsm_CDSM1、Vsm_CDSM2And Rsm_CDSM. The operation condition comprises a normal operation state, a system locking state and a soft starting state, and the switching state comprises a dual-sub module input, a single-sub module input, a dual-sub module cut-off, a positive input and a negative input.
The switching devices in the submodules are equivalent to a resistor r as shown in FIG. 21～r7A first capacitor C in the submodule1Equivalent to resistance Rc1And voltage VcEQ1Second capacitance C in the sub-module2Equivalent to resistance Rc2And voltage VcEQ2The calculation formula is as follows:
Figure BDA0001207603520000101
in the formula,. DELTA.T1、ΔT2For simulation step size, C1、C2Is a sub-module capacitor, i is a first capacitor and a second capacitorc1(t-ΔT1) Is (T- Δ T)1) The first capacitor C flows through the first clamping submodule in the timing diagram 21Current of (u)c1(t-ΔT1) Is (T- Δ T)1) First capacitor C in time first clamping submodule1A voltage value of a historical voltage source; i.e. ic2(t-ΔT2) Is (T- Δ T)2) At the moment of time, the second capacitor C flows through the second clamping submodule2Current of (u)c2(t-ΔT2) Is (T- Δ T)2) Second capacitor C in second clamping submodule at time2The voltage values of the historical voltage sources.
The state coefficient of the first clamping submodule shown in FIG. 2 is set to k1The state coefficient of the second clamping submodule is k2Setting the locking state coefficient as p; wherein k is1、k 21 respectively represent a first capacitance C1A first clamping submodule and a second capacitor C are connected2A second clamping submodule is connected, and 0 represents a first capacitor C1The first clamping submodule and the second capacitor C are not connected2The first clamping submodule is not accessed; a p of 1 indicates system latch-up and the current direction is positive,a p of 0 indicates that the system is locked out and the current direction is negative. Corresponding k in different states1、k2The value of p is:
in the double sub-module input state: when both submodules are in the input state, r1、r4、r7With current flowing, equivalent to resistance Ron；r2、r3、r5、r6No current flowing, equivalent to resistance RoffAt this time, the process of the present invention,
Figure BDA0001207603520000111
in the single sub-module input state: when one of the two submodules is in the throw-in state and the other is in the cut-off state, there are two cases, one is r2、r4、r7With current flowing, equivalent to resistance Ron，r1、r3、r5、r6No current flowing, equivalent to resistance Roff(ii) a Case two is r1、r3、r7With current flowing, equivalent to resistance Ron，r2、r4、r5、r7No current flowing, equivalent to resistance Roff(ii) a At this time, the process of the present invention,
Figure BDA0001207603520000112
or
Figure BDA0001207603520000113
In the bimodule resection state: when both submodules are in the cut-off state, r2、r3、r7With current flowing, equivalent to resistance Ron，r1、r4、r5、r6No current flowing, equivalent to resistance Roff(ii) a At this time, the process of the present invention,
Figure BDA0001207603520000121
in the positive input state: when the system is locked and the module port voltage is positive, r1、r4、r7With current flowing, equivalent to resistance Ron；r2、r3、r5、r6No current flowing, equivalent to resistance Roff(ii) a At this time, the process of the present invention,
Figure BDA0001207603520000122
in the negative input state: when the system is locked and the module port voltage is negative (i.e., negative input), r2、r3、r5、r6With current flowing, equivalent to resistance Ron；r1、r4、r7No current flowing, equivalent to resistance Roff(ii) a At this time, the process of the present invention,
Figure BDA0001207603520000123
each equivalent resistance r shown in fig. 21～r7And k is1、k2The relationship of p is:
the total resistance R of the first equivalent circuit shown in FIG. 3 can be calculated according to the above formula in combination with FIG. 2sm1Comprises the following steps:
Figure BDA0001207603520000131
from this, the first equivalent voltage source V in FIG. 2 can be calculatedsm_CDSM1：
Figure BDA0001207603520000132
In the same way, according to each resistance r1～r7Can be calculated byThe total resistance R of the second equivalent circuit shown in FIG. 4 is obtained by calculationsm2Comprises the following steps:
from this, the second equivalent voltage source V of FIG. 2 can be calculatedsm_CDSM2Comprises the following steps:
Figure BDA0001207603520000141
from FIG. 5, the controlled resistance R of FIG. 2 can be calculatedsm_CDSM：
Figure BDA0001207603520000142
In the formula, req1、req2、req3、req4、req5、req6、req7Are intermediate variables, and the calculation formula is as follows:
Figure BDA0001207603520000151
and finally, when the system is in different operation working conditions, assigning values to the first equivalent voltage source, the second equivalent voltage source and the equivalent resistor in the equivalent circuit respectively, wherein three working conditions of normal operation, system locking and soft start are considered.
When the system is in a normal operation state, the possible states of the sub-modules are double sub-module input, single sub-module input and double sub-module cutting, and the first equivalent voltage source, the second equivalent voltage source and the equivalent resistance are calculated according to the states of the sub-modules and the steps. When the system is in a locked state, the possible states of the sub-modules are positive input and negative input, and the first equivalent voltage source, the second equivalent voltage source and the equivalent resistance are calculated according to the states of the sub-modules and the steps. When the system is in a soft start state, the submodule possibly has the states of double submodule cutting, positive input and negative input, and the first equivalent voltage source, the second equivalent voltage source and the equivalent resistance are calculated according to the state of the submodule and the steps.
The equivalent simulation model of the clamping double submodule is shown in figure 1, three controllable voltage sources, a controlled resistor and two diodes are utilized, when a system is in different operation working conditions, the controlled voltage sources and the controlled resistors in an equivalent circuit are respectively assigned, and three working conditions of normal operation, system locking and soft starting are considered:
when both submodules are in the on state, the equivalent circuit assignment shown in fig. 1 is,
Figure BDA0001207603520000161
when only one of the two sub-modules is in the on-state, the equivalent circuit assignment scheme shown in fig. 1 is,
Figure BDA0001207603520000162
or
When both sub-modules are in the cut-out state, the equivalent circuit assignment scheme shown in fig. 1 is,
Figure BDA0001207603520000171
when the clamping bipartite module is in a positive-going state when the system is locked, the equivalent circuit assignment scheme shown in fig. 1 is,
when the clamping double-submodule is in a negative input state when the system is locked, the equivalent circuit assignment scheme shown in figure 1 is,
Figure BDA0001207603520000173
when the system is in a soft start state, the submodules are cut off and are in positive input and negative input states, and the equivalent circuit assignment scheme is the same as that of the double submodule cut-off and the positive input and the negative input when the system is locked under the normal operation working condition.
Finally, determining the operation parameters of the clamping double sub-module according to the operation conditions and the switching state of the clamping double sub-module, wherein the operation parameters comprise three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance Req：
(1) When the operation condition is normal operation, the three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe formula for calculating (a) is as follows,
Figure BDA0001207603520000181
(2) when the switching state is positive, three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe formula for calculating (a) is as follows,
(3) when the switching state is negative switching, the three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe formula for calculating (a) is as follows,
Figure BDA0001207603520000183
in the formula, Vsm_CDSM1、Vsm_CDSM2、Rsm_CDSMThe clamping dual-sub module is respectively equivalent to a first equivalent voltage source, a second equivalent voltage source and an equivalent resistor of the Thevenin circuit.
In this embodiment, the switching device is regarded as a controlled resistor, then thevenin equivalence is performed on the clamping double-sub module, so that simulation of the clamping double-sub module by using a controlled voltage source, the controlled resistor and a diode is realized, and equivalent simulation of states of all sub-modules of the clamping double-sub module under different working conditions is realized by introducing different assignment schemes.

Claims (7)

1. A clamping dual submodule equivalent simulation method is characterized by comprising the following steps:
acquiring operating parameters of the clamping double sub-module, establishing a simulation circuit of the clamping double sub-module, and simulating the simulation circuit according to the operating parameters;
the clamping dual-sub-module simulation circuit comprises three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqAnd two diodes D1And D2Wherein the controllable voltage source Ueq1The positive pole of the voltage source is the positive pole of the full-bridge sub-module simulation circuit, and the controllable voltage source Ueq1By a controlled resistance ReqIs connected with a controllable voltage source Ueq2Positive pole and controllable voltage source Ueq3Positive electrode of (1), controllable voltage source Ueq2Negative electrode of (2) is connected with a diode D1Negative electrode of (1), controllable voltage source Ueq3Negative electrode of (2) is connected with a diode D2Anode of (2), diode D1Anode and diode D2And the negative electrodes of the clamping double-submodule simulation circuit are connected and form the negative electrode of the clamping double-submodule simulation circuit.
2. The equivalent simulation method of the clamping double sub-module as claimed in claim 1, wherein the operation parameters of the clamping double sub-module are determined according to the operation condition and switching state of the clamping double sub-module, and the operation parameters comprise three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance Req；
(1) When the operation condition is normal operation, the three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe calculation formula of (2) is as follows:
Figure FDA0002098942200000011
(2) when the switching state is positive, three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe calculation formula of (2) is as follows:
Figure FDA0002098942200000021
(3) when the switching state is negative switching, the three controllable voltage sources Ueq1、Ueq2、Ueq3And a controlled resistance ReqThe calculation formula of (2) is as follows:
Figure FDA0002098942200000022
in the formula, Vsm_CDSM1、Vsm_CDSM2、Rsm_CDSMThe clamping dual-sub module is respectively equivalent to a first equivalent voltage source, a second equivalent voltage source and an equivalent resistor of the Thevenin circuit.
3. The method according to claim 2, wherein said sub-modules are equivalent to the first equivalent voltage source V of the Thevenin circuitsm_CDSM1A second equivalent voltage source Vsm_CDSM2The calculation formula of (2) is as follows:
Figure FDA0002098942200000031
Figure FDA0002098942200000032
Figure FDA0002098942200000033
Figure FDA0002098942200000041
in the formula, r1、r2、r3、r4、r7Are respectively a switch tube T1、T2、T3、T4、T7Equivalent resistance of r5、r6Are respectively a diode D5、D6Equivalent resistance of, VcEQ1For clamping an equivalent history voltage source, V, of a first capacitor in a first submodulecEQ2An equivalent history voltage source, R, for a second capacitor in the submodulec1Is connected with a first capacitor C in the first sub-module1Size, simulation step size related equivalent resistance, Rc2For the sub-module and the second capacitor C2Size, simulation step size related equivalent resistance, Rsm1、Rsm2Is an intermediate variable.
4. The method according to claim 2, wherein said sub-modules are equivalent to equivalent resistance R of Thevenin circuitsm_CDSMThe calculation formula of (2) is as follows:
Figure FDA0002098942200000042
in the formula, req1、req2、req3、req4、req5、req6、req7Are intermediate variables, and the calculation formula is as follows:
Figure FDA0002098942200000051
in the formula, r1、r2、r3、r4、r7Are respectively a switch tube T1、T2、T3、T4、T7Equivalent resistance of r5、r6Are respectively a diode D5、D6Equivalent resistance of Rc1For clamping a first capacitor C in a first sub-module1Size, simulation step size related equivalent resistance, Rc2To clampTwo sub-modules with a second capacitor C2Size, equivalent resistance related to simulation step size.
5. The clamped bimodule equivalent simulation method according to claim 3 or 4, wherein r is1、r2、r3、r4、r5、r6、r7The calculation formula is as follows:
Figure FDA0002098942200000061
in the formula, RonIs the on-resistance of the switching device, RoffIs the off-state resistance of the switching device; coefficient of state k1、k2The value of p is related to the operation condition and switching state of the clamping dual-sub-module, and the coefficient representing the state of the clamping first sub-module is k1And 1 denotes a first capacitance C1A first submodule of a clamp is switched in, and 0 represents a first capacitor C1Not accessing the clamped first sub-module; the coefficient representing the state of clamping the second sub-module is k2And 1 represents a second capacitance C2A second submodule of the clamp is switched in, and 0 represents a second capacitor C2The clamped second submodule is not accessed; a value of p 1 indicates that the clamped dual submodule is operating normally or the system is locked and the current direction is positive, and a value of p 0 indicates that the system is locked and the current direction is negative.
6. The equivalent simulation method of a clamping double-submodule according to claim 5, wherein when the operation condition is a normal operation state, the clamping double-submodule comprises three states of double-submodule input, single-submodule input and double-submodule cutting;
when the clamping bimodule is in the bimodule-on state,
when the clamping dual sub-module is in the single sub-module on state,
Figure FDA0002098942200000063
or
Figure FDA0002098942200000071
When the clamping bimodule is in the bimodule cut-off state,
Figure FDA0002098942200000072
when the operation working condition is a system locking state, the clamping dual sub-module comprises a positive input state and a negative input state;
when the clamping bimodule is in the positive throw state,
Figure FDA0002098942200000073
when the clamping bimodule is in the negative throw state,
Figure FDA0002098942200000074
7. the clamped two-submodule equivalent simulation method of claim 3, wherein said VcEQ1、VcEQ2And Rc1、Rc2Calculated by the following formula:
Figure FDA0002098942200000075
in the formula,. DELTA.T1、ΔT2For simulation step size, ic1(t-ΔT1) Is (T- Δ T)1) At the moment, the first capacitor C flows through the first clamping submodule1Current of (u)c1(t-ΔT1) Is (T- Δ T)1) First clamp at a momentFirst capacitor C in the bit sub-module1A voltage value of a historical voltage source; i.e. ic2(t-ΔT2) Is (T- Δ T)2) At the moment of time, the second capacitor C flows through the second clamping submodule2Current of (u)c2(t-ΔT2) Is (T- Δ T)2) Second capacitor C in second clamping submodule at time2The voltage values of the historical voltage sources.
CN201710018865.4A 2017-01-11 2017-01-11 Clamping dual-submodule equivalent simulation method Active CN106682352B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710018865.4A CN106682352B (en) 2017-01-11 2017-01-11 Clamping dual-submodule equivalent simulation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710018865.4A CN106682352B (en) 2017-01-11 2017-01-11 Clamping dual-submodule equivalent simulation method

Publications (2)

Publication Number Publication Date
CN106682352A CN106682352A (en) 2017-05-17
CN106682352B true CN106682352B (en) 2020-02-21

Family

ID=58850407

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710018865.4A Active CN106682352B (en) 2017-01-11 2017-01-11 Clamping dual-submodule equivalent simulation method

Country Status (1)

Country Link
CN (1) CN106682352B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117169675B (en) * 2023-09-01 2024-04-26 南京航空航天大学 On-line monitoring circuit for conduction voltage drop of inverter-stage wide-temperature-zone power device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105117543A (en) * 2015-08-21 2015-12-02 浙江大学 Multi-blocking mode-considering full-bridge sub-module MMC-based equivalent simulation method
CN105117549A (en) * 2015-08-25 2015-12-02 浙江大学 Equivalent simulation method based on clamping double sub-module MMC (modular multilevel converter) and considering various locking modes
CN105576691A (en) * 2016-03-01 2016-05-11 西安许继电力电子技术有限公司 Method and system for evaluating DC fault crossing capability of modularized multi-level transverter

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100594280B1 (en) * 2004-06-23 2006-06-30 삼성전자주식회사 Flash memory device including bitline voltage clamp circuit for controlling bitline voltage during program operation and bitline voltage control method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105117543A (en) * 2015-08-21 2015-12-02 浙江大学 Multi-blocking mode-considering full-bridge sub-module MMC-based equivalent simulation method
CN105117549A (en) * 2015-08-25 2015-12-02 浙江大学 Equivalent simulation method based on clamping double sub-module MMC (modular multilevel converter) and considering various locking modes
CN105576691A (en) * 2016-03-01 2016-05-11 西安许继电力电子技术有限公司 Method and system for evaluating DC fault crossing capability of modularized multi-level transverter

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
三种MMC-HVDC直流故障处理方法下电力***暂态稳定性分析;周煜智 等;《中国电机工程学报》;20150405;第35卷(第7期);第1621-1627页 *
基于PSCAD 的大规模钳位双子模块-模块化多电平换流器高效仿真建模方法;刘崇茹 等;《电工技术学报》;20151231;第30卷;第113-118页 *
钳位双子模块型MMC的电磁暂态等效模型;徐东旭 等;《电网技术》;20161031;第40卷(第10期);第3176-3182页 *

Also Published As

Publication number Publication date
CN106682352A (en) 2017-05-17

Similar Documents

Publication Publication Date Title
KR101666712B1 (en) Modular Multi-Level Converter
CN104597370B (en) The detection method of the modularization multi-level converter IGBT open faults based on state observer
US10020731B2 (en) Power switch circuit
JP6162744B2 (en) Modular multi-level converter
EP2536016B1 (en) Switching branch for three-level rectifier, and three-phase three-level rectifier
CN106026159B (en) Simulation device, simulation system and simulation method of modular multilevel converter
JP2018011404A (en) Drive circuit for switch to be driven
CN105785976B (en) Test method and system for control protection device in flexible direct current transmission
CN106787890B (en) CDSM-MMC bridge arm electromagnetic transient modeling method and device
CN105117549B (en) A kind of equivalent simulation method based on clamp Shuangzi module MMC for considering a variety of locking mode
CN111398772A (en) Circuit, method and device for converter valve overcurrent turn-off test
CN102969881A (en) Voltage sharing protection circuit and diode clamp multi-level topology device
CN110261709B (en) Detection device and method for modularized multi-level converter submodule
CN106682352B (en) Clamping dual-submodule equivalent simulation method
US20160149508A1 (en) Insulation design apparatus of high voltage direct current transmission system
CN108376992B (en) MMC equivalent simulation method for hybrid sub-module
CN112001142B (en) Real-time simulation method of half-bridge type modular multilevel converter
CN109274285B (en) Capacitance voltage balancing method of hybrid modular multilevel converter
CN110427660B (en) Simulation method of high-voltage direct-current circuit breaker
CN112003477A (en) Direct-current transformer and soft start control method thereof
CN217112504U (en) Time-sharing multiplexing multi-level circuit
CN106464261A (en) Power transmission network
CN112052638B (en) Real-time simulation method for full-bridge modular multilevel converter
CN106899216A (en) A kind of the level submodules of MMC tri- topology and its capacitance voltage balance control method with direct fault current blocking ability
KR101727389B1 (en) Method of controlling a voltage balancing in a modular multi-level converter

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant