CN106655109A - Input overvoltage protection circuit applied to integrated circuit - Google Patents

Input overvoltage protection circuit applied to integrated circuit Download PDF

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Publication number
CN106655109A
CN106655109A CN201710072195.4A CN201710072195A CN106655109A CN 106655109 A CN106655109 A CN 106655109A CN 201710072195 A CN201710072195 A CN 201710072195A CN 106655109 A CN106655109 A CN 106655109A
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CN
China
Prior art keywords
circuit
voltage
chip
nmos tube
protected
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Granted
Application number
CN201710072195.4A
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Chinese (zh)
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CN106655109B (en
Inventor
李志林
谭磊
王宇
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SG Micro Beijing Co Ltd
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SG Micro Beijing Co Ltd
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Priority to CN201710072195.4A priority Critical patent/CN106655109B/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/20Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/02Details
    • H02H3/06Details with automatic reconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/20Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

In an input overvoltage protection circuit applied to an integrated circuit, a high voltage is disconnected by a metal oxide semiconductor (MOS) switch tube which is externally arranged in an integrated circuit chip so that the high voltage is prevented from being directly input to damage a circuit in the chip, and overvoltage protection of the circuit in the chip is achieved. The input overvoltage protection circuit is characterized by comprising the integrated circuit chip, a protected chip circuit is arranged in the integrated circuit chip, and an externally-arranged overvoltage protection MOS switch tube is arranged outside the integrated circuit chip and is arranged between an external input voltage end and a power supply voltage end of the protected chip circuit.

Description

It is applied to the protection circuit against input over-voltage of integrated circuit
Technical field
The present invention relates to the overvoltage protection of IC chip, particularly a kind of input overvoltage guarantor for being applied to integrated circuit Protection circuit, by being placed on the MOS switch pipe disconnection high pressure of IC chip chip is damaged to avoid high pressure from directly inputting Internal circuit, so as to realize the overvoltage protection to chip internal circuits.
Background technology
Due to the application of battery and electric motor car etc., new power processes GaN is added, the development of SIC, semiconductor is treatable Voltage amplitude more and more higher.UL certifications all bring up to 60V safe operating voltage.And 4.0 are industrialized, to industrial control system Automation and reliability propose strict requirements.This kind of HVDC itself may result from the AC-DC power supplys of front end and open Ring, warm swap, industry, aviation surge is also exactly automobile engine in the case where throwing and carrying, motor vast scale velocity variations With brake etc. produce high voltage.Inventors believe that, if so high voltage is in the case of the damage of semiconductor power supply, how Protect that high voltage power supply is not directly output to low voltage control end and the system of burning is the technical issues that need to address.It is understood that double It is back-to-back between triode CE levels because high pressure is damaged under polarity triode technique, and under the voltage breakdown of MOSFET, DS Pole direct short-circuit, input high pressure will be directly output to voltage side.Settling mode of the prior art includes improving MOSFET (half The technique of conductor) pressure or drop volume use;Or using double adjustment Manifold technologies, when a MOSFET is damaged, another incision; Or client can with the additional one resistance to loadswitch (load switch) for more adding high pressure, once detect over-pressed signal, at once Shut-off loadswitch.But everything is all interim, and halfway solution, cost is also high, nor perfectly sound scheme.
The content of the invention
The present invention is for defect or deficiency present in prior art, there is provided a kind of input overvoltage for being applied to integrated circuit Protection circuit, by being placed on the MOS switch pipe disconnection high pressure of IC chip core is damaged to avoid high pressure from directly inputting Piece internal circuit, so as to realize the overvoltage protection of chip internal circuits.Due to using the over-pressed external protected mode of input, for mistake Pressure value user with oneself setting, can be placed on the effective family of MOS switch of IC chip can be according to the highest of oneself prediction Voltage and select the MOSFET under this voltage, and if damaged, user can again change external MOSFET overvoltages and protect Shield switch.
Technical solution of the present invention is as follows:
It is applied to the protection circuit against input over-voltage of integrated circuit, it is characterised in that including IC chip, it is described integrated There is protected chip circuit, the outside of the IC chip is provided with external overvoltage protection MOS switch in circuit chip Pipe, between the external externally-located Input voltage terminal of overvoltage protection MOS switch pipe and protected chip circuit supply voltage end.
The external NMOS tubes of overvoltage protection MOS switch Guan Wei tri-, the drain electrode connection of the 3rd NMOS tube is outside defeated Enter voltage end, the source electrode of the 3rd NMOS tube connects protected chip circuit supply voltage end, the grid of the 3rd NMOS tube Pole passes through the first capacity earth.
By the second capacity earth, second electric capacity is chip internal electricity at the protected chip circuit supply voltage end Source filter capacitor.
The grid of the 3rd NMOS tube connects the drain electrode of the 3rd NMOS tube by first resistor.
The IC chip includes the first NMOS tube, the second NMOS tube and the first inverting amplifier.
The drain electrode of first NMOS tube and the drain electrode of second NMOS tube are all connected with the grid of the 3rd NMOS tube, The source electrode of first NMOS tube connects the protected chip circuit supply voltage end, and the grid of first NMOS tube passes through First inverting amplifier connects the grid of second NMOS tube, and the grid of first NMOS tube receives the protected chip The over-pressed control signal of circuit output, the source electrode of second NMOS tube connects booster circuit in protected chip circuit.
The RC circuits that first resistor and the first electric capacity are constituted determine the toggle speed of the 3rd NMOS tube gate voltage, that is, receive The power-up speeds of protection chip circuit supply voltage.
The RC circuit time constants that first resistor and the first electric capacity are constituted can set according to actual needs.
Booster circuit produces the electricity of " the protected volt of chip circuit supply voltage+5 " in the protected chip circuit Press the raster data model source as the 3rd NMOS tube.
The external overvoltage protection MOS switch pipe is arranged at the envelope of the IC chip by replaceable attachment structure Outside assembling structure, the inside of the encapsulating structure includes the protected chip circuit and adjunct circuit, the adjunct circuit from Over-pressed control signal OVP is obtained in the protected chip circuit and is driven as the external overvoltage protection MOS switch tube grid The voltage in dynamic source.
The technology of the present invention effect is as follows:The present invention is applied to the protection circuit against input over-voltage of integrated circuit, using being input into External protected mode is pressed, when the improper rising of external input voltage, overvoltage protection MOSFET can the protected chip of effective protection Circuit is from damage, while and not affecting the normal work of chip.The present invention is controlled the upper pipe inside IC using Switching Power Supply and is driven Dynamic Boost circuit produces a raster data model source higher than input voltage 5V, and without the need for the another additional circuit of client.Client can be with The over-voltage protection point of safety is set, and it is stagnant with returning, it is relatively more flexible.This circuit is solved after short time high pressure, and circuit is also Can be resumed work with oneself, avoid temporary high-pressure pulse problem.Client can according to oneself need flexibly select external MOSFET's is pressure.
The present invention has the special feature that:1st, this is dangerous to be fully solved high pressure;2nd, it is with low cost;3rd, in the case of damaging, Client oneself can change, system overall safety.
Description of the drawings
Fig. 1 is to implement the protection circuit against input over-voltage schematic diagram that the present invention is applied to integrated circuit.
Fig. 2 is VIN in different phase (external input voltage), VCC (chip power supply voltage), OVP (over-pressed control signal) Waveform diagram.S1 is input startup stage in Fig. 2, and S2 is input over pressure phase, and to recover normal phase, VT1 was S3 The pressure stage visits voltage limit, and VT2 is over pressure phase lower threshold voltage.
Reference lists as follows:The protected chip circuits of 1-;2- IC chips;Rise in the protected chip circuits of 3- Piezoelectricity terminal (drive signal magnitude of voltage VCC+5V);Booster circuit (BST, i.e. Boost circuit) in the protected chip circuits of 4-;5- Adjunct circuit;VIN- external input voltages end or external input voltage or external input voltage value;VCC- chip power supply voltage ends Or chip power supply voltage or chip power supply magnitude of voltage;OVP- overvoltage control signals;The inverting amplifiers of D1- first;R1- first is electric Resistance;The electric capacity of C1- first;The electric capacity of C2- second or chip internal power filtering capacitor;The NMOS tubes of M1- first;The NMOS tubes of M2- second; The NMOS tubes of M3- the 3rd or external protection NMOS tube or overvoltage protection NMOS tube;Vog- gate voltages end or gate voltage or gate voltage value; S1- is input into startup stage;S2- is input into over pressure phase;S3- recovers normal phase;VT1- over pressure phases are visited voltage limit;VT2- mistakes Pressure stage lower threshold voltage.
Specific embodiment
Below in conjunction with the accompanying drawings (Fig. 1-Fig. 2) the present invention will be described.
Fig. 1 is to implement the protection circuit against input over-voltage schematic diagram that the present invention is applied to integrated circuit.Fig. 2 is in different phase The waveform diagram of VIN, VCC, OVP.As shown in Figure 1 to Figure 2, the protection circuit against input over-voltage of integrated circuit is applied to, including IC chip 2, has protected chip circuit 1, the outside of the IC chip 2 in the IC chip 2 Be provided with external overvoltage protection MOS switch pipe, the externally-located Input voltage terminal VIN of the external overvoltage protection MOS switch pipe with Between protected chip circuit supply voltage end VCC.External NMOS tubes M3 of overvoltage protection MOS switch Guan Wei tri-, it is described The drain electrode connection external input voltage end VIN of the 3rd NMOS tube M3, the source electrode of the 3rd NMOS tube M3 connects protected chip Circuit supply voltage end VCC, the grid of the 3rd NMOS tube M3 passes through the first capacity earth C1.The protected chip circuit Supply voltage end VCC is grounded by the second electric capacity C2, and the second electric capacity C2 is chip internal power filtering capacitor.Described 3rd The grid of NMOS tube M3 connects the drain electrode of the 3rd NMOS tube M3 by first resistor R1.Wrap in the IC chip 2 Include the first NMOS tube M1, the second NMOS tube M2 and the first inverting amplifier D1.The drain electrode of first NMOS tube M1 and described The drain electrode of two NMOS tubes M2 is all connected with the grid of the 3rd NMOS tube M3, receives described in the source electrode connection of first NMOS tube M1 Protection chip circuit supply voltage end VCC, the grid of first NMOS tube M1 is described by the first inverting amplifier D1 connections The grid of the second NMOS tube M2, the grid of first NMOS tube M1 receives the excessively voltage-controlled of the output of protected chip circuit 1 Signal OVP processed, the source electrode of second NMOS tube M2 connects booster circuit 4 in protected chip circuit.First resistor R1 and The RC circuits that one electric capacity C1 is constituted determine the toggle speed of the 3rd NMOS tube M3 gate voltage Vog, i.e., protected chip circuit The power-up speeds of supply voltage VCC.The RC circuit time constants that first resistor R1 and the first electric capacity C1 are constituted can be according to reality Need setting.Booster circuit 4 produces one " the protected volt of chip circuit supply voltage+5 " i.e. in the protected chip circuit Raster data model source of the voltage of VCC+5V as the 3rd NMOS tube M3.The external overvoltage protection MOS switch pipe passes through can Change attachment structure to be arranged at outside the encapsulating structure of the IC chip 2, the inside of the encapsulating structure is including described Protected chip circuit 1 and adjunct circuit 5, the adjunct circuit 5 obtains overvoltage control letter from the protected chip circuit 1 Number OVP and the voltage as the external overvoltage protection MOS switch pipe M3 raster data models source.
When normal circuit operation, with the rising of external input voltage VIN, protected chip circuit supply voltage VCC Begin to ramp up, the MOSFET of now chip exterior protective effect is that the 3rd NMOS tube M3 gate voltage Vog is connected to protected chip The voltage of the VCC+5V that circuit is produced is the drive signal magnitude of voltage VCC+5V at booster circuit end 3 in protected chip circuit, MOSFET is fully on, VCC=VIN.
When input voltage VIN rises to certain value, protected chip circuit supply voltage VCC is detected more than setting OVP visit voltage limit when, outside MOSFET gate voltages Vog will be connected to VIN, MOSFET shut-offs, and turn off protected chip electricity Primary loop inside road.Afterwards the input voltage VCC of protected chip circuit can be reduced persistently, when input voltage VCC is less than During the OVP lower threshold voltage VT2 of setting, protected chip circuit restarts work, and MOS FET gate voltages Vog are connected again The voltage of VCC+5V is connected to, input voltage VCC continues to rise, until VCC=VIN.If in the process VCC is more than on OVP Threshold voltage, illustrates that being input into overvoltage condition is continued for, and protected chip circuit will repeat said process.If VCC=VIN <Overvoltage is visited voltage limit VT1, then explanation input overvoltage condition is released, and protected chip circuit will continue normal work.Wherein R1 With the toggle speed that the RC circuits decision outer protection MOSFET of C1 compositions is the 3rd NMOS tube M3 gate voltage, i.e., protected chip The RC circuit time constants that the power-up speeds of circuit supply voltage, R1 and C1 are constituted can be chosen according to actual needs, and C2 is to be protected The filter capacitor of shield chip circuit power supply.Fig. 2 gives input startup stage S1, is input into over pressure phase S2, and input recovers normal The external voltage VIN in these three stages in stage S3, the waveform of chip voltage VCC and OVP signal.By simulation waveform (for example, if Determine simulated conditions:R1=100K, C1=4.7n, C2=1u) conclusion that obtains:When the improper rising of external input voltage, mistake Pressure protect MOSFET can the protected chip circuit of effective protection from damage, while and not affecting the normal work of chip.
It is hereby stated that, it is described above to contribute to skilled artisan understands that the invention, but not limit the present invention The protection domain of creation.It is any equivalent described above, modification are improved without departing from the invention flesh and blood And/or the enforcement deleted numerous conforming to the principle of simplicity and carry out, each fall within the protection domain of the invention.

Claims (10)

1. the protection circuit against input over-voltage of integrated circuit is applied to, it is characterised in that including IC chip, the integrated electricity There is protected chip circuit, the outside of the IC chip is provided with external overvoltage protection MOS switch pipe in the chip of road, Between the externally-located Input voltage terminal of external overvoltage protection MOS switch pipe and protected chip circuit supply voltage end.
2. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 1, it is characterised in that described external The NMOS tubes of overvoltage protection MOS switch Guan Wei tri-, the drain electrode connection external input voltage end of the 3rd NMOS tube, the described 3rd The source electrode of NMOS tube connects protected chip circuit supply voltage end, and the grid of the 3rd NMOS tube is connect by the first electric capacity Ground.
3. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 1, it is characterised in that described to be protected By the second capacity earth, second electric capacity is chip internal power filtering capacitor at shield chip circuit supply voltage end.
4. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 2, it is characterised in that the described 3rd The grid of NMOS tube connects the drain electrode of the 3rd NMOS tube by first resistor.
5. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 4, it is characterised in that described integrated Circuit chip includes the first NMOS tube, the second NMOS tube and the first inverting amplifier.
6. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 5, it is characterised in that described first The drain electrode of NMOS tube and the drain electrode of second NMOS tube are all connected with the grid of the 3rd NMOS tube, first NMOS tube Source electrode connects the protected chip circuit supply voltage end, and the grid of first NMOS tube is connected by the first inverting amplifier The grid of second NMOS tube is connect, the grid of first NMOS tube receives the excessively voltage-controlled of the protected chip circuit output Signal processed, the source electrode of second NMOS tube connects booster circuit in protected chip circuit.
7. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 4, it is characterised in that first resistor The toggle speed of RC circuits decision the 3rd NMOS tube gate voltage constituted with the first electric capacity, i.e., protected chip circuit is powered The power-up speeds of voltage.
8. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 4, it is characterised in that first resistor The RC circuit time constants constituted with the first electric capacity can set according to actual needs.
9. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 6, it is characterised in that described to be protected Booster circuit produces the voltage of one " the protected volt of chip circuit supply voltage+5 " as the described 3rd in shield chip circuit The raster data model source of NMOS tube.
10. the protection circuit against input over-voltage for being applied to integrated circuit according to claim 1, it is characterised in that described outer Put overvoltage protection MOS switch pipe to be arranged at outside the encapsulating structure of the IC chip by replaceable attachment structure, institute Stating the inside of encapsulating structure includes the protected chip circuit and adjunct circuit, and the adjunct circuit is from the protected chip Over-pressed control signal OVP and the voltage as the external overvoltage protection MOS switch tube grid driving source are obtained in circuit.
CN201710072195.4A 2017-02-09 2017-02-09 Protection circuit against input over-voltage applied to integrated circuit Active CN106655109B (en)

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CN201710072195.4A CN106655109B (en) 2017-02-09 2017-02-09 Protection circuit against input over-voltage applied to integrated circuit

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Application Number Priority Date Filing Date Title
CN201710072195.4A CN106655109B (en) 2017-02-09 2017-02-09 Protection circuit against input over-voltage applied to integrated circuit

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CN106655109B CN106655109B (en) 2019-03-26

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109600133A (en) * 2017-09-30 2019-04-09 瑞昱半导体股份有限公司 It can be avoided the circuit of the damage of overvoltage
CN112018724A (en) * 2019-05-29 2020-12-01 圣邦微电子(北京)股份有限公司 Overvoltage protection circuit
TWI764235B (en) * 2020-08-13 2022-05-11 致新科技股份有限公司 Overvoltage protection circuit
US11721973B2 (en) 2020-08-12 2023-08-08 Global Mixed-Mode Technology Inc. Overvoltage protection circuit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2741087Y (en) * 2004-10-27 2005-11-16 华为技术有限公司 Overvoltage and undervoltage slow start protecting circuit of negative power supply
CN101783503A (en) * 2009-01-16 2010-07-21 鸿富锦精密工业(深圳)有限公司 Overvoltage protection circuit
CN102195462A (en) * 2011-05-26 2011-09-21 广州金升阳科技有限公司 Start-up circuit with high-tension power supply
CN102738781A (en) * 2011-04-07 2012-10-17 炬才微电子(深圳)有限公司 Overvoltage protection circuit, IC chip and overvoltage protection method
US20130258539A1 (en) * 2012-03-29 2013-10-03 Tao Wang Overvoltage protection circuit and electronic device
CN103607009A (en) * 2013-11-22 2014-02-26 钰泰科技(上海)有限公司 Charging and discharging circuit with automatic protecting function

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2741087Y (en) * 2004-10-27 2005-11-16 华为技术有限公司 Overvoltage and undervoltage slow start protecting circuit of negative power supply
CN101783503A (en) * 2009-01-16 2010-07-21 鸿富锦精密工业(深圳)有限公司 Overvoltage protection circuit
CN102738781A (en) * 2011-04-07 2012-10-17 炬才微电子(深圳)有限公司 Overvoltage protection circuit, IC chip and overvoltage protection method
CN102195462A (en) * 2011-05-26 2011-09-21 广州金升阳科技有限公司 Start-up circuit with high-tension power supply
US20130258539A1 (en) * 2012-03-29 2013-10-03 Tao Wang Overvoltage protection circuit and electronic device
CN103607009A (en) * 2013-11-22 2014-02-26 钰泰科技(上海)有限公司 Charging and discharging circuit with automatic protecting function

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109600133A (en) * 2017-09-30 2019-04-09 瑞昱半导体股份有限公司 It can be avoided the circuit of the damage of overvoltage
CN112018724A (en) * 2019-05-29 2020-12-01 圣邦微电子(北京)股份有限公司 Overvoltage protection circuit
US11721973B2 (en) 2020-08-12 2023-08-08 Global Mixed-Mode Technology Inc. Overvoltage protection circuit
TWI764235B (en) * 2020-08-13 2022-05-11 致新科技股份有限公司 Overvoltage protection circuit

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