CN106595869B - A kind of high-resolution refrigeration mode thermal infrared imager - Google Patents
A kind of high-resolution refrigeration mode thermal infrared imager Download PDFInfo
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- 229910052732 germanium Inorganic materials 0.000 claims description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 5
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
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Abstract
The present invention relates to a kind of high-resolution refrigeration mode thermal infrared imagers, the input terminal of infrared optical system receives infrared radiation signal, output connection infrared focal plane detector, the analog signal sensing element of the output end connection detector drive module of infrared focal plane detector, its output end connects ADC conversion module, the output end connection signal of ADC conversion module handles and image-forming module, signal processing and image-forming module export vision signal, while the digital drive signals unit of output end connection detector drive module；The output end of power module connects the power port of each module.The present invention has the advantages such as good stability, compact-sized, small power consumption, at low cost, can complete the various operations to image data, switching in real time and be output to display system.Cooperation display system and key realize human-computer interaction: control and realization to detector threshold value such as are taken pictures, record a video, playing, storing, transmitting at the functions.
Description
Technical field
The invention belongs to infrared thermoviewers, are related to a kind of high-resolution refrigeration mode thermal infrared imager.
Background technique
Infrared imaging system all has wide practical use in military and civilian field.Militarily, which mainly uses
In infrared early warning, infrared reconnaissance, infrared guidance, biochemical analysis etc.；In civil field, the system can be used for biological medicine analysis,
Offshore oil prison, solar illumination monitoring, criminal investigation, forest fire protection, spatial observation, cereal of catching an illness is rejected and hazard weather monitoring
And forecast etc..
1024 × 768 infrared detectors have the advantages such as good stability, compact-sized, small power consumption, at low cost, but infrared heat
As the distance of instrument is not remote enough, high-resolution refrigeration mode infrared thermal imagery that is non-contact, quick and precisely detecting infra-red radiation cannot be reached
Instrument imaging.
Summary of the invention
Technical problems to be solved
In order to avoid the shortcomings of the prior art, the present invention proposes a kind of high-resolution refrigeration mode thermal infrared imager.
Technical solution
A kind of high-resolution refrigeration mode thermal infrared imager, it is characterised in that visited including infrared optical system, infrared focus plane
Survey device, detector drive module, ADC conversion module, signal processing and image-forming module and power module；Infrared optical system it is defeated
Enter end and receive infrared radiation signal, output connection infrared focal plane detector, the output end of infrared focal plane detector, which connects, to be visited
The analog signal sensing element of device drive module is surveyed, output end connects ADC conversion module, and the output end of ADC conversion module connects
Signal processing and image-forming module are connect, signal processing and image-forming module export vision signal, while output end connection detector driving
The digital drive signals unit of module；The output end of power module connects the power port of each module, in detector drive module
Detector power supply VDD unit, detector bias supply DIG unit and detector bias supply PRV unit provided for detector
Driving power；Information flow are as follows: the infrared light that radiation source is issued is irradiated to infrared focus plane detection by infrared optical system
On device, photoelectric conversion is generated to which infrared light image is converted into charge image；Then through detector drive module to detector
The analog signal flow of output carries out load matched, impedance matching and level conversion, so that it is acceptable to become A/DDC conversion
Characteristics of signals；Analog data flow is converted to digital signal streams by ADC conversion module, and signal processing and image-forming module convert ADC
The digital signal streams of module output carry out processing output vision signal.
The infrared optical system includes three lens, moves towards the first lens being sequentially coaxially arranged, second thoroughly by optical path
Mirror and the third lens；First lens and the third lens are bent moon positive lens, and the second lens are bent moon negative lens, the second lens and the
Three lens front surfaces are all made of aspherical；Each lens separation are as follows: the first lens and the second lens separation 4.3mm, the second lens with
The third lens interval 27.2mm, the third lens and detector interval 8.2mm.
First lens and the material of the third lens are germanium, and the material of the second lens is germanium.
It is 1024 × 768 refrigeration detectors, 16 μm of pixel dimension, simulation that the infrared focal plane detector, which selects resolution ratio,
Output channel is 8 tunnels, Stirling formula refrigeration machine.
The detector power supply VDD unit includes the D2 and peripheral circuit using AD8028ARM；With L2 inductance, L3 electricity
The electric source filter circuit that sense, B2 inductance, C8 capacitor, C9 capacitor, C5 capacitor form carries out uncoupling to the power supply power supply pin of D2
Filtering forms low-pass filter signal with R3 resistance, R4 resistance and C13 capacitor as the positive input terminal of D2, and C15 capacitor bridges the negative of D2
Input terminal and output end, play zero compensation；R14 resistance and R15 resistance are D2 negative input end bias resistance, 1+R14/R15
The voltage amplification factor of circuit thus, the output end of D2 pass through the input pole of the cathode connecting triode Q1 of D3 diode, R1 electricity
Resistance, R5 resistance and R10 resistance form the expansion current circuit of triode Q1, and providing electric current for detector is 120mA, the output of 5.95V
Voltage.
The detector bias supply DIG unit includes the D8A and peripheral circuit using AD8028ARM；Using B4 electricity
The electric source filter circuit that sense, C23 capacitor, C24 capacitor, C25 capacitor form carries out uncoupling filter to the power supply power supply pin of D8A
Wave；Form low-pass filter signal with R25 resistance, R24 resistance and C32 capacitor as the positive input terminal of D8A, C35 capacitor, RP1 resistance
With the circuit zero point of R26 resistance composition D8A；The filter circuit that the output of D8A is formed by C33 capacitor and C34 capacitor, and
D6 and D7 composition protection circuit, exports electric current 15mA and adjustable DIG output voltage for detector.
The detector bias supply PRV unit includes the D8B and peripheral circuit using AD8028ARM；R29 resistance and
R31 resistance forms the low bleeder circuit of D8B positive input terminal, the circuit zero point of C38 capacitor, R32 resistance and R30 resistance composition, R33
Resistance and R32 resistance are D8B negative input end bias resistance, the voltage amplification factor of ratio 1+R33/R32 circuit thus；D8B's
The filter circuit and D9 diode and D10 diode composition that output is formed by C37 capacitor and C36 capacitor protect circuit, are
Detector exports electric current 15mA and PRV output voltage 5.95V.
The digital drive signals unit is single-ended to differential conversion using SN65LVDS1DBV progress, by transmission line
It is converted again by carrying out difference with SN65LVDS2DBV to single-ended afterwards.
The ADC conversion module is formed using the cooperation peripheral circuit of the OPA820IDBV of TI company；L6 inductance, C45 electricity
Hold, the electric source filter circuit of C41 capacitor composition, uncoupling filtering is carried out to the power supply power supply pin of U7；Resistance R36 resistance,
R44 resistance forms the bleeder circuit of U7 positive input terminal, matches with detector output characteristics；C49 capacitor, C51 capacitor and R40
Resistance constitutes the circuit zero point of U7, and R50 resistance and R51 resistance are the bias resistance of U7 negative input end, and ratio 1+R50/R51 is electricity
The voltage amplification factor on road, voltage are matched with rear class ADC sample circuit input range；The output end of U7 completes the conversion of ADC.
The signal processing and image-forming module include that FPGA, two panels frame deposit chip, coefficient memory, two panels video memory, VGA
Display chip and RS422 communication chip；Two panels frame deposits chip and does table tennis processing, connect with FPGA；Coefficient memory facilitates 1024K
The storage of 32BIT connect for storing correction coefficient with FPGA；FLASH stores program and data, connect with FPGA；Two panels is aobvious
It deposits and does table tennis processing, connect with FPGA；RS422 communication chip does level translation, connect with FPGA；VGA display chip and two panels
Video memory connection；The table tennis processing that the frame is deposited: the NIOS when FPGA reading frame, which deposits first frame, deposits data in chip, inside FPGA
Soft verification frame, which deposits the second frame and deposits data in chip, to be handled, when FPGA, which reads the second frame, deposits data in chip, inside FPGA
The soft verification frame of NIOS deposit first frame and deposit data in chip and handled；The table tennis of the video memory is handled: when VGA display control core
When piece reads data in the first video memory, FPGA writes data into the second video memory；It is shown when VGA display control chip reads second
When depositing middle data, FPGA writes data into the first video memory.
Beneficial effect
A kind of high-resolution refrigeration mode thermal infrared imager proposed by the present invention, system good, compact-sized, function with stability
The advantages such as small, at low cost are consumed, the various operations to image data, switching can be completed in real time and are output to display system.Cooperation is aobvious
Show that system and key realize human-computer interaction: the function such as control and realization to detector threshold value take pictures, record a video, playing, storing, transmitting
Energy.
Advantages of the present invention
Infrared optical system of the invention uses aspheric design, and the selectable variable of optimization design increases, aberration design
It is easily obtained excellent image quality；Structure simplifies: system uses three pieces lens, and introducing two is aspherical, remaining is spherical surface, is dropped significantly
Low technique requirement, compact-sized, transmitance is high；Ray machine adjustment is convenient: the component in optical path is fixation member, adjustment letter
It is single, largely reduce the resetting difficulty of system.
The low-pass filter circuit being made of low noise operational amplifier is used to provide driving voltage VDD for detector and be spy
Detector can be met to input power supply and bias voltage to the greatest extent by surveying device DIG and PRV and providing bias voltage driving
Noise requirements greatly reduce the noise of detector output signal.
The mould for being exported detector using the modulus conversion chip AD9240 of the OPA820IDBV cooperation ADI company of TI company
Quasi- signal is converted to digital signal, can good matching detector output characteristics, and by the noise of modulus conversion chip
Than reaching close to maximum value.
Using FPGA+NIOS signal processing framework, two panels frame is cooperated to deposit, a piece of coefficient memory, a piece of FLASH, two panels
Video memory and VGA display chip and RS422 communication chip, constitute signal processing and image-forming module.Signal processing and imaging mould
Block carries out two point correction and single point correction to the original signal that detector exports, and using improved bad first detection method, reduces and misses
Sentence and phenomenon of failing to judge, raising blind element detection accuracy improve picture contrast using advanced DCE algorithm.It is according to claim 1
The high-resolution refrigeration mode thermal infrared imager, uses FPGA as main control unit, can configure different detector work ginsengs
Number can complete the various operations to image data, switching in real time and be output to display system to improve Effect on Detecting.Cooperation is aobvious
Show that system and key realize human-computer interaction.
Detailed description of the invention
Fig. 1: high-resolution refrigeration mode thermal infrared imager imager composition block diagram
Fig. 2: it show the index path of infrared optical system of the present invention
Fig. 3: the detector power supply VDD unit of detector drive module
Fig. 4: the detector bias of detector drive module supplies DIG unit
Fig. 5: the detector bias of detector drive module supplies PRV unit
Fig. 6: ADC conversion module
Fig. 7: signal processing and image-forming module schematic block diagram
Fig. 8: timing diagram
Fig. 9: timing diagram
Specific embodiment
Now in conjunction with embodiment, attached drawing, the invention will be further described:
High-resolution refrigeration mode thermal infrared imager imager shown in 1 with reference to the accompanying drawings, it mainly by infrared optics object lens I,
Infrared detector II, detector drive module III, A/D conversion IV, signal processing circuit and image-forming module V, power module VI
It is successively constituted with display VII, the infrared lens I are connected by infrared detector II with driving circuit III, the drive
Dynamic circuit I II is electrically connected by A/D conversion IV and signal processing circuit and image-forming module V with display VII and data output apparatus
It connects, the duty of power module VI is red external detector II, detector drive module III, ADC conversion IV, signal processing electricity
Road and image-forming module V are powered.
After the infrared light that the source of infrared radiation is issued passes through object lens of large relative aperture infrared optics object lens I, infrared acquisition is converged to
On the focal plane of device II, at driving circuit III, A/D conversion IV and V infrared signal of signal processing circuit and image-forming module
Reason and image-forming module complete photoelectric conversion and signal processing, form the Infrared video image of target and background scenery, are output to aobvious
Show device VIII.
To receive target emanation as much as possible, system signal noise ratio is improved, infrared optics object lens I must have larger opposite
Aperture.According to detector performance parameters and system index, determine that the F number of optical system is 2.It is adjusted by the movement of whole group lens
Coke compensates under -40 DEG C~+60 DEG C of environment temperature, and the influence of the decline of system image quality caused by image planes drift makes image planes again
It focuses on detector focal plane.
The present invention is described further below with reference to specific embodiment.
It is illustrated in figure 2 the index path of infrared optical system of the present invention, moves towards sequentially coaxially be arranged first thoroughly by optical path
Mirror, the second lens, the third lens, parallel flat and detector, the first lens and the third lens are bent moon positive lens, the second lens
For bent moon negative lens, the second lens and the third lens front surface are all made of aspherical.
External scene is radiated through the first lens 1 (bent moon positive lens, material: silicon), the second lens 2 (bent moon negative lens, material
Material: germanium), the third lens 3 (bent moon positive lens, material: silicon) focus on 4 focal plane of detector.
First lens and the second lens separation 4.3mm, the second lens and the third lens interval 27.2mm, the third lens and spy
Survey device interval 8.2mm.The design parameter of the optical system is as shown in table 1.
1 optical system data table of table
Detector drive module adopts the following technical scheme that detector drive module by detector power supply VDD unit, detection
Device bias supplies DIG unit, detector bias supplies PRV unit, digital drive signals unit, analog signal sensing element group
At；1, detector power supply VDD unit: using the low-pass filter circuit being made of low noise operational amplifier, and pass through triode
The mode for expanding stream provides driving voltage VDD for detector, and circuit connecting relation is as shown in Figure 3；2, detector bias supplies DIG
Unit: the bias voltage supply circuit constituted using low noise operational amplifier provides bias voltage for detector DIG and PRV
Driving, circuit connecting relation difference is as shown in Figure 4；3, detector bias supplies PRV unit: using low noise operational amplifier
The bias voltage supply circuit of composition provides bias voltage driving for detector PRV, and circuit connecting relation is shown in Fig. 5 institute respectively
Show；Using three of the above mode can meet to the greatest extent detector to input power supply and bias voltage noise requirements,
Greatly reduce the noise of detector output signal；4, mould is constituted using the OPA820IDBV cooperation peripheral circuit of TI company
Quasi- signal read circuit, circuit connecting relation is as shown in Figure 6；5, digital drive signals unit: digital drive signals unit is adopted
Carried out with SN65LVDS1DBV it is single-ended to differential conversion, again by carrying out difference extremely with SN65LVDS2DBV after transmission line
It is single-ended to be converted, make the signal integrity that can guarantee digital signal needed for detector in this way, and can reduce
The influence that digital signal reads sensitive power supply, bias supply circuit and analog signal.
Such as the detector power supply VDD unit of Fig. 3 detector drive module of the present invention, belong to the supply of low noise detector voltage
Circuit, the function of driving circuit III are the electric interfaces for driving detector, enable to work normally.
Configuration of circuit as shown in Figure 3 is used to the VDD power supply of detector, mainly uses AD8028ARM cooperation periphery electricity
Road composition；The electric source filter circuit formed using L2, L3, B2, C8, C9, C5 carries out uncoupling filter to the power supply power supply pin of D2
The power supply rejection ratio of D2 is improved to -120dB, R3, R4 and C13 and forms low-pass filter by wave device, and design -3dB cut off band width is
1.526Hz；C15, R14 built-up circuit zero point prevent output from vibrating；R1, R5, D3, Q1, R10 and D2, which match, is combined into expansion galvanic electricity
Road provides electric current up to 120mA, and output voltage stabilization provides the stabilized power supply supply of low noise in 5.95V, for detector.Member
Parts selection is shown in Table 2.
2 detector of table power supply VDD components selection table
Configuration of circuit as shown in Figure 4 is that the detector bias of detector drive module supplies DIG unit, to detector
The power supply of DIG bias voltage uses, and mainly uses AD8028ARM cooperation peripheral circuit composition；Using B4, C23, C24, C25 group
At electric source filter circuit, uncoupling filter is carried out to the power supply power supply pin of D8A, by the power supply rejection ratio of D8A improve to-
110dB, R25, R24 and C32 form low-pass filter, and design -3dB cut off band width is 1.526Hz；C35, RP1, R26 composition electricity
Road zero point prevents output from vibrating；D6, D7 composition protection circuit, preventing output voltage values is more than VDD；Design its output of this circuit
For electric current up to 15mA, output voltage DIG is adjustable according to detection factory report, provides the DIG bias voltage of low noise for detector
Supply.Components selection is shown in Table 3.
3 detector of table power supply DIG components selection table
Configuration of circuit as shown in Figure 5 is that the detector bias of detector drive module supplies PRV unit, to detector
The supply of PRV bias voltage uses, and mainly uses AD8028ARM cooperation peripheral circuit composition；Wherein R29, R31 form low point
Volt circuit；C38, R32, R30 built-up circuit zero point prevent output from vibrating；D9, D10 protect circuit, prevent the output voltage values to be more than
VDD；Designing this circuit, it exports electric current up to 15mA, and output voltage stabilization provides the stabilization of low noise in 5.95V, for detector
Power supply.Components selection is shown in Table 4.
4 detector of table power supply PRV components selection table
If Fig. 6 is ADC conversion module of the invention, the low noise operational amplifier mainly produced by TI company
OPA820IDBV cooperates peripheral circuit composition, wherein the electric source filter circuit of L6, C45, C41 composition, to the power supply power supply pipe of U7
Foot carries out uncoupling filter, and the power supply rejection ratio of U7 is improved and mainly exports with detector special to -124dB, resistance R36, R44
Property match, C49, C51, R40 constitute circuit zero point, play the role of stablize output.Shown in components selection is shown in Table.
5 ADC of table converts front-end circuit components selection table
| Component device identification numbers | Component model | Component package | Component precision |
| R36 | 51Ω | 0402 | 1% |
| R44 | 200KΩ | 0402 | 1% |
| R50 | 200KΩ | 0402 | 1% |
| R51 | 510Ω | 0402 | 1% |
| R40 | 10Ω | 0402 | 1% |
| C49 | 5.6pF | 0603 | 5% |
| C41 | 0.1uF | 0603 | 5% |
| C45 | 2.2uF | 0603 | 5% |
| L6 | 2.2uH | 0603 | 5% |
| U7 | OPA820IDBV | SOT332 |
If Fig. 7 is signal processing and image-forming module schematic block diagram of the invention.Specific embodiment is as follows: using
FPGA+NIOS signal processing framework, cooperation two panels frame is deposited, a piece of coefficient memory, a piece of FLASH, two panels video memory and VGA are aobvious
Show chip and RS422 communication chip, constitutes signal processing and image-forming module.Signal processing and image-forming module export detector
Original signal carry out two point correction and single point correction, using improved bad first detection method, reduce erroneous judgement and phenomenon of failing to judge, mention
High blind element detection accuracy improves picture contrast using advanced DCE algorithm.
Two panels IS61WV102416BLL chip is chosen as frame memory, frame deposits 1SRAM as illustrated in the drawing and frame is deposited
2SRAM, two panels frame, which is deposited, does table tennis processing, the soft verification frame of NIOS when FPGA, which reads frame, deposits data in 1SRAM, inside FPGA
It deposits 2SRAM to be handled, when FPGA, which reads frame, deposits data in 2SRAM, the soft verification frame of NIOS inside FPGA deposits 1SRAM progress
Processing, as shown in Fig. 8 timing.
Coefficient stores its storage for using two panels IS61LV51232BLL series connection to facilitate 1024K 32BIT, for storing school
Positive coefficient.
FLASH is used to store program and data using EPCS64.
RS422 communication does level translation using MAX1484EUB chip.
Two panels IS61WV102416BLL chip is chosen as display-memory, as illustrated in the drawing video memory 1SRAM and video memory
2SRAM, two panels video memory do table tennis processing, and when VGA display control chip reads data in video memory 1, FPGA writes number into video memory 2
According to；When VGA display control celestial being, which is read, takes data in video memory 2, FPGA writes data into video memory 1.As shown in Fig. 9 timing.
The power module VI that the present invention uses is using input power filtering, module shield, the isolation of common mode ground wire, rear end output
The measures such as voltage filter, to reduce voltage ripple and interference noise, to guarantee detector sensitivity and rear end A/D conversion
When effective resolution.
Claims (7)
1. a kind of high-resolution refrigeration mode thermal infrared imager, it is characterised in that detected including infrared optical system, infrared focus plane
Device, detector drive module, ADC conversion module, signal processing and image-forming module and power module；The input of infrared optical system
End receives infrared radiation signal, output connection infrared focal plane detector, and the output end of infrared focal plane detector connects detection
The analog signal sensing element of device drive module, the output end of infrared focal plane detector connect ADC conversion module, ADC conversion
The output end connection signal of module handles and image-forming module, and signal processing and image-forming module export vision signal, while output end
Connect the digital drive signals unit of detector drive module；The output end of power module connects the power port of each module, visits
It is mono- that detector power supply VDD unit, detector bias supply DIG unit and the detector bias surveyed in device drive module supply PRV
Member provides driving power for detector；Information flow are as follows: the infrared light that radiation source is issued is irradiated to by infrared optical system
On infrared focal plane detector, photoelectric conversion is generated to which infrared light image is converted into charge image；Then it is driven through detector
Dynamic model block carries out load matched, impedance matching and level conversion to the analog signal flow that detector exports, so that turning as ADC
The acceptable characteristics of signals of parallel operation；Analog data flow is converted to digital signal streams, signal processing and imaging by ADC conversion module
The digital signal streams that module exports ADC conversion module carry out processing output vision signal；
The detector power supply VDD unit includes the D2 and peripheral circuit using AD8028ARM；With L2 inductance, L3 inductance, B2 electricity
The electric source filter circuit that sense, C8 capacitor, C9 capacitor, C5 capacitor form carries out uncoupling filtering, R3 to the power supply power supply pin of D2
The positive input terminal of resistance, the low-pass filter circuit of R4 resistance and C13 capacitor composition and D2 connects, and bearing for C15 capacitor bridging D2 is defeated
Enter end and output end, plays zero compensation；R14 resistance and R15 resistance are D2 negative input end bias resistance, and 1+R14/R15 is
The voltage amplification factor of peripheral circuit；
Input pole of the output end of D2 by the cathode connecting triode Q1 of D3 diode, R1 resistance, R5 resistance and R10 resistance group
At the expansion current circuit of triode Q1, the electric current of 120mA, the output voltage of 5.95V are provided for detector；
The detector bias supply DIG unit includes the D8A and peripheral circuit using AD8028ARM；Using B4 inductance, C23
The electric source filter circuit that capacitor, C24 capacitor, C25 capacitor form carries out uncoupling filtering to the power supply power supply pin of D8A；R25
Resistance, R24 resistance and C32 capacitor composition low-pass filter circuit and D8A positive input terminal connect, C35 capacitor, RP1 resistance and
The circuit zero point of R26 resistance composition D8A；The filter circuit and D6 bis- that the output of D8A is formed by C33 capacitor and C34 capacitor
Pole pipe and D7 diode composition protection circuit, export electric current 15mA and adjustable DIG output voltage for detector；
The detector bias supply PRV unit includes the D8B and peripheral circuit using AD8028ARM；R29 resistance and R31 electricity
Resistance composition D8B positive input terminal low bleeder circuit, C38 capacitor, R32 resistance and R30 resistance built-up circuit zero point, R33 resistance and
R32 resistance is D8B negative input end bias resistance, the voltage amplification factor of ratio 1+R33/R32 circuit thus；The output of D8B passes through
The filter circuit and D9 diode and D10 diode composition protection circuit that C37 capacitor and C36 capacitor form are crossed, is detector
Export electric current 15mA and PRV output voltage 5.95V.
2. high-resolution refrigeration mode thermal infrared imager according to claim 1, it is characterised in that: the infrared optical system packet
Three lens are included, the first lens, the second lens and the third lens being sequentially coaxially arranged are moved towards by optical path；First lens and third
Lens are bent moon positive lens, and the second lens are bent moon negative lens, and the second lens and the third lens front surface are all made of aspherical；Respectively
Lens separation are as follows: the first lens and the second lens separation 4.3mm, the second lens and the third lens interval 27.2mm, the third lens
With detector interval 8.2mm.
3. high-resolution refrigeration mode thermal infrared imager according to claim 2, it is characterised in that: first lens and third
The material of lens is germanium, and the material of the second lens is germanium.
4. high-resolution refrigeration mode thermal infrared imager according to claim 1, it is characterised in that: the infrared focus plane detection
Device selects the refrigeration detector that resolution ratio is 1024 × 768,16 μm of pixel dimension, and analog output channel is 8 tunnels, and refrigeration machine is this
Te Linshi refrigeration machine.
5. high-resolution refrigeration mode thermal infrared imager according to claim 1, it is characterised in that: the digital drive signals list
Member is single-ended to differential conversion using SN65LVDS1DBV progress, carries out difference by SN65LVDS2DBV again after transmission line
It is converted to single-ended.
6. high-resolution refrigeration mode thermal infrared imager according to claim 1, it is characterised in that: the ADC conversion module is adopted
With the OPA820IDBV cooperation peripheral circuit composition of TI company；L6 inductance, C45 capacitor, the power filter of C41 capacitor composition are electric
Road carries out uncoupling filtering to the power supply power supply pin of U7 comparator；Resistance R36, resistance R44 form U7 comparator positive input terminal
Bleeder circuit, matched with detector output characteristics；C49 capacitor, C51 capacitor and R40 resistance constitute the circuit of U7 comparator
Zero point, R50 resistance and R51 resistance are the bias resistance of U7 comparator negative input end, and ratio 1+R50/R51 is that the voltage of circuit is put
Big multiple, voltage are matched with rear class ADC sample circuit input range；Analog signal is completed to number by the output end of U7 comparator
The conversion of signal.
7. high-resolution refrigeration mode thermal infrared imager according to claim 1, it is characterised in that: the signal processing and imaging
Module includes that FPGA, two panels frame deposit chip, coefficient memory, two panels video memory, VGA display chip and RS422 communication chip；Two panels
Frame deposits chip and does table tennis processing, connect with FPGA；Coefficient memory facilitates the storage of 1024K32BIT, for storing correction system
Number, connect with FPGA；FLASH stores program and data, connect with FPGA；Two panels video memory does table tennis processing, connect with FPGA；
RS422 communication chip does level translation, connect with FPGA；VGA display chip is connect with two panels video memory；At the table tennis that the frame is deposited
Reason: when FPGA reading frame, which deposits first frame, deposits data in chip, the soft verification frame of NIOS inside FPGA is deposited the second frame and is deposited in chip
Data are handled, and when FPGA, which reads the second frame, deposits data in chip, the soft verification frame of NIOS inside FPGA is deposited first frame and deposited
Data are handled in chip；The table tennis of the video memory is handled: when VGA display control chip reads data in the first video memory,
FPGA writes data into the second video memory；When VGA display control chip reads data in second video memory, FPGA is to the first video memory
In write data.
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| CN109407746A (en) * | 2018-11-22 | 2019-03-01 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of refrigeration type infrared detector low noise power supply power supply circuit |
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