CN106548937B - The process of annealing - Google Patents
The process of annealing Download PDFInfo
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- CN106548937B CN106548937B CN201510599282.6A CN201510599282A CN106548937B CN 106548937 B CN106548937 B CN 106548937B CN 201510599282 A CN201510599282 A CN 201510599282A CN 106548937 B CN106548937 B CN 106548937B
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- annealing
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- 238000000137 annealing Methods 0.000 title claims abstract description 66
- 238000000034 method Methods 0.000 title claims abstract description 45
- 230000008569 process Effects 0.000 title claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000010438 heat treatment Methods 0.000 claims description 19
- 230000006641 stabilisation Effects 0.000 claims description 4
- 238000011105 stabilization Methods 0.000 claims description 4
- 230000001186 cumulative effect Effects 0.000 claims description 3
- 230000007812 deficiency Effects 0.000 abstract 1
- 239000000523 sample Substances 0.000 description 9
- 238000012360 testing method Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 239000012535 impurity Substances 0.000 description 5
- 230000007547 defect Effects 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 239000002184 metal Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 230000035484 reaction time Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- SCYULBFZEHDVBN-UHFFFAOYSA-N 1,1-Dichloroethane Chemical class CC(Cl)Cl SCYULBFZEHDVBN-UHFFFAOYSA-N 0.000 description 1
- 230000003197 catalytic effect Effects 0.000 description 1
- 238000006555 catalytic reaction Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 238000010792 warming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Abstract
The invention discloses a kind of processes of annealing, wherein, the process of the annealing is applied to the annealing after substrate injects carrier, the process of the annealing includes: that furnace tube temperature is risen to annealing temperature from initial temperature, wherein, it is passed through gas in the temperature rise period, the gas includes DCE.The present invention can make up for it the deficiency that diode made of existing annealing process has apparent leaky, can improve diode leakage failure.
Description
Technical field
The present invention relates to semiconductor field more particularly to a kind of processes of annealing.
Background technique
In diode process, it will usually carrier is injected in the substrate carries out annealing propulsion later, it is existing to move back
The general annealing atmosphere of fire process only has N2/O2Or N2/H2/O2, it is apparent that this annealing process has manufactured diode
Leaky.
Summary of the invention
The technical problem to be solved by the present invention is to apparent in order to overcome diode made of existing annealing process to have
The defect of leaky provides a kind of process of annealing that can improve diode leakage failure.
The present invention is to solve above-mentioned technical problem by the following technical programs:
The present invention provides a kind of process of annealing, its main feature is that, the process of the annealing is applied in substrate
The annealing after carrier is injected, the process of the annealing includes: that furnace tube temperature is risen to annealing temperature from initial temperature,
Wherein, it is passed through gas in the temperature rise period, the gas includes DCE (dichloroethanes C2H4CL2).
It is described in substrate injection carrier to be included in P type substrate injection N-type impurity or in N-type substrate injecting p-type impurity,
Preferably, the concentration of the carrier of injection is greater than E19/cm3, resistivity < 10mohm.cm.The process of annealing is usually to be first to heat to
Then certain temperature keeps a period of time, then gradually cools down, start (the starting of annealing of annealing when being raised to 950 DEG C such as furnace tube temperature
Temperature is 950 °C), annealing temperature is 1150 DEG C, then the temperature of boiler tube can rise to 1150 DEG C from 950 DEG C, reaches 1150
After DEG C, a period of time can be kept to be cooled back to certain temperature.Since furnace tube temperature rises to from initial temperature the mistake of annealing temperature
Cheng Zhong, furnace tube temperature are difficult directly to rise to annealing temperature from initial temperature, even if can be easy to produce side effect, so usually
Using stepped heating method, i.e., it is first warming up to certain temperature, then temperature stablizes a period of time, and it is further heated up to certain
Time, then temperature stablize a period of time, then heat up again, stablize, until reaching annealing temperature.The present invention is exactly the mistake in heating
(i.e. temperature rise period) is passed through the gas including DCE in journey, by introducing defect center in PN junction, reduces carrier minority carrier life time and comes
Achieve the effect that reduce leakage current.
DCE, be commonly used in the prior art in boiler tube as clean (cleaning) gas can also be used to remove metal from
Son and the effect for expediting the emergence of oxidation.It is exactly normal back segment metal lead wire and passivation layer step after having carried out annealing of the invention
Suddenly.
Preferably, the concentration accounting of DCE is greater than 3% in the gas.
Preferably, the concentration accounting of DCE is greater than 4% in the gas.
Preferably, the gas further includes O2。
Preferably, the flow of DCE is 300sccm, O in the gas2Flow be 7000sccm.
Preferably, in the temperature rise period of annealing, DCE annealing all temperature rise periods it is cumulative be passed through duration at 1 hour
More than.
Wherein, DCE is decomposed at high temperature, introduces defect center and catalysis Si+O2=> SiO2 on (silicon) surface Si,
The time that DCE is passed through is longer, longer in the time that the surface Si introduces defect center and performance catalytic action, can more reduce electric leakage
Stream.
Preferably, the process of the annealing the temperature rise period heating rate in 5 DEG C/min or less.
The effect that slower heating rate can guarantee that DCE is played is more abundant.That is, the heating rate of temperature rise period is slower,
The effect for reducing leakage current is better, if heating rate is effect of the 3 DEG C/min than the reduction leakage current that heating rate is 5 DEG C/min
It is better.
Preferably, the annealing temperature, between 1050 DEG C to 1200 DEG C, the initial temperature is 950 DEG C.
Preferably, the process of the annealing further includes adjusting institute according to the time for being passed through gas in the temperature rise period
The concentration accounting of DCE in gas is stated, and/or, heating is adjusted according to the concentration accounting for being passed through DCE in gas in the temperature rise period
The heating rate in stage.
Wherein, if the time for being passed through gas is shorter, then the concentration accounting of DCE in the gas can suitably be turned up,
If the time for being passed through gas is longer, then the concentration accounting of DCE in the gas can be turned down suitably；If being passed through in gas
The concentration accounting of DCE is lower, then heating rate can be reduced suitably, extends the time for being passed through DCE, if being passed through in gas
The concentration of DCE accounts for relatively high, then heating rate can be improved suitably, shortens the time for being passed through DCE.Above-mentioned adjustment, can
To guarantee that DCE has the enough reaction time.
Preferably, the process of the annealing further includes rising to the process of annealing temperature from initial temperature in furnace tube temperature
In, stop being passed through DCE in the temperature stabilization sub stage, and/or, stop being passed through DCE in the temperature stabilization sub stage and is passed through N2。
On the basis of common knowledge of the art, above-mentioned each optimum condition, can any combination to get each preferable reality of the present invention
Example.
The positive effect of the present invention is that: the present invention can effectively improve diode leakage failure, improve two poles
The quality of pipe.And the present invention also has the advantages that simple possible.
Detailed description of the invention
Fig. 1 is the flow chart of the process of the annealing of the embodiment of the present invention；
Fig. 2 is the temperature variation of the annealing of the embodiment of the present invention；
Fig. 3 is the test result figure of the embodiment of the present invention.
Specific embodiment
The present invention is further illustrated below by the mode of embodiment, but does not therefore limit the present invention to the reality
It applies among a range.
Embodiment
A kind of process of annealing, the process of the annealing are applied to moving back after substrate injects carrier
Fire, wherein the concentration of the carrier of injection is greater than E19/Cm3.The process of the annealing includes that furnace tube temperature is warm from starting
Degree rises to annealing temperature: as shown in Figure 1, executing following step during furnace tube temperature rises to annealing temperature from initial temperature
It is rapid:
Step 101 is passed through gas in the temperature rise period, and the gas includes DCE and O2。
Step 102 stopped being passed through the gas in the temperature stabilization sub stage, is especially off and is passed through DCE, and was stopping leading to
N is passed through when entering DCE2。
After furnace tube temperature is risen to annealing temperature from initial temperature, other steps of annealing are continued to complete, are such as being moved back
Fiery temperature is kept for a period of time cooled down again.The back segment of conventional semiconductors manufacture is carried out after completing entire annealing process
Metal lead wire and passivation layer step.
The concentration accounting of DCE is greater than 3% in the gas being passed through in step 101, with the gas O2Flow be
For 7000sccm, the flow of the DCE can be 240sccm.
In order to achieve the effect that preferably to improve electric leakage, the concentration accounting of DCE is further greater than 4% in the gas, also
It is with O in the gas2Flow be 7000sccm for, the flow of the DCE can be 300sccm.
In order to guarantee that DCE can have the enough reaction time, DCE should ensure that in the time that is passed through that all temperature rise periods add up
At 1 hour or more, anneal the temperature rise period heating rate in 5 DEG C/min or less.Wherein, the annealing temperature of annealing can be
Between 1050 DEG C to 1200 DEG C, the initial temperature of the temperature rise period can be 950 DEG C.
It is described further, takes come the process of the annealing to the present embodiment and effect achieved below with reference to experiment
4 samples, injecting N-type impurity in P type substrate respectively, (concentration is greater than E19/Cm3) after, annealing propulsion is carried out at 1150 DEG C, temperature
Change procedure is spent as shown in Fig. 2, when furnace tube temperature is annealed since being raised to after 950 DEG C 700 DEG C, and annealing process and each sample are passed through
Gas station it is as shown in table 1:
Table 1
Wherein, the N being passed through in 1~No. 4 sample2Flow be 104Sccm, the annealing of 1 to No. 4 sample is in the temperature rise period
Heating rate it is identical, and in 5 DEG C/min hereinafter, the cumulative when a length of 67min for being passed through gas of all temperature rise periods；
It is not passed through DCE always in No. 1 sample；
The concentration accounting of DCE is 2.8% in No. 2 samples；
The concentration accounting of DCE is 3.3% in No. 3 samples；
The concentration accounting of DCE is 4.1% in No. 4 samples.
The leakage current that 1 to No. 4 sample is detected using tetra- probe method of kelvin adds voltage rating outside two probes,
The leakage current of another two probes test under rated voltage.Testing result is as shown in Figure 3.Abscissa is test voltage in Fig. 3, single
Position is volt (V), and ordinate is the leakage current measured, unit ampere (A).Following testing result is obtained in conjunction with Fig. 3:
(1) (No. 1 sample is corresponded to, the curve of the top in Fig. 3) when the gas being passed through does not include DCE, the leakage of diode
Electric current is larger；
(2) when the concentration that the gas being passed through includes DCE but DCE is smaller (corresponding No. 2 samples,
Article 2 curve is counted in Fig. 3 from top to bottom), the leakage current of diode slightly improves, and is especially 0 in test voltage
It is obvious when between 7.8V；
(3) (corresponding No. 3 samples, number the from top to bottom in Fig. 3 when the concentration that the gas being passed through includes DCE and DCE is larger
Three curves), the leakage current of diode has clear improvement on entire test voltage section；
(4) when the concentration that the gas being passed through includes DCE and DCE is bigger, (corresponding No. 4 samples, number is most from top to bottom in Fig. 3
Latter curve), improvement of the leakage current of diode on entire test voltage section becomes apparent, and leakage current can achieve
1.E-08A or less.
By comparing as can be seen that the gas that is passed through includes DCE ratio do not include DCE when, leakage current can be reduced, and led to
When including DCE in the gas entered, the concentration of DCE is higher, and leakage current is smaller.
The process of the annealing of the present embodiment further includes adjusting institute according to the time for being passed through gas in the temperature rise period
State the concentration accounting of DCE in gas.The time for being such as passed through gas is shorter, then DCE in the gas can be suitably turned up
Concentration accounting, the time for being for another example passed through gas is longer, then the concentration accounting of DCE in the gas can be turned down suitably.
The process of the annealing of the present embodiment further includes that basis is accounted in the concentration that the temperature rise period is passed through DCE in gas
Than the heating rate for adjusting the temperature rise period.The concentration accounting for being such as passed through DCE in gas is lower, then heating can be reduced suitably
Rate extends and is passed through time of DCE, be for another example passed through DCE in gas concentration account for it is relatively high, then heating can be improved suitably
Rate shortens the time for being passed through DCE.
Two kinds of above-mentioned adjustment, can guarantee that DCE sufficiently participates in reacting.
Although the present embodiment only gives the annealing and relevant testing result after P type substrate injects N-type impurity,
It is that the process of the annealing of the present embodiment is equally applicable to the annealing after N-type substrate injecting p-type impurity.
Although specific embodiments of the present invention have been described above, it will be appreciated by those of skill in the art that these
It is merely illustrative of, protection scope of the present invention is defined by the appended claims.Those skilled in the art is not carrying on the back
Under the premise of from the principle and substance of the present invention, many changes and modifications may be made, but these are changed
Protection scope of the present invention is each fallen with modification.
Claims (6)
1. a kind of process of annealing, which is characterized in that the process of the annealing is applied to inject carrier in substrate
Annealing later, the process of the annealing include: that furnace tube temperature is risen to annealing temperature from initial temperature, wherein are being risen
Thermophase is passed through gas, and the gas includes DCE；
The gas further includes O2；
The concentration accounting of DCE is greater than 4% in the gas；
The flow of DCE is 300sccm, O in the gas2Flow be 7000sccm.
2. the process annealed as described in claim 1, which is characterized in that DCE is cumulative in all temperature rise periods of annealing
Be passed through duration at 1 hour or more.
3. the process annealed as claimed in claim 2, which is characterized in that the process of the annealing is in the temperature rise period
Heating rate in 5 DEG C/min or less.
4. the process annealed as claimed in claim 3, which is characterized in that the annealing temperature is at 1050 DEG C to 1200 DEG C
Between, the initial temperature is 950 DEG C.
5. the process annealed as described in claim 1, which is characterized in that the process of the annealing further includes basis
The concentration accounting of DCE in the gas is adjusted in the time that the temperature rise period is passed through gas, and/or, according in the heating
Stage is passed through the heating rate of the concentration accounting adjustment temperature rise period of DCE in gas.
6. the process annealed as described in claim 1, which is characterized in that the process of the annealing further includes in furnace
During tube temperature degree rises to annealing temperature from initial temperature, stop being passed through DCE in the temperature stabilization sub stage, and/or, it is steady in temperature
Determine stage stopping to be passed through DCE and be passed through N2。
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| CN106206266B (en) * | 2016-07-22 | 2020-02-04 | 上海芯导电子科技有限公司 | Well pushing process |
| CN108198909B (en) * | 2018-01-15 | 2020-04-14 | 浙江晶科能源有限公司 | Silicon wafer processing method and solar cell manufacturing method |
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|---|---|---|---|---|
| KR0125310B1 (en) * | 1994-07-06 | 1997-12-10 | 김주용 | A method for oxidation film of semiconductor device |
| CN1227963A (en) * | 1997-12-22 | 1999-09-08 | 国际商业机器公司 | Defect induced buried oxide for throughput SOI |
| US6495429B1 (en) * | 2002-01-23 | 2002-12-17 | International Business Machines Corporation | Controlling internal thermal oxidation and eliminating deep divots in SIMOX by chlorine-based annealing |
| CN1661782A (en) * | 2004-02-23 | 2005-08-31 | 海力士半导体有限公司 | Method for forming oxide film in semiconductor device |
| CN102154708A (en) * | 2010-12-31 | 2011-08-17 | 常州天合光能有限公司 | Method for growing solar cell film |
| CN103681288A (en) * | 2013-12-18 | 2014-03-26 | 无锡中微晶园电子有限公司 | High-reliability growth technique for low-temperature gate oxide layer |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2006106859A1 (en) * | 2005-03-31 | 2008-09-11 | 株式会社日立国際電気 | Semiconductor device manufacturing method, substrate manufacturing method, and substrate processing apparatus |
| KR20100070652A (en) * | 2008-12-18 | 2010-06-28 | 포항공과대학교 산학협력단 | A facile route to flexible all-organic field-effect transistors by all-solution process |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0125310B1 (en) * | 1994-07-06 | 1997-12-10 | 김주용 | A method for oxidation film of semiconductor device |
| CN1227963A (en) * | 1997-12-22 | 1999-09-08 | 国际商业机器公司 | Defect induced buried oxide for throughput SOI |
| US6495429B1 (en) * | 2002-01-23 | 2002-12-17 | International Business Machines Corporation | Controlling internal thermal oxidation and eliminating deep divots in SIMOX by chlorine-based annealing |
| CN1661782A (en) * | 2004-02-23 | 2005-08-31 | 海力士半导体有限公司 | Method for forming oxide film in semiconductor device |
| CN102154708A (en) * | 2010-12-31 | 2011-08-17 | 常州天合光能有限公司 | Method for growing solar cell film |
| CN103681288A (en) * | 2013-12-18 | 2014-03-26 | 无锡中微晶园电子有限公司 | High-reliability growth technique for low-temperature gate oxide layer |
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Address after: 200233, No. 385 Rainbow Road, Shanghai, Xuhui District Patentee after: SHANGHAI ADVANCED SEMICONDUCTO Address before: 200233, No. 385 Rainbow Road, Shanghai, Xuhui District Patentee before: ADVANCED SEMICONDUCTOR MANUFACTURING Co.,Ltd. |
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Effective date of registration: 20210427 Address after: 200120 No.600 Yunshui Road, Pudong New Area, Shanghai Patentee after: Shanghai Jita Semiconductor Co.,Ltd. Address before: 200233, No. 385 Rainbow Road, Shanghai, Xuhui District Patentee before: SHANGHAI ADVANCED SEMICONDUCTO |