CN106507114A - It is based on FPGA method for compressing image, device and Transmission system - Google Patents
It is based on FPGA method for compressing image, device and Transmission system Download PDFInfo
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- CN106507114A CN106507114A CN201611061206.0A CN201611061206A CN106507114A CN 106507114 A CN106507114 A CN 106507114A CN 201611061206 A CN201611061206 A CN 201611061206A CN 106507114 A CN106507114 A CN 106507114A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
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- Compression Or Coding Systems Of Tv Signals (AREA)
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Abstract
The invention provides based on FPGA method for compressing image, device and Transmission system, it is related to the technical field of image procossing, and wherein, a kind of based on FPGA method for compressing image, comprise the following steps：View data is received, and by described image data storage in Free Partition, while the Free Partition is labeled as cache partitions；When the described image data in the cache partitions reach given threshold, the cache partitions are labeled as partition encoding；Described image data in the partition encoding are carried out with compression coding to generate image compression data, and the partition encoding is labeled as subregion to be sent；The described image compressed data in the subregion to be sent is transmitted according to instruction is sent, solves the technical problem that conventional images data are unable to real non-destructive transmission, it is achieved that the technique effect of view data real non-destructive transmission.
Description
Technical field
The present invention relates to technical field of image processing, more particularly, to a kind of based on FPGA method for compressing image, device and
Transmission system.
Background technology
Photoetching technique is the technology that there is characteristic composition for printing on the surface of the substrate.Such substrate can be used to manufacture
Semiconductor device, multiple integrated circuits, flat-panel screens (such as liquid crystal display), circuit board, biochip, micromechanics electronics
Chip, photoelectron circuit chip etc..
In the etching system of direct-write type lithography machine, feature pattern is produced by spatial light modulator micro mirror array, and this is slightly
Little minute surface can be modulated with producing spatial light intensity with the separately addressed individually controlled light beam with different incline direction reflected illuminations,
Feature pattern is projected to printed circuit board (PCB) (Printed Circuit Board, abbreviation PCB by corresponding imaging optical path finally
Plate) on.
In order to ensure the photoetching quality of pcb board, need to gather substantial amounts of pcb board picture number in the etching system course of work
According to, and by the view data real-time Transmission of collection to host computer, so that host computer passes through the image information for receiving to photoetching process
Carry out monitor in real time.It is thus desirable to ensureing the online real non-destructive transmission of view data, existing pcb board image transmitting efficiency is low,
It is difficult to ensure that the real-time of view data transmission, therefore, related personnel is difficult to pinpoint the problems in time and solve problem, with certain
Hysteresis quality.
Content of the invention
In view of this, it is an object of the invention to provide a kind of be based on FPGA method for compressing image, device and Transmission system,
To alleviate the technical problem that conventional images data are unable to real non-destructive transmission.
In a first aspect, embodiments providing one kind based on FPGA method for compressing image, comprise the following steps：
View data is received, and view data is stored in Free Partition, while Free Partition is labeled as cache partitions；
When the view data in cache partitions reaches given threshold, cache partitions are labeled as partition encoding；
Carry out compression coding to generate image compression data to the view data in partition encoding, and by partition encoding labelling
For subregion to be sent；
The image compression data in subregion to be sent is transmitted according to instruction is sent.
In conjunction with a first aspect, embodiments provide the first possible embodiment of first aspect, wherein, figure
As data are pcb board view data.
In conjunction with a first aspect, embodiments providing second possible embodiment of first aspect, wherein, threshold
It is worth for partitioned storage accounting or time threshold.
In conjunction with first aspect and its above-mentioned possible embodiment, embodiments provide first aspect the third
Possible embodiment, wherein, compression coding is the combination of wavelet transformation and arithmetic coding.
The lossless compress of view data is realized while Image Data Compression rate is improved, it is ensured that the quality of image.
Second aspect, the embodiment of the present invention also provide one kind based on FPGA image compressing devices, including receiver module, storage
Module, coding module, sending module, mark module and control module；
Memory module includes some subregions, at least includes Free Partition according to use state；
The view data that Free Partition storage is received by receiver module, and cache partitions are labeled as by mark module；
When the data in cache partitions reach given threshold, and partition encoding is labeled as by mark module, while to control
Molding block sends first state marking signal, and threshold value is time threshold；
Control module receives first state marking signal, and controls coding module the view data in partition encoding is carried out
Compression coding, generates image compression data, and when compression coding is finished, partition encoding is labeled as area to be sent by mark module, with
When to control module send the second status indication signal；
Control module controls sending module according to the second status indication signal and enters the image compression data in area to be sent
Row sends.
Free Partition in the image compressing device based on FPGA provided in an embodiment of the present invention is receiving the wink of view data
Between be changed into cache partitions, be only used for the transmission of this road view data, the view data of other passages can only be passed into Free Partition
Transmission of data, presses to the view data stored in which when the moment that certain cache partitions amount of storage reaches given threshold starts immediately
Contracting, the view data after compression finishes the moment for being converted into area to be sent by compression send, and buffer, compress, send sequentially
Carry out, connecting is good, it is ensured that the real-time Transmission of pcb board view data.
In conjunction with second aspect, the first possible embodiment of second aspect is embodiments provided, wherein, figure
As data are pcb board view data.
In conjunction with second aspect, second possible embodiment of second aspect, wherein, threshold is embodiments provided
It is worth for partitioned storage accounting or time threshold.
In conjunction with second aspect and its above-mentioned possible embodiment, embodiments provide second aspect the third
Possible embodiment, wherein, compression coding is the combination of wavelet transformation and arithmetic coding.
The third aspect, the embodiment of the present invention are additionally provided based on FPGA image delivering systems, including CCD, host computer and
Image compressing device as described in second aspect and its possible embodiment, receiver module are used for the image for receiving CCD collections
Data, image compressing device send the image compression data in area to be sent to host computer.
FPGA receives the view data of CCD collections and simultaneously which is carried out caching, is compressed, then by image compression data send to
Host computer, it is achieved that the real-time Transmission of view data.
In conjunction with the third aspect, the first possible embodiment of the third aspect is embodiments provided, wherein, on
Position machine includes decompression module, decompression module be used for compression after view data decompression, so as to obtain the lossless number of PCB
According to.
The embodiment of the present invention brings following beneficial effect：
Free Partition in the method for compressing image based on FPGA provided in an embodiment of the present invention is receiving the wink of view data
Between be changed into cache partitions, be only used for the transmission of this road view data, the view data of other passages can only be passed into Free Partition
Transmission of data, presses to the view data stored in which when the moment that certain cache partitions amount of storage reaches given threshold starts immediately
Contracting, the view data after compression finishes the moment for being converted into area to be sent by compression send, and buffer, compress, send sequentially
Carry out, connecting is good, it is ensured that the picture quality of pcb board.
Other features and advantages of the present invention will be illustrated in the following description, also, partly be become from description
Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages are in description, claims
And in accompanying drawing specifically noted structure realizing and obtain.
For enabling the above objects, features and advantages of the present invention to become apparent, preferred embodiment cited below particularly, and coordinate
Appended accompanying drawing, is described in detail below.
Description of the drawings
In order to be illustrated more clearly that the specific embodiment of the invention or technical scheme of the prior art, below will be to concrete
Needed for embodiment or description of the prior art, accompanying drawing to be used is briefly described, it should be apparent that, in describing below
Accompanying drawing is some embodiments of the present invention, for those of ordinary skill in the art, before creative work is not paid
Put, can be with according to these other accompanying drawings of accompanying drawings acquisition.
Fig. 1 is the flow chart based on FPGA method for compressing image that the embodiment of the present invention 1 is provided；
Fig. 2 is the multi-channel data transmission schematic diagram based on FPGA method for compressing image that the embodiment of the present invention 1 is provided；
Fig. 3 is the schematic diagram based on FPGA image compressing devices that the embodiment of the present invention 2 is provided；
Fig. 4 is the schematic diagram based on FPGA image delivering systems that the embodiment of the present invention 3 is provided.
Icon：1- image compressing devices；11- receiver modules；12- memory modules；13- coding modules；14- mark modules；
15- sending modules；16- control modules；2-CCD；3- host computers；41- Free Partitions；42- cache partitions；43- partition encodings；
44- subregions to be sent；A- first passages；B- second channels；C；Third channel；D- fourth lanes.
Specific embodiment
Purpose, technical scheme and advantage for making the embodiment of the present invention is clearer, below in conjunction with accompanying drawing to the present invention
Technical scheme be clearly and completely described, it is clear that described embodiment is a part of embodiment of the invention, rather than
Whole embodiments.Embodiment in based on the present invention, those of ordinary skill in the art are not making creative work premise
Lower obtained every other embodiment, belongs to the scope of protection of the invention.
The real-time Transmission of current etching system view data difficult to realize, based on this, provided in an embodiment of the present invention one
Plant based on FPGA method for compressing image, device and Transmission system, the view data in the etching system course of work can be carried out
Real-time Transmission.
For ease of understanding to the present embodiment, FPGA image pressures are based on to the one kind disclosed in the embodiment of the present invention first
Compression method describes in detail.
Embodiment 1：
As shown in figure 1, embodiments providing one kind based on FPGA method for compressing image, comprise the following steps：
S1. view data is received, and view data is stored in Free Partition, while Free Partition is labeled as caching point
Area.
View data in the present embodiment is the pcb board view data of CCD collections, and new view data can only be to idle point
View data is transmitted in area, i.e., for single channel image data, carry out piecemeal to view data after buffer area reaches given threshold,
Buffer area is labeled as partition encoding simultaneously, and this stylish data block can not be to other subregion transmitted image numbers outside Free Partition
According to can only Free Partition transmitted image data thereto.
As shown in Fig. 2 on a timeline, according to the service condition of each subregion, it is divided into Free Partition 41, cache partitions
42nd, partition encoding 43 and subregion to be sent 44, for multichannel image data, lead to comprising first passage A, second in the present embodiment
Road B, third channel C and fourth lane D, when the new data of fourth lane D needs to store, it is impossible to being labeled as cache partitions
42nd, partition encoding 43 and subregion to be sent 44 send, in can only sending to Free Partition 41.
S2., when the view data in cache partitions reaches given threshold, cache partitions are labeled as partition encoding.
Threshold value is partitioned storage accounting or time threshold, when threshold value is partitioned storage accounting, if view data reaches this
During a certain percentage ratio of cache partitions internal memory, image data stream is split, cache partitions are labeled as partition encoding, new figure
As data need to be sent to new Free Partition.
When threshold value is time threshold, if after view data transmission reaches certain time threshold value, cache partitions are labeled as compiling
Code division area, new view data need to be sent to new Free Partition.
S3. carry out compression coding to generate image compression data to the view data in partition encoding, and by partition encoding
It is labeled as subregion to be sent.
Compression coding is the combination of wavelet transformation and arithmetic coding, image compression data by line flag position, distance of swimming flag bit,
Compression code length and compressed code are constituted, and realize the lossless compress of view data while Image Data Compression rate is improved, it is ensured that
The quality of image.
S4. the image compression data in subregion to be sent is transmitted according to transmission instruction.
Subregion to be sent sends the image compression data in subregion to be sent to upper according to the transmission instruction for receiving
Machine or other equipment.
Embodiment 2：
As shown in figure 3, embodiments provide a kind of based on FPGA image compressing devices, including receiver module 11,
Memory module 12, coding module 13, mark module 14, sending module 15 and control module 16；
Memory module 12 includes some subregions, at least includes Free Partition according to use state；
The view data that Free Partition storage is received by receiver module 11, and cache partitions are labeled as by mark module 14；
When the data in cache partitions reach given threshold, and partition encoding is labeled as by mark module 14, while to
Control module 16 sends first state marking signal, and threshold value is time threshold；
Control module 16 receives first state marking signal, and controls coding module 13 to the view data in partition encoding
Compression coding is carried out, image compression data is generated, when compression coding is finished, partition encoding is labeled as by mark module 14 to be sent
Area, while send the second status indication signal to control module 16；
Control module 16 controls sending module 15 by the compression of images number in area to be sent according to the second status indication signal
According to being transmitted.
Free Partition in the image compressing device based on FPGA provided in an embodiment of the present invention is receiving the wink of view data
Between be changed into cache partitions, be only used for the transmission of this road view data, the view data of other passages can only be passed into Free Partition
Transmission of data, presses to the view data stored in which when the moment that certain cache partitions amount of storage reaches given threshold starts immediately
Contracting, the view data after compression finishes the moment for being converted into area to be sent by compression send, and buffer, compress, send sequentially
Carry out, connecting is good, it is ensured that the real-time Transmission of pcb board view data.
View data in the present embodiment is pcb board view data.
Threshold value in the present embodiment is preferably partitioned storage accounting or time threshold.When threshold value is partitioned storage accounting,
If view data reaches a certain percentage ratio of this cache partitions internal memory, cache partitions are labeled as partition encoding, new picture number
According to needing to be sent to new Free Partition；
When threshold value is time threshold, if after view data transmission reaches certain time threshold value, cache partitions are labeled as compiling
Code division area, new view data need to be sent to new Free Partition.
Preferably, the compression coding mode in the present embodiment is the combination of wavelet transformation and arithmetic coding.
Compression coding is the combination of wavelet transformation and arithmetic coding, image compression data by line flag position, distance of swimming flag bit,
Compression code length and compressed code are constituted, and realize the lossless compress of view data while Image Data Compression rate is improved, it is ensured that
The quality of image.
Embodiment 3
As described in Figure 4, embodiments provide based on FPGA image delivering systems, including CCD2, host computer 3 and
Image compressing device 1 as described in Example 2, receiver module 11 are used for the view data for receiving the collections of CCD 2, and compression of images is filled
Put 1 to send the image compression data in area to be sent to host computer 3.
Image compressing device 1 receives the view data of the collections of CCD 2 and which is carried out caching, is compressed, then by image pressure
Contracting data is activation is to host computer 3, it is achieved that the real-time Transmission of view data.
In the present embodiment, host computer 3 includes decompression module, decompression module be used for compression after view data decompression
Contracting, so that obtain the lossless data of pcb board.
Provided in an embodiment of the present invention based on FPGA image compressing devices and be based on FPGA image delivering systems, and above-mentioned
What embodiment was provided has identical technical characteristic based on FPGA method for compressing image, so can also solve identical technology asking
Topic, reaches identical technique effect.
The computer program based on FPGA method for compressing image, device and system provided by the embodiment of the present invention is produced
Product, including storing the computer-readable recording medium of program code, before the instruction that described program code includes can be used to execute
Method described in the embodiment of the method for face, implements and can be found in embodiment of the method, will not be described here.
Those skilled in the art can be understood that, for convenience and simplicity of description, the system of foregoing description
With the specific work process of device, the corresponding process in preceding method embodiment is may be referred to, be will not be described here.
In addition, in the description of the embodiment of the present invention, unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " should be interpreted broadly, for example, it may be being fixedly connected, or being detachably connected, or be integrally connected；Can
Being to be mechanically connected, or electrically connect；Can be joined directly together, it is also possible to be indirectly connected to by intermediary, Ke Yishi
The connection of two element internals.For the ordinary skill in the art, above-mentioned term can be understood at this with concrete condition
Concrete meaning in invention.
If the function is realized using in the form of SFU software functional unit and as independent production marketing or when using, can be with
It is stored in a computer read/write memory medium.Such understanding is based on, technical scheme is substantially in other words
The part contributed by prior art or the part of the technical scheme can be embodied in the form of software product, the meter
Calculation machine software product is stored in a storage medium, is used including some instructions so that a computer equipment (can be individual
People's computer, server, or network equipment etc.) execute all or part of step of each embodiment methods described of the invention.
And aforesaid storage medium includes：USB flash disk, portable hard drive, read only memory (ROM, Read-Only Memory), random access memory are deposited
Reservoir (RAM, Random Access Memory), magnetic disc or CD etc. are various can be with the medium of store program codes.
In describing the invention, it should be noted that term " " center ", " on ", D score, "left", "right", " vertical ",
The orientation of instruction such as " level ", " interior ", " outward " or position relationship be based on orientation shown in the drawings or position relationship, merely to
Be easy to description the present invention and simplify description, rather than indicate or hint indication device or element must have specific orientation,
With specific azimuth configuration and operation, therefore it is not considered as limiting the invention.Additionally, term " first ", " second ",
" the 3rd " is only used for describing purpose, and it is not intended that indicating or hint relative importance.
Finally it should be noted that：Embodiment described above, the only specific embodiment of the present invention, in order to illustrate the present invention
Technical scheme, rather than a limitation, protection scope of the present invention is not limited thereto, although with reference to the foregoing embodiments to this
Bright be described in detail, it will be understood by those within the art that：Any those familiar with the art
The invention discloses technical scope in, which still can be modified to the technical scheme described in previous embodiment or can be light
Change is readily conceivable that, or equivalent is carried out to which part technical characteristic；And these modifications, change or replacement, do not make
The essence of appropriate technical solution departs from the spirit and scope of embodiment of the present invention technical scheme, should all cover the protection in the present invention
Within the scope of.Therefore, protection scope of the present invention described should be defined by scope of the claims.
Claims (10)
1. a kind of based on FPGA method for compressing image, it is characterised in that to comprise the following steps：
View data is received, and by described image data storage in Free Partition, while the Free Partition to be labeled as caching
Subregion；
When the described image data in the cache partitions reach given threshold, the cache partitions are labeled as coding point
Area；
Described image data in the partition encoding are carried out with compression coding to generate image compression data, and by the coding
Labelling Regions are subregion to be sent；
The described image compressed data in the subregion to be sent is transmitted according to instruction is sent.
2. according to claim 1 based on FPGA method for compressing image, it is characterised in that described image data are pcb board
View data.
3. according to claim 1 based on FPGA method for compressing image, it is characterised in that the threshold value is accounted for for partitioned storage
Than or time threshold.
4. according to any one of claim 1-3 based on FPGA method for compressing image, it is characterised in that the compression coding
Combination for wavelet transformation and arithmetic coding.
5. a kind of based on FPGA image compressing devices, it is characterised in that including receiver module, memory module, coding module, transmission
Module, mark module and control module；
The memory module includes some subregions, at least includes Free Partition according to use state；
The view data that the Free Partition storage is received by the receiver module, and caching point is labeled as by the mark module
Area；
When the data in the cache partitions reach given threshold, and partition encoding is labeled as by the mark module, while
First state marking signal is sent to the control module, the threshold value is time threshold；
The control module receives the first state marking signal, and controls the coding module in the partition encoding
Described image data carry out compression coding, generate image compression data, and when compression coding is finished, the partition encoding is by the mark
Note module marks are area to be sent, while sending the second status indication signal to the control module；
The control module controls the sending module by the institute in the area to be sent according to the second status indication signal
State image compression data to be transmitted.
6. according to claim 5 based on FPGA image compressing devices, it is characterised in that described image data are pcb board
View data.
7. according to claim 5 based on FPGA image compressing devices, it is characterised in that the threshold value is accounted for for partitioned storage
Than or time threshold.
8. according to any one of claim 5-7 based on FPGA image compressing devices, it is characterised in that the compression coding
Combination for wavelet transformation and arithmetic coding.
9. a kind of based on FPGA image delivering systems, it is characterised in that arbitrary including CCD, host computer and such as claim 5-8
Item described image compressor, the receiver module are used for the described image data for receiving the CCD collections, and described image is compressed
Device sends the described image compressed data in the area to be sent to the host computer.
10. according to claim 9 based on FPGA image delivering systems, it is characterised in that the host computer includes decompressing
Contracting module, the decompression module are used for decompressing described image compressed data.
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| CN107493419A (en) * | 2017-09-27 | 2017-12-19 | 中国科学院长春光学精密机械与物理研究所 | A kind of integral miniaturized high-speed realtime graphic acquisition device |
| CN111556322A (en) * | 2020-06-01 | 2020-08-18 | 哈尔滨理工大学 | FPGA-based rapid image compression and transmission system |
| CN111953990A (en) * | 2020-07-07 | 2020-11-17 | 西安万像电子科技有限公司 | Encoding method and device |
| CN112233081A (en) * | 2020-10-13 | 2021-01-15 | 南京泊纳莱电子科技有限公司 | Image processing method and device and electronic equipment |
| CN113055677A (en) * | 2021-04-07 | 2021-06-29 | 南京云格信息技术有限公司 | Image compression method based on FPGA |
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| CN113055677A (en) * | 2021-04-07 | 2021-06-29 | 南京云格信息技术有限公司 | Image compression method based on FPGA |
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Application publication date: 20170315 |