CN106487218A - It is applied to the charge pump circuit that wireless charging receives chip - Google Patents
It is applied to the charge pump circuit that wireless charging receives chip Download PDFInfo
- Publication number
- CN106487218A CN106487218A CN201511019372.XA CN201511019372A CN106487218A CN 106487218 A CN106487218 A CN 106487218A CN 201511019372 A CN201511019372 A CN 201511019372A CN 106487218 A CN106487218 A CN 106487218A
- Authority
- CN
- China
- Prior art keywords
- voltage
- charge pump
- zener
- nmos tube
- electric capacity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The present invention relates to a kind of be applied to the charge pump circuit that wireless charging receives chip, wherein this circuit includes switching signal generation module, in order to produce the switching signal of dickson electric charge pump module according to chip internal power supply;Dickson electric charge pump module, in order to boost the reference voltage of input;Voltage clamp module, in order to the reference voltage after clamping voltage boosting, voltage clamp module includes clamp zener pipe, and described clamp zener pipe is the five end clamp zener pipes for 5.5V for the reverse-biased clamp voltage based on TSMC025BICMOS technique;Output module, clamps, in order to output voltage, the voltage that module is exported.Using the charge pump circuit being applied to wireless charging reception chip of this kind of structure, using dickson structure charge pump, domain changes little, and pressure reduction is controlled between every grade of boosting bootstrap capacitor pole plate, output clamper Zener is carried out selecting to optimize in technique, has reduced chip area, reduces cost.
Description
Technical field
The present invention relates to electronic technology field, more particularly, to wireless charging, specifically refer to one kind and be applied to wireless charging connect
Receive the charge pump circuit of chip.
Background technology
It is a Circuits System being applied to the transmission of portable use radio source that wireless charging receives chip, and it not only provides
AC/DC Power convert, the simultaneously also integrated digital control function meeting needed for WPC V1.1.2 communication protocol standard.Control with sending
Device processed combines, and can realize complete induction power delivery system for wireless charging.Its cardinal principle is:Using electricity
The equipment that magnetic induction principle is charged, similar to transformator.Respectively there is a coil sending and receiving end, send end-coil even
Connect cable power and produce electromagnetic signal, the electromagnetic signal of the coil-induced transmitting terminal of receiving terminal is thus produce electric current to equipment charge.
Functional block diagram is as shown in Figure 1.
Wherein, Sync Rectifier, Rect Power and Digital Power are mainly included with Boost correlation module
Module:The faradic current that receiving coil senses the generation of transmitting terminal electromagnetic signal sends into synchronous rectifier generation RECT electricity through AC end
Pressure, RECT voltage is sent into RECT Power and is produced the internal 5V power supply of multichannel, and wherein one tunnel is sent into Digital Power and produced 2.5V
Internal digital power supply, a road is sent into Boost and is produced multiple high pressure needed for chip internal.
Booster circuit Boost one of booster line construction is as shown in Figure 2.
10MHz pulse signal is relied on to act on after rest-set flip-flop as shown in Fig. 2 chip Boost boost module is mainly
Boosted in bootstrap capacitor mimcap_2p0 and crtmom so that basic voltage 5V obtains high level after the boosting of 1-4 level,
And finally it is subject to Zener diodes clamp to export ideal level 11.2V, simulation curve is as shown in Figure 3.Wherein, RECT=5V is set.
It is based on TSMC025BCD technique, the wherein pressure difference of mimcap_2p0 and crtmom electric capacity that wireless charging receives chip
It is 6V and 40V, then in charge pump booster circuit, due to the pressure problem of bootstrap capacitor, partition capacitance is accomplished by adopting
The structure of crtmom is avoiding because of the pressure electric capacity breakdown problem that may lead to, as shown in figure 4, pressure reduction between crtmom capacitor plate
More than 10V, pressure beyond mimcap_2p0 maximum.
But, on the premise of identical capacitance values, increased many than mimcap_2p0 using area needed for crtmom electric capacity,
As shown in Figure 5.
The explanation of electric capacity correction data is as shown in table 1.
Table 1 capacitance parameter contrasts
As can be seen from Table 1, in existing charge pump booster circuit, due to needing to take into account the pressure of Bootstrap electric capacity
Characteristic, will make circuit layout area increase, cost improves.So, on the premise of ensureing charge pump output voltage performance, and
Gu electric capacity is pressure and chip area, is just particularly important.
Content of the invention
The purpose of the present invention is the shortcoming overcoming above-mentioned prior art, there is provided one kind is ensureing charge pump output voltage
On the premise of performance, reduce the pressure charge pump circuit being applied to wireless charging reception chip with chip area of electric capacity.
To achieve these goals, the charge pump circuit being applied to wireless charging reception chip of the present invention has following structure
Become:
This is applied to the charge pump circuit that wireless charging receives chip, and it is mainly characterized by, and described circuit includes:
Switching signal generation module, in order to produce the switching signal of dickson electric charge pump module according to chip internal power supply;
Dickson electric charge pump module, in order to boost the reference voltage of input;
Voltage clamp module, in order to the reference voltage after clamping voltage boosting, described voltage clamp module includes clamp zener
Pipe, described clamp zener pipe is the five end clamp zener for 5.5V for the reverse-biased clamp voltage based on TSMC025BICMOS technique
Pipe;
Output module, in order to export the voltage that described voltage clamp module is exported.
Further, described voltage clamp module includes the first Zener and the second Zener, described the first Zener
The RECT voltage that the positive output termination synchronous rectifier of pipe produces, the described positive input of the first Zener with described
The positive input of the second Zener is connected, the described positive outfan of the second Zener and described output module and institute
The dickson electric charge pump module stated is connected.
Further, also include first between described dickson electric charge pump module and described voltage clamp module
Metal-oxide-semiconductor and the first electric capacity, the described source electrode of the first metal-oxide-semiconductor, the described grid of the first metal-oxide-semiconductor, the first described metal-oxide-semiconductor
NBL end, the outfan of described dickson electric charge pump module be connected, the described drain electrode of the first metal-oxide-semiconductor, described
The positive outfan of the first end of one electric capacity and the second described Zener is connected, and the second of the first described electric capacity terminates
Ground.
Yet further, described switching signal generation module includes voltage follower, the second metal-oxide-semiconductor and switching signal
Generation unit;The input of described voltage follower is connected with described chip internal power supply, described voltage follower
Outfan be connected with the source electrode of the second metal-oxide-semiconductor, the described drain electrode of the second metal-oxide-semiconductor, the grid of the second described metal-oxide-semiconductor
And the power end of described switching signal generating unit is connected.
Yet further, described dickson electric charge pump module includes the 3rd NMOS tube, the 4th NMOS tube, the 5th NMOS
Pipe, the 6th NMOS tube, the second electric capacity, the 3rd electric capacity, the 4th electric capacity and the 5th electric capacity, the source electrode of the 3rd described NMOS tube connects
The reference voltage of input, the described grid of the 3rd NMOS tube, the described drain electrode of the 3rd NMOS tube, the 4th described NMOS tube
Source electrode and the first end of the second described electric capacity be connected;The described grid of the 4th NMOS tube, the 4th described NMOS
The first end of the drain electrode of pipe, the described source electrode of the 5th NMOS tube and the 3rd described electric capacity is connected;Described the 5th
The grid of NMOS tube, the described drain electrode of the 5th NMOS tube, the described source electrode of the 6th NMOS tube and the 4th described electric capacity
First end be connected;The described grid of the 6th NMOS tube, the described drain electrode of the 6th NMOS tube, the 5th described electric capacity
The source electrode of first end and the first described metal-oxide-semiconductor is connected;Second end of the second described electric capacity and the described the 4th electricity
The second end holding is connected with the first outfan of described switching signal generating unit, the second end of described the 3rd electric capacity with
And described the second end of the 5th electric capacity is connected with the second outfan of described switching signal generating unit.
Employ the charge pump circuit being applied to wireless charging reception chip in this invention, using dickson structure electricity
Lotus pump replaces existing booster circuit, and reference voltage utilizes chip internal power supply, and domain variation is little, and every grade of boosting bootstrap capacitor
Between pole plate, pressure reduction is controlled, based on technological requirement, can take into account pressure and chip area, simultaneously to output clamp zener pipe in technique
On carried out selecting to optimize, balance dickson structure output ability weaker with the pressure easy leakage current characteristic of Zener back clamping
Between contradiction so that circuit ensure performance on the premise of, reduce chip area, reduces cost.
Brief description
Fig. 1 is the functional block diagram that wireless charging of the prior art receives chip.
Fig. 2 is booster line assumption diagram of the prior art.
Fig. 3 is the curve chart of charge pump boosting simulation curve of the prior art.
Fig. 4 is crtmom polar plate voltage Transient figure of the prior art.
Fig. 5 is mimcap_2p0 and crtmom area comparison diagram under identical capacitance values of the prior art.
Fig. 6 is the structural representation of the Pyatyi dickson charge pump in the present invention.
Fig. 7 is the structural representation of the switching signal generation module in the present invention.
Fig. 8 is the structural representation of the charge pump circuit being applied to wireless charging reception chip in the present invention.
Two reverse-biased clamp voltages that Fig. 9 is just connecing a reversal connection in the present invention are the four end clamp zener pipes of 6.2V
I-V curve figure.
Figure 10 is two three reverse-biased clamp voltages just connecing a reversal connection in the present invention is the five end clamp zener pipes of 5.5V
I-V curve chart.
The profile of the four end clamp zener pipes that Figure 11 is 6.2V for the reverse-biased clamp voltage in the present invention.
The profile of the five end clamp zener pipes that Figure 12 is 5.5V for the reverse-biased clamp voltage in the present invention.
Figure 13 is the charge pump Output simulation curve of the dickson structure in the present invention.
Figure 14 is two kinds of structure chip area first comparison diagrams of charge pump in the present invention.
Figure 15 is two kinds of structure chip area second comparison diagrams of charge pump in the present invention.
Specific embodiment
In order to more clearly describe the technology contents of the present invention, to carry out further with reference to specific embodiment
Description.
Based on TSMC025BCD technique, the present invention is by being designed to wireless charging reception chip internal charge pump circuit
So that pressure reduction is controlled between every grade of boosting bootstrap capacitor pole plate, capacitance selection takes into account pressure and area, pulse electricity to dickson structure
Pressure is optimized based on internal existing voltage and line construction, on the premise of ensureing that charge pump performance is constant, reduces electric charge
Pump chip area, reduces cost.
The charge pump circuit being applied to wireless charging reception chip in the present invention includes:
Switching signal generation module, in order to produce the switching signal of dickson electric charge pump module according to chip internal power supply;
Dickson electric charge pump module, in order to boost the reference voltage of input;
Voltage clamp module, in order to the reference voltage after clamping voltage boosting, described voltage clamp module includes clamp zener
Pipe, described clamp zener pipe is the five end clamp zener for 5.5V for the reverse-biased clamp voltage based on TSMC025BICMOS technique
Pipe;
Output module, in order to export the voltage that described voltage clamp module is exported.
In a preferred embodiment, described voltage clamp module includes the first Zener and the second Zener,
The positive output termination synchronous rectifier of the first described Zener produces RECT voltage, and the forward direction of the first described Zener is defeated
Enter end to be connected with the positive input of the second described Zener, the described positive outfan of the second Zener and described
Output module is connected with described dickson electric charge pump module.
In a preferred embodiment, described dickson electric charge pump module and described voltage clamp module it
Between also include the first metal-oxide-semiconductor and the first electric capacity, the described source electrode of the first metal-oxide-semiconductor, the described grid of the first metal-oxide-semiconductor, institute
(metal-oxide-semiconductor shading ring is N+buried layer, as metal-oxide-semiconductor defined in technique level at the NBL end of the first metal-oxide-semiconductor of stating
NBL end), the outfan of described dickson electric charge pump module be connected, the described drain electrode of the first metal-oxide-semiconductor, described first
The positive outfan of the first end of electric capacity and the second described Zener is connected, and the second of the first described electric capacity terminates
Ground.
Because the mobility in hole in Semiconductor Physics is 1/2 to the 1/4 of electronics, then the current driving ability of PMOS
NMOS tube to be weaker than, that is, under identical driving force, needed for PMOS, area is greater than NMOS tube.So it is contemplated that adopting
NMOS tube does dickson charge pump construction, as shown in fig. 6, wherein input signal A be boosting reference level, a1, a2 be biphase not
Crossover switching signal, phase contrast 180 degree;Switching signal effect under, reference level is raised step by step, through 5 grades boosting after from
Outfan Y end exports.It is as shown in table 2 that concrete signal describes process.
Table 2dickson charge pump signal explanation
Signal | Level | Low level | High level | Signal description |
A | Vref | Boosting reference level | ||
a1 | 0 | Vref | Switching signal | |
a2 | 0 | Vref | Switching signal (reverse with a1) | |
b1 | Vref-Vt | Vref-Vt+Vref | Level after first order boosting | |
b2 | 2Vref-2Vt | 2Vref-2Vt+Vref | Level after the boosting of the second level | |
b3 | 3Vref-3Vt | 3Vref-3Vt+Vref | Level after third level boosting | |
b4 | 4Vref-4Vt | 4Vref-4Vt+Vref | Level after fourth stage boosting | |
b5 | 5Vref-5Vt | 5Vref-5Vt+Vref | Level after level V boosting | |
… | … | … | … |
As can be seen from the above table, often after first class boost, output level all increases Vref-Vt to boost level;So right
In final output value Y, can be adjusted by three kinds of methods:
1st, adjust Vref value;
2nd, adjust metal-oxide-semiconductor threshold voltage vt;
3rd, adjust booster pulse series.
Wherein, NMOS tube threshold voltage vt formula is:
In formulaVt is easily affected by temperature as can be seen here, and then has influence on
Dickson charge pump output voltage.So we can consider so that a1, a2 high level is Vref+Vt, concrete grammar such as Fig. 7
Shown.
As shown in fig. 7, utilizing existing follower in chip internal, only increasing NMOS tube M6 and constant-current source, reducing as far as possible
Circuit changes the chip area bringing to be increased, then incoming level Vref, after follower and M6, obtains output level Vref+
Vt is consistent with M1~M5 pipe type size in charge pump as the switch level of a1, a2, wherein M6;So exist
The impact of NMOS tube Vt can be eliminated in dickson charge pump, as shown in table 3 below.
Dickson charge pump signal explanation after table 3 optimization
As can be seen from the above table, revised dickson charge pump output voltage only with input reference level and voltage-boosting stage
Number is relevant, and n-th grade of boosting bootstrap capacitor pole plate pressure reduction is nVref-Vt, can be according to the not corresponding voltage endurance capability of plates of similar polarity selection of differential pressure
Bootstrap capacitor.
According to TSMC025BICMOS technique, mimcap_2p0 is pressure 6V, crtmom is pressure 40V, then with aforementioned Boost
As a example module booster circuit, it is subject to Zener diodes clamp to export 11.2V, and boost configuration is according to Dickson structure such as Fig. 8 institute
Show.
As shown in figure 8, in a preferred embodiment, described switching signal generation module includes voltage follow
Device, the second metal-oxide-semiconductor and switching signal generating unit;The input of described voltage follower and described chip internal power supply
It is connected, the described outfan of voltage follower is connected with the source electrode of the second metal-oxide-semiconductor, the described drain electrode of the second metal-oxide-semiconductor,
The power end of the described grid of the second metal-oxide-semiconductor and described switching signal generating unit is connected.
In a preferred embodiment, described dickson electric charge pump module includes the 3rd NMOS tube, the 4th NMOS
Pipe, the 5th NMOS tube, the 6th NMOS tube, the second electric capacity, the 3rd electric capacity, the 4th electric capacity and the 5th electric capacity, the described 3rd
The source electrode of NMOS tube connects the reference voltage of input, the described grid of the 3rd NMOS tube, the described drain electrode of the 3rd NMOS tube, institute
The source electrode of the 4th NMOS tube stated and the first end of the second described electric capacity are connected;The described grid of the 4th NMOS tube,
The first end of the described drain electrode of the 4th NMOS tube, the described source electrode of the 5th NMOS tube and the 3rd described electric capacity is connected
Connect;The described grid of the 5th NMOS tube, the described drain electrode of the 5th NMOS tube, the described source electrode of the 6th NMOS tube and institute
The first end of the 4th electric capacity stated is connected;The described grid of the 6th NMOS tube, the described drain electrode of the 6th NMOS tube, described
The first end of the 5th electric capacity and the source electrode of the first described metal-oxide-semiconductor be connected;Second end of the second described electric capacity and
Described the second end of the 4th electric capacity is connected with the first outfan of described switching signal generating unit, and described the 3rd is electric
The second end holding and described the second end of the 5th electric capacity are connected with the second outfan of described switching signal generating unit
Connect.Input reference level Vref=2.5V, is directly provided by internal digital power supply digpower, switch level a1, a2 is
Vref+Vt, boosting series is 4 grades of ((n+1) × Vref>11.2V, nmin=4), line construction is simple and clear, according to reckoning, the
Three and the fourth stage boosting bootstrap capacitor pole plate pressure reduction be 3Vref-Vt and 4Vref-Vt, more than 6V, need using crtmom electric capacity.
For RECT end clamper Zener, TSMC025BICMOS technique gives zd_dio_4t, and (reverse-biased clamp voltage is
The four end clamp zener pipes of 6.2V) and zd_dio_5d5_5t (reverse-biased clamp voltage is the five end clamp zener pipes of 5.5V) technique
Two kinds of structures, and there is the characteristic that reverse-conducting exceedes pressure easy electric leakage in Zener, as shown in Fig. 9 to Figure 10.
From fig. 9, it can be seen that zd_dio_4t (reverse-biased clamp voltage is the four end clamp zener pipes of 6.2V) is in reversed bias voltage
Start the 1uA (6.7-0.7 positively biased) that leaks electricity more than 6V;(reverse-biased clamp voltage is from fig. 10 it can be seen that zd_dio_5d5_5t
The five end clamper Zener of 5.5V) start, in reversed bias voltage greater than about 5.5V, the 1uA (6.7-0.7 positively biased × 2) that leaks electricity.
Because dickson structure output voltage has the weaker situation of driving force, and the pressure electric leakage of the clamp of Zener
Characteristic can weaken dickson structure output driving force, then selects rational Zener technique to be just particularly important.
It can be seen from figure 11 that the NBL current potential of zd_dio_4t (reverse-biased clamp voltage is the four end clamp zener pipes of 6.2V)
If being less than P+, PN junction conducting electric leakage can be formed, illustrating that (reverse-biased clamp voltage is the four end clamper Zeners of 6.2V to zd_dio_4t
Pipe) NBL ring current potential on logic affect very big.
And zd_dio_5d5_5t (reverse-biased clamp voltage is the five end clamp zener pipes of 5.5V) is as shown in figure 12, its PN junction
Effective district is in PSUB, and many HVPW isolation and NBL between, can avoid the possible electric leakage that NBL current potential causes.
Therefore, the Zener from zd_dio_5d5_5t (reverse-biased clamp voltage is the five end clamper Zener of 5.5V) is made
For dickson structure output clamper, this technique in original boost booster circuit flow and is verified effective.
As shown in figure 13, boosting reference level through 4 grades boosting and low-pass filtering after, output voltage (4+1) × Vref=
12.5V, and it is subject to Zener diodes clamp, export target level 11.2V, meet design needs.
With using the contrast of dickson structure booster domain as shown in figure 13, Figure 14 and Figure 15 divides original booster domain
It is not two kinds of charge pumps improvement circuit area comparison diagrams of current drive capability 2uA and 50uA, concrete area correction data is as follows
Shown in table 4.
Two kinds of charge pump area contrasts under table 4 different driving ability
As can be seen from the above table, on the premise of ensureing current drive capability, can be shown using dickson structure charge pump
Write and reduce line related chip area, reduces cost, especially in the circuit needing larger current drive capability uses, domain
Area reduces and seems particularly evident.
The dickson structure charge pump that the present invention is built using NMOS tube is used for wireless charging and receives chip, its incoming level
Using chip built-in digital power voltage, additionally do not increase base modules;Based on technological requirement, bootstrap capacitor can be taken into account pressure
With chip area;Improved follower output level Vref+Vt, as not crossover clock level signal, can effectively eliminate NMOS tube
The Vt change that temperature influence leads to, stable charging pump exports;Clamp zener pipe has carried out selecting to optimize in technique, balance
Dickson structure output ability weaker contradiction and the pressure easy leakage current characteristic of Zener back clamping between;Above some
Optimal improvements make circuit on the premise of ensureing performance, reduce chip area, reduce cost.
Boosting pump circuit has many kinds, but is all based on the principle of bootstrap capacitor boosting, dickson structure wherein of the present invention
Charge pump adopts NMOS tube, and structure is simple, and between every grade of bootstrap capacitor pole plate, pressure reduction is controlled, can take into account technological requirement and domain face
Long-pending.Certainly, Dickson structure charge pump can also be built using PMOS, but its electric current driving energy under equal area size
Power will be weaker than NMOS tube, then in order to ensure current drive capability, certainly will be accomplished by increasing metal-oxide-semiconductor area, with present invention design
Original intention is disagreed.In addition, as the Zener of dickson structure output clamp, its connection, laying out pattern under different process
Also different, back clamping is pressure, and leakage current characteristic also needs to pay close attention to.
Employ the charge pump circuit being applied to wireless charging reception chip in this invention, using dickson structure electricity
Lotus pump replaces existing booster circuit, and reference voltage utilizes chip internal power supply, and domain variation is little, and every grade of boosting bootstrap capacitor
Between pole plate, pressure reduction is controlled, based on technological requirement, can take into account pressure and chip area, simultaneously to output clamp zener pipe in technique
On carried out selecting to optimize, balance dickson structure output ability weaker with the pressure easy leakage current characteristic of Zener back clamping
Between contradiction so that circuit ensure performance on the premise of, reduce chip area, reduces cost.
In this description, the present invention is described with reference to its specific embodiment.But it is clear that still can make
Various modifications and alterations are without departing from the spirit and scope of the present invention.Therefore, specification and drawings be considered as illustrative
And it is nonrestrictive.
Claims (5)
1. a kind of wireless charging that is applied to receives the charge pump circuit of chip it is characterised in that described circuit includes:
Switching signal generation module, in order to produce the switching signal of dickson electric charge pump module according to chip internal power supply;
Dickson electric charge pump module, in order to boost the reference voltage of input;
Voltage clamp module, in order to the reference voltage after clamping voltage boosting, described voltage clamp module includes clamp zener pipe, institute
The clamp zener pipe stated is the five end clamp zener pipes for 5.5V for the reverse-biased clamp voltage based on TSMC025BICMOS technique;Defeated
Go out module, in order to export the voltage that described voltage clamp module is exported.
2. the wireless charging that is applied to according to claim 1 receives the charge pump circuit of chip it is characterised in that described
Voltage clamp module includes the first Zener and the second Zener, and the positive output of the first described Zener terminates synchronous rectification
The RECT voltage that device produces, the positive input phase of the described positive input of the first Zener and the second described Zener
Connection, the described positive outfan of the second Zener and described output module and described dickson electric charge pump module phase
Connect.
3. the wireless charging that is applied to according to claim 2 receives the charge pump circuit of chip it is characterised in that described
The first metal-oxide-semiconductor and the first electric capacity is also included between dickson electric charge pump module and described voltage clamp module, described
The source electrode of one metal-oxide-semiconductor, the described grid of the first metal-oxide-semiconductor, the NBL end of the first described metal-oxide-semiconductor, described dickson electric charge
The outfan of pump module is connected, the described drain electrode of the first metal-oxide-semiconductor, the described first end of the first electric capacity and described
The positive outfan of two Zener is connected, and the second end of the first described electric capacity is grounded.
4. the wireless charging that is applied to according to claim 3 receives the charge pump circuit of chip it is characterised in that described
Switching signal generation module includes voltage follower, the second metal-oxide-semiconductor and switching signal generating unit;Described voltage follower
Input be connected with described chip internal power supply, the source electrode of the described outfan of voltage follower and the second metal-oxide-semiconductor
It is connected, the described drain electrode of the second metal-oxide-semiconductor, the described grid of the second metal-oxide-semiconductor and described switching signal generating unit
Power end be connected.
5. the wireless charging that is applied to according to claim 4 receives the charge pump circuit of chip it is characterised in that described
Dickson electric charge pump module include the 3rd NMOS tube, the 4th NMOS tube, the 5th NMOS tube, the 6th NMOS tube, the second electric capacity,
Three electric capacity, the 4th electric capacity and the 5th electric capacity, the source electrode of the 3rd described NMOS tube connects the reference voltage of input, and the described 3rd
The grid of NMOS tube, the described drain electrode of the 3rd NMOS tube, the described source electrode of the 4th NMOS tube and the second described electric capacity
First end be connected;The described grid of the 4th NMOS tube, the described drain electrode of the 4th NMOS tube, the 5th described NMOS tube
Source electrode and the first end of the 3rd described electric capacity be connected;The described grid of the 5th NMOS tube, the 5th described NMOS
The first end of the drain electrode of pipe, the described source electrode of the 6th NMOS tube and the 4th described electric capacity is connected;Described the 6th
The grid of NMOS tube, the described drain electrode of the 6th NMOS tube, the described first end of the 5th electric capacity and the first described metal-oxide-semiconductor
Source electrode be connected;Second end of the second described electric capacity and described the second end of the 4th electric capacity and described switching signal
First outfan of generation unit is connected, described the second end of the 3rd electric capacity and described the second end of the 5th electric capacity with
Second outfan of described switching signal generating unit is connected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201511019372.XA CN106487218B (en) | 2015-12-30 | 2015-12-30 | The charge pump circuit of chip is received applied to wireless charging |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201511019372.XA CN106487218B (en) | 2015-12-30 | 2015-12-30 | The charge pump circuit of chip is received applied to wireless charging |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106487218A true CN106487218A (en) | 2017-03-08 |
CN106487218B CN106487218B (en) | 2018-05-04 |
Family
ID=58238623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201511019372.XA Active CN106487218B (en) | 2015-12-30 | 2015-12-30 | The charge pump circuit of chip is received applied to wireless charging |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106487218B (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109189141A (en) * | 2018-09-12 | 2019-01-11 | 中国电子科技集团公司第五十八研究所 | A kind of novel negative pressure boostrap circuit |
CN110677036A (en) * | 2019-09-17 | 2020-01-10 | 长江存储科技有限责任公司 | Charge pump circuit and forming method thereof |
CN112737329A (en) * | 2020-12-25 | 2021-04-30 | 上海贝岭股份有限公司 | Voltage control, high voltage generation circuit and method, apparatus and storage medium |
CN113311899A (en) * | 2021-08-02 | 2021-08-27 | 四川蕊源集成电路科技有限公司 | Voltage regulator |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060049866A1 (en) * | 2004-09-08 | 2006-03-09 | Toshimasa Namekawa | Semiconductor device |
CN103348560A (en) * | 2010-12-29 | 2013-10-09 | 普罗秋斯数字健康公司 | Wirelesss energy sources for integrated circuits |
CN103647449A (en) * | 2013-12-18 | 2014-03-19 | 嘉兴中润微电子有限公司 | Boost charge pump circuit |
CN104854771A (en) * | 2012-10-29 | 2015-08-19 | 鲍尔拜普罗克西有限公司 | A receiver for an inductive power transfer system and a method for controlling the receiver |
-
2015
- 2015-12-30 CN CN201511019372.XA patent/CN106487218B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060049866A1 (en) * | 2004-09-08 | 2006-03-09 | Toshimasa Namekawa | Semiconductor device |
CN103348560A (en) * | 2010-12-29 | 2013-10-09 | 普罗秋斯数字健康公司 | Wirelesss energy sources for integrated circuits |
CN104854771A (en) * | 2012-10-29 | 2015-08-19 | 鲍尔拜普罗克西有限公司 | A receiver for an inductive power transfer system and a method for controlling the receiver |
CN103647449A (en) * | 2013-12-18 | 2014-03-19 | 嘉兴中润微电子有限公司 | Boost charge pump circuit |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109189141A (en) * | 2018-09-12 | 2019-01-11 | 中国电子科技集团公司第五十八研究所 | A kind of novel negative pressure boostrap circuit |
CN110677036A (en) * | 2019-09-17 | 2020-01-10 | 长江存储科技有限责任公司 | Charge pump circuit and forming method thereof |
CN112737329A (en) * | 2020-12-25 | 2021-04-30 | 上海贝岭股份有限公司 | Voltage control, high voltage generation circuit and method, apparatus and storage medium |
CN113311899A (en) * | 2021-08-02 | 2021-08-27 | 四川蕊源集成电路科技有限公司 | Voltage regulator |
CN113311899B (en) * | 2021-08-02 | 2021-11-16 | 四川蕊源集成电路科技有限公司 | Voltage regulator |
Also Published As
Publication number | Publication date |
---|---|
CN106487218B (en) | 2018-05-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106487218B (en) | The charge pump circuit of chip is received applied to wireless charging | |
CN109039059B (en) | A kind of efficient multi-mode charge pump | |
CN104620504B (en) | For manipulating the circuit device of thyristor | |
CN104796171A (en) | Control circuit applied to SOI (silicon on insulator) CMOS (complementary metal oxide semiconductor) radiofrequency switches | |
US20170308152A1 (en) | Load Detection Apparatus and Method for USB Systems | |
CN101771340B (en) | Charge pump | |
CN106961214A (en) | A kind of boost control circuit, its driving method and display device | |
CN101902059A (en) | Method for capacitive load charging | |
CN106532867A (en) | Charging circuit and mobile terminal | |
CN105024676A (en) | High-voltage bootstrap type grid driving device | |
CN105932873A (en) | Low-power and high-output voltage charge pump | |
JP6300349B2 (en) | Circuit including switching element, rectifier element, and charge storage element | |
CN103166451A (en) | Switching power source circuit | |
CN105099173A (en) | Charge pump | |
CN103262389A (en) | Power-receiving device and non-contact power transmission system using same | |
CN203984244U (en) | The slope compensation circuit of Switching Power Supply | |
CN104883057A (en) | Mobile power converter of boost and linear charging shared power device | |
CN107171417A (en) | A kind of portable power source fills control circuit and fast charging type portable power source soon | |
CN104269946B (en) | A kind of radio frequency energy collector | |
CN104539145A (en) | Boost type DC-DC converter synchronous power tube current limiting circuit | |
CN112787376A (en) | Charging device | |
CN202353659U (en) | Circuit for inputting video signal | |
CN102957415B (en) | Level converting method and level converting system | |
CN106452406A (en) | Pulse edge detection-based high-voltage high-frequency electronic switch | |
CN109951183A (en) | A kind of chip, signal shift circuit and electronic equipment |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP03 | Change of name, title or address |
Address after: 214135 -6, Linghu Avenue, Wuxi Taihu international science and Technology Park, Wuxi, Jiangsu, China, 180 Patentee after: China Resources micro integrated circuit (Wuxi) Co., Ltd Address before: 214135 Jiangsu city of Wuxi province Taihu international science and Technology Park Linghu Road No. 180 -22 Patentee before: WUXI CHINA RESOURCES SEMICO Co.,Ltd. |
|
CP03 | Change of name, title or address |