CN106486501A - A kind of X ray sensor and its manufacture method - Google Patents
A kind of X ray sensor and its manufacture method Download PDFInfo
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- CN106486501A CN106486501A CN201510536889.XA CN201510536889A CN106486501A CN 106486501 A CN106486501 A CN 106486501A CN 201510536889 A CN201510536889 A CN 201510536889A CN 106486501 A CN106486501 A CN 106486501A
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Abstract
The invention discloses a kind of X ray sensor, X ray sensor includes multiple X ray sensor pixel cells, and each X ray sensor pixel cell includes：Intrinsic semiconductor layer 100；The first kind doped layer 110 being located on the relative surface of intrinsic semiconductor layer 100 respectively and Second Type doped layer 120, the wherein outline of first kind doped layer 110 are regular hexagon；Electrode layer 106 on first kind doped layer 110；Cover the passivation layer 108 of electrode layer 106；Welded post 130 in the passivation layer 108 on electrode layer 106；Wherein, multiple X ray sensor pixel cells are regularly arranged, and the arrangement in honeycomb array, and the first kind doped layer 110 of adjacent X ray sensor pixel cell is at equal intervals and the nonopiate arrangement that misplaces.The more traditional rectangular pixels of sensor of the invention have bigger picture element density, and the performance of detected pixel is more uniform.
Description
Technical field
The invention belongs to field of semiconductor devices, more particularly, to a kind of X ray sensor and its manufacturer
Method.
Background technology
X-ray detector is a kind of device of the signal of telecommunication being converted to X-ray energy and being available for recording,
After X-ray source focuses on, be converted to through the X-ray after testing sample by X ray sensor
It is available for the signal of telecommunication recording, be then imaged by signal processing.
At present, the detector of semiconductor device due to its small volume, speed is fast, be easy to information processing with
And the advantages of flexible design, be widely used, become the main flow in detector market.Silicon substrate picture
Plain detector is a kind of X ray sensor commonly used at present, the main picture including PIN diode device
The electrode of sensor pixel cell is detected with reading chip package, formation silicon substrate by pixel array by indium post
Device, this kind of detector has high spatial resolution, capability of fast response and high time resolution ability, so
And, also the uniformity of the integrated level to sensor and detection image is put forward higher requirement.
Content of the invention
It is an object of the invention to overcoming deficiency of the prior art, provide a kind of X ray sensor and
Its manufacture method, the isolation distance between pixel is less, improves the uniform of picture element density and detection image
Property.
For achieving the above object, the technical scheme is that：
A kind of X ray sensor, including multiple X ray sensor pixel cells, each X-ray passes
Sensor pixel cell includes：
Intrinsic semiconductor layer；
The first kind doped layer and second being located on relative two surface of intrinsic semiconductor layer respectively
Type doped layer, wherein, the outline of first kind doped layer is regular hexagon；
Electrode layer on first kind doped layer；
Cover the passivation layer of electrode layer；
Welded post on electrode layer；
Wherein, multiple X ray sensor pixel cells are regularly arranged, and arrangement, phase in honeycomb array
The first kind doped layer of adjacent X ray sensor pixel cell is at equal intervals and the nonopiate arrangement that misplaces.
Optionally, the outline of described electrode layer is the regular hexagon concentric with first kind doped layer.
Optionally, also include surrounding the protection ring of honeycomb array.
Additionally, present invention also offers a kind of manufacture method of X ray sensor, including：
Intrinsic semiconductor layer is provided；
Relative two surface of intrinsic semiconductor layer forms first kind doped layer and second respectively
Type doped layer, wherein, the outline of first kind doped layer is regular hexagon, and the first kind is adulterated
Layer is regularly arranged, and the arrangement in honeycomb array, and adjacent first kind doped layer at equal intervals and misplaces non-
Orthogonal arrangement；
Electrode layer is formed on first kind doped layer；
Cover passivation layer；
Welded post is formed on electrode layer.
Optionally, the step forming first kind doped layer to electrode layer includes：
Dielectric layer is formed on intrinsic semiconductor layer；
Etch media layer, forms the first injection region, the outline of the first injection region is just in the dielectric layer
Hexagon, each the first injection region is regularly arranged, and the first injection region of adjacent strip at equal intervals and misplaces
Nonopiate arrangement；
Carry out ion implanting, the intrinsic semiconductor substrate of the first injection region forms first kind doping
Layer；
Electrode layer is formed on first kind doped layer.
Optionally, described first injection region exposes intrinsic semiconductor layer；
Formed the first injection region after, carry out ion implanting before, also include：
Carry out oxidation technology, the cap rock of oxide is formed on the surface of the exposure of the first injection region.
Optionally, etch media layer, the step forming the first injection region in the dielectric layer also includes：
The dielectric layer of etched portions thickness, forms the first injection region, in the first injection region in the dielectric layer
Remaining dielectric layer is cap rock.
Optionally, the step forming electrode layer includes：
Cap rock is performed etching, forms positive six similar and concentric to the outline of first kind doped layer
The contact area of side shape；
Electrode layer is formed on contact area.
X ray sensor provided in an embodiment of the present invention and its manufacture method, X ray sensor pixel
The outline of first kind doped layer be hexagon, when organizing pixel arrays, the adjacent first kind
Type doped layer at equal intervals and misplace nonopiate arrangement, in honeycomb arrangement, the spacing between pixel diminishes, with
Under homalographic, more traditional rectangular pixels have bigger picture element density, additionally, first kind doping
Layer all of substantially equal with the interval on each side of adjacent first kind doped layer so that the property of detected pixel
Can be more uniform, improve the performance of detector.
Brief description
In order to be illustrated more clearly that the technical scheme that the present invention is implemented, below will be to required in embodiment
Use accompanying drawing be briefly described it should be apparent that, drawings in the following description are only the present invention
Some embodiments, for those of ordinary skill in the art, before not paying creative work
Put, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 shows the overlooking the structure diagram of X ray sensor according to embodiments of the present invention；
Figure 1A shows the AA of Fig. 1 to cross section structure schematic diagram；
Fig. 2-Figure 12 shows that manufacture method forms X ray sensor according to an embodiment of the invention
Each manufacture process in sensor construction schematic diagram.
Specific embodiment
Understandable for enabling the above objects, features and advantages of the present invention to become apparent from, right below in conjunction with the accompanying drawings
The specific embodiment of the present invention is described in detail.
Elaborate a lot of details in the following description in order to fully understand the present invention, but the present invention
Alternate manner described here can also be different to implement using other, those skilled in the art can be not
Similar popularization is done, therefore the present invention is not subject to following public specific embodiment in the case of running counter to intension of the present invention
Restriction.
Secondly, the present invention is described in detail with reference to schematic diagram, when describing the embodiment of the present invention in detail, for ease of
Illustrate, represent that the profile of device architecture can be disobeyed general ratio and be made partial enlargement, and described schematic diagram is only
It is example, its here should not limit the scope of protection of the invention.Additionally, should comprise in actual fabrication length,
Width and the three-dimensional space of depth.
The invention provides a kind of X ray sensor, with reference to shown in Fig. 1 and Figure 1A, Fig. 1 penetrates for X
The top view of line sensor, Figure 1A is the cross section structure schematic diagram of an X ray sensor pixel cell,
This X ray sensor includes multiple X ray sensor pixel cells, each X ray sensor pixel list
Unit includes：Intrinsic semiconductor layer 100；The being located on the relative surface of intrinsic semiconductor layer 100 respectively
One type doped layer 110 and Second Type doped layer 120, the wherein outline of first kind doped layer 110
For regular hexagon；Electrode layer 106 on first kind doped layer 110；Cover electrode layer 106
Passivation layer 108；Welded post 130 in the passivation layer 108 on electrode layer 106；Wherein, multiple
X ray sensor pixel cell is regularly arranged, and the arrangement in honeycomb array, and adjacent X-ray senses
The first kind doped layer 110 of device pixel cell at equal intervals and misplace nonopiate arrangement.
In the present invention it is proposed that a kind of PIN-type X ray sensor, in the pixel cell of this sensor,
First doped layer employs orthohexagonal outline, and the pixel cell of this kind of outline is being arranged in array
When, X ray sensor pixel cell is regularly arranged, for the ease of describing and understanding, below by X-ray
Sensor is regularly arranged to be described as pixel bars, and that is, the central point of the first kind doped layer of pixel cell is at one
On straight line, proper alignment is straight line, for example, can arrange in row, arrange arrangement or slant arrangements etc., and
The first kind doped layer of adjacent pixel bars is at equal intervals and the nonopiate arrangement that misplaces is so that pixel cell
In honeycomb array arrange, that is, each side in the first kind doped layer of each X-ray pixel cell respectively and
One side of the first kind doped layer of the X-ray pixel being adjacent is parallel to each other, and arranges at equal intervals,
Certainly, for the pixel cell of boundary, as the pixel at the two ends of the first row, footline or each pixel bars
Part side in the first kind doped layer of unit, only X-ray pixel cell is respectively and the X that is adjacent
One side of the first kind doped layer of ray pixel is parallel to each other, and arranges at equal intervals.
Due to employing the first kind doped layer of above-mentioned shape and arrangement mode so that between pixel cell
Spacing diminishes, and with homalographic, more traditional rectangular pixels have bigger picture element density, additionally, first
Type doped layer all of substantially equal with the interval on each side of adjacent first kind doped layer so that detected pixel
Performance more uniform.
In the present invention, described intrinsic semiconductor layer 100 can be Semiconductor substrate, and this Semiconductor substrate can
Low-doped to have, in the present embodiment, described intrinsic semiconductor layer 100 is HR-Si substrate.
First kind doped layer 110 and the second doped layer 120 have contrary doping type, normally, the
One type doped layer 110 adulterates for P+, such as the doping of B ion, and the second doped layer 120 is usually N and mixes
Miscellaneous, such as P ion doping.First kind doped layer 110, intrinsic semiconductor layer 100 and Second Type doping
Layer 120 defines the device of PIN-type, and in the present embodiment, first kind doped layer 110 passes through about
Dielectric layer 102 in intrinsic semiconductor layer 100 realizes the isolation with surrounding active area, and this dielectric layer is to carry out
Ion implanting forms mask layer during first kind doped layer 110.
Electrode layer 106 is formed with first kind doped layer 110, in order to improve and first kind doped layer
110 contact area, the outline of described electrode layer is regular hexagon, this regular hexagon and the first kind
The outline basic simlarity of doped layer 110.
Passivation layer 108 is coated with electrode layer 106, passivation layer plays the effect of protection device,
It is formed with welded post 130 it is preferred that this welded post 130 on electrode layer 106 in passivation layer 108
The indium post composition on the prime coat (UMB) including bottom and upper strata, prime coat generally has preferable resistance
Gear effect and cementation, after being combined with indium post, indium post is used for welding together with reading chip.
In the present embodiment, as shown in figure 1, pixel bars 200 arrange for row or column, in similar cellular
Honeycomb array arrangement, pixel bars separately flush arrangement that is to say, that adjacent pixel bars are straggly
Arrangement, pixel bars proper alignment separately, so under identical area, it is possible to obtain bigger
Picture element density, improves integrated level.In addition, the periphery in honeycomb array is provided with protection ring (not shown),
To improve array interference free performance.
In order to be better understood from technical scheme and technique effect, below with reference to concrete schematic diagram pair
The manufacture method of specific embodiment is described in detail.
First, provide intrinsic semiconductor layer 100, as shown in Figure 2.
In the present invention, described intrinsic semiconductor layer 100 can be Semiconductor substrate, for example, can serve as a contrast for silicon
Bottom, can have N-shaped and be lightly doped in silicon substrate, in the present embodiment, described intrinsic semiconductor layer 100 is tool
There is the HR-Si substrate of N-shaped doping.
Then, dielectric layer deposited 102 on a surface of intrinsic semiconductor layer 100, as shown in Figure 3.
This dielectric layer is hard mask material simultaneously, as mask during ion implanting, meanwhile, is between active area
Isolation, this dielectric layer can be such as silicon oxide, silicon nitride etc. or their lamination, in the present embodiment.
In the present embodiment, described dielectric layer 102 is silicon oxide, and thickness can be 10-5000nm, typically,
The thickness of this dielectric layer can be 300～1000nm.
Then, etch media layer 102, forms the first injection region 103 in the dielectric layer, the first injection region
Outline is regular hexagon, and the first injection region 103 is regularly arranged, and the arrangement in honeycomb array, adjacent
First injection region 103 at equal intervals and the nonopiate arrangement that misplaces, with reference to shown in Fig. 4.
The method of RIE (reactive ion etching) can be adopted to carry out the etching of dielectric layer 102, etching removes
Part be regular hexagon, be the first injection region 103, for forming first kind doped layer, remaining
Dielectric layer 102 is mask layer, for forming masking layer during first kind doped layer, the first injection region
Outline is regular hexagon, and the first injection region is regularly arranged, and that is, the central point of the first injection region is at one
On straight line, proper alignment is straight line, can arrange in row, arrange arrangement or slant arrangements etc., and
The first adjacent injection region 103 is at equal intervals and the nonopiate arrangement that misplaces is so that the first injection region is in honeycomb array
Arrangement, that is, each the first injection region each while respectively and the first injection region of being adjacent one while mutual
Parallel, and arrange at equal intervals, certainly, for the first injection region of boundary, such as the first row, footline or
First injection region of end, only part are parallel to each other and arrange at equal intervals while respectively with being adjacent
Row.First injection region is used for being subsequently formed the first kind doped layer of honeycomb array arrangement.
In the present embodiment, carry out dielectric layer 102 etching when, stop in intrinsic semiconductor layer 100,
In order to protect the intrinsic semiconductor layer under the first injection region, then, can be in the reality of the first injection region 103
Form cap rock, as shown in figure 5, oxidation technology can be passed through, in the first injection region exposing on semiconductor layer
The upper cap rock 104 forming thin layer of silicon oxide, thickness can be 5-500nm, and typically, the thickness of cap rock can
Think 30-200nm, the thickness of this thin layer of silicon oxide is much smaller than the thickness of dielectric layer, play protection intrinsic half
The effect of conductor layer surface.
In other embodiments it is also possible in etch media layer, etching removes most of thickness dielectric material,
Dielectric material after the first injection region member-retaining portion, as cap rock, plays in follow-up doping and etching technics
The effect of protection intrinsic semiconductor layer.
Then, being doped, in the present embodiment, as shown in fig. 6, carrying out heavy doping, being formed heavily doped
The first kind doped layer 110 of P+, for example, can carry out the doping of B ion, and the energy of doping can be
2～200keV, dosage can be 1e12～5e15cm-2, the first doped layer 110 is formed at the first injection region
In intrinsic semiconductor layer 100 under 103, this first doped layer 110 has and the first injection region 103 base
This identical shape, essentially regular hexagon, thus, form outline essentially orthohexagonal first and mix
Diamicton 110, first kind doped layer is regularly arranged, and adjacent first kind doped layer at equal intervals and misplaces
Nonopiate arrangement, arranges in honeycomb array.
Then, another type of doping can be carried out on another surface of intrinsic semiconductor layer 100, such as
Shown in Fig. 7, in the present embodiment, carry out n-type doping, for example, can carry out the doping of P ion, mix
Miscellaneous energy can be 2～200keV, and dosage can be 1e12～5e15cm-2, thus forming Equations of The Second Kind
Type doped layer 120.Certainly, as needed, the technique forming Second Type doped layer can also be at it
He is carried out step, and the present invention does not limit to the order of the step forming Second Type doped layer.
Then, electrode layer 106 is formed on first kind doped layer, with reference to shown in Fig. 9.
In order to increase the contact area of electrode and first kind doped layer, the outline of described electrode layer
Could be arranged to regular hexagon, and this regular hexagon similar to the regular hexagon of first kind doped layer or
Identical and concentric.In the present embodiment, first, etching cap 104, until expose intrinsic semiconductor
Layer 100, to form opening, as shown in figure 8, the cap rock etching away be shaped as mix with the first kind
The concentric regular hexagon of diamicton, then, fills opening, with deposited metal Al and can carry out photoetching corrosion
To form electrode layer 106, as shown in Figure 9.
Then, it is passivated the deposit of layer 108, passivation layer 108 covers above-mentioned device, and is put down
Smoothization, as shown in Figure 10.
Then, form welded post 130, with reference to shown in Figure 12.
This welded post generally includes the prime coat 1301 of lower floor and the indium post 1302 on upper strata, and prime coat is usual
There is preferable barrier effect and cementation, for example, can be TiNiAu or TiNiAg, with indium post
In conjunction with after, indium post be used for read chip weld together.Specifically, Etch Passivation 108 until
Exposing illuvium 106, thus forming contact hole, in this contact hole, forming indium post prime coat 1301,
Then, prime coat 1301 forms indium post 1302, thus defining encapsulated electrode.
So far, define the X ray sensor of the embodiment of the present invention, have large area, high-resolution,
High-sensitive characteristic, this X ray sensor is passed through indium post and is encapsulated in the welding of reading circuit array dot matrix
Together, resistance and parasitic capacitance are all relatively low, and resolution and sensitivity height.
The above, be only presently preferred embodiments of the present invention, not the present invention is made any formal
Restriction.
Although the present invention is disclosed as above with preferred embodiment, but is not limited to the present invention.Any
Those of ordinary skill in the art, without departing under technical solution of the present invention ambit, can be utilized
The methods and techniques content stating announcement makes many possible variations and modification to technical solution of the present invention, or
It is revised as the Equivalent embodiments of equivalent variations.Therefore, every content without departing from technical solution of the present invention,
Technical spirit according to the present invention to any simple modification made for any of the above embodiments, equivalent variations and is repaiied
Decorations, all still fall within the range of technical solution of the present invention protection.
Claims (8)
1. a kind of X ray sensor is it is characterised in that include multiple X ray sensor pixel lists
Unit, each X ray sensor pixel cell includes：
Intrinsic semiconductor layer；
The first kind doped layer and second being located on relative two surface of intrinsic semiconductor layer respectively
Type doped layer, wherein, the outline of first kind doped layer is regular hexagon；
Electrode layer on first kind doped layer；
Cover the passivation layer of electrode layer；
Welded post on electrode layer；
Wherein, multiple X ray sensor pixel cells are regularly arranged, and arrangement, phase in honeycomb array
The first kind doped layer of adjacent X ray sensor pixel cell is at equal intervals and the nonopiate arrangement that misplaces.
2. sensor according to claim 1 is it is characterised in that the outline of described electrode layer
It is the regular hexagon concentric with first kind doped layer.
3. sensor according to claim 1 is it is characterised in that also include surrounding honeycomb array
Protection ring.
4. a kind of manufacture method of X ray sensor is it is characterised in that include：
Intrinsic semiconductor layer is provided；
Relative two surface of intrinsic semiconductor layer forms first kind doped layer and second respectively
Type doped layer, wherein, the outline of first kind doped layer is regular hexagon, and the first kind is adulterated
Layer is regularly arranged, and the arrangement in honeycomb array, and adjacent first kind doped layer at equal intervals and misplaces non-
Orthogonal arrangement；
Electrode layer is formed on first kind doped layer；
Cover passivation layer；
Welded post is formed on electrode layer.
5. manufacture method according to claim 4 is it is characterised in that form first kind doping
Layer includes to the step of electrode layer：
Dielectric layer is formed on intrinsic semiconductor layer；
Etch media layer, forms the first injection region, the outline of the first injection region is just in the dielectric layer
Hexagon, each the first injection region is regularly arranged, and the first injection region of adjacent strip at equal intervals and misplaces
Nonopiate arrangement；
Carry out ion implanting, the intrinsic semiconductor substrate of the first injection region forms first kind doping
Layer；
Electrode layer is formed on first kind doped layer.
6. manufacture method according to claim 5 is it is characterised in that described first injection region is sudden and violent
Dew intrinsic semiconductor layer；
Formed the first injection region after, carry out ion implanting before, also include：
Carry out oxidation technology, the cap rock of oxide is formed on the surface of the exposure of the first injection region.
7. manufacture method according to claim 5, it is characterised in that etch media layer, is being situated between
The step forming the first injection region in matter layer includes：
The dielectric layer of etched portions thickness, forms the first injection region, in the first injection region in the dielectric layer
Remaining dielectric layer is cap rock.
8. the manufacture method according to claim 6 or 7 is it is characterised in that form electrode layer
Step includes：
Cap rock is performed etching, forms positive six similar and concentric to the outline of first kind doped layer
The contact area of side shape；
Electrode layer is formed on contact area.
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| CN111799351A (en) * | 2020-07-14 | 2020-10-20 | 中国科学院微电子研究所 | X-ray array sensor, detector and manufacturing method thereof |
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| EP3400615A4 (en) | 2016-01-07 | 2019-08-14 | The Research Foundation for The State University of New York | Multi-well selenium device and method for fabrication thereof |
| CN115036335B (en) * | 2022-06-14 | 2023-08-11 | 无锡鉴微华芯科技有限公司 | High-energy X-ray detector and preparation process thereof |
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| CN115000235B (en) * | 2020-07-14 | 2023-11-10 | 中国科学院微电子研究所 | X-ray array sensor, detector and manufacturing method thereof |
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Application publication date: 20170308 |