CN106469127B

CN106469127B - A kind of data access device and method

Info

Publication number: CN106469127B
Application number: CN201510521951.8A
Authority: CN
Inventors: 牟崧友; 余晨; 王闯; 闫振林
Original assignee: Shenzhen ZTE Microelectronics Technology Co Ltd
Current assignee: Shenzhen ZTE Microelectronics Technology Co Ltd
Priority date: 2015-08-21
Filing date: 2015-08-21
Publication date: 2019-11-15
Anticipated expiration: 2035-08-21
Also published as: WO2017032137A1; CN106469127A

Abstract

The embodiment of the invention discloses a kind of data access devices, comprising: primary port interfaces module is used for transmission the access request of the first master port transmission and carries access address, visit order and access data to arbitration modules, in the access request；Arbitration modules, for according to preset table, by from port interface module determine corresponding with access address first from port and this first from the effective address of port, and this is sent first from the effective address of port, the visit order and the access data to from port interface, wherein, arbitration modules are generated according to the preset table, which includes bus parameter；From port interface module, the first of arbitration modules transmission is used for transmission from the effective address of port, visit order and access data to first from port, for this first from port according to this first from the effective address and visit order of port, access operation to access data.

Description

A kind of data access device and method

Technical field

The present invention relates to the embedded designs more particularly to a kind of data access device and method in integrated circuit fields.

Background technique

With the development of system on chip (SoC, System On Chip) technology, the functional module of a core Embedded It is more and more, and modules are also higher and higher for the visiting demand of memory, therefore, on-chip bus is shown in chip architecture Must be extremely important, on-chip bus realizes that on piece host (main module) is that system on chip can not to the control of each slave (from module) The a part lacked.Very multi-chip design uses data burst transmission (AMBA, Advanced Microcontroller at present Bus Architecture) Advanced High-Performance Bus (AHB, Advanced High in On-chip bus agreement Performance Bus) agreement.

In the prior art, in integrated circuit (IC, Integrated Circuit) design, user is needed to grasp bus association View, is determined by writing Method at Register Transfer Level (RTL, Register-Transfer Level) code by the arbitration modules in AHB Ahb bus access path.

However, grasping bus protocol using the implementation of the above-mentioned prior art by user, writing the side of RTL code Formula can waste access time, and reliability is not also high, and the chip bigger for scale, it may be necessary to it is several hundred it is thousands of from Module will be a very huge workload if writing each RTL code from module manually.

Summary of the invention

In order to solve the above technical problems, an embodiment of the present invention is intended to provide a kind of data access device and method, it can be fast Speed succinctly effectively realizes data access device, and improves the reliability of data access device.

The technical scheme of the present invention is realized as follows:

The embodiment of the present invention provides a kind of data access device, and the data access device includes:

Primary port interfaces module is used for transmission the access request of the first master port transmission to arbitration modules, and the access is asked Ask middle carrying access address, visit order and access data；

The arbitration modules are used for according to preset table, by determining and the access address pair from port interface module First answered sends described first from the effective address of port, described from port and described first from the effective address of port Visit order and the access data are to described first from port, wherein the arbitration modules are raw according to the preset table At, the preset table includes bus parameter；

It is described from port interface module, be used for transmission the arbitration modules are sent described first from port effectively Location, the visit order and the access data to described first from port, for described first from port according to described first Effective address and the visit order from port access operation to the access data.

In above-mentioned data access device, the data access device further include: first across clock module；The arbitration mould Block is communicated with described from port interface module by described first across clock module；

The arbitration modules are also used to send described first from the effective address of port, the visit order and the visit Ask data to described first across clock module；

Described first across clock module, is used for according to the preset table, described first that the arbitration modules are sent Described first is switched to from port institute from the clock domain where the effective address of port, the visit order and the access data Clock domain, with realize and be in different clock-domains the described first docking from port, and send switching clock domain after Described first from the effective address of port, the visit order and the access data to described first from port；

The institute from port interface module, after being also used to transmit the switching clock domain that described first sends across clock module First is stated from the effective address of port, the visit order and the access data to described first from port, for described One from port according to switching clock domain after the described first effective address from port and the visit order, to switching clock domain The access data afterwards access operation.

In above-mentioned data access device, the data access device further include: the first pipeline module；The arbitration mould Block is communicated with described from port interface module by first pipeline module；

The arbitration modules are also used to send described first from the effective address of port, the visit order and the visit Ask data to first pipeline module；

First pipeline module, for by described first from the effective address of port, the visit order and described Data are accessed according to sequential export to described first from port；

It is described from port interface module, be also used to transmit first pipeline module according to described the first of sequential export From the effective address of port, the visit order and the access data to described first from port, so that described first from end Mouth accesses to the access data according to correct described first effective address from port of timing and the visit order Operation.

In above-mentioned data access device, the data access device further include: next stage arbitration modules；The arbitration mould Block is communicated with described from port interface module by the next stage arbitration modules；

The arbitration modules, for according to the preset table, by next stage arbitration modules and described from port Interface module determining corresponding with the access address first passes through institute from port and described first from the effective address of port It states next stage arbitration modules and sends described first from the effective address of port, the visit order and the access data to described First from port.

In above-mentioned data access device, the AHB main line further include: second across clock module；The next stage arbitration Module is communicated with described from port interface module by described second across clock module；

The arbitration modules, are also used to according to the preset table, by next stage arbitration modules and described from end Determining corresponding with the access address first from port and described first from the effective address of port in mouth interface module, and leads to Cross the next stage arbitration modules send described first from the effective address of port, the visit order and the access data to Described second across clock module；

Described second across clock module, for that will be sent by the next stage arbitration modules according to the preset table Described first from the effective address of port, the visit order and the access data where clock domain switch to described the Clock domain where one from port to realize and be in the described first docking from port of different clock-domains, and sends switching After clock domain described first from the effective address of port, the visit order and the access data to described first from end Mouthful；

It is described from port interface module, after being also used to transmit the switching clock domain that second sends across clock module described the One from the effective address of port, the visit order and the access data to described first from port, for described first from Port according to switching clock domain after the described first effective address from port and the visit order, to switching clock domain after The access data access operation.

In above-mentioned data access device, the AHB main line further include: the second pipeline module；The next stage arbitration Module is communicated with described from port interface module by second pipeline module；

The arbitration modules, for according to the preset table, by next stage arbitration modules and described from port Interface module determining corresponding with the access address first passes through institute from port and described first from the effective address of port It states next stage arbitration modules and sends described first from the effective address of port, the visit order and the access data to described Second across clock module；

Second pipeline module, for by described first from the effective address of port, the visit order and described Data are accessed according to sequential export to described first from port.

It is described from port interface module, be also used to transmit second pipeline module according to described the first of sequential export From the effective address of port, the visit order and the access data according to sequential export to described first from port, for Described first from port according to timing correctly the described first effective address from port and the visit order, to the access Data access operation.

In above-mentioned data access device, the data access device further include: Advanced High-Performance Bus AHB modulus of conversion Block；The AHB conversion module is communicated with described from port interface module；

The AHB conversion module, for parsing by described from the received visit order of port interface module and institute State access data.

In above-mentioned data access device, the data access device further include: master port selecting module；The master port Interface module is communicated with the master port selecting module；

The master port selecting module, for determining communicate with the arbitration modules described first from multiple master ports Master port, to realize that the AHB data of first master port and the arbitration modules are transmitted.

It is described from port interface module in above-mentioned data access device, be specifically used for transmission to the access data into The corresponding access operation of the row visit order is to the arbitration modules；

The arbitration modules are also used to through the response of visit order described in the primary port interfaces module transfer to described First master port.

It is described from port interface module in above-mentioned data access device, it is also used to transmit being not responding to the visit order Access operation；

The arbitration modules are also used to receiving the sound to the visit order from port interface module not by described After answering, the access request next time sent by the primary port interfaces module is received, and ask according to the access next time It asks and carries out through primary port interfaces module and the access operation next time from port interface module transfer.

The embodiment of the present invention provides a kind of data access method, and the data access method includes:

The access request of the first master port transmission is received, carries access address, visit order and visit in the access request Ask data；

According to preset table, determine corresponding with the access address first from port and described first from the effective of port Address；

Described first is sent from the effective address of port, the visit order and the access data to described first from end Mouthful, for described first from port according to the described first effective address from port and the visit order, to the access number According to the operation that accesses.

In above-mentioned data access method, it is described send described first from the effective address of port, the visit order and The access data to described first before port, the method also includes:

According to the preset table, by described first from the effective address of port, the visit order and the access number Described first is switched to from the clock domain where port according to the clock domain at place, to realize and described the in different clock-domains One from the docking of port；

Correspondingly, it is described send described first from the effective address of port, the visit order and the access data to Described first from port, comprising:

After sending switching clock domain described first from the effective address of port, the visit order and the access data To described first from port.

In above-mentioned data access method, it is described send described first from the effective address of port, the visit order and The access data are to described first from port, comprising:

By described first from the effective address of port, the visit order and the access data according to sequential export to institute First is stated from port, for described first from port according to timing correctly described first from the effective address and the visit of port It asks order, accesses operation to the access data.

In above-mentioned data access method, before the access request for receiving the transmission of the first master port, the method is also Include:

First master port is determined from multiple master ports.

It is described according to preset table in above-mentioned data access method, determine corresponding with the access address first from Port and described first is described to send the described first effective address from port, the access after the effective address of port Order and the access data to described first before port, the method also includes:

Parse the visit order and the access data.

The embodiment of the invention provides a kind of data access device and methods, comprising: primary port interfaces module is used for transmission The access request that first master port is sent carries access address, visit order and access number to arbitration modules in the access request According to；Arbitration modules, for according to preset table, by determining from port interface module corresponding with access address first from port And this is first from the effective address of port, and sends this first from the effective address of port, the visit order and the access data To first from port, wherein arbitration modules are generated according to preset table, which includes bus parameter；From port Interface module is used for transmission arbitration modules are sent first from the effective address of port, visit order and accesses data to first From port, for this first from port according to this first from the effective address and visit order of port, access data are visited Ask operation.When being carried out data transmission using above-mentioned data access device, since arbitration modules are generated by preset table, no longer The rewriting of arbitration modules is carried out by user's manual coding, therefore, is solved in monster chip project due to data access device The problem that port is more, code maintenance task amount is big, manual coding is error-prone caused by change frequently, so as to succinctly effectively It realizes data access device, improves the reliability of data access device.

Detailed description of the invention

Fig. 1 is a kind of structural schematic diagram one of data access device provided in an embodiment of the present invention；

Fig. 2 is the full address schematic diagram one in the embodiment of the present invention；

Fig. 3 is the full address schematic diagram two in the embodiment of the present invention；

Fig. 4 is to realize that arbitration modules transmit the flow chart of data in the embodiment of the present invention；

Fig. 5 is the structural schematic diagram two of one of embodiment of the present invention data access device；

Fig. 6 is the provided in an embodiment of the present invention first design frame chart across clock module；

Fig. 7 is the structural schematic diagram three of one of embodiment of the present invention data access device；

Fig. 8 is the design frame chart of the common pipeline module provided in the prior art；

Fig. 9 is the design frame chart of the first pipeline module provided in an embodiment of the present invention；

Figure 10 is the structural schematic diagram four of one of embodiment of the present invention data access device；

Figure 11 is the structural schematic diagram five of one of embodiment of the present invention data access device；

Figure 12 is the structural schematic diagram six of one of embodiment of the present invention data access device；

Figure 13 is the structural schematic diagram seven of one of embodiment of the present invention data access device；

Figure 14 is the design frame chart of AHB conversion module provided in an embodiment of the present invention；

Figure 15 is the structural schematic diagram eight of one of embodiment of the present invention data access device；

Figure 16 is the structural schematic diagram of primary port interfaces module provided in an embodiment of the present invention；

Figure 17 is the structural schematic diagram of the illustrative data access device of one of embodiment of the present invention；

Figure 18 is a kind of flow chart one of data access method provided in an embodiment of the present invention；

Figure 19 is a kind of flowchart 2 of data access method provided in an embodiment of the present invention；

Figure 20 is a kind of flow chart 3 of data access method provided in an embodiment of the present invention；

Figure 21 is a kind of flow chart four of data access method provided in an embodiment of the present invention.

Specific embodiment

Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description.

Embodiment one

As shown in Figure 1, the embodiment of the present invention provides a kind of data access device 1, which may include:

Primary port interfaces module 10 is used for transmission the access request of the first master port transmission to arbitration modules 11, the access Access address, visit order and access data are carried in request.

Arbitration modules 11 are used for according to preset table, by corresponding with access address from the determination of port interface module 12 First from port interface and this first from the effective address of port, and send first effective address from port, visit order With access data to this first from port, which generated according to preset table, which includes bus Parameter.

From port interface module 12, it is used for transmission the first effective address, access life from port of the transmission of arbitration modules 11 Enable and access data be to from port, for this first from port according to this first from the effective address and visit order of port, it is right Access data access operation.

Wherein, arbitration modules 11 are communicated with primary port interfaces module 10, and from port interface module 12 and the arbitration mould Block 11 communicates.

It should be noted that the present invention be data access device in embodiment can for Advanced High-Performance Bus (AHB, Advanced High Performance Bus)。

It should be noted that the function of arbitration modules 11 is to complete master port and any from the arbitrary address between port The address and path from port that arbitration and multi-path choice function, i.e. arbitration master port access request.The embodiment of the present invention In arbitration modules be by preset table generate code realize module.The preset table includes bus parameter, exemplary , in preset table bus parameter may include: from port name, from the address bit wide of port, from address range of port etc. Parameter.Specifically, detecting the bus parameter in preset table using the VB script in preset table, being generated according to bus parameter Arbitration modules code realizes the function of arbitration modules.

Further, the arbitration modules 11 in the embodiment of the present invention select design method using high address, due to arbitrating mould The access address carried in the access request that block 11 is received by primary port interfaces module 10 be some to be accessed from port Full address, but not necessarily take the full address bit wide from the effective address of port, therefore, in the embodiment of the present invention, pass through Differentiate that the value of the high address of access address is come by the way that from determining first from port of port interface module from port, this first From port be the first master port want to access from port.

It should be noted that the primary port interfaces module 10 in the embodiment of the present invention is connect with the master port of host, from end Mouthful interface module 12 is connect with slave from port, by primary port interfaces module 10 to the access from port interface module 12 just It is the access that host carries out slave.

Specifically, being the host of the address 20bit with full address bit wide, for accessing 10bit slave, in the embodiment of the present invention It only needs to judge 11bit logic using high position selection design.As shown in Fig. 2, being full address schematic diagram, as can be known from Fig. 2: piece choosing Each bit of the numerical value of bit can be 0,1 or Z.Wherein, piece select bit refer in address beyond it is minimum from port The part of location bit wide.Entire address allocation procedure in the embodiment of the present invention can be with are as follows: arbitration modules 11 are according to minimum from port Full address is divided into 2n parts (n is the number that piece selects bit), each from port also according to Self address size by address size 2k (k is the number that piece selects Z in bit) minimums are occupied from port module address bit wide.There is no Z in bit as chankings selects, A minimum is then only taken up from port module address bit wide, is Z as chankings selects bit lowest order, then occupies 2 minimums from end Mouth mold block address bit wide then occupies 4 minimums from port module address bit wide if chankings selects bit minimum two as Z, if Piece selects bit minimum three as Z, then occupies 8 minimums from port module address bit wide, and so on.In this way, arbitration modules 11 can be determined by judging the bit value of upper address bits (piece selects bit) to be accessed first from port.

Wherein, it is Z that piece, which selects a certain bit in bit, indicates to occupy the address that the bit is 0 and 1, simultaneously The bit lower than the bit is all necessary for Z；Each 2k minimum space can only be occupied from port.If being unsatisfactory for the two Condition, then the access address for illustrating that arbitration modules 11 obtain is not any one address from port, therefore, by the access address Free time, while the corresponding module of the access address is sky.

Illustratively, it is assumed that total address space size of arbitration modules 11 is 1MB, and minimum is from port pcie_brg_csr 4KB, it is maximum from port pcie_ep_bkend be 64KB.Therefore, " bus byte address bit wide " is 20；It is " minimum from module byte Address bit wide " is 12；" maximum from module byte address bit wide " is 16.For from port pcie_brg_csr, address space is big Small is 4KB, and " byte address bit wide " fills out 12, only take up a lowest address space, and specifying " byte chip select address range " is 8 ' b0000_0000.From port in the address that arbitration modules 11 are actually assigned to as shown in figure 3, " Z " indicates to be 0 or 1, I.e. high 8bit is that the address of 8 ' b0000_0000 can all be addressed to slave end mouth.

Further, arbitration modules 11 judge access address corresponding first behind the address of port, and arbitration modules 11 will In addition to upper address bits first from the effective address of port by being sent to from port interface module 12 from port.

It is understood that the arbitration modules 11 in the embodiment of the present invention are greatly reduced using high address selection design Combinational logic amount when arbitration and multi-path choice, and arbitration modules 11 use passive response mode, then guarantee data access device 1 It will not be hung dead because some is not responded to extremely from port.

Optionally, the visit order that the embodiment of the present invention proposes may include read command and write order.

Optionally, it from port interface module 12, accesses the corresponding visit of order also particularly useful for transmission to access data Ask that operation transmits the response of the visit order to the by primary port interfaces module 10 to arbitration modules 11 and arbitration modules 11 One master port.

It is understood that the slave need to send the read command to host when host sends read command to a slave Response, to complete read operation of the host to a slave.

Optionally, it from port interface module 12, is also used to transmit the access operation for being not responding to visit order.

Arbitration modules 11 are also used to after not by receiving from port interface module 12 to the response of visit order, The access request next time sent by primary port interfaces module 10 is received, and access request carries out passing through this next time according to this The access operation next time that primary port interfaces module 10 and slave end mouth interface module 12 are transmitted.

It is understood that illustrative, when host sends read command to a slave, slave restoring is being not responding to At this moment the case where read command, hangs dead situation there have been data access device 1, at this point, due in the embodiment of the present invention Arbitration modules 11 use passive response mode, therefore, if arbitration modules 11 are receiving transmission by primary port interfaces module 10 Access request next time when, arbitration modules 11 abandon this access request, start to process access request next time.Locate in this way Reason, avoids arbitration modules always in order to wait the response by transmitting from port interface module 12, and data access is filled Set the generation that dead situation is hung in 1 appearance.

Specifically, arbitration modules 11 can realize that above-mentioned passive response mode can evade data access dress by state machine Set the dead problem of 1 extension.As shown in figure 4, being state machine flow chart diagram.The responding process of the visit order of one normal AHB are as follows: secondary That cuts out module 11 is initially in idle state, after receiving access request (visit order), can switch to coomand mode, the visit After asking that order is responded, which is switched to data mode by idle state, and access data are switched to again after being responded Completion status eventually passes back to idle state, realizes the arbitration transmission of an AHB.When slave occurs abnormal, visit order and Access data may not be responded, if host is waiting always the response of slave at this time, also not provided most in AHB agreement Big waiting time, that bus will be in extension death situation states.In order to without prejudice to AHB agreement, while it can solve this problem, this hair again Whether the arbitration modules 11 in bright embodiment increase by one has the judgement of access request next time can if host can wait It is waited with infinitely prolonged, if host is not desired to wait, access request next time can be initiated again, state machine can be under Access request is switched to idle state and starts new access operation.So not only can be without prejudice to AHB agreement, but also it can It solves to hang dead risk problem.

Optionally, as shown in figure 5, data access device 1 further include: first across clock module 13；Arbitration modules 11 pass through This first is communicated across clock module 13 with from port interface module 12.

Arbitration modules 11, be also used to send first from the effective address of port, visit order and access data to first across Clock module 13.

First across clock module 13, for according to preset table, by arbitration modules 11 send first from the effective of port Clock domain where address, visit order and access data switches to the clock domain where first from port, to realize and locate In different clock-domains this first from the docking of port, and send after switching clock domain this first from the effective address of port, The visit order and the access data are to first from port.

From port interface module 12, be also used to transmit first across clock module 13 send switching clock domain after first from The effective address of port, visit order and state access data to first from port, for this first from port according to switching clock Behind domain first from the effective address and visit order of port, access operation to the access data after switching clock domain.

It should be noted that arbitration modules 11 pass through the first feelings communicated across clock module 13 with from port interface module 12 Condition, comprising: arbitration modules 11 are communicated with first across clock module 13, this first across clock module 13 again and from port interface module 12 communication the case where, further includes: arbitration modules 11 are communicated with first across clock module 13, this first across clock module 13 further through The case where new module (such as: the first pipeline module 14) from port interface module 12 with communicating, can also include: arbitration mould After block 11 and new functional module (such as: the first pipeline module 14) communicate, by first across clock module 13 with from port The case where interface module 12 communicates.Correspondence between specific three is determined by the functional module of the needs in practical application Fixed, the embodiment of the present invention is with no restriction.

Particularly, first in the embodiment of the present invention across clock module 13 can be at least one, specific quantity also by The case where practical application, determines that the embodiment of the present invention is with no restriction.

It is understood that first completes clock domain handoff functionality across clock module 13, any of AHB interface can be supported Conversion between bit address, any clock domain.

Optionally, first two kinds of implementations can be used across 13 module of clock module: First Input First Output (FIFO, First Input First Output) mode and asynchronous handshake mode.

Specifically, the first design frame chart across clock module 13 in the embodiment of the present invention can be illustratively Fig. 6 institute Show, source clock (clock domain where access request) initiates read-write requests, is deposited as read and write FIFO, selecting module is according to FIFO's Sky completely reads the request of FIFO, and is converted to AHB agreement and is output to purpose clock domain (from port interface module 12), by purpose The response of clock domain returns to the AHB of source clock domain back to completion response FIFO.

Further, first in the embodiment of the present invention is across setting overtime protection mechanism, the time-out inside clock module 13 Protection mechanism is used to monitor the response time, will not tangle bus because of not responding to；Principal and subordinate's port transmission type is arranged to separate Mechanism, to do not support burst from port, still can permit master port and configured with burst mode, improve bus configuration speed Rate.Its protected mode is specifically, if it exceeds preset time operation then issues the completion of a specific data still without completion Response FIFO is completed, it is dead to guarantee that the AHB of source clock domain will not be hung.

Optionally, preset time can be 1 minute, and the selection of specific preset time can be completed according to actual response Time determines that the embodiment of the present invention is with no restriction.

It should be noted that the intermodule in the embodiment of the present invention is all attached by AHB interface, and by from port The received access data of interface module 12 must corresponding with slave end mouth interface module 12 want the received clock from port Domain is consistent, and the AHB interface (from port interface) that could be connect with slave end mouth is to connecting.

Optionally, as shown in fig. 7, data access device 1 further include: the first pipeline module 14；Arbitration modules 11 pass through First pipeline module 14 is communicated with from port interface module 12.

Arbitration modules 11 are also used to send first from the effective address of port, visit order and access data to first-class Waterline module 14.

First pipeline module 14, for by first from the effective address of port, visit order and access data according to when Sequence is exported to first from port.

From port interface module 12, it is also used to transmit the first pipeline module 14 according to the first of sequential export from port Effective address, visit order and access data to first from port, for this first from port according to timing correct first from The effective address and visit order of port access operation to access data.

It should be noted that arbitration modules 11 pass through the feelings that the first pipeline module 14 is communicated with from port interface module 12 Condition, comprising: arbitration modules 11 are communicated with the first pipeline module 14, and first pipeline module 14 is again and from port interface module 12 communication the case where, further includes: arbitration modules 11 are communicated with the first pipeline module 14, first pipeline module 14 further through The case where new module (such as: first across clock module 14) from port interface module 12 with communicating, can also include: arbitration mould After block 11 and new functional module (such as: first across clock module 13) communicate, by the first pipeline module 14 with from port The case where interface module 12 communicates.Correspondence between specific three is determined by the functional module of the needs in practical application Fixed, the embodiment of the present invention is with no restriction.

Particularly, the first pipeline module 14 in the embodiment of the present invention can be at least one, specific quantity also by The case where practical application, determines that the embodiment of the present invention is with no restriction.

It should be noted that the function of the first pipeline module 14 is to complete the pipeline function of AHB interface, transparent transmission flowing water Two side interface transport-type of line, when comprehensive timing is not achieved when chip rear end, when being used to optimize using the first pipeline module 14 Sequence, when use, only need setting address bit wide parameter, so that it may avoid the situation for occurring sequential logic mistake in data transmission procedure.

Specifically, mentality of designing are as follows: the thinking of usual pipeline module be inserted directly into level-one register, as shown in figure 8, But for AHB agreement, the mode of common pipeline module will cause error in data, so we have proposed use data The mode of the pipeline module of latch.Illustratively as shown in figure 9, being the design frame chart of the first pipeline module.It is assisted according to AHB View, each operation of AHB need feedback of shaking hands, and the mode of common pipeline module can not shake hands, and will cause timing mistake Disorderly.And the mode for the AHB pipeline module that the embodiment of the present invention proposes is specifically by taking A sends out read request to B as an example, to by this The data transmission of one pipeline module 14 is illustrated: data latch module latches newest valid data A always；First flowing water Wire module 14 is defaulted as significant response to the response of data A；After A issues new visit order, control selections A is exported is to B Data a-signal, it is to be not responding to signal that control selections B, which is exported to A,；Control selections A is exported if data B is not responded to is to B Data A latch data；It is data A that control selections A, which is exported to B, after equal pending datas B response；It is controlled after again waiting for data B response Selecting B to export to A is response signal.

Optionally, as shown in Figure 10, data access device 1 further include: next stage arbitration modules 15；Arbitration modules 11 pass through The next stage arbitration modules 15 are communicated with from port interface module 12.

Arbitration modules 11 are used for according to preset table, by next stage arbitration modules 15 and from port interface module 12 Determine corresponding with the access address first from port and this first from the effective address of port, and pass through next stage arbitration mould Block 15 send this first from the effective address of port, visit order and access data to first from port.

It should be noted that the problem of due to the heavy workload of arbitration modules 11 sometimes, have the processing of arbitration modules 11 not Therefore, in the embodiment of the present invention the case where coming over also proposes that next stage arbitration modules 15 are arranged in data access device 1, under this One instance arbitration module 15 and arbitration modules 11 complete arbitration function jointly.

Particularly, the next stage arbitration modules 15 in the embodiment of the present invention can be at least one, specific quantity also by The case where practical application, determines that the embodiment of the present invention is with no restriction.

Optionally, as shown in figure 11, AHB main line further include: second across clock module 16；Next stage arbitration modules 15 pass through This second is communicated across clock module 16 with from port interface module 12.

Arbitration modules 11, are also used to according to preset table, by next stage arbitration modules 15 and from port interface module 12 Middle determination corresponding with access address first from port and this first arbitrate mould from the effective address of port, and by the next stage Block 15 send this first from the effective address of port, visit order and access data to this second across clock module 16.

Second across clock module 16, for according to preset table, by sent by next stage arbitration modules 15 first from Clock domain where the effective address of port, visit order and access data switch to first from port where clock domain, with It realizes and is in first the docking from port of different clock-domains, and send first the having from port after switching clock domain Address, the visit order and the access data to first are imitated from port.

From port interface module 12, be also used to transmit second across clock module 16 send switching clock domain after first from The effective address of port, visit order and access data to first from port, for this first from port according to switching clock domain First afterwards accesses operation to the access data after switching clock domain from the effective address and visit order of port.

It should be noted that next stage arbitration modules 15 are led to across clock module 16 with from port interface module 12 by second The case where letter, comprising: next stage arbitration modules 15 are communicated with second across clock module 16, this second across clock module 16 again with from The case where port interface module 12 communicates, further includes: next stage arbitration modules 15 are communicated with second across clock module 16, this second The feelings communicated further through new module (such as: the second pipeline module 17) with from port interface module 12 across clock module 16 Condition can also include: next stage arbitration modules 15 communicated with new functional module (such as: the second pipeline module 17) after, lead to Cross second across clock module 16 with being communicated from port interface module 12 the case where.Correspondence between specific three is by reality The functional module of needs in determines that the embodiment of the present invention is with no restriction.

Particularly, second in the embodiment of the present invention across clock module 16 can be at least one, specific quantity also by The case where practical application, determines that the embodiment of the present invention is with no restriction.

It should be noted that the second function across clock module 16 and implementation and the first function across clock module 13 Identical as implementation principle, details are not described herein again.

Optionally, as shown in figure 12, AHB main line further include: the second pipeline module 17；Next stage arbitration modules 15 pass through Second pipeline module 17 is communicated with from port interface module 12.

Arbitration modules 11 are used for according to preset table, really by next stage arbitration modules 15 and from port interface module 12 Fixed corresponding with the access address first from port and this first from the effective address of port, and pass through the next stage arbitration modules 15 send this first from the effective address of port, visit order and access data to this second across clock module 16.

Second pipeline module 17, for by first from the effective address of port, visit order and access data according to when Sequence is exported to first from port.

From port interface module 12, it is also used to transmit the second pipeline module 17 according to the first of sequential export from port Effective address, visit order and access data according to sequential export to first from port, for this first from port according to timing Correct first from the effective address and visit order of port, accesses operation to access data.

It should be noted that next stage arbitration modules 15 are led to by the second pipeline module 17 with from port interface module 12 The case where letter, comprising: next stage arbitration modules 15 are communicated with the second pipeline module 17, second pipeline module 17 again with from The case where port interface module 12 communicates, further includes: next stage arbitration modules 15 are communicated with the second pipeline module 17, this second The feelings that pipeline module 17 is communicated further through new module (such as: second across clock module 16) with from port interface module 12 Condition can also include: next stage arbitration modules 15 communicated with new functional module (such as: second across clock module 16) after, lead to Cross the case where the second pipeline module 17 from port interface module 12 with communicating.Correspondence between specific three is by reality The functional module of needs in determines that the embodiment of the present invention is with no restriction.

Particularly, the second pipeline module 17 in the embodiment of the present invention can be at least one, specific quantity also by The case where practical application, determines that the embodiment of the present invention is with no restriction.

It should be noted that the function of the function of the second pipeline module 17 and implementation and the first pipeline module 14 Identical as implementation principle, details are not described herein again.

Optionally, illustrative as shown in figure 13, data access device 1 further include: AHB conversion module 18；AHB conversion Module 18 is communicated with from port interface module 12.

AHB conversion module 18, for parse by from the received visit order of port interface module 12 and access data.

As shown in figure 14, by taking the signal in AHB agreement as an example, illustrate the control implementation process of AHB conversion module 18: control Delay time register stores newest control signal, the i.e. signal connected in Figure 13 always；Parsing output read-write be by Control signal, which is done, to be exported after logic judgment, for example write signal is HSEL is 1, HTRANS 10, and HWRITE is exported when being 1 It is 1, otherwise output is 0；There is no return course that can finish if it is write operation；If it is read operation, when data return HREADY is controlled by selection, only HREADY signal is 0 when receiving read command and not returning.

It should be noted that above-mentioned signal is signal defined in AHB agreement, no longer it is described in detail herein.

It is understood that AHB interface is converted to memory interface functions by AHB conversion module 18, efficiently solve from Parsing problem of the port to AHB signal.Specific AHB conversion module 18 realizes two kinds of conversion regimes, and one kind is AHB modulus of conversion AHB interface is converted to the memory interface without flow control by block 18, and this mode does not allow to guarantee read-write operation from port backpressure It can be properly received, be chiefly used in chip internal register configuration；Another kind is that AHB interface is converted to band by AHB conversion module 18 The memory interface of flow control, this mode allow to initiate flow control when cannot receive read-write operation from port, and configuration stream will be kept It is eliminated to flow control, is chiefly used in chip exterior access, such as DDR 3 etc..User using when needed to select both sides according to project One of formula, the embodiment of the present invention is with no restriction.

Optionally, illustrative as shown in figure 15, data access device 1 further include: master port selecting module 19；Master port Interface module 10 is communicated with the master port selecting module 19.

Master port selecting module 19, for determining the first master port communicated with arbitration modules 11 from multiple master ports, To realize that the AHB data of first master port and the arbitration modules 11 are transmitted.

Specifically, master port selecting module 19 is for there is the case where more master ports, which can be used Realize the arbitration of above-mentioned multiple master ports, one master port of conclusive judgement controls data access device.

Illustratively, the embodiment of the present invention can realize the selection of multiple master ports by the way of select signal, this Kind mode is relatively easy reliable, can be the structural schematic diagram of master port selecting module 19, with 4 with arbitrary extension, as shown in figure 16 For a host mode, form an association when select is 2, master port selecting module 19 just gates host 2, so that host 2 is corresponding Master port is connected to AHB interface.

It is understood that it is illustrative as shown in figure 17, it is a kind of integrated stand that may be implemented of data access device 1 Structure block diagram, the modules in the embodiment of the present invention pass through top layer and interconnect, so that it may realize the connection of arbitrary data access mechanism 1 Mode.The data access device 1 that the specific embodiment of the present invention proposes builds mode, the module that will be proposed in above example Connected in the way of Fig. 1, so that it may realize any number of master ports, it is any number of from port, any bus number of plies, appoint Data access device of the meaning across clock, and do not need to write new code.User can cut randomly according to the actual demand of oneself, Solve the problems, such as that port and the number of plies are restricted.

A kind of data access device provided by the embodiment of the present invention, the data access device may include: that master port connects Mouth mold block is used for transmission the access request of the first master port transmission and carries access address to arbitration modules, in the access request, visits Ask order and access data；Arbitration modules are used for according to preset table, by determining and access address pair from port interface module First answered from port and this first from the effective address of port, and send this and first ordered from the effective address of port, the access It enables and the access data is extremely from port, wherein arbitration modules are generated according to preset table, which includes bus ginseng Number；From port interface module, the first of arbitration modules transmission is used for transmission from the effective address of port, visit order and access number According to first from port, for this first from port according to this first from the effective address and visit order of port, to access number According to the operation that accesses.When being carried out data transmission using above-mentioned data access device, since arbitration modules are given birth to by preset table At, the rewriting of arbitration modules is no longer carried out by user's manual coding, therefore, is solved in monster chip project due to data The problem that code maintenance task amount is big, manual coding is error-prone caused by access mechanism port is more, change is frequent, so as to letter It is clean to effectively realize data access device, improve the reliability of data access device.

Embodiment two

The embodiment of the present invention provides a kind of data access method, and as shown in figure 18, this method may include:

S101, data access device receive the access request that the first master port is sent, and carry access in the access request Location, visit order and access data.

It should be noted that the data access device in the embodiment of the present invention can be ahb bus.

S102, data access device according to preset table, determine corresponding with access address first from port and first from The effective address of port.

S103, data access device send first from the effective address of port, visit order and access data to first from Port, for this first from port according to the first effective address from port and the visit order, access data are visited Ask operation.

It should be noted that data access device can complete master port and any secondary from the arbitrary address between port The address and path from port that sanction and multi-path choice function, i.e. arbitration master port access request.In the embodiment of the present invention Arbitration modules be by preset table generate code realize module.The preset table includes bus parameter, illustratively, Bus parameter may include: to join from port name, from the address bit wide of port, from address range of port etc. in preset table Number.Specifically, detecting the bus parameter in preset table using the VB script in preset table, generated according to bus parameter secondary Block code is cut out, realizes the function of arbitration modules.

Further, the data access device in the embodiment of the present invention selects design method using high address, due to data The access address carried in the access request that access mechanism receives is some full address from port to be accessed, but from end The effective address of mouth not necessarily takes the full address bit wide, therefore, in the embodiment of the present invention, passes through the high position for differentiating access address The value of address come by from port interface module determine from port first from port, this first from port be the first master port Want to access from port.

It should be noted that master port connection and the slave of data access device and host in the embodiment of the present invention From port connect, the access by data access device is exactly the access that host carries out slave.

Specifically, being the host of the address 20bit with full address bit wide, for accessing 10bit slave, in the embodiment of the present invention It only needs to judge 11bit logic using high position selection design.As shown in Fig. 2, being full address schematic diagram, as can be known from Fig. 2: piece choosing Each bit of the numerical value of bit can be 0,1 or Z.Wherein, piece select bit refer in address beyond it is minimum from port The part of location bit wide.Entire address allocation procedure in the embodiment of the present invention can be with are as follows: data access device is according to minimum from end Full address is divided into 2n parts (n is the number that piece selects bit) by port address size, each also big according to Self address from port It is small to occupy 2k (k is the number that piece selects Z in bit) minimums from port module address bit wide.Do not have as chankings selects in bit Z then only takes up a minimum from port module address bit wide, and it is Z that such as chankings, which selects bit lowest order, then occupy 2 minimums from Port module address bit wide then occupies 4 minimums from port module address bit wide, such as if chankings selects bit minimum two as Z Chankings selects bit minimum three as Z, then occupies 8 minimums from port module address bit wide, and so on.In this way, data are visited Ask that device can be determined by judging the bit value of upper address bits (piece selects bit) to be accessed first from port.

Wherein, it is Z that piece, which selects a certain bit in bit, indicates to occupy the address that the bit is 0 and 1, simultaneously The bit lower than the bit is all necessary for Z；Each 2k minimum space can only be occupied from port.If being unsatisfactory for the two Condition, then the access address for illustrating that data access device obtains is not any one address from port, therefore, by the access Location is idle, while the corresponding module of the access address is sky.

Illustratively, it is assumed that total address space size of data access device is 1MB, minimum from port pcie_brg_csr 4KB, it is maximum from port pcie_ep_bkend be 64KB.Therefore, " bus byte address bit wide " is 20；It is " minimum from module word Save land location bit wide " it is 12；" maximum from module byte address bit wide " is 16.For from port pcie_brg_csr, address space Size is 4KB, and " byte address bit wide " fills out 12, only take up a lowest address space, and specified " byte chip select address range " is 8'b0000_0000.From port in the practical address assigned to of data access device as shown in figure 3, " Z " indicate can also be with for 0 It is 1, i.e., high 8bit is that the address of 8 ' b0000_0000 can all be addressed to slave end mouth.

Further, data access device judges that access address corresponds to first behind the address of port, the data access First in addition to upper address bits is sent to from the effective address of port from port by device.

It is understood that the data access device in the embodiment of the present invention is substantially reduced using high address selection design Combinational logic amount when arbitration and multi-path choice, and data access device uses passive response mode, then guarantees that the data are visited Ask that device will not be hung dead because some is not responded to extremely from port.

Specifically, data access device by first from the effective address of port, visit order and access data according to timing Output is ordered according to timing correct first from the effective address of port and access to described first from port, for first from port It enables, accesses operation to access data.

It should be noted that data access device can also complete the pipeline function of AHB interface, transparent transmission assembly line two sides Interface transport-type, when chip rear end, comprehensive timing is not achieved, using data access device come Improving Working Timing, when use, is only needed Setting address bit wide parameter, so that it may avoid the situation for occurring sequential logic mistake in data transmission procedure.

Specifically, mentality of designing are as follows: the thinking of usual pipeline module be inserted directly into level-one register, as shown in figure 8, But for AHB agreement, the mode of common pipeline module will cause error in data, so we have proposed use data The mode of the pipeline module of latch.Illustratively as shown in figure 9, being the design frame chart of the first pipeline module.It is assisted according to AHB View, each operation of AHB need feedback of shaking hands, and the mode of common pipeline module can not shake hands, and will cause timing mistake Disorderly.And the mode for the AHB pipeline module that the embodiment of the present invention proposes is specifically by taking A sends out read request to B as an example, to by this The data transmission of one pipeline module is illustrated: data latch module latches newest valid data A always；First assembly line Module is defaulted as significant response to the response of data A；After A issues new visit order, it is data A that control selections A, which is exported to B, Signal, it is to be not responding to signal that control selections B, which is exported to A,；It is data A that control selections A, which is exported to B, if data B is not responded to Latch data；It is data A that control selections A, which is exported to B, after equal pending datas B response；Again wait for control selections B after data B is responded Exporting to A is response signal.

Further, as shown in figure 19, before S103, i.e., data access device send first from the effective address of port, Visit order and access data to first before port, a kind of data access method provided in an embodiment of the present invention further include: S104.It is specific as follows:

S104, data access device are according to preset table, by first from the effective address of port, visit order and access number Clock domain where switching to first from port according to the clock domain at place, to realize with first in different clock-domains from port Docking.

It is understood that data access device can also complete clock domain handoff functionality, appointing for AHB interface can be supported The conversion anticipated between bit address, any clock domain.

Optionally, across the clock module function of data access device can use two kinds of implementations: FIFO, mode and different Walk handshake method.

Specifically, data access device in the embodiment of the present invention using first across clock module across time clock feature, this One design frame chart across clock module illustratively can be for shown in Fig. 6, source clock (clock domain where access request) be initiated Read-write requests are deposited as read and write FIFO, and selecting module completely reads the request of FIFO according to the sky of FIFO, and is converted to AHB association View is output to purpose clock domain, by the response of purpose clock domain back to completion response FIFO, and returns to source clock domain AHB。

Further, overtime protection is arranged in first of the data access device in the embodiment of the present invention the across clock module inside Mechanism, the overtime protection mechanism are used to monitor the response time, will not tangle bus because of not responding to；Principal and subordinate port is arranged to pass Defeated type separation mechanism, to do not support burst from port, still can permit master port and configured with burst mode, improved total The configured rate of line.Its protected mode is specifically, if it exceeds preset time is operated still without completion, then by a specific data Completion issue completion response FIFO, it is dead to guarantee that the AHB of source clock domain will not be hung.

It should be noted that the intermodule in the embodiment of the present invention is all attached by AHB interface, and data access fills Set that received access data must be and want received consistent from the clock domain of port, the AHB that could be connect with slave end mouth connects Mouthful (from port interface) is to connecting.

Correspondingly, S103 can be corresponding with S104, it is specific as follows:

S103, data access device send after switching clock domain first from the effective address of port, visit order and visit Ask data to first from port.

Further, as shown in figure 20, before S101, i.e., the access that data access device receives that the first master port is sent is asked Before asking, a kind of data access method provided in an embodiment of the present invention further include: S105.It is specific as follows:

S105, data access device determine the first master port from multiple master ports.

Data access device can be realized by master port selecting module 19 determines the first master port from multiple master ports.

It is understood that it is illustrative as shown in figure 17, it is a kind of integrated stand that may be implemented of data access device Structure block diagram, the modules in the embodiment of the present invention pass through top layer and interconnect, so that it may realize the connection of arbitrary data access mechanism Mode.The data access device that the specific embodiment of the present invention proposes builds mode, the module that will be proposed in above example Connected in the way of figure, so that it may realize any number of master ports, it is any number of from port, any bus number of plies, appoint Data access device of the meaning across clock, and do not need to write new code.User can cut randomly according to the actual demand of oneself, Solve the problems, such as that port and the number of plies are restricted.

Further, as shown in figure 21, after S102, before S103, i.e., data access device is determined according to preset table Corresponding with access address first from port and first after the effective address of port, data access device sends first from end Mouthful effective address, visit order and access data to described first before port, a kind of number provided in an embodiment of the present invention According to access method further include: S106.It is specific as follows:

S106, data access device parsing visit order and access data.

Data access device parses visit order and access data using AHB conversion module 18.

It is understood that AHB interface is converted to memory interface functions by AHB conversion module, efficiently solve from end Parsing problem of the mouth to AHB signal.Specific AHB conversion module realizes two kinds of conversion regimes, and one kind is that AHB conversion module will AHB interface is converted to the memory interface without flow control, and this mode does not allow to guarantee that read-write operation can be just from port backpressure It really receives, is chiefly used in chip internal register configuration；AHB interface is converted to depositing with flow control for AHB conversion module by another kind Memory interface, this mode allow to initiate flow control when cannot receive read-write operation from port, and configuration stream will remain to flow control and disappear It removes, is chiefly used in chip exterior access, such as DDR 3 etc..User using when needed to select one of both modes according to project, this Inventive embodiments are with no restriction.

Further, data access device transmission accesses the corresponding access operation of order to access data, and transmits The response of the visit order is to the first master port.

Further, data access device transmission is not responding to the access operation of visit order.

Further, after data access device does not receive the response to visit order, which is received Access request next time, and access request carries out access operation next time next time according to this.

It is understood that illustrative, when host sends read command to a slave, slave restoring is being not responding to At this moment the case where read command, hangs dead situation there have been data access device, at this point, due to the number in the embodiment of the present invention Passive response mode is used according to the arbitration modules of access mechanism, therefore, if the arbitration modules of data access device are passing through main side When mouth interface module receives the access request next time of transmission, arbitration modules abandon this access request, start to process next Secondary access request.It handles in this way, avoids arbitration modules always in order to wait through the response from port interface module transfer, and So that data access device occurs hanging the generation of dead situation.

Specifically, arbitration modules can realize that above-mentioned passive response mode can evade data access device by state machine Hang dead problem.As shown in figure 4, being state machine flow chart diagram.The responding process of the visit order of one normal AHB are as follows: data The arbitration modules of access mechanism are initially in idle state, can be to mandamus after receiving access request (visit order) State switching, after which is responded, which is switched to data mode by idle state, after access data are responded It is switched to completion status again, eventually passes back to idle state, realizes the arbitration transmission of an AHB.When slave occurs abnormal, visit It asks that order and access data may not be responded, if host is waiting always the response of slave at this time, does not also have in AHB agreement The maximum waiting time is provided, that bus will be in extension death situation state.In order to without prejudice to AHB agreement, while it can solve this again Problem, the arbitration modules in the embodiment of the present invention increase the judgement for whether having access request next time, if host can It waits, can infinitely wait for a long time, if host is not desired to wait, access request next time, state machine can be initiated again It can be switched to idle state according to access request next time and start new access operation.So both can without prejudice to AHB agreement, It can solve again simultaneously and hang dead risk problem.

A kind of data access method provided by the embodiment of the present invention is asked by receiving the access that the first master port is sent It asks, access address, visit order and access data is carried in the access request；According to preset table, determining and access address pair First answered from port and this first from the effective address of port；First is sent from the effective address of port, visit order and visit Ask data to first from port, for this first from port according to first from the effective address and visit order of port, to access Data access operation.When being carried out data transmission using above-mentioned data access device, since arbitration modules are by preset table It generates, the rewriting of arbitration modules is no longer carried out by user's manual coding, therefore, solve in monster chip project due to number Problem more according to access mechanism port, code maintenance task amount is big, manual coding is error-prone caused by change frequently, so as to Data access device succinctly is effectively realized, improves the reliability of data access device.

It should be understood by those skilled in the art that, the embodiment of the present invention can provide as method, system or computer program Product.Therefore, the shape of hardware embodiment, software implementation or embodiment combining software and hardware aspects can be used in the present invention Formula.Moreover, the present invention, which can be used, can use storage in the computer that one or more wherein includes computer usable program code The form for the computer program product implemented on medium (including but not limited to magnetic disk storage and optical memory etc.).

The present invention be referring to according to the method for the embodiment of the present invention, the process of equipment (system) and computer program product Figure and/or block diagram describe.It should be understood that every one stream in flowchart and/or the block diagram can be realized by computer program instructions The combination of process and/or box in journey and/or box and flowchart and/or the block diagram.It can provide these computer programs Instruct the processor of general purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices to produce A raw machine, so that being generated by the instruction that computer or the processor of other programmable data processing devices execute for real The device for the function of being specified in present one or more flows of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions, which may also be stored in, is able to guide computer or other programmable data processing devices with spy Determine in the computer-readable memory that mode works, so that it includes referring to that instruction stored in the computer readable memory, which generates, Enable the manufacture of device, the command device realize in one box of one or more flows of the flowchart and/or block diagram or The function of being specified in multiple boxes.

These computer program instructions also can be loaded onto a computer or other programmable data processing device, so that counting Series of operation steps are executed on calculation machine or other programmable devices to generate computer implemented processing, thus in computer or The instruction executed on other programmable devices is provided for realizing in one or more flows of the flowchart and/or block diagram one The step of function of being specified in a box or multiple boxes.

The foregoing is only a preferred embodiment of the present invention, is not intended to limit the scope of the present invention.

Claims

1. a kind of data access device, which is characterized in that the data access device includes:

Primary port interfaces module is used for transmission the access request of the first master port transmission to arbitration modules, in the access request Carry access address, visit order and access data；

The arbitration modules are used for according to preset table, by corresponding with the access address from the determination of port interface module First from port and described first from the effective address of port, and sends the described first effective address from port, the access Order and the access data are to described first from port, wherein and the arbitration modules are generated according to the preset table, The preset table includes bus parameter；

It is described from port interface module, be used for transmission the arbitration modules are sent described first effective address from port, institute Visit order and the access data are stated to described first from port, for described first from port according to described first from port Effective address and the visit order, access operation to the access data；

Wherein, the arbitration modules, it is secondary for when receiving the access request next time of transmission by primary port interfaces module It cuts out module and abandons this access request, start to process access request next time；

Wherein, the data access device further include: first across clock module；The arbitration modules are by described first across clock Module is communicated with described from port interface module；

The arbitration modules are also used to send described first from the effective address of port, the visit order and the access number According to extremely described first across clock module；

Described first across clock module, for according to the preset table, by the arbitration modules send described first from end Mouthful effective address, the visit order and it is described access data where clock domain switch to described first where port Clock domain to realize and be in the described first docking from port of different clock-domains, and is sent described after switching clock domain First from the effective address of port, the visit order and the access data to described first from port；

It is described from port interface module, after being also used to transmit the switching clock domain that described first sends across clock module described the One from the effective address of port, the visit order and the access data to described first from port, for described first from Port according to switching clock domain after the described first effective address from port and the visit order, to switching clock domain after The access data access operation.

2. data access device according to claim 1, which is characterized in that the data access device further include: first Pipeline module；The arbitration modules are communicated with described from port interface module by first pipeline module；

The arbitration modules are also used to send described first from the effective address of port, the visit order and the access number According to extremely first pipeline module；

First pipeline module, for by described first from the effective address of port, the visit order and the access Data are according to sequential export to described first from port；

It is described from port interface module, be also used to transmit first pipeline module according to described the first of sequential export from end Mouthful effective address, the visit order and the access data to described first from port, so that described first from port root According to timing correctly the described first effective address from port and the visit order, access behaviour to the access data Make.

3. data access device according to claim 1, which is characterized in that the data access device further include: next Grade arbitration modules；The arbitration modules are communicated with described from port interface module by the next stage arbitration modules；

The arbitration modules, for according to the preset table, by next stage arbitration modules and described from port interface Module determines corresponding with the access address first from port and described first from the effective address of port, and pass through it is described under One instance arbitration module sends described first from the effective address of port, the visit order and the access data to described first From port.

4. data access device according to claim 3, which is characterized in that the data access device further include: second Across clock module；The next stage arbitration modules are communicated with described from port interface module by described second across clock module；

The arbitration modules, are also used to according to the preset table, described connect by the next stage arbitration modules and from port Determining corresponding with the access address first from port and described first from the effective address of port in mouth mold block, and passes through institute It states next stage arbitration modules and sends described first from the effective address of port, the visit order and the access data to described Second across clock module；

Described second across clock module, is used for according to the preset table, the institute that will be sent by the next stage arbitration modules State first from the effective address of port, the visit order and it is described access data where clock domain switch to described first from Clock domain where port to realize and be in the described first docking from port of different clock-domains, and sends switching clock Behind domain described first from the effective address of port, the visit order and the access data to described first from port；

It is described from port interface module, be also used to transmit second across clock module send switching clock domain after described first from The effective address of port, the visit order and the access data are to described first from port, so that described first from port According to switching clock domain after the described first effective address from port and the visit order, to switching clock domain after described in Access data access operation.

5. data access device according to claim 4, which is characterized in that the data access device further include: second Pipeline module；The next stage arbitration modules are communicated with described from port interface module by second pipeline module；

The arbitration modules, for according to the preset table, by next stage arbitration modules and described from port interface Module determines corresponding with the access address first from port and described first from the effective address of port, and pass through it is described under One instance arbitration module sends described first from the effective address of port, the visit order and the access data to described second Across clock module；

Second pipeline module, for by described first from the effective address of port, the visit order and the access Data are according to sequential export to described first from port；

It is described from port interface module, be also used to transmit second pipeline module according to described the first of sequential export from end Mouthful effective address, the visit order and the access data according to sequential export to described first from port, for described First from port according to timing correctly the described first effective address from port and the visit order, to the access data Access operation.

6. data access device according to any one of claims 1 to 5, which is characterized in that the data access device is also It include: Advanced High-Performance Bus AHB conversion module；The AHB conversion module is communicated with described from port interface module；

The AHB conversion module, for parsing by described from the received visit order of port interface module and the visit Ask data.

7. data access device according to claim 6, which is characterized in that the data access device further include: main side Mouth selecting module；The primary port interfaces module is communicated with the master port selecting module；

The master port selecting module, for determining first main side communicated with the arbitration modules from multiple master ports Mouthful, to realize that the AHB data of first master port and the arbitration modules are transmitted.

8. data access device according to claim 1, which is characterized in that

It is described from port interface module, be specifically used for transmission and the corresponding access behaviour of the visit order carried out to the access data Make to the arbitration modules；

9. data access device according to claim 8, which is characterized in that

It is described from port interface module, be also used to transmit the access operation for being not responding to the visit order；

The arbitration modules, be also used to not by it is described from port interface module receive the response to the visit order it Afterwards, receive the access request next time that sends by the primary port interfaces module, and according to the access request next time into Row passes through primary port interfaces module and the access operation next time from port interface module transfer.

10. a kind of data access method, which is characterized in that the data access method includes:

The access request of the first master port transmission is received, carries access address, visit order and access number in the access request According to；

According to preset table, determine corresponding with the access address first from port and described first from port effectively Location；

Described first is sent from the effective address of port, the visit order and the access data to described first from port, For described first from port according to the described first effective address from port and the visit order, to the access data into Row access operation；

Wherein, the access request for receiving the first master port and sending, comprising:

This access request is not being responded, when receiving the access request next time of transmission, abandons this access request, beginning Manage access request next time；

Wherein, described to send described first from the effective address of port, the visit order and the access data to described the One before port, the method also includes:

According to the preset table, by described first from the effective address of port, the visit order and access data institute Clock domain switch to described first from the clock domain where port, with realize with described first in different clock-domains from The docking of port；

Correspondingly, described send described first from the effective address of port, the visit order and the access data to described First from port, comprising:

Described first after switching clock domain is sent from the effective address of port, the visit order and the access data to institute First is stated from port.

11. data access method according to claim 10, which is characterized in that the described first having from port of the transmission Address, the visit order and the access data to described first are imitated from port, comprising:

By described first from the effective address of port, the visit order and the access data according to sequential export to described One from port, for described first from port according to timing correctly described first from the effective address of port and access life It enables, accesses operation to the access data.

12. 0 to 11 described in any item data access methods according to claim 1, which is characterized in that the first main side of the reception Before the access request that mouth is sent, the method also includes:

First master port is determined from multiple master ports.

13. data access method according to claim 12, which is characterized in that described according to preset table, determining and institute Access address corresponding first is stated from port and described first after the effective address of port, it is described to send described first from end Mouthful effective address, the visit order and the access data to described first before port, the method also includes:

Parse the visit order and the access data.