CN106445740A - Control method and control system for NAND flash memory data in solid state disk - Google Patents
Control method and control system for NAND flash memory data in solid state disk Download PDFInfo
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
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Abstract
The invention provides a control method and control system for NAND flash memory data in a solid state disk. Storage space of the solid state disk comprises multiple flash memories, wherein one memory is taken as first storage space, and the rest flash memories are taken as second storage space. The invention is characterized in that the control method comprises the steps that whether to-be-written data is important data is judged, wherein the to-be-written data will be written to a corresponding position in the second storage space if the data is not the important data, and the to-be-written data will be written to a corresponding position in the first storage space and the to-be-written data will be written to the corresponding position in the second storage space if the data is the important data; and whether new to-be-written data exists is judged, wherein the step of judging whether the to-be-written data is the important data will be started if the new to-be-written data exists, and the step will be ended if the new to-be-written data does not exist. The technical scheme provided by the invention has the advantages that a bit error rate of NAND FLASH can be effectively reduced; and data reliability of the storage system can be effectively enhanced.
Description
Technical field
The present invention relates to technical field of memory, in more particularly, to a kind of solid state hard disc the control method of nand flash memory data and
Control system.
Background technology
SSD (Solid State Disk) refers to the solid state hard disc forming using nand flash memory (Flash), its special feature
It is do not have frame for movement, using traditional NAND Flash characteristic, make the function of reading and writing in the way of block write and erasing,
Highly dependent upon the technical design of read-write therefore in the efficiency of read-write.SSD, compared with current conventional hard, has low consumption
Electric, shatter-proof, stability is high, low temperature resistant the advantages of.SSD upper due to data be to leave on semiconductor memory, can be less than one
In the time of millisecond, the memory element of optional position is completed with I/O (input/output) operation, therefore many application programs is being come
Say that in the most key I/O performance indications IOps (i.e. how many times IO action per second), SSD can reach the 50 of standard machinery hard disk
～800 times.
The advantage of SSD is mainly reflected in two aspects：Response time is short and read-write efficiency is high；SSD is with solid-state chip simultaneously
As storage medium, its work shock resistance reaches 15G (10～1000Hz), is 15 times of conventional hard, impact resistance reaches
To 1500G (0.5ms), it is 27 times of conventional hard, efficiently improves the stability of SSD.
In recent years, the production technology of 3D nand flash memory is significantly improved, and the memory capacity of nand flash memory was in the past ten
Increase more than 1,000 times in year, the growth of memory capacity has benefited from persistently reducing the processing procedure of flash memory and is continuously increased single storage
The memory capacity of unit.But it is accompanied by the growth of memory capacity, the reliability of nand flash memory and performance are but more and more lower, NAND
The probability of flash memory generation bit bit flipping is very high, and its bit error rate can reach 10-5Or more.The read-write error of 3D nand flash memory
It is not isolated, a read-write operation may cause the interference closing on Physical Page.As shown in figure 1, in nand flash memory, right
In the programming (programming unit A and B) of a Physical Page, not only can interfere with same physical block closes on Physical Page (programming unit
E), and can interfere with Z-direction close on physical location (programming unit C and D).
Content of the invention
Present invention seek to address that 3D nand flash memory bit error rate height leads to reliability and performance in solid state hard disc in prior art
Increasingly lower technical problem, provides the control method of nand flash memory data and control system in a kind of solid state hard disc.
Embodiments of the invention provide a kind of control method of nand flash memory data in solid state hard disc, described solid state hard disc
Memory space includes multiple flash memories, wherein one flash memory as the first memory space, remaining flash memory as the second memory space, its
It is characterised by：Described control method comprises the following steps：
Judge whether data to be written is significant data, if it is not, then writing in the relevant position of described second memory space
Enter described data to be written；
If so, write described data to be written in the relevant position of described first memory space, and described second
The relevant position of memory space writes described data to be written；
Judge whether new data to be written, if so, enter and described judge whether data to be written is important number
According to step；If it is not, end step.
Embodiments of the invention additionally provide a kind of control system of nand flash memory data in solid state hard disc, and described solid-state is hard
The memory space of disk includes multiple flash memories, and, as the first memory space, remaining flash memory is empty as the second storage for wherein one flash memory
Between, described control system includes：Data judge module, Backup Data writing module, general data writing module and end operation
Module；
Data judge module, for judging whether data to be written is significant data；
Backup Data writing module, for when data to be written is significant data, in described first memory space
Relevant position writes described data to be written；
General data writing module, the relevant position for described second memory space writes described data to be written；
End operation module, for end operation.
Technical scheme compared with prior art, has the beneficial effects that：By the storage in solid state hard disc is empty
Between be divided into the first memory space and the second memory space, when important flash data is stored in the second memory space, simultaneously will
Important flash data is backed up in the first memory space, can be effectively reduced the bit error rate of nand flash memory, effectively simultaneously
Strengthen the data reliability of storage system.
Brief description
Fig. 1 is the programming interference schematic diagram of NAND FLASH in prior art；
Fig. 2 is the schematic diagram of significant data and general data write operation order in 3D NAND FLASH of the present invention；
Fig. 3 is the schematic flow sheet of significant data and general data write operation in 3D NAND FLASH of the present invention；
Fig. 4 is the schematic flow sheet triggering garbage reclamation mechanism in 3D NAND FLASH of the present invention；
Fig. 5 is the schematic flow sheet of the garbage reclamation of significant data and general data in 3D NAND FLASH of the present invention；
Fig. 6 is the comparison schematic diagram of the bit error rate in 3D NAND FLASH of the present invention；
Fig. 7 is the control system composition structural representation of 3D nand flash memory data of the present invention；
Fig. 8 is the structure composition schematic diagram of garbage reclamation mechanism in 3D nand flash memory data control system of the present invention；
Fig. 9 is the structure composition schematic diagram of data write operation mechanism in 3D nand flash memory data control system of the present invention.
Specific embodiment
Embodiments of the invention are described below in detail, the example of described embodiment is shown in the drawings, wherein from start to finish
The element that same or similar label represents same or similar element or has same or like function.Below with reference to attached
The embodiment of figure description is exemplary it is intended to be used for explaining the present invention, and is not considered as limiting the invention.
Most of SSD adopt same method storage significant data and insignificant data now, simultaneously in data storage
The distribution of FLASH is that order selects FLASH, and order selects blank physical block.But it is as growth and the figure of SSD storage capacity
The programming interference of the NAND FLASH shown in 1, the probability of nand flash memory generation bit bit flipping is very high, and its bit error rate can reach
10-5 or more.And the control method of 3D nand flash memory data takes backup mainly for significant data in the SSD of the present invention
The method of storage, can effectively strengthen the data reliability of storage system.
Specifically, in one embodiment of the invention solid state hard disc nand flash memory data control method, wherein said solid-state
The memory space of hard disk includes multiple flash memories, and wherein one flash memory is Store_Import memory space as the first memory space,
Remaining flash memory is Store_Common memory space as the second memory space, and described control method comprises the following steps：
Judge whether data to be written is significant data, if it is not, then writing in the relevant position of described second memory space
Enter described data to be written；
If so, write described data to be written in the relevant position of described first memory space, and described second
The relevant position of memory space writes described data to be written；
Judge whether new data to be written, if so, enter and described judge whether data to be written is important number
According to step；If it is not, end step.
In being embodied as, Fig. 2 is that the flow process of the control method of one embodiment of the invention 3D nand flash memory data is illustrated
Figure, described control method comprises the following steps：
Step S100, when carrying out the write operation of data, first determines whether whether data to be write is significant data, if
It is then to enter step S200, if it is not, then entering step S300；
Step S200, controls the write operation carrying out data in Store_Import memory space, subsequently into step
S300；
Step S300, controls the write operation carrying out data in Store_Common memory space；And determine whether new
Data write, if so, then repeat the above steps；If it is not, end step.
Because the data/address bus of current Nand Flash is 8bit, maximum is provided that the reading rate of 25MB/s and 3MB/s
Writing rate it is clear that SSD provided that this speed to be user unacceptable, the commonly used multiple passages of current SSD controller with
When parallel work-flow multi-disc Flash, similar RAID0, such read or write speed can be greatly improved.In above example, excellent
Selection of land, SSD controller controls m*n FLASH, wherein m to represent Flash channel number, and n represents corresponding to Flash passage
FLASH number.First, SSD controller can select the FLASH corresponding to a FlASH passage as the thing of important data backup
Reason space S tore_Import memory space, other FLASH passages are as storage space S tore_Common of data storage
Memory space.That is, the backup of data when system is judged to significant data, will be carried out in Store_Import memory space.
In conjunction with concretely comprising the following steps of the write operation shown in Fig. 3, carrying out data in corresponding Store_Common memory space：
Step S310, when carrying out the write operation of data, obtains logical block according to the logical page number (LPN) of data to be write
Number and block in page deviation number；
Step S320, obtains the entrance physical block number of the corresponding physical block chain of described logical block number (LBN) according to default mapping table,
Wherein said physical block chain includes a basic block as entrance physical block and multiple replacement block for updating the data and delays
Rush block；
Step S330, judges that in block described in the corresponding basic block of described entrance physical block number, the corresponding Physical Page of page deviation number is
The no free time, if it is, entering step S370, if not, enter step S340；
Step S340, searches the whether available free Physical Page of each replacement block in described current physical block chain, if entering
Step S370, enters step S350 if not；
Step S350, searches the whether available free Physical Page of buffer stopper in described current physical block chain, if entering step
S370, enters step S360 if not；
Step S360, redistributes data block, replicates effective data page, using buffer stopper as new basic block, and to former
Basic block and replacement block carry out the erasing reclaimer operation of physical block；
Step S370, carries out the write of data in described free physical page.
Preferably, also, carry out in corresponding Store_Import memory space the concrete steps of write operation of data with
The concrete steps of the write operation carrying out data in corresponding Store_Common memory space are essentially identical, specially：
Step S210, when carrying out the write operation of data, obtains logical block according to the logical page number (LPN) of data to be write
Number and block in page deviation number；
Step S220, obtains the entrance physical block number of the corresponding physical block chain of described logical block number (LBN) according to default mapping table,
Wherein said physical block chain includes a basic block as entrance physical block and multiple replacement block for updating the data and delays
Rush block；
Step S230, judges that in block described in the corresponding basic block of described entrance physical block number, the corresponding Physical Page of page deviation number is
The no free time, if it is, entering step S270, if not, enter step S240；
Step S240, searches the whether available free Physical Page of each replacement block in described current physical block chain, if entering
Step S270, enters step S250 if not；
Step S250, searches the whether available free Physical Page of buffer stopper in described current physical block chain, if entering step
S270, enters step S260 if not；
Step S260, redistributes data block, replicates effective data page, using buffer stopper as new basic block, and to former
Basic block and replacement block carry out the erasing reclaimer operation of physical block；
Step S270, carries out the write of data in described free physical page.
In being embodied as, for SSD flash chip, if described SSD flash chip can be divided into dried layer, if every layer can be divided into
Dry row, and have some physical blocks in often going, each physical block has several Physical Page.
In step S210, S310, operating system sends write operation requests first, and storage management system calculates and patrols accordingly
Collect page deviation number offset in block log_block and block, in such as each physical block, have page_per_block=32 thing
Reason page, and write the logical page number (LPN) log_page=38 of data, its corresponding logical block number (LBN) log_block is log_page/page_
Per_block=38/36=1, in its corresponding piece, page deviation number offset is log_page%page_per_block=
38%36=2, then in step S220, S320, storage management system checks that logical block number (LBN) arrives the mapping table of physical block number, obtains
The entrance physical block of physical block chain must be corresponded to, i.e. physical block number phy_block of basic block.
In step S230, S330, each physical block chain only one of which basic block, this basic block is as the entrance thing of block chain
Reason block.Such as logical page number (LPN) is log_page, has page_per_block Physical Page, then in basic block in each physical block
In, logical page (LPAGE) is only stored in data on log_page%page_per_block Physical Page.
In step S240, S340 and step S250, in S350, each physical block chain has multiple replacement blocks and a buffering
Block, when data is updated, and when the corresponding Physical Page of basic block has data, then updates the data according to physical page number size,
Sequentially in write replacement block.That is when the Physical Page in basic block is carried out with data renewal, then update the data according to physics
Page number size, sequentially in write replacement block.In addition in the type of organization of physical block chain, by by the physical block in physical block chain
It is divided into basic block, replacement block and buffer stopper, for the logical page (LPAGE) frequently carrying out data renewal, the replacement block for updating the data can
Ensure that the effectively utilizes in space, decreasing erasing times and to because being replicated with during erasing imitating the time of data, carrying
The high performance of chip.
Some restrictions are had based on NAND FLASH, one is that it does not support local update, must be wiped before data write
Division operation.Two is that operation granularity is asymmetric：Read-write operation is all in units of page, and erasing operation must be in units of block.Therefore,
Further, as shown in figure 4, before carrying out the write operation of data, that is, before step S100, further comprising the steps of：
Step S010, checks and records the number of FLASH empty physical block；
Step S020, judges whether the number of FLASH empty physical block is less than default free block threshold values, if it is,
Enter step S030, if it is not, then entering step S100；
Step S030, carries out garbage reclamation to the plurality of flash memory.
Further, as shown in figure 5, the step of described garbage reclamation mechanism, specially：
Step S031, searches the most logical block of the corresponding number of physical block, and enters step S032；
Step S032, judges whether the data being write in this logical block is significant data, if it is, entering step
S033, if it is not, then enter step S035；
Step S033, is searching new blank physical block in Store_Import memory space, is patrolling described in order reading
Collect the corresponding physical block of block, and the data of latest update in the relative Physical Page of each physical block is write the phase of blank physical block
To in Physical Page, and enter step S034；
Step S034, corresponding for logical block physical block is wiped, the newly blank thing after the corresponding erasing of logical block simultaneously
Reason block；
Step S035, searches new blank physical block in Store_Common memory space, sequentially reads described logic
The corresponding physical block of block, and the data of latest update in the relative Physical Page of each physical block is write the relative of blank physical block
In Physical Page, and enter step S036；
Step S036, corresponding for logical block physical block is wiped, the newly blank thing after the corresponding erasing of logical block simultaneously
Stream block.
In conjunction with shown in Fig. 6 it is assumed that the memory capacity of each Physical Page (Physical Page) is 2Kbytes (i.e. 16384
Bit), the bit error rate of nand flash memory is 10-5, and come using the ECC of SECDED (error code correction, two error code error detections)
Detection and correction error code.
So, Fig. 6 (a) illustrates the situation on a Physical Page more than an error code, in this case, physics
Page P0 is not provided that correct data, and the probability that it occurs is 1.20*10-2.If this Physical Page saves significant data, occur
Error code will directly influence the normal work of nand flash memory storage system.
Fig. 6 (b) illustrates Physical Page P0 more than an error code, and its redundancy backup Physical Page P1 has less than two mistakes
The situation of code.It is appreciated that Physical Page P0 here is located at Store_Common storage sky according to the above embodiments of the present invention
Between physical block in, Physical Page P1 be located at Store_Import memory space physical block in, memory space utilize Physical Page P1
This redundancy backup, even if data cannot be read from Physical Page P0, Physical Page P1 still can provide just data.This situation
The probability occurring is 1.19*10-2, it has been approximately equal to the probit of situation (a).
We also note that, even if Physical Page and its redundancy backup Physical Page have the error code of two, we still have
Chance carries out error correction.The error code that Fig. 6 (c) illustrates Physical Page P2 occurs position and the error code of its redundancy backup P3 position to occur not
Two Physical Page just can all be carried out error correction using simple xor operation by same situation.For situation Fig. 6 (d), Wo Menke
At least to detect the error code of two.And the probability occurring in Fig. 6 (e) is 9.6714*10-13.
Above example illustrates, can effectively strengthen the data reliability of storage system using redundancy backup, can be effectively
Reduce the bit error rate of NAND FLASH.
In being embodied as, as shown in fig. 7, the present invention also provides a kind of control system of 3D nand flash memory data in SSD
System, described control system includes：Data judge module 10, Backup Data writing module 20, general data writing module 30 and knot
Bundle operation module 40；
Data judge module 10, for judging whether data to be write is significant data；
Backup Data writing module 20, when being judged as significant data for data judge module, it is right that significant data is write
The corresponding position of Store_Import memory space answered；
General data writing module 30, is used for writing data into the corresponding position of corresponding Store_Common memory space
Put；
End operation module 40, for end operation step.
Further, in conjunction with shown in Fig. 9, described Backup Data writing module 20 and general data writing module 30 are respectively all
Including signal generating unit 21,31, mapping relations set up unit 22,32, determining unit 23,33, and 30, write operation unit 24,34, write
Enter to search allocation unit 25,35, data allocation unit 26,36 and erasing reclaimer operation unit 27,37.
Signal generating unit 21,31, for when carrying out the write operation of data, obtaining according to the logical page number (LPN) of data to be write
Page deviation number in logical block number (LBN) and block；
Mapping relations set up unit 22,32, correspond to physical block for obtaining described logical block number (LBN) according to default mapping table
The entrance physical block number of chain, wherein said physical block chain include a basic block as entrance physical block and multiple for updating
The replacement block of data；
Determining unit 23,33, for judging page deviation number pair in block described in the corresponding basic block of described entrance physical block number
Answer Physical Page whether idle or whether there are valid data, if it is, entering write operation unit 24,34, if not, enter writing
Enter to search allocation unit 25,35；
Write operation unit 24,34, for carrying out the write of data in described free physical page；
Whether allocation unit 25,35 is searched in write, available free for searching each replacement block in described current physical block chain
Physical Page, if it is, entering write operation unit 24,34, if it is not, then enter data allocation unit 26,36；
Data allocation unit 26,36, whether there is free physical for searching the buffer stopper in described current physical block chain
Page, if it is, entering write operation unit 24,34, if not, redistributing data block, replicates effective data page, with buffer stopper
As new basic block, and enter described erasing reclaimer operation unit 27,37；
Erasing reclaimer operation unit 27,37, for carrying out the erasing reclaimer operation of physical block to former basic block and replacement block.
In being embodied as, for 3D flash chip, if described 3D flash chip can be divided into dried layer, every layer can be divided into some
OK, and often there are some physical blocks in going, each physical block has several Physical Page.
In signal generating unit, operating system sends write operation requests first, and signal generating unit calculates corresponding logical block number (LBN)
There is page_per_block=32 Physical Page in page deviation number offset in log_block and block, such as each physical block, and
Write the logical page number (LPN) log_page=38 of data, its corresponding logical block number (LBN) log_block is log_page/page_per_
Block=38/36=1, in its corresponding piece, page deviation number offset is log_page%page_per_block=38%36
=2, then mapping relations set up module 20 and check that logical block number (LBN) arrives the mapping table of physical block number, obtain entering of corresponding physical block chain
Mouth physical block, i.e. physical block number phy_block of basic block.
Set up in unit in mapping relations, each physical block chain only one of which basic block, this basic block enters as block chain
Mouth physical block.Such as logical page number (LPN) is log_page, has page_per_block Physical Page, then in base in each physical block
In this block, logical page (LPAGE) is only stored in data on log_page%page_per_block Physical Page.Each physical block chain has multiple
Replacement block, when data is updated, and when the corresponding Physical Page of basic block has data, then updates the data big according to physical page number
Little, sequentially in write replacement block.That is when the Physical Page in basic block is carried out with data renewal, then update the data according to thing
Reason page number size, sequentially in write replacement block.In addition in the type of organization of physical block chain, by by the physics in physical block chain
Block is divided into basic block and replacement block, and for the logical page (LPAGE) frequently carrying out data renewal, the replacement block for updating the data can be protected
Demonstrate,prove the effectively utilizes in space, having decreased erasing times and to because being replicated with during erasing imitating the time of data, improve
The performance of chip.
In determining units, if the offset Physical Page in phy_block is idle, write number in this Physical Page
According to；Otherwise, sequentially search the whether available free Physical Page of replacement block in current physical block chain.If leisureless thing in block chain
Reason page, then distribution free physical block is to current physical block chain.Newly assigned free physical block is put in current physical block chain
Tail end, and on first Physical Page of described free physical block write data.
Preferably, described control system also includes a control module, for selecting corresponding to wherein one FlASH passage
FLASH be labeled as Store_Import memory space, the corresponding FLASH of other FLASH passage is labeled as Store_
Common memory space.When writing data, data is divided into significant data and general data, and general data is stored in Store_
In Common memory space, significant data should be stored in Store_Common memory space, also Store_ to be stored in
In Import memory space.When significant data updates, the data storage method of renewal is also such.
Further, described control system also includes acquisition module 101, comparison module 102, returns module 104 and rubbish
Rubbish recycling module 103；
Acquisition module 101, for the number of acquisition and recording flash empty physical block；
Whether comparison module 102, for comparing the number of FLASH empty physical block less than default free block threshold values；
Garbage reclamation module 103, for when comparison module output result is to be, carrying out rubbish to the plurality of flash memory and returning
Receive；
Return module 104, for when comparison module output result is to be, entering data judge module 10.
Specifically, described garbage reclamation module 103 includes searching judging unit, and Backup Data reads performance element, backup
Data wipes unit, and general data reads performance element and general data erasing unit；
Search judging unit, for when comparison module output result is to be, searching the corresponding number of physical block most
Logical block, and judge whether the data being write in this logical block is significant data；
Backup Data reads performance element, for searching new blank physical block in described first memory space, sequentially
Read the corresponding physical block of described logical block, and the data of latest update in the relative Physical Page of each physical block is write blank
In the relative Physical Page of physical block；
Backup Data wipes unit, for wiping the corresponding physical block of logical block in described first memory space；
General data reads performance element, for searching new blank physical block in described second memory space, sequentially
Read the corresponding physical block of described logical block, and the data of latest update in the relative Physical Page of each physical block is write blank
In the relative Physical Page of physical block；
General data wipes unit, for wiping the corresponding physical block of logical block in described second memory space.
In above-mentioned garbage reclamation mechanism, first look at whether the corresponding data of this logical block is significant data, if
It is significant data, first in Store_Import memory space, read the physics in all physical blocks corresponding to logical block
The latest data of page, by the number on all physical blocks in blank block new for the data reading write, corresponding to erasing logical block
According to logical block corresponding blank physical block simultaneously.Then, in Store_Common memory space, read the institute corresponding to logical block
There is the latest data of the Physical Page in physical block, by blank block new for the data reading write, wipe corresponding to logical block
Data on all physical blocks, logical block corresponding blank physical block simultaneously.If not significant data, only need to be in Store_
In Common memory space, read the latest data of the Physical Page in all physical blocks corresponding to logical block, the number that will read
According to writing in new blank block, wipe the data on all physical blocks corresponding to logical block, simultaneously logical block corresponding blank thing
Reason block.
The control method of 3D nand flash memory data and control system in the 3SSD of the present invention, by drawing NAND FLASH
It is divided into Store_Import memory space and Store_Common memory space, important flash data is stored in Store_
Import memory space is backed up, and can be effectively reduced the bit error rate of NAND FLASH, effectively strengthens storage system simultaneously
Data reliability.
In the description of this specification, reference term " embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or the spy describing with reference to this embodiment or example
Point is contained at least one embodiment or the example of the present invention.In this manual, to the schematic representation of above-mentioned term not
Identical embodiment or example must be directed to.And, the specific features of description, structure, material or feature can be in office
Combine in an appropriate manner in one or more embodiments or example.Additionally, in the case of not conflicting, the skill of this area
The feature of the different embodiments described in this specification or example and different embodiment or example can be tied by art personnel
Close and combine.
Although embodiments of the invention have been shown and described above it is to be understood that above-described embodiment is example
Property it is impossible to be interpreted as limitation of the present invention, those of ordinary skill in the art within the scope of the invention can be to above-mentioned
Embodiment is changed, changes, replacing and modification.
Claims (10)
1. in a kind of solid state hard disc nand flash memory data control method, the memory space of described solid state hard disc includes multiple sudden strains of a muscle
Deposit, wherein one flash memory as the first memory space, remaining flash memory as the second memory space it is characterised in that：Described control
Method comprises the following steps：
Judge whether data to be written is significant data, if it is not, then writing institute in the relevant position of described second memory space
State data to be written；
If so, write described data to be written in the relevant position of described first memory space, and in the described second storage
The relevant position in space writes described data to be written；
Judge whether new data to be written, if so, enter and described judge whether data to be written is significant data
Step；If it is not, end step.
2. control method according to claim 1 it is characterised in that：In the write of the relevant position of described second memory space
The step of described data to be written or the step writing described data to be written in the relevant position of described first memory space, tool
Body is：
Page deviation number in logical block number (LBN) and block is obtained according to the logical page number (LPN) of data to be written；
Obtain the entrance physical block number of the corresponding physical block chain of described logical block number (LBN), wherein said physical block according to default mapping table
Chain includes a basic block as entrance physical block, multiple replacement block for updating the data and buffer stopper；
Judge in block described in the corresponding basic block of described entrance physical block number, whether the corresponding Physical Page of page deviation number is idle, if
It is to carry out the write of described data to be written；
If not, search the whether available free Physical Page of each replacement block in described current physical block chain, if it is, in the described free time
Carry out the write of described data to be written in Physical Page；
If it is not, then the buffer stopper searched in described current physical block chain whether there is free physical page, if it is, in described sky
Carry out the write of described data to be written in not busy Physical Page；If it is not, then redistributing data block, replicate effective data page, with
Buffer stopper is as new basic block, and former basic block and replacement block are carried out with the erasing reclaimer operation of physical block.
3. control method as claimed in claim 1 it is characterised in that：Judging whether data to be write is significant data
Before step, also include step：
Check the number of described flash memory empty physical block；
Whether the number judging described flash memory empty physical block is less than default free block threshold values；
If so, garbage reclamation is carried out to the plurality of flash memory；
If it is not, then entering the step whether described judgement data to be write is significant data.
4. control method as claimed in claim 3 it is characterised in that：Described garbage reclamation is carried out to the plurality of flash memory, tool
Body includes：
Search the most logical block of the corresponding number of physical block；
Judge whether the data being write in this logical block is significant data；
If it is not, then directly searching new blank physical block in the second memory space, sequentially read the corresponding thing of described logical block
Reason block, and the data of latest update in the relative Physical Page of each physical block is write in the relative Physical Page of blank physical block,
Corresponding for logical block physical block is wiped, the new blank physical block after the corresponding erasing of logical block simultaneously；
If so, search new blank physical block in the first memory space, sequentially read the corresponding physical block of described logical block, and
The data of latest update in the relative Physical Page of each physical block is write in the relative Physical Page of blank physical block, by logical block
Corresponding physical block is wiped, the new blank physical block after the corresponding erasing of logical block simultaneously.
5. control method as claimed in claim 1 it is characterised in that：The memory space of described solid state hard disc includes m*n sudden strain of a muscle
Deposit, wherein m represents Flash channel number, n represents the FLASH number corresponding to Flash passage, m and n is just whole more than 1
Number.
6. in a kind of solid state hard disc nand flash memory data control system, the memory space of described solid state hard disc includes multiple sudden strains of a muscle
Deposit, wherein one flash memory as the first memory space, remaining flash memory as the second memory space it is characterised in that：Described control
System includes：Data judge module, Backup Data writing module, general data writing module and end operation module；
Data judge module, for judging whether data to be written is significant data；
Backup Data writing module, for when data to be written is significant data, corresponding in described first memory space
Position writes described data to be written；
General data writing module, the relevant position for described second memory space writes described data to be written；
End operation module, for end operation.
7. control system according to claim 6 it is characterised in that：Described Backup Data writing module and general data are write
Enter module and all include signal generating unit, mapping relations set up unit, determining unit, write operation unit, and allocation unit is searched in write,
Data allocation unit, and erasing reclaimer operation unit；
Signal generating unit, for obtaining page deviation number in logical block number (LBN) and block according to the logical page number (LPN) writing data to be written；
Mapping relations set up unit, for obtaining the entrance thing of the corresponding physical block chain of described logical block number (LBN) according to default mapping table
Reason block number, wherein said physical block chain includes a basic block as entrance physical block and multiple replacement for updating the data
Block and buffer stopper；
Determining unit, for judging that in block described in the corresponding basic block of described entrance physical block number, the corresponding Physical Page of page deviation number is
The no free time, if it is, when carrying out write operation, entering write operation unit, if not, when carrying out write operation, enter write
Search allocation unit；
Write operation unit, for carrying out the write of data in described free physical page；
Distribute module is searched in write, for searching the whether available free Physical Page of each replacement block in described current physical block chain, such as
Fruit is to enter write operation unit, if not, when carrying out write operation, entering data allocation unit；
Data allocation unit, whether there is free physical page for searching the buffer stopper in described current physical block chain, if it is,
Entering write operation unit, if not, redistributing data block, replicating effective data page, using buffer stopper as new basic block,
And enter described erasing reclaimer operation unit；
Erasing reclaimer operation unit, for carrying out the erasing reclaimer operation of physical block to former basic block and replacement block.
8. control system as claimed in claim 6 it is characterised in that：Described control system also includes acquisition module, compares mould
Block, returns module and garbage reclamation module；
Acquisition module, for checking the number of described flash memory empty physical block；
Whether comparison module, for judging the number of described flash memory empty physical block less than default free block threshold values；
Garbage reclamation module, for when comparison module output result is to be, carrying out garbage reclamation to the plurality of flash memory；
Return module, for when comparison module output result is to be, entering data judge module.
9. control system as claimed in claim 8 it is characterised in that：Described garbage reclamation module includes searching judging unit,
Backup Data reads performance element, and Backup Data wipes unit, and general data reads performance element and general data erasing unit；
Search judging unit, for when comparison module output result is to be, searching the most logic of the corresponding number of physical block
Block, and judge whether the data being write in this logical block is significant data；
Backup Data reads performance element, and for searching new blank physical block in described first memory space, order reads
The corresponding physical block of described logical block, and the data of latest update in the relative Physical Page of each physical block is write blank physical
In the relative Physical Page of block；
Backup Data wipes unit, for wiping the corresponding physical block of logical block in described first memory space；
General data reads performance element, and for searching new blank physical block in described second memory space, order reads
The corresponding physical block of described logical block, and the data of latest update in the relative Physical Page of each physical block is write blank physical
In the relative Physical Page of block；
General data wipes unit, for wiping the corresponding physical block of logical block in described second memory space.
10. control system according to claim 6 it is characterised in that：The memory space of described solid state hard disc includes m*n
Flash memory, wherein m represent Flash channel number, and n represents the FLASH number corresponding to Flash passage, m and n more than 1 is just
Integer.
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