CN106372356B - Modularized multi-level converter sub-module equalizing resistance Parameters design - Google Patents
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Abstract
The present invention relates to Modularized multi-level converter sub-module equalizing resistance Parameters design, firstly, setting up submodule starting/turn off process equivalent circuit, including storage capacitor, two diodes, draw-out power supply, secondary control circuit and equalizing resistance；Secondly, the mathematical formulae of submodule voltage change and discharge time is derived according to the equivalent circuit, different equalizing resistances are set and computational submodule repeatedly starting and stopping quantity reaches required charging time and capacitor discharge time when half, draw the relational graph of equalizing resistance and the charging time, discharge time；Then, the requirement of definite value is protected to obtain resistance value upper limit calculation formula according to " static direct current charging tolerance time " and " valve hall access control system blocking time after stoppage in transit "；Resistance finished product or customization resistance are finally chosen according to power and resistance value upper limit calculation formula.The present invention is directed to provide theoretical foundation and technical support to equalizing resistance parameter designing by Modularized multi-level converter sub-module equalizing resistance Parameters design.
Description
Technical field
The present invention relates to a kind of Modularized multi-level converter sub-module equalizing resistance Parameters designs.
Background technique
Submodule is the core devices of the flexible DC transmission engineering based on modularization multi-level converter, researches and develops and sets
Meter level directly affects the reliability of flexible DC transmission engineering.Submodule main devices include IGBT, storage capacitor, two secondary controls
Circuit processed, thyristor, by-pass switch, draw-out power supply, equalizing resistance etc..Equalizing resistance is connected in parallel on accumulation power supply both ends, on the one hand
Each submodule capacitor can be pressed in inverter start-up course, on the other hand serve as putting for capacitor after inverter stoppage in transit
Resistance.Equalizing resistance parameter directly affects capacitor voltage equalizing effect and discharge time, but there is no documents to introduce equal piezoelectricity at present
The selection principle of resistance, it is therefore necessary to advance a theory foundation and optimisation strategy to equalizing resistance parameter designing.
Two considerations of pressure and electric discharge that the Parameters design of equalizing resistance will have the function of from it, meet flexible direct current
Specific definite value requirement of the power transmission engineering to pressing and discharging.Existing research thinks equalizing resistance mainly from inverter startup stage
It is acted on to pressure, and since the resistance error of equalizing resistance is smaller, each submodule voltage is almost the same in startup stage.Such as text
Offer " modular multi-level flexible direct current suitable for wind-electricity integration starts control technology ", " modular multilevel formula flexible direct current
The precharge control strategy of current transmission device ", " the starting control strategy of Multi-end flexible direct current transmission system " etc. in the analysis change of current
Think that each submodule voltage is equal in device start-up course.Existing research thinks voltage sharing resistance value size to capacitor voltage equalizing effect
Larger impact is had no, but is known according to the flexible DC transmissions engineering actual operating data such as Nanhui, Xiamen put into operation: in inverter
Startup stage, each submodule capacitor voltage equalizing effect was poor, and part submodule even leads to repeatedly starting and stopping because of Voltage Drop, and existing
Theoretical analysis result is not inconsistent；And known according to test, equalizing resistance size directly affects capacitor voltage equalizing effect.Flexible direct current is defeated at present
Each submodule equalizing effect is poor when electrical engineering is due to inverter starting, is provided with " static direct current charging tolerance time " definite value and uses
Charging time when limiting inverter starting.Before the arrival of " static direct current charging tolerance time " definite value, the submodule of repeatedly starting and stopping
Half is not to be exceeded in number of blocks.Therefore the submodule quantity for needing to analyze repeatedly starting and stopping reaches the charging time needed for half and presses
The relationship of resistance makes equalizing resistance meet the requirement of " static direct current charging tolerance time ".On the other hand, electricity after inverter is stopped transport
Hold and discharged by equalizing resistance, forbids operation maintenance personnel to enter lower than inverter valve hall before safe threshold in residual voltage, therefore
Discharge time should meet the requirement lower than " valve hall access control system blocking time after stoppage in transit " definite value.
Summary of the invention
In view of this, the purpose of the present invention is to provide a kind of Modularized multi-level converter sub-module equalizing resistance parameters
Design method comprehensively considers submodule and presses and discharge both sides parameter request, mentions for submodule equalizing resistance parameter designing
For theoretical foundation and technical support.
To achieve the above object, the present invention adopts the following technical scheme: a kind of Modularized multi-level converter sub-module is equal
Piezoresistance Parameters design, which comprises the following steps:
Step 1: rated operational voltage, storage capacitor capacitance, draw-out power supply efficiency, the secondary control circuit of acquisition submodule
The specific value of power；
Step 2: according to the above numerical value, setting up submodule starting/turn off process equivalent circuit；
Step 3: determining the initial voltage of inverter start-up course Neutron module；
Step 4: the mathematical formulae of start-up course Neutron module capacitance voltage variation is derived according to the equivalent circuit；
Step 5: different voltage sharing resistance values being set, start-up course Neutron module repeatedly starting and stopping quantity is calculated and reaches one
Required charging time when half；
Step 6: drawing the relational graph of voltage sharing resistance value and the charging time；
Step 7: protecting definite value to determine voltage sharing resistance value upper limit formula 1 according to the inverter charging time；
Step 8: determining the initial voltage of inverter stoppage in transit process Neutron module；
Step 9: the mathematical formulae of stoppage in transit process Neutron module capacitor discharge time is derived according to the equivalent circuit；
Step 10: different voltage sharing resistance values being set, the discharge time of stoppage in transit process Neutron module capacitor is calculated；
Step 11: drawing the relational graph of voltage sharing resistance value and the discharge time；
Step 12: access control system blocking time protection definite value determines that the voltage sharing resistance value upper limit is public after being stopped transport according to inverter
Formula 2；
Step 13: according to voltage sharing resistance value upper limit formula 1 and voltage sharing resistance value upper limit formula 2, determining equalizing resistance
Upper limit value；
Step 14: equalizing resistance power is calculated according to the rated operational voltage of equalizing resistance upper limit value, submodule；
Step 15: being required to choose resistance finished product or customization resistance according to equal pressure drag value upper limit value and 3 times of power redundancies, finally
Sizing equalizing resistance parameter.
Further, specific calculating process is as follows:
Rated operational voltage, storage capacitor capacitance when acquisition submodule start-up course, draw-out power supply efficiency, secondary control
K-th of submodule starting/turn off process equivalent circuit of inverter is established after the specific value of circuit power, wherein draw-out power supply
Equivalent resistance is rk, voltage sharing resistance value R0, the resistance at capacitor both ends is connected in parallel on after conversion are as follows:
U in formulaCkFor the capacitance voltage of the submodule, RkFor the resistance for being connected in parallel on capacitor both ends after conversion, N is series connection
Submodule quantity, η be draw-out power supply efficiency, PkFor the power of secondary control circuit；
Since each submodule is connected in start-up course, the electric current i of each submodule is flowed intokIt is equal to bridge arm current i, according to base
You know Hough current law:
In t0To t1In time, submodule capacitor voltage variable quantity are as follows:
C is the submodule capacitor's capacity in formula；
Since DC bus-bar voltage is held essentially constant, each submodule capacitor voltage variable quantity summation is about zero:
Above formula simultaneous can obtain,
Submodule is calculated in t1The calculation formula of the capacitance voltage value at moment are as follows:
UCk(t1)=UCk(t0)+ΔUCk, k=1,2 ..., N
Each submodule capacitor voltage is obtained according to calculation formula using iteration mode, is become recording each submodule voltage
The quantity of statistic submodule repeatedly starting and stopping during change records its charging time when submodule repeatedly starting and stopping quantity reaches half
T50%, the requirement greater than " static direct current charging tolerance time " definite value should be met at this time；Since equalizing resistance is bigger, equalizing effect
Poorer, charging time T50%It is smaller, therefore voltage sharing resistance value upper limit formula 1 can be obtained:
TDC< T50%
T in formulaDCFor " static direct current charging tolerance time " definite value, T50%For the submodule quantity proportion of repeatedly starting and stopping
Time needed for reaching 50%；
During inverter is stopped transport, equalizing resistance can be used as the discharge resistance of capacitor, discharge time are as follows:
U in formula0For the rated operational voltage of submodule, UoffFor submodule safe voltage threshold values；
Discharge time should meet the condition that the capacitor in access control system blocking time answers discharge off, since equalizing resistance is got over
Greatly, discharge time is longer, therefore voltage sharing resistance value upper limit formula 2 can be obtained:
T in formulaoffFor " valve hall access control system blocking time after stoppage in transit " definite value；
According to voltage sharing resistance value upper limit formula 1 and formula 2, equalizing resistance upper limit value is determined；Simultaneously according to equalizing resistance
Upper limit value, submodule rated operational voltage calculate equalizing resistance power；According to equal pressure drag value upper limit value and 3 times of power redundancies
It is required that choosing resistance finished product or customization resistance, the final shaping equalizing resistance parameter.
Compared with the prior art, the invention has the following beneficial effects: the present invention, which comprehensively considers submodule, presses and discharges two
The parameter request of a aspect, the submodule quantity on the one hand analyzing repeatedly starting and stopping reach the charging time and equalizing resistance needed for half
Relationship, design method through the invention make equalizing resistance meet " static direct current charging tolerance time " definite value requirement, separately
Capacitor is discharged by equalizing resistance after one side inverter is stopped transport, and it is low that design method through the invention meets its discharge time
In the requirement of " valve hall access control system blocking time after stoppage in transit " definite value.It is mentioned through the invention for submodule equalizing resistance parameter designing
For theoretical foundation and technical support, the blank of equalizing resistance Parameters design missing is compensated for.
Detailed description of the invention
Fig. 1 is flow chart of the method for the present invention.
Fig. 2 is submodule starting/turn off process circuit model.
Fig. 3 is the equivalent circuit diagram of Fig. 2.
Fig. 4 is that start-up course process Neutron module repeatedly starting and stopping quantity reaches required charging time and equalizing resistance when half
Relationship.
Fig. 5 is the relationship of discharge time and equalizing resistance during stopping transport.
Fig. 6 is equalizing resistance parameter type-approval process.
Specific embodiment
The present invention will be further described with reference to the accompanying drawings and embodiments.
Fig. 1 is please referred to, the present invention provides a kind of Modularized multi-level converter sub-module equalizing resistance Parameters design,
The following steps are included:
Step 1: actual measurement is held according to rated operational voltage, the storage capacitor of submodule factory report acquisition submodule
The specific value of the parameters such as value, draw-out power supply efficiency, secondary control circuit power；
Step 2: according to the above parameter values, setting up submodule starting/turn off process equivalent circuit；
Step 3: determining the initial voltage of inverter start-up course Neutron module；
Step 4: the mathematical formulae of start-up course Neutron module capacitance voltage variation is derived according to the equivalent circuit；
Step 5: different voltage sharing resistance values being set, start-up course Neutron module repeatedly starting and stopping quantity is calculated and reaches one
Required charging time when half；
Step 6: drawing the relational graph of voltage sharing resistance value and the charging time；
Step 7: protecting definite value to determine voltage sharing resistance value upper limit formula 1 according to the inverter charging time；
Step 8: determining the initial voltage of inverter stoppage in transit process Neutron module；
Step 9: the mathematical formulae of stoppage in transit process Neutron module capacitor discharge time is derived according to the equivalent circuit；
Step 10: different voltage sharing resistance values being set, the discharge time of stoppage in transit process Neutron module capacitor is calculated；
Step 11: drawing the relational graph of voltage sharing resistance value and the discharge time；
Step 12: access control system blocking time protection definite value determines that the voltage sharing resistance value upper limit is public after being stopped transport according to inverter
Formula 2；
Step 13: according to voltage sharing resistance value upper limit formula 1 and voltage sharing resistance value upper limit formula 2, determining equalizing resistance
Upper limit value；
Step 14: equalizing resistance power is calculated according to the rated operational voltage of equalizing resistance upper limit value, submodule；
Step 15: being required to choose resistance finished product or customization resistance according to equal pressure drag value upper limit value and 3 times of power redundancies, finally
Sizing equalizing resistance parameter.
Further, specific calculating process is as follows:
Incorporated by reference to Fig. 2 and Fig. 3, rated operational voltage, storage capacitor capacitance when acquisition submodule start-up course, take can electricity
K-th of equivalent electricity of submodule starting/turn off process of inverter is established after source efficiency, the specific value of secondary control circuit power
Road.This equivalent circuit is suitable for inverter and starts or shuts down process, is not suitable for other states.Wherein draw-out power supply equivalent resistance
For rk, voltage sharing resistance value R0, the resistance at capacitor both ends is connected in parallel on after conversion are as follows:
U in formulaCkFor the capacitance voltage of the submodule, RkFor the resistance for being connected in parallel on capacitor both ends after conversion, N is series connection
Submodule quantity, η be draw-out power supply efficiency, PkFor the power of secondary control circuit；
Since each submodule is connected in start-up course, the electric current i of each submodule is flowed intokIt is equal to bridge arm current i, according to base
You know Hough current law:
In t0To t1In time, submodule capacitor voltage variable quantity are as follows:
C is the submodule capacitor's capacity in formula；
Since DC bus-bar voltage is held essentially constant, each submodule capacitor voltage variable quantity summation is about zero:
Above formula simultaneous can obtain,
Submodule is calculated in t1The calculation formula of the capacitance voltage value at moment are as follows:
UCk(t1)=UCk(t0)+ΔUCk, k=1,2 ..., N
Each submodule capacitor voltage is obtained according to calculation formula using iteration mode, is become recording each submodule voltage
The quantity of statistic submodule repeatedly starting and stopping during change, when the submodule quantity in repeatedly starting and stopping state is excessive, on the one hand
The overvoltage or overcurrent for making this part submodule draw-out power supply be easy to generate by repeatedly starting and stopping lead to failure, on the other hand make to remain
Minor module generates over-voltage fault because of overtension.Therefore the submodule proportion in repeatedly starting and stopping state is not to be exceeded
50%.Each submodule equalizing effect is poor when flexible DC transmission engineering is due to inverter starting at present, is provided with " static direct current
Charging time when charging tolerance time " definite value is for limiting inverter starting.
Different voltage sharing resistance values is set, and records its charging time when submodule repeatedly starting and stopping quantity reaches half
T50%, charging time T50%It is as shown in Figure 4 with the relationship of equalizing resistance, it is seen that equalizing resistance is bigger, and equalizing effect is poorer, charges
Time T50%It is smaller, due to charging time T50%The requirement greater than " static direct current charging tolerance time " definite value should be met, therefore can
Obtain voltage sharing resistance value upper limit formula 1:
TDC< T50%
T in formulaDCFor " static direct current charging tolerance time " definite value, T50%For the submodule quantity proportion of repeatedly starting and stopping
Time needed for reaching 50%；
During inverter is stopped transport, equalizing resistance can be used as the discharge resistance of capacitor, discharge time are as follows:
U in formula0For the rated operational voltage of submodule, UoffFor submodule safe voltage threshold values；
Different voltage sharing resistance values is set, records its discharge time t when submodule voltage is lower than safe voltage threshold values,
The relationship of this discharge time and equalizing resistance is as shown in Figure 5, it is seen that equalizing resistance is bigger, and discharge time is longer.Discharge time answers
Meet the condition that the capacitor in access control system blocking time answers discharge off, since equalizing resistance is bigger, discharge time is longer, because
Voltage sharing resistance value upper limit formula 2 can be obtained in this:
T in formulaoffFor " valve hall access control system blocking time after stoppage in transit " definite value；
After obtaining voltage sharing resistance value upper limit formula 1 and formula 2, equalizing resistance design parameter need to be carried out shaping, be formed
Process is as shown in Figure 6.First according to voltage sharing resistance value upper limit formula 1 and formula 2, equalizing resistance upper limit value is determined；Root simultaneously
Equalizing resistance power is calculated according to the rated operational voltage of equalizing resistance upper limit value, submodule；According to equal pressure drag value upper limit value and 3
Times power redundancy requires to choose resistance finished product or customization resistance, the final shaping equalizing resistance parameter.Further, it is contemplated that each submodule
The error of the requirement of parameter designing consistency, equalizing resistance can be chosen lower than 1%；The final shaping equalizing resistance power, resistance value, mistake
The parameters such as difference, processing method.
Modularized multi-level converter sub-module equalizing resistance Parameters design proposed by the present invention, comprehensively considers submodule
The parameter request of two aspects is pressed and discharged to block, and design method through the invention makes equalizing resistance while meeting " static straight
The requirement of current charge tolerance time " definite value, " valve hall access control system blocking time after stoppage in transit " definite value, through the invention the final shaping
The parameters such as equalizing resistance power, resistance value, error, processing method, for submodule equalizing resistance parameter designing provide theoretical foundation and
Technical support compensates for the blank of equalizing resistance Parameters design missing.
The foregoing is merely presently preferred embodiments of the present invention, all equivalent changes done according to scope of the present invention patent with
Modification, is all covered by the present invention.
Claims (1)
1. a kind of Modularized multi-level converter sub-module equalizing resistance Parameters design, which is characterized in that including following step
It is rapid:
Step 1: rated operational voltage, storage capacitor capacitance, draw-out power supply efficiency and the secondary control circuit function of acquisition submodule
The specific value of rate；
Step 2: according to the above numerical value, setting up submodule starting/turn off process equivalent circuit；
Step 3: determining the initial voltage of inverter start-up course Neutron module；
Step 4: the mathematical formulae of start-up course Neutron module capacitance voltage variation is derived according to the equivalent circuit；
Step 5: different voltage sharing resistance values are set, when start-up course Neutron module repeatedly starting and stopping quantity is calculated reaching half
The required charging time；
Step 6: drawing the relational graph of voltage sharing resistance value and the charging time；
Step 7: protecting definite value to determine voltage sharing resistance value upper limit formula 1 according to the inverter charging time；
Step 8: determining the initial voltage of inverter stoppage in transit process Neutron module；
Step 9: the mathematical formulae of stoppage in transit process Neutron module capacitor discharge time is derived according to the equivalent circuit；
Step 10: different voltage sharing resistance values being set, the discharge time of stoppage in transit process Neutron module capacitor is calculated；
Step 11: drawing the relational graph of voltage sharing resistance value and the discharge time；
Step 12: access control system blocking time protection definite value determines voltage sharing resistance value upper limit formula 2 after being stopped transport according to inverter；
Step 13: according to voltage sharing resistance value upper limit formula 1 and voltage sharing resistance value upper limit formula 2, determining the equalizing resistance upper limit
Value；
Step 14: equalizing resistance power is calculated according to the rated operational voltage of equalizing resistance upper limit value, submodule；
Step 15: being required to choose resistance finished product or customization resistance, the final shaping according to equal pressure drag value upper limit value and 3 times of power redundancies
Equalizing resistance parameter；
Specific calculating process is as follows:
Rated operational voltage, storage capacitor capacitance, draw-out power supply efficiency, secondary control circuit when acquisition submodule start-up course
K-th of submodule starting/turn off process equivalent circuit of inverter is established after the specific value of power, wherein draw-out power supply is equivalent
Resistance is rk, voltage sharing resistance value R0, the resistance at capacitor both ends is connected in parallel on after conversion are as follows:
U in formulaCkFor the capacitance voltage of the submodule, RkFor the resistance for being connected in parallel on capacitor both ends after conversion, N is concatenated son
Module number, η are draw-out power supply efficiency, PkFor the power of secondary control circuit；
Since each submodule is connected in start-up course, the electric current i of each submodule is flowed intokIt is equal to bridge arm current i, suddenly according to Kiel
Husband's current law is known:
In t0To t1In time, submodule capacitor voltage variable quantity are as follows:
C is the submodule capacitor's capacity in formula；
If DC bus-bar voltage remains unchanged, each submodule capacitor voltage variable quantity sum of zero:
Above four formula simultaneous can obtain,
Submodule is calculated in t1The calculation formula of the capacitance voltage value at moment are as follows:
UCk(t1)=UCk(t0)+ΔUCk, k=1,2 ..., N
Each submodule capacitor voltage is obtained according to calculation formula using iteration mode, is recording each submodule voltage change mistake
The quantity of statistic submodule repeatedly starting and stopping in journey records its charging time T when submodule repeatedly starting and stopping quantity reaches half50%,
The requirement greater than " static direct current charging tolerance time " definite value should be met at this time；Since equalizing resistance is bigger, equalizing effect is poorer,
Charging time T50%It is smaller, therefore voltage sharing resistance value upper limit formula 1 can be obtained:
TDC< T50%
T in formulaDCFor " static direct current charging tolerance time " definite value, T50%Reach for the submodule quantity proportion of repeatedly starting and stopping
Time needed for 50%；
During inverter is stopped transport, equalizing resistance can be used as the discharge resistance of capacitor, discharge time are as follows:
U in formula0For the rated operational voltage of submodule, UoffFor submodule safe voltage threshold values, UCFor the instantaneous of submodule capacitor
Voltage；
Discharge time should meet the condition that the capacitor in access control system blocking time answers discharge off, since equalizing resistance is bigger,
Discharge time is longer, therefore voltage sharing resistance value upper limit formula 2 can be obtained:
T in formulaoffFor " valve hall access control system blocking time after stoppage in transit " definite value；
According to voltage sharing resistance value upper limit formula 1 and formula 2, equalizing resistance upper limit value is determined；Simultaneously according to the equalizing resistance upper limit
Value, submodule rated operational voltage calculate equalizing resistance power；According to equal pressure drag value upper limit value and 3 times of power redundancy requirements
Choose resistance finished product or customization resistance, the final shaping equalizing resistance parameter.
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| CN103929081A (en) * | 2014-04-14 | 2014-07-16 | 中国西电电气股份有限公司 | Sub-module voltage equalizing method for modularization multi-level current converter |
| CN105515421A (en) * | 2016-01-04 | 2016-04-20 | 许继电气股份有限公司 | Modular multilevel converter submodule equalizing resistor resistance modeling and calculating method |
| CN105553312A (en) * | 2016-01-28 | 2016-05-04 | 中国科学院电工研究所 | Capacitor voltage equalizing method for power modules of modular multilevel converter |
| US9413260B1 (en) * | 2015-03-06 | 2016-08-09 | National Tsing Hua University | Method of current control of three-phase modular multilevel converter with inductance changes allowed |
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| CN103929081A (en) * | 2014-04-14 | 2014-07-16 | 中国西电电气股份有限公司 | Sub-module voltage equalizing method for modularization multi-level current converter |
| US9413260B1 (en) * | 2015-03-06 | 2016-08-09 | National Tsing Hua University | Method of current control of three-phase modular multilevel converter with inductance changes allowed |
| CN105515421A (en) * | 2016-01-04 | 2016-04-20 | 许继电气股份有限公司 | Modular multilevel converter submodule equalizing resistor resistance modeling and calculating method |
| CN105553312A (en) * | 2016-01-28 | 2016-05-04 | 中国科学院电工研究所 | Capacitor voltage equalizing method for power modules of modular multilevel converter |
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