CN106330114A - Amplifier circuit and frequency compensation method - Google Patents
Amplifier circuit and frequency compensation method Download PDFInfo
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- CN106330114A CN106330114A CN201610671311.XA CN201610671311A CN106330114A CN 106330114 A CN106330114 A CN 106330114A CN 201610671311 A CN201610671311 A CN 201610671311A CN 106330114 A CN106330114 A CN 106330114A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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Abstract
The embodiment of the invention provides an amplifier circuit and a frequency compensation method. The amplifier circuit comprises a first amplifier, a second amplifier and a passive frequency compensation device. The first amplifier comprises a first power supply port, a first signal input port and a first signal output port. The second amplifier comprises a second signal input port and a second signal output port. The first power supply port is coupled with an external power supply. The first signal input port is coupled with an external signal source. The first signal output port is coupled with the second signal input port. The second signal output port is coupled with a load. The passive frequency compensation device comprises a first port and a second port. The first port is coupled with the first signal output port. The second port is coupled with the second signal output port. Signal channels are formed by coupling the first port with the first signal output port and coupling the second port with the second signal output port, and then frequencies of the first amplifier signal and the second amplifier signal are compensated.
Description
Technical field
The present invention relates to electronic devices and components field, in particular to a kind of amplifying circuit and frequency compensated method.
Background technology
Along with science and technology and the development of Technology, the process of operational amplifier constantly reduces, thus transports
Calculate amplifier can be widely used in various amplifying circuit.The stability of operational amplifier is to meet operational amplifier to carry out answering
Key factor.In the prior art, mostly by adding miller compensation electric capacity or adding active components and parts, ensure with this
The stability of operational amplifier.The stability of operational amplifier, the band of operational amplifier is ensured by adding miller compensation electric capacity
Width can be reduced, thus limits operational amplifier application just in the amplifying circuit needing bandwidth.By adding active unit
After device ensures the stability of operational amplifier, although bandwidth will not reduce, but owing to active components and parts can produce certain electricity
Stream, forms power consumption, thus can inevitably introduce noise, and then limits operational amplifier and needing the amplifying circuit of radio frequency
In application.Therefore, while how ensureing operational amplifier stability, operational amplifier also can be enable to be applied to various putting
Big circuit is current industry a great problem.
Summary of the invention
It is an object of the invention to provide a kind of amplifying circuit and frequency compensated method, it ensure that operational amplifier
While stability, do not reduce the bandwidth of operational amplifier, the most do not introduce noise.
First aspect, the embodiment of the present invention provides a kind of amplifying circuit, including: the first amplifier, the second amplifier and nothing
Source frequency compensation device, the first power port of described first amplifier couples with external power source, the of described first amplifier
One signal input port and outside source coupling, the first signal output port of described first amplifier and described second amplifies
The secondary signal input port coupling of device, described secondary signal output port and load coupling;Described passive frequency compensation device
Including: the first port and the second port, the first port of described passive frequency compensation device and described first signal output port
Coupling, the second port of described passive frequency compensation device and the coupling of described secondary signal output port.Described first amplifier
For being received the signal of described outside source input by described first signal input port, and it is the by described Signal Regulation
Described second amplifier is exported by described first signal output port after one amplification signal.Described second amplifier is used for leading to
Cross described secondary signal input port and receive the described first amplification signal of described first amplifier input, and put described first
Signal Regulation greatly exports described load by described secondary signal output port after being the second amplification signal.Described passive frequencies
Compensation device for amplifying signal and described second amplifier output described the to described the first of described first amplifier output
Two amplify frequency compensated signal.
Further, described passive frequency compensation device includes: multiple frequency compensated circuits, each described frequency compensation electricity
Road all includes: resistance and electric capacity, and one end of each described resistance all couples with described first port, another of each described resistance
End all one end with each described electric capacity couple, the other end of each described electric capacity all with described secondary signal output port coupling
Close.
Further, described first signal input port includes: the first forward signal input port and the first reverse signal
Input port, described first forward signal input port and described first non-inverting signal input thereof mouth all with described outside source
Coupling;First signal output port includes: the first forward signal output port and the first reverse signal output port, described second
Signal output port includes: the second forward signal output port and the second reverse signal output port;Described first port is respectively
Couple with described first forward signal output port and described first reverse signal output port, described second port respectively with institute
State the second forward signal output port and described second reverse signal output port coupling.
Further, described passive frequency compensation device includes: first frequency compensates circuit and second frequency compensates circuit,
Described first frequency compensates circuit and includes: the first resistance and the first electric capacity, one end of described first resistance and described first forward
Signal output port couples, and the other end of described first resistance couples with one end of described first electric capacity, described first electric capacity
The other end couples with described second reverse signal output port;Described second frequency compensates circuit and includes: the second resistance and second
Electric capacity, one end of described second resistance couples with described first reverse signal output port, the other end of described second resistance with
One end coupling of described second electric capacity, the other end of described second electric capacity couples with described second forward signal output.
Further, described passive frequency compensation device also includes: the 3rd frequency compensated circuit, described 3rd frequency compensation
Circuit includes: the 3rd resistance and the 3rd electric capacity, and one end of described 3rd resistance couples with described first reverse signal output port,
The other end of described 3rd resistance couples with one end of described 3rd electric capacity, and the other end of described 3rd electric capacity is second anti-with described
Couple to signal output port.
Further, described passive frequency compensation device also includes: the 4th frequency compensated circuit, described 4th frequency compensation
Circuit includes: the 4th resistance and the 4th electric capacity, and one end of described 4th resistance couples with described first forward signal output port,
The other end of described 4th resistance couples with one end of described 4th electric capacity, and the other end of described 4th electric capacity is second anti-with described
Couple to signal output port.
Further, described first amplifier includes: the first forward signal amplifying device and the first reverse signal amplify dress
Put;The input of described first forward signal amplifying device couples with described first forward signal input port, and described first just
Couple with described first forward signal output port to the outfan of signal amplifying apparatus;Described first reverse signal amplifying device
Input couple with described first non-inverting signal input thereof mouth, described first reverse signal amplifies the outfan and described the of end
One reverse signal output port coupling.
Further, described first forward signal amplifying device includes: the first field effect transistor, described first field effect transistor
Source electrode couples with described first power port, the grid of described first field effect transistor and described first forward signal input port coupling
Closing, the drain electrode of described first field effect transistor couples with described first forward signal output port.
Further, described second forward signal amplifying device includes: the second field effect transistor;Described second field effect transistor
Source electrode couples with described first power port, the grid of described second field effect transistor and described first non-inverting signal input thereof mouth coupling
Closing, the drain electrode of described second field effect transistor couples with described first reverse signal output port.
Second aspect, the embodiment of the present invention provides a kind of frequency compensated method, is applied to such as any one of claim 1-9
Described amplifying circuit, described method includes: described first amplifier by described first signal input port receive described outside
The signal of portion signal source input, and by described Signal Regulation be after the first amplification signal defeated by described first signal output port
Go out to described second amplifier.It is defeated that described second amplifier receives described first amplifier by described secondary signal input port
Described first entered amplifies signal, and amplify Signal Regulation by described first be by described secondary signal after the second amplification signal
Output port exports described load.Described passive frequency compensation device amplifies described the first of described first amplifier output
Frequency compensated signal is amplified in signal and described second amplifier output described second.
The embodiment of the present invention provides the benefit that: the first amplifier is for receiving institute by described first signal input port
State the signal of outside source input, and exported by the first signal output port after signal is enlarged into the first amplification signal
Described second amplifier.Second amplifier for receiving the first amplification of the first amplifier input by secondary signal input port
Letter, and export load by secondary signal output port after the amplification of described signal.Passive frequency compensation device is used for passing through
First port and the first signal output port coupling and the second port and secondary signal output port coupling formation signal path.
When the first signal output port exports the first amplification signal and secondary signal output port output the second amplification signal
Time, couple due to the first port and the first signal output port and the second port and secondary signal output port couple and formed
Signal path, the first amplification signal of output and second amplifies signal just can make passive frequency compensation device produce energy storage and release
Can, and then can be to the first amplification signal of the first amplifier output and the second amplifier output the second amplification signal forming frequency
Compensate.
Passive frequency compensation device is respectively formed the compensation of frequency, passive frequency compensation to the first amplifier and the second amplifier
The produced zero pole point of device work can eliminate the secondary limit of amplifying circuit, and the frequency that passive frequency compensation device produces is mended
Repay the dominant pole that can't move amplifying circuit.Thus passive frequency compensation device is while forming frequency compensates, it is also possible to
Ensure operational amplifier stability, do not reduce the bandwidth of operational amplifier.Owing to passive frequency compensation device need not outer powering up
Source provides passive frequency compensation device working power, from without introducing extra electric current and power consumption, and then will not introduce and makes an uproar
Sound forms interference to the normal work of circuit.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of the embodiment of the present invention, below by embodiment required use attached
Figure is briefly described, it will be appreciated that the following drawings illustrate only certain embodiments of the present invention, and it is right to be therefore not construed as
The restriction of scope, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to according to this
A little accompanying drawings obtain other relevant accompanying drawings.
The module map of the amplifying circuit that Fig. 1 provides for the embodiment of the present invention;
The circuit diagram of the amplifying circuit that Fig. 2 provides for the embodiment of the present invention;
First analogous diagram of the amplifying circuit that Fig. 3 provides for the embodiment of the present invention;
Second analogous diagram of the amplifying circuit that Fig. 4 provides for the embodiment of the present invention;
Fig. 5 provides one to be applied to this frequency compensated method for the embodiment of the present invention.
In figure: amplifying circuit the 100, first amplifier the 110, second amplifier 120 and passive frequency compensation device 130.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
The a part of embodiment of the present invention rather than whole embodiments.Generally implement with the present invention illustrated described in accompanying drawing herein
The assembly of example can be arranged with various different configurations and design.
Therefore, detailed description to the embodiments of the invention provided in the accompanying drawings is not intended to limit claimed below
The scope of the present invention, but be merely representative of the selected embodiment of the present invention.Based on the embodiment in the present invention, this area is common
The every other embodiment that technical staff is obtained under not making creative work premise, broadly falls into the model of present invention protection
Enclose.
It should also be noted that similar label and letter represent similar terms, therefore, the most a certain Xiang Yi in following accompanying drawing
Individual accompanying drawing is defined, then need not it be defined further and explains in accompanying drawing subsequently.In description of the invention
In, term " first ", " second ", " the 3rd " etc. are only used for distinguishing and describe, and it is not intended that indicate or hint relative importance.
In describing the invention, in addition it is also necessary to explanation, unless otherwise clearly defined and limited, term " arrange ",
" connect ", " coupling " should be interpreted broadly, and connects for example, it may be fixing, it is also possible to be to removably connect, or connect integratedly
Connect;Can be to be mechanically connected, it is also possible to be electrical connection;Can be to be joined directly together, it is also possible to be indirectly connected to by intermediary, can
To be the connection of two element internals.For the ordinary skill in the art, above-mentioned term can be understood with concrete condition
Concrete meaning in the present invention.
Refer to the module map of the amplifying circuit 100 that Fig. 1, Fig. 1 show that the embodiment of the present invention provides.Amplifying circuit 100
Including: the first amplifier the 110, second amplifier 120 and passive frequency compensation device 130.
The circuit diagram of the amplifying circuit 100 of the embodiment of the present invention offer that Fig. 2, Fig. 2 show is provided.First amplifier
110 for being enlarged into the first amplification signal by the signal that outside source inputs, and the first amplification signal is exported to second put
Big device 120.Preferably, the first amplifier 110 includes: the first forward signal amplifying device, the first reverse signal amplifying device,
Three field effect transistor Q3, the 4th field effect transistor Q4 and the 5th field effect transistor Q5.First forward signal amplifying device is for input
Forward signal is amplified, and the first reverse signal amplifying device is for being amplified the reverse signal of input, optionally, the
One forward signal amplifying device may include that the first field effect transistor Q1, the second forward signal amplifying device may include that second
Effect pipe Q2.
First amplifier 110 is additionally provided with: the first signal input port and the first signal output port.Due to outside input
Signal includes forward signal and reverse signal, i.e. signal and includes: forward signal and reverse signal, thus first amplifies signal packet
Include: the first forward amplifies signal and first and reversely amplifies signal.And then first signal input port include: the first forward signal is defeated
Inbound port A and the first non-inverting signal input thereof mouth A ', the first signal output port includes: the first forward signal output port B and
First reverse signal output port B '.
The grid of the first field effect transistor Q1 and the grid of the second field effect transistor Q2 all with the drain electrode coupling of the 3rd field effect transistor Q3
Close.The grid of the 3rd field effect transistor Q3 and the first power port coupling of the first amplifier 110.First power port is also for simulation
Voltage input end AVDD, the grid of the i.e. the 3rd field effect transistor Q3 couples with analog voltage input AVDD.3rd field effect transistor Q3
Source electrode and the first amplifier 110 bias voltage input Vbp coupling.The grid of the 3rd field effect transistor Q3 is by electric with simulation
Pressure input AVDD coupling is to provide the working power of the first amplifier 110, thus is also for the first field effect transistor Q1 and second
The offer working power of field effect transistor Q2.
It should be noted that owing to external power source input analog voltage has been respectively outputted to first by the 3rd field effect transistor Q3
Field effect transistor Q1 and the second field effect transistor Q2, and then can be understood as source electrode and second field effect transistor Q2 of the first field effect transistor Q1
Source electrode all couple with the first power port.
By the first field effect transistor Q1 and the coupling of the 3rd field effect transistor Q3, the bias voltage of input the 3rd field effect transistor Q3
The PN junction positively biased between Q1 grid and the source electrode of the first field effect transistor can be made, and the PN junction between source electrode and drain electrode is reverse-biased, the
One field effect transistor Q1 is just at the duty amplified.By the second field effect transistor Q2 and the coupling of the 3rd field effect transistor Q3
Closing, the PN junction that the bias voltage of input the 3rd field effect transistor Q3 also is able to make between Q2 grid and the source electrode of the second field effect transistor is just
Partially, and the PN junction between source electrode and drain electrode is reverse-biased, and the second field effect transistor Q2 also just is able to be in the duty of amplification.
The grid of the first field effect transistor Q1 and the first forward signal input port A coupling of the first amplifier 110, first
The drain electrode of effect pipe Q1 couples and the 4th field effect transistor Q4 with the first forward signal output port B of the first amplifier 110 respectively
Drain electrode coupling.The grounded-grid of the 4th field effect transistor Q4, the source electrode of the 4th field effect transistor Q4 and the source of the 5th field effect transistor Q5
Pole couples.When outside forward signal inputs the first field effect transistor Q1 by the first forward signal input port A, due to first
The amplification of effect pipe Q1, forward signal is enlarged into the first forward and amplifies signal, and by the first forward signal output port B
Output is to the second amplifier 120.
The grid of the second field effect transistor Q2 and the first non-inverting signal input thereof mouth A ' coupling of the first amplifier 110.Second
The drain electrode of field effect transistor Q2 couples and the 5th field effect transistor with the first reverse signal output port B ' of the first amplifier 110 respectively
The drain electrode coupling of Q5.The source ground of the 5th field effect transistor Q5.When outside reverse signal is by the first non-inverting signal input thereof
Mouth A ' inputs the second field effect transistor Q2, and due to the amplification of the second field effect transistor Q2, it is reverse that reverse signal is enlarged into first
Amplify signal, and exported to the second amplifier 120 by the first reverse signal output port B '.
As a kind of mode, include owing to the signal of outside input includes forward signal and reverse signal, i.e. signal: just
To signal and reverse signal, thus the first amplification signal includes: the first forward amplifies signal and first and reversely amplifies signal.
Second amplifier 120 is enlarged into the second amplification again for the first amplification signal inputted by the first amplifier 110
Signal, and the second amplification signal is exported load.Preferably, the second amplifier 120 includes: the 6th field effect transistor Q6, the 7th
Field effect transistor Q7, the 8th field effect transistor Q8 and the 9th field effect transistor Q9.
Second amplifier 120 is additionally provided with: secondary signal input port and secondary signal output port.Due to the first amplifier
First amplification signal of 110 inputs includes: the first forward amplifies signal and first and reversely amplifies signal, thus second amplifies letter
Number include: the second forward amplifies signal and second and reversely amplifies signal.And then secondary signal input port includes: the second forward letter
Number input port C and the second non-inverting signal input thereof mouth C ', secondary signal output port includes: the second forward signal output port
D and the second reverse signal output port D '.
The source electrode of the 6th field effect transistor Q6 and the first analog voltage input mouth AVDD1 coupling of the second amplifier 120, the
The grid of six field effect transistor Q6 and the first bias voltage input mouth Vbp1 coupling of the second amplifier 120, the 6th field effect transistor
The drain electrode of Q6 drain electrode with the second forward signal output port D and the 7th field effect transistor Q7 respectively couples.7th field effect transistor Q7
Grid and the second forward signal input port C coupling, and the source ground of the 7th field effect transistor Q7.
Its grid that 6th field effect transistor Q6 is passed through and the coupling of the first analog voltage input mouth AVDD1, input outside
Analog voltage export the 7th field effect transistor Q7, to provide the working power of the 7th field effect transistor Q7.By the 6th field effect
Pipe Q6 and the coupling of the 7th field effect transistor Q7, the bias voltage of input the 6th field effect transistor Q6 can make the Q7 of the 7th field effect transistor
PN junction positively biased between grid and source electrode, and the PN junction between source electrode and drain electrode is reverse-biased, the 7th field effect transistor Q7 is just at
The duty amplified.The grid of the 7th field effect transistor Q7 and the second forward signal input port C coupling of the second amplifier 120
Close.Due to the amplification of the 7th field effect transistor Q7, amplify letter by the first forward of the second forward signal input port C input
Number being enlarged into the second forward by the 7th field effect transistor Q7 amplifies signal, and is exported outside by the second forward signal output port C
Load.
The source electrode of the 8th field effect transistor Q8 and the second analog voltage input mouth AVDD2 coupling of the second amplifier 120, the
The grid of eight field effect transistor Q8 and the second bias voltage input mouth Vbp2 coupling of the second amplifier 120, the 8th field effect transistor
The drain electrode of Q8 drain electrode with the second reverse signal output port D ' and the 9th field effect transistor Q9 respectively couples.9th field effect transistor Q9
Grid and the second non-inverting signal input thereof mouth C ' coupling, and the source ground of the 9th field effect transistor Q9.
Its grid that 8th field effect transistor Q8 is passed through and the coupling of the second analog voltage input mouth AVDD2, input outside
Analog voltage export the 9th field effect transistor Q9, to provide the working power of the 9th field effect transistor Q9.By the 8th field effect
Pipe Q8 and the coupling of the 9th field effect transistor Q9, the bias voltage of input the 8th field effect transistor Q8 can make the Q9 of the 9th field effect transistor
PN junction positively biased between grid and source electrode, and the PN junction between source electrode and drain electrode is reverse-biased, the Q9 of the 9th field effect transistor just can locate
In the duty amplified.The grid of the Q9 of the 9th field effect transistor and the second non-inverting signal input thereof mouth of the second amplifier 120
C ' couples.Due to the amplification of the Q9 of the 9th field effect transistor, by the second non-inverting signal input thereof mouth C ' input first anti-
It is enlarged into second to amplification signal by the Q9 of the 9th field effect transistor and reversely amplifies signal, and by the second reverse signal output port C '
Output is to outside load.
Passive frequency compensation device 130 can be used in putting the first amplification signal and second of the first amplifier 110 output
Big device 120 exports the second amplification frequency compensated signal.Passive frequency compensation device 130 includes: the first port, the second port and many
Individual frequency compensated circuit, each frequency compensated circuit is formed by the passive device such as resistance and electric capacity.
First port of passive frequency compensation device 130 and the coupling of the first signal output port, passive frequency compensation device
Second port of 130 couples with secondary signal output port.As a kind of mode, passive frequency compensation device 130 includes four
Frequency compensated circuit.First frequency compensates circuit and includes: the first resistance R1 and the first electric capacity C1, one end of the first resistance R1 and the
One forward signal output port B coupling, the other end of the first resistance R1 and one end coupling of the first electric capacity C1, the first electric capacity C1's
The other end and second couples to signal output port D.Second frequency compensates circuit and includes: the second resistance R2 and the second electric capacity C2,
One end of second resistance R2 couples with the first reverse signal output port B ', the other end of the second resistance R2 and the second electric capacity C2's
One end couples, the other end of the second electric capacity C2 and the second forward signal output port D coupling.3rd frequency compensated circuit includes:
3rd resistance R3 and the 3rd electric capacity C3, one end of the 3rd resistance R3 couples with the first reverse signal output port B ', the 3rd resistance
The other end of R3 and one end coupling of the 3rd electric capacity C3, the other end of the 3rd electric capacity C3 and the second reverse signal output port D ' coupling
Close.4th frequency compensated circuit includes: the 4th resistance R4 and the 4th electric capacity C4, one end of the 4th resistance R4 and the first forward signal
Output port B couples, and the other end of the 4th resistance R4 couples with one end of the 4th electric capacity C4, the other end of the 4th electric capacity C4 and the
Two reverse signal output port D ' couplings.
First frequency compensates circuit, second frequency compensates circuit, the 3rd frequency compensated circuit and the 4th frequency compensated circuit
All with the first signal output port and the secondary signal output port of the second amplifier 120 of the first amplifier 110.First frequency
Compensating circuit, second frequency compensation circuit, the 3rd frequency compensated circuit and the 4th frequency compensated circuit makes amplifying circuit 100 be formed
New signal path.The first amplification signal and second that amplifying circuit 100 work is exported amplifies signal just can make first
Electric capacity C1, the second electric capacity C2, the 3rd electric capacity C3 and the 4th electric capacity C4 energy storage and release energy.By the first electric capacity C1, the second electric capacity C2,
3rd electric capacity C3 and the energy storage of the 4th electric capacity C4 and release can just can be to the compensation of amplifying circuit 100 forming frequency.
Refer to Fig. 3 and Fig. 4, the solid line A in Fig. 3 is passive frequency compensation device 130 generation passive frequency compensation
Gain curve, and the gain curve that dotted line B is miller compensation in Fig. 3.Solid line a in Fig. 4 is passive frequency compensation device 130
The relative abundance curve of produced passive frequency compensation, and the relative abundance curve that dotted line b is miller compensation in Fig. 4.Existing
The miller compensation of technology is divided by limit, is moved to initial point by the dominant pole of two inter-stages, and the secondary limit making output is former to leaving
The direction of point is moved, thus ensure that the stability of amplifying circuit 100.But owing to dominant pole moves toward initial point direction, thus put
The bandwidth of big circuit 100 can reduce-3dB, and then the relative abundance of amplifying circuit 100 also can reduce.Compared to miller compensation, by
Compensate circuit in second frequency to couple with the first reverse signal output port B ' and the second forward signal output port D respectively, and
4th frequency compensated circuit couples with the first forward signal output port B and the second reverse signal output port D ' respectively.Thus
When second frequency compensation circuit and the 4th frequency compensated circuit are in running order, just can produce extra zero point, and by volume
Outer zero point introduces in amplifying circuit 100.Extra zero point counteracts the secondary limit of amplifying circuit 100 self, and passive frequencies is mended
Repay device 130 just to compensate with overfrequency and ensure while amplifying circuit 100 stability, due to passive frequency compensation device
130 and the dominant pole of mobile amplifying circuit 100 self, thus ensure that bandwidth and the amplifying circuit 100 of amplifying circuit 100-3dB
The frequency range of normal work, and then also ensure that the stablizing of relative abundance of amplifying circuit 100.
In the present embodiment, the passive frequency of RC that passive frequency compensation device 130 is made up of the passive device such as resistance and electric capacity
Rate compensates, passive frequency compensation device 130 will not because of its frequency compensation of amplifying circuit 100 introduced extra electric current and
Power consumption, and then will not be because of introducing the normal work formation interference to circuit of extra electric current and power consumption formation noise.Need
Bright, the LC passive frequencies that the passive frequency compensation device 130 of the present embodiment offer can also be made up of electric capacity and inductance is mended
Repay, the most do not do too much detailed description at this.
Referring to Fig. 5, refer to that Fig. 5, Fig. 5 show that the embodiment of the present invention provides is applied to this amplifying circuit 100
The flow chart of frequency compensation method.Described method includes: step S100, S200 and S300.
Step S100: described first amplifier receives described outside source by described first signal input port and inputs
Signal, and be to export described second by described first signal output port after the first amplification signal by described Signal Regulation
Amplifier.
Step S200: described second amplifier receives described first amplifier by described secondary signal input port and inputs
Described first amplify signal, and amplify Signal Regulation by described first be defeated by described secondary signal after the second amplification signal
Go out port and export described load.
Step S300: described passive frequency compensation device 130 is for described first to described first amplifier 110 output
Amplify signal and described second amplifier 120 exports described second and amplifies frequency compensated signal.
Those skilled in the art is it can be understood that arrive, for convenience and simplicity of description, and the method for foregoing description
Specific works process, the corresponding process being referred in aforementioned means, do not repeat them here.
In sum, in the amplifying circuit 100 that the present invention provides, the first amplifier 110 is for by described first signal
Input port receives the signal of described outside source input, and is enlarged into by signal after the first amplification signal by the first signal
Output port exports described second amplifier 120.Second amplifier 120 is for receiving first by secondary signal input port
First amplification letter of amplifier 110 input, and export load by secondary signal output port after the amplification of described signal.Nothing
Source frequency compensation device 130 is for defeated by the first port and the coupling of the first signal output port and the second port and secondary signal
Go out the signal path that port coupling is formed.
When the first signal output port exports the first amplification signal and secondary signal output port output the second amplification signal
Time, couple due to the first port and the first signal output port and the second port and secondary signal output port couple and formed
Signal path, the first amplification signal of output and second amplifies signal just can make passive frequency compensation device 130 produce energy storage
With release can, and then can to first amplifier 110 output first amplification signal and the second amplifier 120 export second amplification letter
Number forming frequency compensates.
Passive frequency compensation device 130 is respectively formed the compensation of frequency, nothing to the first amplifier 110 and the second amplifier 120
The source frequency compensation device 130 produced zero pole point that works can eliminate the secondary limit of amplifying circuit 100, and passive frequency compensation
The frequency compensation that device 130 produces can't move the dominant pole of amplifying circuit 100.Thus passive frequency compensation device 130 exists
While forming frequency compensates, it is also possible to ensure operational amplifier stability, do not reduce the bandwidth of operational amplifier.Due to passive
Frequency compensation device 130 need not additional power source to provide passive frequency compensation device 130 working power, from without introducing volume
Outer electric current and power consumption, and then the noise normal work formation interference to circuit will not be introduced.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for the skill of this area
For art personnel, the present invention can have various modifications and variations.All within the spirit and principles in the present invention, that is made any repaiies
Change, equivalent, improvement etc., should be included within the scope of the present invention.
Claims (10)
1. an amplifying circuit, it is characterised in that including: the first amplifier, the second amplifier and passive frequency compensation device, institute
The first power port stating the first amplifier couples with external power source, and the first signal input port of described first amplifier is with outer
Portion's signal source coupling, the first signal output port of described first amplifier and the secondary signal input of described second amplifier
Mouth coupling, described secondary signal output port and load coupling;Described passive frequency compensation device includes: the first port and second
Port, the first port of described passive frequency compensation device and described first signal output port coupling, described passive frequencies is mended
Repay the second port and the coupling of described secondary signal output port of device;
Described first amplifier is used for being received the signal of described outside source input by described first signal input port, and
It is to export described second amplifier by described first signal output port after the first amplification signal by described Signal Regulation;
Described second amplifier for receiving described the of described first amplifier input by described secondary signal input port
One amplifies signal, and amplify Signal Regulation by described first be defeated by described secondary signal output port after the second amplification signal
Go out to described load;
Described passive frequency compensation device is for amplifying signal and described second to described the first of described first amplifier output
Frequency compensated signal is amplified in amplifier output described second.
Amplifying circuit the most according to claim 1, it is characterised in that described passive frequency compensation device includes: Duo Gepin
Rate compensates circuit, and each described frequency compensated circuit all includes: resistance and electric capacity, and one end of each described resistance is all with described the
Single port couples, and the other end of each described resistance all one end with each described electric capacity couple, another of each described electric capacity
End all couples with described secondary signal output port.
Amplifying circuit the most according to claim 2, it is characterised in that described first signal input port includes: first just
To signal input port and the first non-inverting signal input thereof mouth, described first forward signal input port and described first is reversely believed
Number input port all couples with described outside source;First signal output port includes: the first forward signal output port and
First reverse signal output port, described secondary signal output port includes: the second forward signal output port and second reverse
Signal output port;Described first port exports with described first forward signal output port and described first reverse signal respectively
Port couple, described second port respectively with described second forward signal output port and described second reverse signal output port
Coupling.
Amplifying circuit the most according to claim 3, it is characterised in that described passive frequency compensation device includes: the first frequency
Rate compensates circuit and second frequency compensates circuit, and described first frequency compensates circuit and includes: the first resistance and the first electric capacity, described
One end of first resistance couples with described first forward signal output port, the other end of described first resistance and described first electricity
One end coupling held, the other end of described first electric capacity couples with described second reverse signal output port;Described second frequency
Compensation circuit includes: the second resistance and the second electric capacity, one end of described second resistance and described first reverse signal output port
Coupling, the other end of described second resistance couples with one end of described second electric capacity, and the other end of described second electric capacity is with described
Second forward signal output coupling.
Amplifying circuit the most according to claim 3, it is characterised in that described passive frequency compensation device also includes: the 3rd
Frequency compensated circuit, described 3rd frequency compensated circuit includes: the 3rd resistance and the 3rd electric capacity, one end of described 3rd resistance with
Described first reverse signal output port coupling, the other end of described 3rd resistance couples with one end of described 3rd electric capacity, institute
The other end stating the 3rd electric capacity couples with described second reverse signal output port.
Amplifying circuit the most according to claim 3, it is characterised in that described passive frequency compensation device also includes: the 4th
Frequency compensated circuit, described 4th frequency compensated circuit includes: the 4th resistance and the 4th electric capacity, one end of described 4th resistance with
Described first forward signal output port coupling, the other end of described 4th resistance couples with one end of described 4th electric capacity, institute
The other end stating the 4th electric capacity couples with described second reverse signal output port.
Amplifying circuit the most according to claim 3, it is characterised in that described first amplifier includes: the first forward signal
Amplifying device and the first reverse signal amplifying device;The input of described first forward signal amplifying device and described first forward
Signal input port couples, the outfan of described first forward signal amplifying device and described first forward signal output port coupling
Close;The input of described first reverse signal amplifying device couples with described first non-inverting signal input thereof mouth, described first anti-
The outfan amplifying end to signal couples with described first reverse signal output port.
Amplifying circuit the most according to claim 7, it is characterised in that described first forward signal amplifying device includes: the
One field effect transistor, the source electrode of described first field effect transistor couples with described first power port, the grid of described first field effect transistor
Pole couples with described first forward signal input port, the drain electrode of described first field effect transistor and described first forward signal output
Port couples.
Amplifying circuit the most according to claim 7, it is characterised in that described second forward signal amplifying device includes: the
Two field effect transistor;The source electrode of described second field effect transistor couples with described first power port, the grid of described second field effect transistor
Pole couples with described first non-inverting signal input thereof mouth, the drain electrode of described second field effect transistor and described first reverse signal output
Port couples.
10. a frequency compensated method, it is characterised in that be applied to the amplifying circuit as described in any one of claim 1-9,
Described method includes:
Described first amplifier receives the signal of described outside source input by described first signal input port, and by institute
Stating Signal Regulation is to export described second amplifier by described first signal output port after the first amplification signal;
Described second amplifier is put by described the first of the described first amplifier input of described secondary signal input port reception
Big signal, and amplify Signal Regulation by described first be to be exported by described secondary signal output port after the second amplification signal
Described load;
Described passive frequency compensation device amplifies signal and described second to described the first of described first amplifier output and amplifies
Frequency compensated signal is amplified in device output described second.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107547052A (en) * | 2017-08-23 | 2018-01-05 | 刘欣亮 | Embedded multiplier and operational amplifier |
CN108389641A (en) * | 2017-12-28 | 2018-08-10 | 中国科学院近代物理研究所 | A kind of preparation facilities and preparation method of nuclear fuel bead |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6166596A (en) * | 1998-03-31 | 2000-12-26 | Matsushita Electric Industrial Co., Ltd. | High efficiency power amplifying apparatus with phase compensation circuit |
CN101895257A (en) * | 2009-05-12 | 2010-11-24 | 14号公司 | Low noise in computing and the measuring amplifier, low-power, low drift offset correction |
CN102215028A (en) * | 2010-04-06 | 2011-10-12 | 联发科技股份有限公司 | Amplifier |
CN103534936A (en) * | 2011-05-13 | 2014-01-22 | 高通股份有限公司 | Current buffer |
CN104113287A (en) * | 2013-04-16 | 2014-10-22 | 三菱电机株式会社 | Power amplifier |
CN104270110A (en) * | 2014-09-25 | 2015-01-07 | 西安电子科技大学 | Variable gain amplifier based on voltage-controlled inductive load |
CN104333333A (en) * | 2014-09-24 | 2015-02-04 | 晨星半导体股份有限公司 | Single-ended amplifier and noise elimination method thereof |
US20150295539A1 (en) * | 2014-04-10 | 2015-10-15 | City University Of Hong Kong | Power amplifier circuit for communication systems |
CN205883174U (en) * | 2016-08-15 | 2017-01-11 | 深圳市蓝狮微电子有限公司 | Amplification circuit |
-
2016
- 2016-08-15 CN CN201610671311.XA patent/CN106330114B/en active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6166596A (en) * | 1998-03-31 | 2000-12-26 | Matsushita Electric Industrial Co., Ltd. | High efficiency power amplifying apparatus with phase compensation circuit |
CN101895257A (en) * | 2009-05-12 | 2010-11-24 | 14号公司 | Low noise in computing and the measuring amplifier, low-power, low drift offset correction |
CN102215028A (en) * | 2010-04-06 | 2011-10-12 | 联发科技股份有限公司 | Amplifier |
CN103534936A (en) * | 2011-05-13 | 2014-01-22 | 高通股份有限公司 | Current buffer |
CN104113287A (en) * | 2013-04-16 | 2014-10-22 | 三菱电机株式会社 | Power amplifier |
US20150295539A1 (en) * | 2014-04-10 | 2015-10-15 | City University Of Hong Kong | Power amplifier circuit for communication systems |
CN104333333A (en) * | 2014-09-24 | 2015-02-04 | 晨星半导体股份有限公司 | Single-ended amplifier and noise elimination method thereof |
CN104270110A (en) * | 2014-09-25 | 2015-01-07 | 西安电子科技大学 | Variable gain amplifier based on voltage-controlled inductive load |
CN205883174U (en) * | 2016-08-15 | 2017-01-11 | 深圳市蓝狮微电子有限公司 | Amplification circuit |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107547052A (en) * | 2017-08-23 | 2018-01-05 | 刘欣亮 | Embedded multiplier and operational amplifier |
CN107547052B (en) * | 2017-08-23 | 2024-04-19 | 刘欣亮 | Embedded multiplier and operational amplifier |
CN108389641A (en) * | 2017-12-28 | 2018-08-10 | 中国科学院近代物理研究所 | A kind of preparation facilities and preparation method of nuclear fuel bead |
CN108389641B (en) * | 2017-12-28 | 2019-07-26 | 中国科学院近代物理研究所 | A kind of preparation facilities and preparation method of nuclear fuel bead |
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