CN106328054A - OLED (organic light emitting diode) display GOA (gate on array) scanning and driving circuit - Google Patents
OLED (organic light emitting diode) display GOA (gate on array) scanning and driving circuit Download PDFInfo
- Publication number
- CN106328054A CN106328054A CN201610947752.8A CN201610947752A CN106328054A CN 106328054 A CN106328054 A CN 106328054A CN 201610947752 A CN201610947752 A CN 201610947752A CN 106328054 A CN106328054 A CN 106328054A
- Authority
- CN
- China
- Prior art keywords
- signal
- clock signal
- thin film
- node
- oled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention relates to an OLED (organic light emitting diode) display GOA (gate on array) scanning and driving circuit. The scanning and driving circuit comprises a plurality of cascaded GOA circuit units. The various GOA circuit units comprise first thin film transistors (T1), second thin film transistors (T2), third thin film transistors (T3), fourth thin film transistors (T4), fifth thin film transistors (T5), sixth thin film transistors (T6), seventh thin film transistors (T7), eighth thin film transistors (T8), ninth thin film transistors (T9) and capacitors; optional waveforms required by scanning signals can be circulated in first clock signals (CK1) and second clock signals (CK2) in a crossed manner during work, waveforms required to be generated can be intercepted by third clock signals (CK3) and fourth clock signals (CK4), and accordingly the scanning signals with the required waveforms can be generated. The OLED display GOA scanning and driving circuit has the advantages that development requirements of diversified OLED pixel circuits can be met, and multiple pulses and the scanning signals which have the optional waveforms and are transmitted step by step can be generated by the clock signals.
Description
Technical field
The present invention relates to field of liquid crystal, particularly relate to a kind of OLED and show GOA scan drive circuit.
Background technology
Along with the development of high-definition display screen curtain, people pursue more giant-screen, higher resolution, and the vision more stimulated is imitated
Really, wide viewing angle, high colour gamut, the exploitation of high PPI Display Technique have had become as the trend of industry.OLED screen curtain high-contrast, width
The advantages such as visual angle, high saturation, low energy consumption, push it against display market development forward position undoubtedly.
The pixel driver of OLED display actuation techniques belongs to current mode, needs GOA(gate on array, array base palte row
Drive) supply scanning signal, meanwhile, for preferably display effect and threshold voltage compensation effect, need be additionally that pixel is electric
Road provides the signal of number of different types.Along with pixel circuit design diversification, functionalization development, multiple internal compensation method is melted
Entering in the middle of pixel design, to driving, the scanning diversified demand of signal is the strongest.Need design a kind of OLED display GOA badly to sweep
Retouch drive circuit, it is possible to produce the scanning signal of transmission step by step of multiple-pulse (multi-pluse) and other random waveforms.
Summary of the invention
Therefore, it is an object of the invention to provide a kind of OLED and show GOA scan drive circuit, it is possible to produce multiple-pulse
(multi-pluse) and other random waveforms transmission step by step scanning signal.
For achieving the above object, the invention provides a kind of OLED and show GOA scan drive circuit, multiple including cascade
GOA circuit unit, wherein n-th grade of GOA circuit unit includes:
The first film transistor (T1), its grid connects node Q, source electrode and drain electrode and connects n-th grade of signal output point respectively
(Out(n)) and input one clock signal, as n-th grade then inputs the first clock signal (CK1) for odd level, as n-th grade is even number
Level then input second clock signal (CK2)；
Second thin film transistor (TFT) (T2), its grid connects node P, source electrode and drain electrode and connects node H and n-th grade of signal respectively
Output point (Out(n))；
3rd thin film transistor (TFT) (T3), its source electrode and drain electrode connect node Q and node L respectively；
4th thin film transistor (TFT) (T4), its grid connects node Q, source electrode and drain electrode and connects node L and the 3rd thin film respectively
The grid of transistor (T3)；
5th thin film transistor (TFT) (T5), its grid connects (n-1)th grade of signal output point (Out(n-1)), source electrode and drain electrode point
Lian Jie node L and the grid of the 3rd thin film transistor (TFT) (T3)；
6th thin film transistor (TFT) (T6), its grid connects node P, source electrode and drain electrode and connects node Q and node H respectively；
7th thin film transistor (TFT) (T7), its grid connects node P, source electrode and drain electrode and connects node H and the 3rd thin film respectively
The grid of transistor (T3)；
8th thin film transistor (TFT) (T8), its grid connects the grid of the 3rd thin film transistor (TFT) (T3), source electrode and drain electrode respectively
Connect node H and node P；
9th thin film transistor (TFT) (T9), its grid inputs another clock signal, source electrode and drain electrode input respectively this another time
Clock signal and connection node P, as n-th grade then inputs the 3rd clock signal (CK3) for odd level, as n-th grade is that even level is the most defeated
Enter the 4th clock signal (CK4)；
Electric capacity, its two ends connect node Q and n-th grade of signal output point (Out(n) respectively)；
During work, the random waveform required for signal will be scanned at the first clock signal (CK1) and second clock signal
(CK2) cross-circulation in, utilizes the 3rd clock signal (CK3) and the 4th clock signal (CK4) to enter the waveform of required generation
Row intercepts, thus produces the scanning signal of required waveform.
Wherein, described waveform is multiple-pulse.
Wherein, for the 1st grade of GOA circuit unit, the grid input enabling signal of its 5th thin film transistor (TFT) (T5).
Wherein, this first clock signal (CK1) is alternately made up of high level signal and multipulse signal.
Wherein, this second clock signal (CK2) is alternately made up of high level signal and multipulse signal.
Wherein, the 3rd clock signal (CK3) is alternately made up of high level signal and low level signal.
Wherein, the 4th clock signal (CK4) is alternately made up of high level signal and low level signal.
Wherein, from time diagram, when this first clock signal (CK1) is in high level signal, the 3rd clock letter
Number (CK3) is in low level signal；When this first clock signal (CK1) is in multipulse signal, the 3rd clock signal (CK3)
It is in high level signal.
Wherein, from time diagram, when this second clock signal (CK2) is in multipulse signal, the 4th clock letter
Number (CK4) is in high level signal；When this second clock signal (CK2) is in high level signal, the 4th clock signal (CK4)
It is in low level signal.
Wherein, this enabling signal is initially low level signal, is subsequently changed to keep high level signal.
To sum up, the OLED of the present invention shows that GOA scan drive circuit can adapt to sending out of the OLED pixel circuit of diversification
Exhibition demand, utilizes clock signal can produce the scanning signal of transmission step by step of multiple-pulse and other random waveforms.
Accompanying drawing explanation
Below in conjunction with the accompanying drawings, by the detailed description of the invention of the present invention is described in detail, technical scheme will be made
And other beneficial effects are apparent.
In accompanying drawing,
Figure 1A is the odd level partial circuit schematic diagram of OLED of the present invention display GOA scan drive circuit；
Figure 1B is the even level partial circuit schematic diagram of OLED of the present invention display GOA scan drive circuit；
Fig. 2 be OLED of the present invention display GOA scan drive circuit one preferred embodiment produce multiple-pulse scanning signal time
Between scheme；
Fig. 3 is that OLED of the present invention shows GOA scan drive circuit transfer circuit connection diagram step by step；
Fig. 4 is that OLED of the present invention display GOA scan drive circuit transmits analog result schematic diagram step by step.
Detailed description of the invention
See Figure 1A and Figure 1B, its odd level part being respectively OLED of the present invention display GOA scan drive circuit and idol
Several levels partial circuit schematic diagram.This OLED display GOA scan drive circuit includes multiple GOA circuit units of cascade, wherein n-th
Level GOA circuit unit includes:
Thin film transistor (TFT) T1, its grid connects node Q, source electrode and drain electrode and connects n-th grade of signal output point Out(n respectively)
With input a clock signal, as n-th grade then inputs the first clock signal CK1 for odd level, then input the such as n-th grade for even level
Two clock signals CK2；
Thin film transistor (TFT) T2, its grid connects node P, source electrode and drain electrode and connects node H and n-th grade of signal output point respectively
Out(n)；
Thin film transistor (TFT) T3, its source electrode and drain electrode connect node Q and node L respectively；
Thin film transistor (TFT) T4, its grid connects node Q, source electrode and drain electrode and connects node L's and thin film transistor (TFT) T3 respectively
Grid；
Thin film transistor (TFT) T5, its grid connects (n-1)th grade of signal output point Out(n-1), source electrode and drain electrode connecting joint respectively
Point L and the grid of thin film transistor (TFT) T3；
Thin film transistor (TFT) T6, its grid connects node P, source electrode and drain electrode and connects node Q and node H respectively；
Thin film transistor (TFT) T7, its grid connects node P, source electrode and drain electrode and connects node H's and thin film transistor (TFT) T3 respectively
Grid；
Thin film transistor (TFT) T8, its grid connects the grid of thin film transistor (TFT) T3, source electrode and drain electrode and connects node H and joint respectively
Point P；
Thin film transistor (TFT) T9, its grid inputs another clock signal, source electrode and drain electrode and inputs this another clock signal respectively
With connect node P, as n-th grade then inputs the 3rd clock signal CK3 for odd level, as n-th grade be even level then input the 4th time
Clock signal CK4；
Electric capacity, its two ends connect node Q and n-th grade of signal output point Out(n respectively)；
During work, the random waveform required for signal will be scanned in the first clock signal CK1 and second clock signal CK2
Cross-circulation, utilizes the 3rd clock signal CK3 and the 4th clock signal CK4 to intercept the waveform of required generation, thus
Produce the scanning signal of required waveform.
The present invention discloses the GOA circuit design of a kind of 9T1C, and GOA circuit is by nine thin film transistor (TFT)s and a capacitance group
Become, utilize clocking signal layout to produce multiple-pulse and the scanning signal of random waveform.Many arteries and veins that scanning signal demand is produced
Rush signal cross-circulation in clock signal CK1 and CK2, utilize other two groups of conventional clock signal CK3 and CK4 that multiple-pulse is believed
Number intercept, thus produce multiple-pulse scanning signal.The output of every grade of GOA circuit unit is next stage and inputs, and often
Level circuit cycles exchange CK1 and CK2 and CK3 and CK4, to realize transmitting step by step, output signal is the many arteries and veins transmitted step by step
Punching scanning signal.The GOA circuit design of the present invention produces for multiple-pulse scanning signal incessantly, by revising the weight of CK1 and CK2
Multiple unit, so that it may produce the scanning signal of transmission step by step of the random waveform consistent with repetitive.
Seeing Fig. 2, it produces multiple-pulse scanning letter for OLED of the present invention display GOA scan drive circuit one preferred embodiment
Number time diagram.GOA circuit unit odd level (as shown in Figure 1A) duty can be divided into a, b, c three phases:
I. stage a, the Out [n-1] during enabling signal STV1 is Figure 1A in time diagram, T3, T5, T8 and T9 open, and Q saves
Point is low level, and P node is high level, and the signal of CK1 is written to output port.
Ii. stage b, STV1 and CK3 redirects as high level, and T8 opens, and P node is maintained high level；Guarantor at electric capacity
Holding under effect, Q node remains low level, and the signal of CK1 continues to write to output port.
Iii. stage c, STV1 maintain high level, and CK3 redirects as low level, and T9 opens, and P node is maintained low level；
T6 opens, and Q node is maintained high level, the signal of this stage CK1, changes high level into and writes direct output signal.
Can be obtained by above analysis, the duty of GOA is not by the waveform influence of CK1, at a and the signal of b-stage CK1
It is can to directly write in output signal, it is possible to the signal of a and b-stage is revised as random waveform, all can realize
Transmit step by step.The GOA design of this patent produces for multiple-pulse scanning signal incessantly, revises a of CK1, b-stage repetitive,
Just can produce the transmission signal step by step of the random waveform consistent with repetitive.
Change CK4 into by changing CK1 signal in Figure 1A into CK2, CK3 signal, a new circuit diagram can be formed, such as figure
Shown in 1B, using the output signal of upper level (Figure 1A) as next stage (Figure 1B) input signal, scanning signal can be passed to
Next stage, the repetitive of write CK2.
From time diagram, the first clock signal CK1 is alternately made up of high level signal and multipulse signal, when second
Clock signal CK2 is alternately made up of high level signal and multipulse signal, and the 3rd clock signal CK3 is by high level signal and low level
Signal alternately composition, the 4th clock signal CK4 is alternately made up of high level signal and low level signal.When the first clock signal
When CK1 is in high level signal, the 3rd clock signal CK3 is in low level signal；When this first clock signal CK1 is in many arteries and veins
When rushing signal, the 3rd clock signal CK3 is in high level signal.When this second clock signal CK2 is in multipulse signal, the
Four clock signals CK4 are in high level signal；When this second clock signal CK2 is in high level signal, the 4th clock signal
CK4 is in low level signal.Enabling signal STV1 is initially low level signal, is subsequently changed to keep high level signal.
Seeing Fig. 3, it shows GOA scan drive circuit transfer circuit connection diagram step by step for OLED of the present invention.Will figure
The circuit of 1A and Figure 1B is circulated connection, is concatenated together by signal output point at different levels between GOA circuit units at different levels,
As shown in Figure 3, it is possible to achieve the function that GOA circuit unit level passes.Wherein the 1st grade of GOA circuit unit input enabling signal STV.
Seeing Fig. 4, it transmits analog result schematic diagram step by step for OLED of the present invention display GOA scan drive circuit.Pass through
Amendment clock signal CK1 and the repetitive of clock signal CK2, so that it may produce the random waveform consistent with repetitive step by step
Transmission signal, simulation result is as shown in Figure 4.
To sum up, the OLED of the present invention shows that GOA scan drive circuit can adapt to sending out of the OLED pixel circuit of diversification
Exhibition demand, utilizes clock signal can produce the scanning signal of transmission step by step of multiple-pulse and other random waveforms.
The above, for the person of ordinary skill of the art, can be according to technical scheme and technology
Other various corresponding changes and deformation are made in design, and all these change and deformation all should belong to the appended right of the present invention
The protection domain required.
Claims (10)
1. an OLED shows GOA scan drive circuit, it is characterised in that include multiple GOA circuit units of cascade, Qi Zhong
N level GOA circuit unit includes:
The first film transistor (T1), its grid connects node Q, source electrode and drain electrode and connects n-th grade of signal output point (Out respectively
(n)) and input one clock signal, as n-th grade then inputs the first clock signal (CK1) for odd level, as n-th grade be even level then
Input second clock signal (CK2)；
Second thin film transistor (TFT) (T2), its grid connects node P, source electrode and drain electrode and connects node H and n-th grade of signal output respectively
Point (Out (n))；
3rd thin film transistor (TFT) (T3), its source electrode and drain electrode connect node Q and node L respectively；
4th thin film transistor (TFT) (T4), its grid connects node Q, source electrode and drain electrode and connects node L and the 3rd film crystal respectively
The grid of pipe (T3)；
5th thin film transistor (TFT) (T5), its grid connects (n-1)th grade of signal output point (Out (n-1)), source electrode and drain electrode and connects respectively
Connect node L and the grid of the 3rd thin film transistor (TFT) (T3)；
6th thin film transistor (TFT) (T6), its grid connects node P, source electrode and drain electrode and connects node Q and node H respectively；
7th thin film transistor (TFT) (T7), its grid connects node P, source electrode and drain electrode and connects node H and the 3rd film crystal respectively
The grid of pipe (T3)；
8th thin film transistor (TFT) (T8), its grid connects the grid of the 3rd thin film transistor (TFT) (T3), source electrode and drain electrode and connects respectively
Node H and node P；
9th thin film transistor (TFT) (T9), its grid inputs another clock signal, source electrode and drain electrode and inputs this another clock letter respectively
Number and connect node P, as n-th grade then inputs the 3rd clock signal (CK3) for odd level, as n-th grade is that even level then inputs the
Four clock signals (CK4)；
Electric capacity, its two ends connect node Q and n-th grade of signal output point (Out (n)) respectively；
During work, the random waveform required for signal will be scanned in the first clock signal (CK1) and second clock signal (CK2)
Cross-circulation, utilizes the 3rd clock signal (CK3) and the 4th clock signal (CK4) to intercept the waveform of required generation,
Thus produce the scanning signal of required waveform.
2. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that described waveform is multiple-pulse.
3. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that for the 1st grade of GOA circuit list
Unit, the grid input enabling signal of its 5th thin film transistor (TFT) (T5).
4. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that this first clock signal (CK1)
Alternately it is made up of high level signal and multipulse signal.
5. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that this second clock signal (CK2)
Alternately it is made up of high level signal and multipulse signal.
6. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that the 3rd clock signal (CK3)
Alternately it is made up of high level signal and low level signal.
7. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that the 4th clock signal (CK4)
Alternately it is made up of high level signal and low level signal.
8. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that from time diagram, when this
When first clock signal (CK1) is in high level signal, the 3rd clock signal (CK3) is in low level signal；When this first time
When clock signal (CK1) is in multipulse signal, the 3rd clock signal (CK3) is in high level signal.
9. OLED as claimed in claim 1 shows GOA scan drive circuit, it is characterised in that from time diagram, when this
When second clock signal (CK2) is in multipulse signal, the 4th clock signal (CK4) is in high level signal；When this second time
When clock signal (CK2) is in high level signal, the 4th clock signal (CK4) is in low level signal.
10. OLED as claimed in claim 3 shows GOA scan drive circuit, it is characterised in that this enabling signal is initially low
Level signal, is subsequently changed to keep high level signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610947752.8A CN106328054B (en) | 2016-10-24 | 2016-10-24 | OLED shows GOA scan drive circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610947752.8A CN106328054B (en) | 2016-10-24 | 2016-10-24 | OLED shows GOA scan drive circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106328054A true CN106328054A (en) | 2017-01-11 |
| CN106328054B CN106328054B (en) | 2018-07-10 |
Family
ID=57818909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610947752.8A Active CN106328054B (en) | 2016-10-24 | 2016-10-24 | OLED shows GOA scan drive circuits |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106328054B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019056508A1 (en) * | 2017-09-21 | 2019-03-28 | 武汉华星光电半导体显示技术有限公司 | Scan goa circuit |
| WO2020191511A1 (en) * | 2019-03-22 | 2020-10-01 | 京东方科技集团股份有限公司 | Shift register unit, driving circuit, display apparatus, and driving method |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103258495A (en) * | 2013-05-07 | 2013-08-21 | 京东方科技集团股份有限公司 | Shift storage unit, shift register and display device |
| CN104282270A (en) * | 2014-10-17 | 2015-01-14 | 京东方科技集团股份有限公司 | Gate drive circuit, displaying circuit, drive method and displaying device |
| CN104282269A (en) * | 2014-10-17 | 2015-01-14 | 京东方科技集团股份有限公司 | Display circuit, driving method of display circuit and display device |
| CN104517575A (en) * | 2014-12-15 | 2015-04-15 | 深圳市华星光电技术有限公司 | Shifting register and level-transmission gate drive circuit |
| CN104809979A (en) * | 2015-05-26 | 2015-07-29 | 京东方科技集团股份有限公司 | Inverter, driving method thereof, GOA (Gate driver On Array) unit, GOA circuit and display device |
| CN105047120A (en) * | 2015-06-30 | 2015-11-11 | 上海天马微电子有限公司 | Gate drive circuit and drive method thereof, and display device |
| CN105469761A (en) * | 2015-12-22 | 2016-04-06 | 武汉华星光电技术有限公司 | GOA circuit used in narrow-frame liquid crystal display panel |
| CN105679224A (en) * | 2014-12-03 | 2016-06-15 | Nlt科技股份有限公司 | Shift register circuit, gate driver and display apparatus |
| CN105702196A (en) * | 2016-04-29 | 2016-06-22 | 京东方科技集团股份有限公司 | Grid electrode driving circuit and driving method thereof and display device |
| US20160253938A1 (en) * | 2013-12-18 | 2016-09-01 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | GOA Circuit for Tablet Display and Display Device |
-
2016
- 2016-10-24 CN CN201610947752.8A patent/CN106328054B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103258495A (en) * | 2013-05-07 | 2013-08-21 | 京东方科技集团股份有限公司 | Shift storage unit, shift register and display device |
| US20160253938A1 (en) * | 2013-12-18 | 2016-09-01 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | GOA Circuit for Tablet Display and Display Device |
| CN104282270A (en) * | 2014-10-17 | 2015-01-14 | 京东方科技集团股份有限公司 | Gate drive circuit, displaying circuit, drive method and displaying device |
| CN104282269A (en) * | 2014-10-17 | 2015-01-14 | 京东方科技集团股份有限公司 | Display circuit, driving method of display circuit and display device |
| CN105679224A (en) * | 2014-12-03 | 2016-06-15 | Nlt科技股份有限公司 | Shift register circuit, gate driver and display apparatus |
| CN104517575A (en) * | 2014-12-15 | 2015-04-15 | 深圳市华星光电技术有限公司 | Shifting register and level-transmission gate drive circuit |
| CN104809979A (en) * | 2015-05-26 | 2015-07-29 | 京东方科技集团股份有限公司 | Inverter, driving method thereof, GOA (Gate driver On Array) unit, GOA circuit and display device |
| CN105047120A (en) * | 2015-06-30 | 2015-11-11 | 上海天马微电子有限公司 | Gate drive circuit and drive method thereof, and display device |
| CN105469761A (en) * | 2015-12-22 | 2016-04-06 | 武汉华星光电技术有限公司 | GOA circuit used in narrow-frame liquid crystal display panel |
| CN105702196A (en) * | 2016-04-29 | 2016-06-22 | 京东方科技集团股份有限公司 | Grid electrode driving circuit and driving method thereof and display device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019056508A1 (en) * | 2017-09-21 | 2019-03-28 | 武汉华星光电半导体显示技术有限公司 | Scan goa circuit |
| WO2020191511A1 (en) * | 2019-03-22 | 2020-10-01 | 京东方科技集团股份有限公司 | Shift register unit, driving circuit, display apparatus, and driving method |
| US11308854B2 (en) | 2019-03-22 | 2022-04-19 | Boe Technology Group Co., Ltd. | Shift register unit, driving circuit, display device and driving method |
| US11574581B2 (en) | 2019-03-22 | 2023-02-07 | Boe Technology Group Co., Ltd. | Shift register unit, driving circuit, display device and driving method |
| US11854460B2 (en) | 2019-03-22 | 2023-12-26 | Boe Technology Group Co., Ltd. | Shift register unit, driving circuit, display device and driving method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106328054B (en) | 2018-07-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106782313B (en) | Organic light emissive pixels driving circuit, driving method and organic light emitting display panel | |
| CN105679248B (en) | Shift register cell and its driving method, gate driving circuit, display device | |
| CN102385835B (en) | Bilateral scanning driver and utilize the display device of this bilateral scanning driver | |
| CN105609041B (en) | Shift register cell and its driving method, gate driving circuit, display device | |
| CN110021264A (en) | Pixel circuit and its driving method, display panel | |
| CN104252835B (en) | Organic light emitting diode display and its driving method | |
| CN105702189B (en) | Scan drive circuit and the display panel for applying it | |
| CN106205467B (en) | Oganic light-emitting display device and method for driving oganic light-emitting display device | |
| CN109599062A (en) | Pixel circuit and its driving method, display device | |
| CN107610652A (en) | Image element circuit, its driving method, display panel and display device | |
| CN106601190A (en) | Shift register unit and driving method thereof, gate drive circuit and display device | |
| CN110148384A (en) | A kind of driving method of array substrate, display panel and pixel-driving circuit | |
| CN107170408A (en) | Image element circuit, driving method, organic EL display panel and display device | |
| CN106910468A (en) | The driving method of display panel, display device and image element circuit | |
| CN105139801B (en) | Array base palte horizontal drive circuit, shift register, array base palte and display | |
| CN106097976B (en) | Pixel-driving circuit and display device | |
| CN107256690A (en) | A kind of electroluminescence display panel, its driving method and display device | |
| CN207425322U (en) | Pixel circuit, display base plate and display device | |
| CN110706653A (en) | Drive circuit, display panel, drive method and display device | |
| CN1584963A (en) | Electro-optical device and electronic apparatus | |
| CN106652901B (en) | Drive circuit and display device using the same | |
| CN105575329B (en) | Shift register and driving method, drive circuit, array base palte and display device | |
| CN107025872A (en) | Shift register cell, gate driving circuit and display device | |
| CN108154901A (en) | Shift register, the image display and its driving method for including it | |
| CN107358902A (en) | Display panel drive, display device and the method for driving display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20190222 Address after: 430079 Room 305, Building C5, Guanggu Biological Innovation Park, 666 High-tech Avenue, Donghu New Technology Development Zone, Wuhan City, Hubei Province Patentee after: Wuhan Huaxing photoelectric semiconductor display technology Co., Ltd. Address before: 430070 C5 Biological City, 666 High-tech Avenue, Donghu Development Zone, Wuhan City, Hubei Province Patentee before: Wuhan Hua Xing photoelectricity technology corporation, Ltd. |