CN106301568B - Coding method, device, the port HT and processor - Google Patents

Coding method, device, the port HT and processor Download PDF

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CN106301568B
CN106301568B CN201510290236.8A CN201510290236A CN106301568B CN 106301568 B CN106301568 B CN 106301568B CN 201510290236 A CN201510290236 A CN 201510290236A CN 106301568 B CN106301568 B CN 106301568B
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electric signals
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CN106301568A (en
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梁华岳
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Loongson Technology Corp Ltd
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Loongson Technology Corp Ltd
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Abstract

The embodiment of the present invention provides a kind of coding method, device, the port HT and processor, the method include: by 9 the first electric signals of tunnel to be output by coding and and turn string mode and be converted to the second electric signal of the road M, the balance of second electric signal, 0/1 code rate described in every road, the M are the positive integer less than or equal to 3;Second electric signal of the road M is turned into light mode by electricity and is converted to the road M optical signal, the optical signal is the data transmitted with optical fiber, to realize the 9 road electric signal of parallel transmission when the processor based on optical fiber interconnections is using HT agreement.

Description

Signal coding method and device, HT port and processor
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a signal encoding method and apparatus, an HT port, and a processor.
Background
With the development of silicon-based optoelectronic technology, processor interconnect interfaces are gradually beginning to try out using optical transmission signals. The advantages of using fiber optic interconnects for processors are high bandwidth, low loss, low latency, etc. The data rate of single-path optical signal transmission is far higher than that of electric signals, and the input and output interfaces can be reduced while the bandwidth can be improved by using optical fiber interconnection. The conventional processor signal transmission protocol is based on electrical signal transmission technology, and generally, the transmitted electrical signals are encoded by 8B/10B encoding to realize the balance of 0/1 code rates.
However, many processor interconnects now use the Hyper Transport (HT) protocol, and for this protocol, 10 electrical signals are required to be transmitted in parallel, including 8 data signals, 1 control signal and 1 clock signal. The HT protocol is parallel source synchronous transmission, while in fiber optic transmission, data is typically non-source synchronous. The difference does not bring extra overhead, but is beneficial to reducing the path of optical fiber transmission signals, because after optical fiber transmission is adopted, the receiving end processor of the HT does not need to recover a clock and perform data sampling any more, but the clock and data recovery circuit is used for completing the data sampling, and the logic processing of the receiving end processor of the HT is the recovered digital signals. Therefore, in the HT protocol, clock signals do not need to be transmitted, the number of parallel buses is reduced, and the requirement of the parallel signals on relative delay is reduced. In the case that the clock signal does not need to be transmitted, how to implement parallel transmission of 9 electrical signals when the HT protocol is adopted by the optical fiber interconnection-based processor is an urgent problem to be solved.
Disclosure of Invention
The embodiment of the invention provides a signal coding method and device, an HT port and a processor, which are used for realizing parallel transmission of 9 paths of electric signals when the processor based on optical fiber interconnection adopts an HT protocol.
In a first aspect, an embodiment of the present invention provides a signal encoding method, including:
converting 9 paths of first electric signals to be output into M paths of second electric signals in a coding and parallel-serial mode, wherein the code rate of each path of second electric signal 0/1 is balanced, and M is a positive integer less than or equal to 3;
and converting the M second electric signals into M optical signals in an electric-to-optical conversion mode, wherein the optical signals are data transmitted by optical fibers.
In a second aspect, an embodiment of the present invention provides a signal encoding apparatus, including:
the encoding conversion circuit is used for converting 9 paths of first electric signals to be output into M paths of second electric signals in an encoding and parallel-serial mode, wherein the code rate of each path of second electric signals 0/1 is balanced, and M is a positive integer less than or equal to 3;
the electro-optical conversion circuit is connected with the output end of the code conversion circuit and is used for converting the M paths of third electric signals output by the code conversion circuit into M paths of optical signals in an electric-to-optical conversion mode.
In a third aspect, an embodiment of the present invention provides an HT port, including: the second aspect of the present invention provides a signal encoding apparatus.
In a fourth aspect, an embodiment of the present invention provides a processor, including: according to a third aspect of the present invention, there is provided an HT port through which optical fiber transmission is implemented.
The embodiment of the invention provides a signal coding method and device, an HT port and a processor, wherein 9 paths of first electric signals to be output are converted into M paths of second electric signals in a coding and parallel-serial mode, the code rate of each path of second electric signal 0/1 is balanced, and then the M paths of second electric signals are converted into M paths of optical signals in an electric-to-optical mode, so that the 9 paths of electric signals are transmitted in parallel when the processor based on optical fiber interconnection adopts an HT protocol.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a flowchart of a first embodiment of a signal encoding method according to the present invention;
FIG. 2 is a flowchart illustrating a second embodiment of a signal encoding method according to the present invention;
FIG. 3 is a flowchart of a third embodiment of a signal encoding method according to the present invention;
FIG. 4 is a diagram illustrating a signal encoding method according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a corresponding relationship among 3 paths of electrical signals, an optical path state value, and 4 paths of electrical signals according to an embodiment of the present invention;
fig. 6 is a schematic diagram of converting 3 sets of third electrical signals into M paths of second electrical signals according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of obtaining a current status value of an optical path according to the present invention;
FIG. 8 is a schematic structural diagram of a signal encoding apparatus according to a first embodiment of the present invention;
FIG. 9 is a schematic structural diagram of a second signal encoding apparatus according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a third embodiment of a signal encoding device according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a flowchart of a first embodiment of a signal encoding method according to the present invention, and as shown in fig. 1, the method of this embodiment may include:
s101, converting 9 paths of first electric signals to be output into M paths of second electric signals in a coding and parallel-serial mode, wherein the code rate of each path of second electric signal 0/1 is balanced, and M is a positive integer less than or equal to 3.
And S102, converting the M second electric signals into M optical signals in an electric-to-optical conversion mode, wherein the optical signals are data transmitted by optical fibers.
The method of the embodiment is used for an HT protocol transmitted through an optical fiber, and the method of the embodiment is executed by a signal encoding device, wherein the signal encoding device is disposed in an HT port, the HT port can be applied to a processor based on optical fiber transmission, when transmission is performed based on the HT protocol, 10 electrical signals are transmitted in parallel, and the 10 electrical signals include 8 data signals, 1 control signal and 1 clock signal; since the transmission is based on optical fiber, no clock signal transmission is required. Therefore, the signal encoding device can determine 9 paths of electric signals which need to be output currently, and the signals are called 9 paths of first electric signals; then, converting 9 paths of first electric signals to be output into M paths of second electric signals in a coding and parallel-serial mode, wherein the code rate of each path of second signals 0/1 is balanced, and M is an integer less than or equal to 3; and converting the M second electric signals into M optical signals in an electric-to-optical conversion mode, wherein the optical signals are data transmitted by optical fibers.
In a first feasible implementation manner, 9 paths of first electrical signals to be output may be encoded into 11 paths of third electrical signals, and then the 11 paths of third electrical signals are converted into 1 path of second electrical signals in a parallel-to-serial manner, where the 1 path of second electrical signals 0/1 has balanced code rate, and then the 1 path of second electrical signals are converted into 1 optical signal in an electrical-to-optical manner. Optionally, an alternative implementation of encoding the 9 first electrical signals into the 11 third electrical signals is: the method comprises the steps of dividing 9 paths of first electric signals into two groups of first electric signal groups, enabling the first group of first electric signal groups to comprise 4 paths of first electric signals, enabling the second group of second electric signal groups to comprise 5 paths of first electric signals, coding the 4 paths of first electric signals in the first group of first electric signal groups into 5 paths of third electric signals, coding the 5 paths of first electric signals in the second group of second electric signal groups into 6 paths of third electric signals, and accordingly obtaining 11 paths of third electric signals.
In a second feasible implementation manner, 9 paths of first electrical signals to be output may be encoded into 12 paths of third electrical signals, and then the 12 paths of third electrical signals are converted into M paths of second electrical signals in a parallel-to-serial manner, where each path of second electrical signals 0/1 has balanced code rate, and then the M paths of second electrical signals are converted into M optical signals in an electrical-to-optical manner, where M is a positive integer less than or equal to 3. The specific implementation process of this implementation can be referred to the description of the following method embodiments of the present invention.
In a third feasible implementation manner, 9 paths of first electrical signals to be output are divided into three groups of first electrical signal groups, each group of first electrical signal groups includes 3 paths of first electrical signals, then 3 paths of first electrical signals in each group of first electrical signal groups are converted into 1 path of 3-bit electrical signals in a parallel-serial manner, so that 3-bit electrical signals are obtained, so that 3-bit electrical signal groups including three 3-bit electrical signals are obtained, each 3-bit electrical signal is encoded through 3B/4B, and is encoded into 4-bit electrical signals to generate 4-bit electrical signal groups including three 4-bit electrical signals, three 4-bit electrical signals in the 4-bit electrical signal groups are converted into M paths of second electrical signals in a parallel-serial manner, and the M paths of second electrical signals 0/1 have balanced code rates; and then converting the M paths of second electric signals into M optical signals in an electric-to-optical conversion mode, wherein M is a positive integer less than or equal to 3. Alternatively, the process of encoding the 3-bit electrical signal into the 4-bit electrical signal may be referred to in the following embodiments of the methods of the present invention, where the 3-way electrical signal is encoded into the 4-way electrical signal.
In the signal encoding method provided in this embodiment, 9 paths of first electrical signals to be output are converted into M paths of second electrical signals in a coding and parallel-serial manner, each path of second electrical signals 0/1 has a balanced code rate, and then the M paths of second electrical signals are converted into M paths of optical signals in an electrical-to-optical manner, so that the 9 paths of electrical signals are transmitted in parallel when the processor based on the optical fiber interconnection adopts the HT protocol.
Fig. 2 is a flowchart of a second embodiment of a signal encoding method of the present invention, as shown in fig. 2, the method of this embodiment may include:
s201, dividing 9 paths of first electric signals to be output into 3 groups of first electric signal groups, wherein each group of first electric signal groups comprises 3 paths of first electric signals.
The method of the present embodiment is used in an HT protocol transmitted through an optical fiber, and the method of the present embodiment is performed by a signal encoding device, where the signal encoding device is disposed in an HT port, and the HT port may be applied to a processor based on optical fiber transmission, and when the processor based on optical fiber transmission transmits 10 electrical signals to a peer processor at a time, where the 10 electrical signals include 8 data signals, 1 control signal, and 1 clock signal. In the HT-based protocol, the clock signal does not need to be transmitted. Therefore, the signal encoding device can determine 9 paths of electric signals which need to be output currently, and the signals are called 9 paths of first electric signals; the 9 first electrical signals are then divided into 3 sets of first electrical signal groups, each set of first electrical signal groups comprising 3 first electrical signals.
S202, according to the corresponding relation between the 3 paths of electric signals and the 4 paths of electric signals, the 3 paths of first electric signals in each group of first electric signal groups are coded into 4 paths of third electric signals to generate a third electric signal group.
In this embodiment, after dividing 9 channels of first electrical signals into 3 groups of electrical signals, each of which includes 3 channels of first electrical signals, 4 channels of electrical signals corresponding to the 3 channels of first electrical signals in each group of first electrical signal groups may be determined according to a correspondence relationship between the 3 channels of electrical signals and the 4 channels of electrical signals, and then the 3 channels of first electrical signals in each group of first electrical signal groups are encoded into 4 channels of electrical signals corresponding to the 3 channels of first electrical signals, the 4 channels of electrical signals obtained by the encoding are referred to as 4 channels of third electrical signals, and the 4 channels of third electrical signals constitute a third electrical signal group; thus, 3 sets of third electrical signal sets may be obtained, each set comprising 4 third electrical signals.
S203, converting the third electric signals of the 3 groups of third electric signal groups into M paths of second electric signals in a parallel-serial mode, wherein the code rate of each path of second electric signal 0/1 is balanced.
In this embodiment, after 3 groups of third electrical signal groups are obtained, the third electrical signals in the 3 groups of third electrical signal groups are converted into M paths of second electrical signals in a parallel-to-serial manner, that is, 12 paths of third electrical signals are converted into M paths of second electrical signals in a parallel-to-serial manner, M is a positive integer less than or equal to 3, and each path of second electrical signals 0/1 has balanced code rate.
In a first possible implementation manner, when M is 3, that is, a specific implementation process of converting the third electrical signals of the 3 groups of third electrical signals into the 3 second electrical signals in a parallel-to-serial manner is as follows: converting 4 paths of third electric signals in each group of third electric signal groups into 1 path of second electric signals in a parallel-serial mode; thereby obtaining 3 second electrical signals. The 4 paths of third electrical signals are respectively parallel-transmitted electrical signals, and the 4 paths of third electrical signals are converted into 1 path of second electrical signals, for example, the 4 paths of third electrical signals which are parallel-transmitted are converted into a 1 st path of third electrical signal, a 2 nd path of third electrical signal, a 3 rd path of third electrical signal, and a 4 th path of third electrical signal which are sequentially transmitted, the transmission mode is serial, and the four paths of serial third electrical signals are called as one path of second electrical signals.
In a second possible implementation manner, when M is 2, that is, a specific implementation process of converting the third electrical signals of the 3 groups of third electrical signal groups into the 2 second electrical signals in a parallel-to-serial manner is as follows: converting 4 paths of third electric signals in the first group of third electric signal groups and 2 paths of third electric signals in the second group of third electric signal groups into one path of second electric signals in a parallel-serial mode; converting the remaining two paths of third electric signals in the second group of third electric signal groups and 4 paths of third electric signals in the third group of third electric signal groups into one path of second electric signals in a parallel-serial mode; thereby obtaining two second electrical signals. The 4 paths of third electrical signals are respectively electrical signals transmitted in parallel, and the 4 paths of third electrical signals in the first group of third electrical signal groups and the 2 paths of third electrical signals in the second group of third electrical signal groups are converted into 1 path of second electrical signals, for example, the 4 paths of third electrical signals and the 2 paths of third electrical signals in the second group of third electrical signal groups are converted into 1 path of third electrical signals, which are transmitted in sequence, the 1 path of third electrical signals, the 2 path of third electrical signals, the 3 path of third electrical signals, the 4 path of third electrical signals, the 1 path of third electrical signals in the second group of third electrical signal groups, and the 2 path of third electrical signals, which are transmitted in series, and the six paths of serial third electrical signals are called as one path of second electrical signals; the remaining 2 third electrical signals in the second group of third electrical signal groups and 4 third electrical signals in the third group of third electrical signal groups are converted into 1 second electrical signal, for example, the remaining 2 third electrical signals in the second group of third electrical signal groups and the 4 third electrical signals in the third group of third electrical signal groups may be converted into 1 third electrical signal, which is sequentially transmitted as the 1 st third electrical signal, the 2 nd third electrical signal, the 3 rd third electrical signal and the 4 th third electrical signal in the third group of third electrical signal groups, and the 3 rd third electrical signal and the 4 th third electrical signal in the second group of third electrical signal groups are transmitted in a serial manner, and the serial six third electrical signals are referred to as one second electrical signal.
In a third possible implementation, all the third electrical signals in the 3 sets of third electrical signals are converted into 1 second electrical signal in a parallel-to-serial manner. For example, the signal is converted into a 1 st third electrical signal, a 2 nd third electrical signal, a 3 rd third electrical signal, a 4 th third electrical signal in the 1 st group of third electrical signals, a 1 st third electrical signal, a 2 nd third electrical signal, a 3 rd third electrical signal, a 4 th third electrical signal in the 2 nd group of third electrical signals, a 1 st third electrical signal, a 2 nd third electrical signal, a 3 rd third electrical signal, and a 4 th third electrical signal in the 3 rd group of third electrical signals. The transmission mode is serial, and the serial 12 third electric signals are called one second electric signal.
S204, converting the M second electric signals into M optical signals in an electric-to-optical mode; the optical signal is data transmitted by an optical fiber.
In this embodiment, the specific implementation process of S204 may refer to the relevant records in the first embodiment of the method of the present invention, and is not described herein again.
In the signal encoding method provided by this embodiment, 9 paths of first electrical signals to be output are divided into 3 groups of first electrical signal groups; according to the corresponding relation between the 3 paths of electric signals and the 4 paths of electric signals, the 3 paths of first electric signals in each group of first electric signal groups are coded into 4 paths of third electric signals to generate a third electric signal group, the third electric signals in the 3 groups of third electric signal groups are converted into M paths of second electric signals in a parallel-serial mode, the code rate of each path of second electric signal 0/1 is balanced, and the M paths of second electric signals are converted into M paths of optical signals; therefore, the parallel transmission of 9 electric signals is realized when the HT protocol is adopted by the optical fiber interconnection-based processor.
Fig. 3 is a flowchart of a third embodiment of a signal encoding method of the present invention, and as shown in fig. 3, the method of this embodiment may include:
s301, dividing 9 paths of first electric signals to be output into 3 groups of first electric signal groups, wherein each group of first electric signal groups comprises 3 paths of first electric signals.
In this embodiment, the specific implementation process of S301 may refer to the related description in the second embodiment of the method of the present invention, and is not described herein again.
Wherein each set of first electrical signal groups includes 3 first electrical signals, such as 3 electrical signals A, B, C in parallel as shown in fig. 4.
S302, acquiring current state values of optical paths corresponding to 3 paths of first electric signals in each group of first electric signal groups; the optical path is a path for transmitting optical signals corresponding to the 3 paths of first electric signals.
And S303, according to the corresponding relation among the 3 paths of electric signals, the optical path state value and the 4 paths of electric signals and the current state value of the optical path corresponding to the 3 paths of first electric signals in each group of first electric signal groups, encoding the 3 paths of first electric signals in each group of first electric signal groups into 4 paths of third electric signals so as to generate a third electric signal group.
In this embodiment, the current state value of the path through which the optical signal obtained by converting the last of the 3 first electrical signals in each group of first electrical signal groups is transmitted may be obtained. Then, according to the correspondence among the 3 paths of electrical signals, the optical path state value and the 4 paths of electrical signals and the current state value of the optical path corresponding to the 3 paths of first electrical signals in each group of first electrical signal groups, 4 paths of electrical signals corresponding to the 3 paths of first electrical signals in each group of first electrical signal groups are determined, and then the 3 paths of first electrical signals are encoded into the 4 paths of electrical signals corresponding to the determined 3 paths of first electrical signals, namely 3B/4B encoding as shown in fig. 4; the 4 electric signals obtained by the coding are called 4 third electric signals, namely a third electric signal group is generated; thus 3 sets of third electrical signal sets may be obtained, each set of second electrical signal sets comprising 4 third electrical signals, e.g. 4 electrical signals f, a, b, c, respectively, in parallel as shown in fig. 4.
As shown in fig. 5, if the 3-channel first electrical signal is ABC in parallel and the 4-channel second electrical signal is fabc in parallel, S0 represents the current state value after the optical signal corresponding to "fa" in the optical channel transmission electrical signal fabc, and S1 represents the current state value after the optical signal corresponding to "bc" in the optical channel transmission electrical signal fabc, in the optical channel state values (S0, S1).
As can be seen from fig. 5, the optical path state value "×" indicates that, when ABC is 001, 4 electrical signals corresponding to 001 can be determined to be 1001 regardless of the current state values of the optical paths, i.e., S0 and S1. If ABC is 010, it can be determined that the 4-channel electric signal corresponding to 010 is 1010. If ABC is 101, it can be determined that 4 electrical signals corresponding to 101 are 0101. If ABC is 110, then 4 electrical signals corresponding to 110 can be determined to be 0110.
The light path state value "x-1" indicates that S1 is-1 regardless of whether S0 in the current state value of the light path is arbitrary; the optical path state value "+ 1" indicates that S1 is +1 regardless of whether S0 in the current state value of the optical path is arbitrary; if ABC is 100 and the current state value of the optical path is "x, -1", the 4 electrical signals corresponding to 100 can be determined to be 1011. If ABC is 100 and the current state value of the optical path is "+ 1", then the 4 electrical signals corresponding to 100 may be determined to be 1000. If ABC is 011 and the current state value of the optical path is "x, -1", then 4 electrical signals corresponding to 011 can be determined to be 0111. If ABC is 011 and the current state value of the optical path is "+ 1", the 4 electrical signals corresponding to 011 can be determined to be 0100.
The optical path status value "-1" — "indicates that S0 is-1 regardless of whether S1 in the current status value of the optical path is arbitrary; the optical path state value "+ 1" + indicates that S0 is +1 regardless of whether S1 in the current state value of the optical path is arbitrary; if ABC is 000 and the current state value of the optical path is "-1,", then the 4 electrical signals corresponding to 000 may be determined to be 1110. If ABC is 000 and the current state value of the optical path is "+ 1,", then 4 electrical signals corresponding to 000 may be determined to be 0010. If ABC is 111 and the current state value of the optical path is "-1, then the 4 electrical signals corresponding to 111 may be determined to be 1101. If ABC is 111 and the current state value of the optical path is "+ 1" + ", the 4 electrical signals corresponding to 111 can be determined to be 0001.
S304, converting the third electric signals in the 3 groups of third electric signal groups into the M paths of second electric signals in a parallel-serial mode.
S305, converting the M paths of second electric signals into M paths of optical signals in an electric-to-optical conversion mode.
In this embodiment, the specific implementation processes of S304 and S305 may refer to the related descriptions in S203 and S204 in the second embodiment of the method of the present invention, and are not described herein again.
Referring to fig. 6, S304 and S305 are illustrated, and as shown in fig. 6, the three sets of third electrical signal sets are a first set of third electrical signal set T1, a second set of third electrical signal set T2, and a third set of third electrical signal set T3; wherein, T1, T2, T3 include 4 third electrical signals respectively.
In a first possible implementation, when M is 1, all the third electrical signals in the 3 sets of third electrical signals may be converted into 1 second electrical signal; as shown in fig. 6, 3 third electrical signal groups T1, T2, T3 may be converted into serial T1, T2, T3, where the serial T1, T2, T3 are 1-channel second electrical signals. Then the 1 path of second electric signal is converted into 1 path of optical signal by an electric-to-optical conversion mode.
In a second possible implementation, when M is 2, 3 sets of the third electrical signals may be converted into 2 second electrical signals; as shown in fig. 6, the parallel four third electrical signals (i.e., fabc) in the first group of third electrical signal groups T1 and the parallel two third electrical signals (i.e., fa) in the second group of third electrical signal groups T2 may be converted into a serial one second electrical signal (i.e., fabcfa); the parallel four third electrical signals T3 (i.e., fabc) in the third set of third electrical signals and the other parallel two third electrical signals (i.e., bc) in the second set of third electrical signals T2 are also converted into a serial one second electrical signal, i.e., fabc. And then the two paths of second electric signals are converted into two paths of optical signals in an electric-to-optical mode.
In a third possible implementation manner, when M is 3, the 3 third electrical signals are converted into 3 optical signals through an electrical-to-optical conversion manner; as shown in fig. 6, the parallel four third electrical signals (i.e., fabc) in the first group of third electrical signal groups T1 may be converted into a serial first second electrical signal, the parallel four third electrical signals (i.e., fabc) in the second group of third electrical signal groups T2 may be converted into a serial second electrical signal, and the parallel four third electrical signals (i.e., fabc) in the second group of third electrical signal groups T3 may be converted into a serial third electrical signal.
Optionally, after performing S305, the method of this embodiment may further include:
s306, determining optical path state change values corresponding to the 4 paths of third electric signals in each group of third electric signal groups according to the corresponding relation between the 4 paths of electric signals and the optical path state change values.
In this embodiment, there is a corresponding relationship between the 4 electrical signals and the optical path state change value, so that the optical path state change value corresponding to the 4 third electrical signals in each group of third electrical signal groups may be determined according to the corresponding relationship between the 4 electrical signals and the optical path state change value.
And S307, updating the current state values of the optical paths corresponding to the 3 paths of first electrical signals in each group of first electrical signal groups according to the optical path state change values corresponding to the 4 paths of third electrical signals in each group of third electrical signal groups and the current state values of the optical paths corresponding to the 3 paths of first electrical signals in each group of first electrical signal groups.
In this embodiment, after determining the optical path state change values corresponding to the 4 third electrical signals in each group of third electrical signal groups, the optical path state change values corresponding to the 4 third electrical signals in each group of third electrical signal groups are and-operated with the current state values of the optical paths corresponding to the 3 first electrical signals in each group of first electrical signal groups, and the result of the and-operation is used as the new current state value of the optical path corresponding to the 3 first electrical signals in each group of first electrical signal groups.
For example, as shown in fig. 4, NS represents the optical path state change value corresponding to the 4 electrical signals, 0 represents 01 balance and the state value is not changed, and +2 represents the state value increased by two bits 1, and-2 represents the state value increased by two bits 0.
If the 4-channel third electrical signal is 1001, 1010, 0101, or 0110, the corresponding optical channel state change value is 0,0, and the current state value of the optical channel remains unchanged. If the 4-channel third electrical signal is 1011 or 0111, the corresponding optical channel state change value is 0, +2, and S1 in the updated current state value of the optical channel remains unchanged, but S2 becomes + 1. If the 4 third electrical signals are 1000 or 0100, the corresponding optical channel state change value is 0, -2, S1 in the updated current state value of the optical channel remains unchanged, and S2 becomes-1. If the 4-channel third electrical signal is 1110 or 1101, the corresponding optical channel state change value is +2,0, S2 in the updated current state value of the optical channel remains unchanged, and S1 becomes + 1. If the 4 third electrical signals are 0010 or 0001, the corresponding optical path state change value is-2, 0, S2 in the updated current state value of the optical path remains unchanged, and S2 becomes-1.
For the three optical paths, each optical path is independent and not matched with each other, and the current is independently balanced, so the FS of the first optical path is the state value after transmitting fabc in T1, the FS of the first optical path is the state value after transmitting fabc in T2, and the FS of the third optical path is the state value after transmitting fabc in T3, the FS of the second optical path is the state value after transmitting fabc in T2, and the FS of the third optical path is the state value after transmitting fabc in T3, for the two optical paths, one optical path is the state value after transmitting fabc in T1 before transmitting fa in T8, so the state value after transmitting fabc in T636 is the state value before transmitting fabc in T2, and therefore, the current state value after transmitting fabc in T1 is the state value before transmitting fabc in T2, and the current state value after transmitting the FS of the first optical path is the state value after transmitting fabc in T468, so the state value after transmitting the state of the first optical path is the state of the last optical path 12, the state value after transmitting fabc in the last optical path is the state of the transmitting fabc in T4628, so the state value after transmitting the last optical path is the state of the last optical path 3648, the state of the transmitting fabc in the state of the last optical path in the transmitting 3, the state of the last optical path 4628, the state of the last optical path in the state of the transmitting fabc 4628, the state of the last optical path, the last optical path in the state of the last optical path, the state of the last optical path 4624, the state of the last optical path, the state of the last optical path 4624, the state of the last optical path, the state of the last optical path 1, the last optical path, the state of the.
In the embodiment, the parallel transmission of 9 electrical signals when the optical fiber interconnection-based processor adopts the HT protocol is realized through the scheme.
Fig. 8 is a schematic structural diagram of a first embodiment of a signal encoding device according to the present invention, and as shown in fig. 8, the device of the present embodiment may include: the code conversion circuit 11 is used for converting 9 paths of first electric signals to be output into M paths of second electric signals in a code and parallel-serial mode, the code rate of each path of second electric signals 0/1 is balanced, and M is a positive integer less than or equal to 3; and the electro-optical conversion circuit 12 is connected to the output end of the code conversion circuit 11, and is configured to convert the M third electrical signals output by the code conversion circuit 11 into M optical signals in an electrical-to-optical manner.
The apparatus of this embodiment may be configured to implement the technical solutions of the above method embodiments of the present invention, and the implementation principles and technical effects are similar, which are not described herein again.
Fig. 9 is a schematic structural diagram of a second embodiment of the signal encoding device of the present invention, and as shown in fig. 9, in the device of the present embodiment, on the basis of the embodiment of the device shown in fig. 8, the code conversion circuit 11 may include: 3 sets of a 3B/4B encoding sub-circuit 111 and a parallel-to-serial sub-circuit 112;
wherein each group of 3B/4B coding sub-circuits 111 comprises: 3 first electrical signal inputs 1111, 3B/4B encoder 1112, 4 third electrical signal outputs 1113; 3 first electrical signal input terminals 1111 for receiving 3 first electrical signals; a 3B/4B encoder 1112, configured to encode the 3 paths of first electrical signals received by the 3 first electrical signal input ends into 4 paths of third electrical signals according to a correspondence relationship between the 3 paths of electrical signals and the 4 paths of electrical signals to generate a third electrical signal group; 4 third electrical signal output terminals 1113, configured to output the 4 paths of third electrical signals;
the parallel-serial sub-circuit 112 includes: 12 third signal input terminals 1121, a parallel-to-serial converter 1122, and M second electrical signal output terminals 1123; 12 third signal input terminals 1121 for receiving 3 sets of the third electrical signal sets outputted from the 3 sets of 3B/4B encoding sub-circuits 111; a parallel-to-serial converter 1122, configured to convert the third electrical signals in the 3 sets of third electrical signal groups received by the 12 third signal input ends 1121 into the M second electrical signals in a parallel-to-serial manner; m second electrical signal output terminals 1123 for outputting the M second electrical signals. It should be noted that fig. 9 shows a second electrical signal output terminal 1123.
Optionally, when M is 3, the parallel-to-serial converter 1122 is specifically configured to convert 4 third electrical signals output by each group of 3B/4B coding sub-circuits into 1 second electrical signal in a parallel-to-serial manner.
Optionally, when M is 2, the parallel-to-serial converter 1122 is specifically configured to convert 4 third electrical signals in the first group of third electrical signal groups and 2 third electrical signals in the second group of third electrical signal groups into one second electrical signal in a parallel-to-serial manner; and converting the remaining two paths of third electric signals in the second group of third electric signal groups and 4 paths of third electric signals in the third group of third electric signal groups into one path of second electric signals in a parallel-serial mode.
Optionally, when M is 1, the parallel-to-serial converter 1122 is specifically configured to convert all the third electrical signals in the 3 sets of third electrical signals into 1 path of the second electrical signals in a parallel-to-serial manner.
Optionally, the 3B/4B encoder 1112 includes: an acquisition unit and an encoding unit; the acquisition unit is used for acquiring the current state values of optical paths corresponding to the 3 paths of first electric signals in each group of first electric signal groups; the optical channel is a channel for transmitting optical signals corresponding to the 3 paths of first electric signals; and the coding unit is used for coding the 3 paths of first electric signals in each group of first electric signal groups into 4 paths of third electric signals to generate a third electric signal group according to the corresponding relation among the 3 paths of electric signals, the optical path state value and the 4 paths of electric signals and the current state value of the optical path corresponding to the 3 paths of first electric signals in each group of first electric signal groups.
Optionally, the 3B/4B encoder 1112 further includes: a determination unit and an update unit; the determining unit is configured to determine, according to a correspondence between the 4 electrical signals and the optical path state change value, the optical path state change value corresponding to the 4 third electrical signals in each group of third electrical signal groups; and the updating unit is used for updating the current state values of the optical paths corresponding to the 3 paths of first electric signals in each group of first electric signal groups according to the optical path state change values corresponding to the 4 paths of third electric signals in each group of third electric signal groups determined by the determining unit and the current state values of the optical paths corresponding to the 3 paths of first electric signals in each group of first electric signal groups acquired by the acquiring unit.
The apparatus of this embodiment may be configured to implement the technical solutions of the above method embodiments of the present invention, and the implementation principles and technical effects are similar, which are not described herein again.
Fig. 10 is a schematic structural diagram of a third embodiment of a signal encoding device according to the present invention, and as shown in fig. 10, in the device of the present embodiment, on the basis of the embodiment of the device shown in fig. 8, the code conversion circuit 11 may include: a parallel-to-serial sub-circuit 113 and 3 sets of 3B/4B encoding sub-circuits 114; wherein,
the parallel-serial sub-circuit 113 includes 9 first electrical signal input terminals, a parallel-serial converter, and 3 third electrical signal output terminals, where the 9 first electrical signal input terminals are configured to receive 9 first electrical signals; the parallel-serial converter is used for converting the 9 paths of first electric signals received by the 9 first electric signal input ends into 3 paths of third electric signals in a parallel-serial mode, wherein each path of third electric signal is a 3-bit electric signal; and the 3 third electric signal output ends are used for outputting the 3 paths of third electric signals.
Wherein each group of 3B/4B coding sub-circuits 114 comprises: 1 third electrical signal input end, 3B/4B encoder, 1 fourth electrical signal output end; the third electrical signal input end is used for receiving 1 path of third electrical signals; a 3B/4B encoder for encoding the third electrical signal received at the third electrical signal input terminal into a fourth electrical signal, the fourth electrical signal being a 4-bit electrical signal; and the fourth electric signal output end is used for outputting a fourth electric signal.
Optionally, when M is 3, the fourth electrical signal output end is configured to output a fourth electrical signal to the electrical-to-optical converter, where the fourth electrical signal is the second electrical signal.
Optionally, when M is not 3, the apparatus of the present embodiment further includes a parallel-to-serial sub-circuit 115;
the parallel-to-serial sub-circuit 115 includes 3 fourth electrical signal input terminals, a parallel-to-serial converter, and M second electrical signal output terminals; 3 fourth electrical signal input terminals for receiving 3 fourth electrical signals; the parallel-serial converter is used for converting the 3 paths of fourth electric signals received by the 3 fourth electric signal input ends into the M paths of second electric signals in a parallel-serial mode.
Optionally, when M is 1, the parallel-to-serial converter is specifically configured to convert the 3 paths of fourth electrical signals into 1 path of second electrical signals in a parallel-to-serial manner.
Optionally, when M is 2, the parallel-to-serial converter is specifically configured to convert 2-bit electrical signals in the first path of fourth electrical signals and the second path of fourth electrical signals into a path of second electrical signals in a parallel-to-serial manner, and convert another 2-bit electrical signals in the second path of fourth electrical signals and the third path of fourth electrical signals into a path of second electrical signals in a parallel-to-serial manner.
For the apparatus of this embodiment, the implementation principle and the technical effect thereof can be referred to the relevant description in the first embodiment of the method of the present invention, and are not described herein again.
In a first embodiment of the HT port of the present invention, the HT port of this embodiment includes a signal encoding device, and the signal encoding device may adopt the structure of any one of the device embodiments shown in fig. 8 to fig. 10, and accordingly, may execute the technical solutions of the above method embodiments of the present invention, and the implementation principle and the technical effect thereof are similar, and are not described herein again.
In a first embodiment of the processor of the present invention, the processor of this embodiment includes an HT port, and optical fiber transmission is implemented through the HT port; the HT port includes a signal encoding device, which may adopt the structure of any one of the device embodiments shown in fig. 8-10, and accordingly, may execute the technical solutions of the above method embodiments of the present invention, and the implementation principles and technical effects thereof are similar, and are not described herein again.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: Read-Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disk, and other various media capable of storing program codes.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (14)

1. A method of signal encoding, comprising:
converting 9 paths of first electric signals to be output into M paths of second electric signals in a coding and parallel-serial mode, wherein the code rate of each path of second electric signal 0/1 is balanced, and M is a positive integer less than or equal to 3;
converting the M second electric signals into M optical signals in an electric-to-optical conversion mode, wherein the optical signals are data transmitted by optical fibers;
the method is used for a hyper transport HT protocol transmitted through an optical fiber;
the method for converting 9 paths of first electric signals to be output into M paths of second electric signals in a coding and parallel-serial mode comprises the following steps:
dividing the 9 paths of first electric signals to be output into 3 groups of first electric signal groups, wherein each group of first electric signal groups comprises 3 paths of first electric signals;
according to the corresponding relation between the 3 paths of electric signals and the 4 paths of electric signals, the 3 paths of first electric signals in each group of first electric signal groups are coded into 4 paths of third electric signals to generate a third electric signal group;
and converting the third electric signals in the 3 groups of third electric signal groups into the M paths of second electric signals in a parallel-serial mode.
2. The method of claim 1, wherein converting the third electrical signals in the 3 sets of the third electrical signal set into the M second electrical signals in a parallel-to-serial manner comprises:
and when M is 3, converting the 4 paths of third electric signals in each group of third electric signal groups into 1 path of second electric signals in a parallel-serial mode.
3. The method of claim 1, wherein converting the third electrical signals in the 3 sets of the third electrical signal set into the M second electrical signals in a parallel-to-serial manner comprises:
when M is 2, converting 4 paths of third electric signals in the first group of third electric signal groups and 2 paths of third electric signals in the second group of third electric signal groups into one path of second electric signals in a parallel-serial mode; and
and converting the remaining two paths of third electric signals in the second group of third electric signal groups and 4 paths of third electric signals in the third group of third electric signal groups into one path of second electric signals in a parallel-serial mode.
4. The method of claim 1, wherein converting the third electrical signals in the 3 sets of the third electrical signal set into M second electrical signals in a parallel-to-serial manner comprises:
and when M is 1, converting all the third electric signals in the 3 groups of third electric signal groups into 1 path of second electric signals in a parallel-serial mode.
5. The method according to any one of claims 1 to 4, wherein the encoding the 3 first electrical signals in each group of the first electrical signal groups into 4 third electrical signals according to a correspondence between the 3 electrical signals and the 4 electrical signals to generate a third electrical signal group comprises:
acquiring current state values of optical paths corresponding to 3 paths of first electric signals in each group of first electric signal groups; the optical channel is a channel for transmitting optical signals corresponding to the 3 paths of first electric signals;
and according to the corresponding relation among the 3 paths of electric signals, the optical path state value and the 4 paths of electric signals and the current state value of the optical path corresponding to the 3 paths of first electric signals in each group of first electric signal groups, encoding the 3 paths of first electric signals in each group of first electric signal groups into 4 paths of third electric signals so as to generate a third electric signal group.
6. The method of claim 5, further comprising:
determining optical path state change values corresponding to the 4 paths of third electric signals in each group of third electric signal groups according to the corresponding relation between the 4 paths of electric signals and the optical path state change values;
and updating the current state values of the optical paths corresponding to the 3 paths of first electric signals in each group of first electric signal groups according to the state change values of the optical paths corresponding to the 4 paths of third electric signals in each group of third electric signal groups and the current state values of the optical paths corresponding to the 3 paths of first electric signals in each group of first electric signal groups.
7. A signal encoding apparatus for a HT protocol over hyper transport over fiber, the apparatus comprising:
the encoding conversion circuit is used for converting 9 paths of first electric signals to be output into M paths of second electric signals in an encoding and parallel-serial mode, wherein the code rate of each path of second electric signals 0/1 is balanced, and M is a positive integer less than or equal to 3;
the electro-optical conversion circuit is connected with the output end of the code conversion circuit and is used for converting the M paths of third electric signals output by the code conversion circuit into M paths of optical signals in an electric-to-optical conversion mode;
the code conversion circuit comprises: 3 groups of 3B/4B coding sub-circuits and parallel-serial sub-circuits;
each set of the 3B/4B coding sub-circuits comprises:
3 first electrical signal input ends for receiving 3 first electrical signals;
the 3B/4B encoder is used for encoding the 3 paths of first electric signals received by the 3 first electric signal input ends into 4 paths of third electric signals according to the corresponding relation between the 3 paths of electric signals and the 4 paths of electric signals so as to generate a third electric signal group;
4 third electrical signal output ends, configured to output the 4 paths of third electrical signals;
the parallel-to-serial sub-circuit includes:
12 third signal inputs for receiving 3 sets of said third electrical signal sets output by said 3 sets of 3B/4B encoding sub-circuits;
the parallel-serial converter is used for converting the third electric signals in the 3 groups of third electric signal groups received by the 12 third signal input ends into the M paths of second electric signals in a parallel-serial mode;
and the M second electric signal output ends are used for outputting the M second electric signals.
8. The apparatus according to claim 7, wherein when M is 3, the parallel-to-serial converter is specifically configured to convert 4 third electrical signals output by each group of 3B/4B coding sub-circuits into 1 second electrical signal in a parallel-to-serial manner.
9. The apparatus according to claim 7, wherein when M is 2, the parallel-to-serial converter is specifically configured to convert 4 third electrical signals in the first group of third electrical signal groups and 2 third electrical signals in the second group of third electrical signal groups into one second electrical signal in a parallel-to-serial manner; and
and converting the remaining two paths of third electric signals in the second group of third electric signal groups and 4 paths of third electric signals in the third group of third electric signal groups into one path of second electric signals in a parallel-serial mode.
10. The apparatus according to claim 7, wherein when M is 1, the parallel-to-serial converter is specifically configured to convert all third electrical signals in 3 sets of the third electrical signals into 1 path of the second electrical signals in a parallel-to-serial manner.
11. The apparatus of any of claims 7-10, wherein the 3B/4B encoder comprises:
the acquisition unit is used for acquiring the current state value of an optical path corresponding to 3 paths of first electric signals in each group of first electric signal groups; the optical channel is a channel for transmitting optical signals corresponding to the 3 paths of first electric signals;
and the encoding unit is used for encoding the 3 paths of first electric signals in each group of first electric signal groups into 4 paths of third electric signals to generate a third electric signal group according to the corresponding relation among the 3 paths of electric signals, the optical path state value and the 4 paths of electric signals and the current state value of the optical path corresponding to the 3 paths of first electric signals in each group of first electric signal groups acquired by the acquisition unit.
12. The apparatus of claim 11, wherein the 3B/4B encoder further comprises:
the determining unit is used for determining optical path state change values corresponding to the 4 paths of third electric signals in each group of third electric signal groups according to the corresponding relation between the 4 paths of electric signals and the optical path state change values;
and the updating unit is used for updating the current state values of the optical paths corresponding to the 3 paths of first electrical signals in each group of first electrical signal groups according to the optical path state change values corresponding to the 4 paths of third electrical signals in each group of third electrical signal groups determined by the determining unit and the current state values of the optical paths corresponding to the 3 paths of first electrical signals in each group of first electrical signal groups acquired by the acquiring unit.
13. A HT port for hypertransport, comprising: a signal encoding device as claimed in any one of claims 7 to 12.
14. A processor comprising the HT port of claim 13, wherein the HT port is configured to enable optical fiber transmission.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU5538686A (en) * 1985-04-12 1986-10-16 Alcatel N.V. Broadband ics
CN102073612A (en) * 2009-11-20 2011-05-25 英业达股份有限公司 Architecture for converting CPU (Central Processing Unit) socket into low-speed bus
CN102224702A (en) * 2008-10-01 2011-10-19 北电网络有限公司 Techniques for time transfer via signal encoding
CN106788446A (en) * 2016-11-25 2017-05-31 电子科技大学 A kind of new 8b/10b coding implementation methods

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU5538686A (en) * 1985-04-12 1986-10-16 Alcatel N.V. Broadband ics
CN102224702A (en) * 2008-10-01 2011-10-19 北电网络有限公司 Techniques for time transfer via signal encoding
CN102073612A (en) * 2009-11-20 2011-05-25 英业达股份有限公司 Architecture for converting CPU (Central Processing Unit) socket into low-speed bus
CN106788446A (en) * 2016-11-25 2017-05-31 电子科技大学 A kind of new 8b/10b coding implementation methods

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
HyperTransport端设备接口的设计与实现;刘云,赵晓芳,陈军,杨晓君;《计算机工程与设计》;20080430;第29卷(第7期);1660-1663

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