CN106298927B - Rf-ldmos semiconductor devices and preparation method thereof - Google Patents
Rf-ldmos semiconductor devices and preparation method thereof Download PDFInfo
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- CN106298927B CN106298927B CN201510320704.1A CN201510320704A CN106298927B CN 106298927 B CN106298927 B CN 106298927B CN 201510320704 A CN201510320704 A CN 201510320704A CN 106298927 B CN106298927 B CN 106298927B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 90
- 239000002184 metal Substances 0.000 claims abstract description 33
- 229910052751 metal Inorganic materials 0.000 claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 claims abstract description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 238000000407 epitaxy Methods 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 7
- 230000002035 prolonged effect Effects 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 80
- 239000000243 solution Substances 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The present invention provides a kind of rf-ldmos semiconductor devices and preparation method thereof, wherein production method includes: to form groove in the substrate, epitaxial layer is formed in the groove, the upper surface of the epitaxial layer is flushed with the upper surface of the substrate, source region is formed in the epitaxial layer, metal connecting layer is formed on the surface of the substrate and the source region, so that the substrate and the source region are connected by the metal connecting layer.Rf-ldmos semiconductor devices of the invention and preparation method thereof, by forming groove in the substrate, change the structure of substrate, to which source region to be guided into the back side of device by substrate itself, without carrying out prolonged high temperature propulsion, the thickness that ensure that epitaxial layer increases the breakdown voltage of device.
Description
Technical field
The present invention relates to semiconductor device art more particularly to a kind of rf-ldmos semiconductor devices
Part and preparation method thereof.
Background technique
Rf-ldmos semiconductor devices is common semiconductor devices in the communications field, such as
Wideband frequency modulation transmitter, TV and radio emission machine, airborne transponder etc. have successfully used the double diffusion of radio frequency transverse direction golden
Belong to oxide semiconductor element.
Rf-ldmos semiconductor devices is different from that other power devices are most typical to be characterized in that
Its source region is drawn by sinking layer from the back side, so as to avoid binding line bring source electrode parasitic inductance when encapsulation.Fig. 1 is
The rf-ldmos semiconductor device structure schematic diagram of the prior art, as shown in Figure 1, in the prior art
In, it generally by the injection ion of large dosage, is then promoted by prolonged high temperature, allows ion by diffuseing to form sinking
Area 101, sinker area 101 penetrate the substrate 100 of epitaxial layer 400 to lower layer, and source region 600 is guided into source region 600 by sinker area 101
The back side of device.
But in the prior art, due to carrying out prolonged high temperature propulsion, the ion of substrate 100 can be allowed to diffuse up to outer
Prolong layer 400, reduce the thickness of epitaxial layer 400, the breakdown voltage of entire device is caused to become smaller.
Summary of the invention
The present invention provides a kind of rf-ldmos semiconductor devices and preparation method thereof, existing to solve
Have mentioned in technology rf-ldmos semiconductor devices prolonged high temperature when forming sinker area promote and
The problem of caused breakdown voltage becomes smaller.
One aspect of the present invention provides a kind of rf-ldmos semiconductor devices and preparation method thereof, packet
It includes: forming groove in the substrate；Epitaxial layer, the upper table of the upper surface of the epitaxial layer and the substrate are formed in the groove
Face flushes；Source region is formed in the epitaxial layer；Metal connecting layer is formed on the surface of the substrate and the source region, so that institute
It states substrate and the source region is connected by the metal connecting layer.
Another aspect of the present invention provides a kind of rf-ldmos semiconductor devices, comprising:
Has fluted substrate；
The epitaxial layer formed in the groove, the upper surface of the epitaxial layer are flushed with the upper surface of the substrate；
The source region formed in the epitaxial layer；
Metal connecting layer, is formed in the surface of the substrate Yu the source region, and the metal connecting layer is described for being connected
Substrate and the source region.
As shown from the above technical solution, rf-ldmos semiconductor devices provided by the invention and its
Production method changes the structure of substrate, to guide source region into device by substrate itself by forming groove in the substrate
The back side ensure that the thickness of epitaxial layer without carrying out prolonged high temperature propulsion, increase the breakdown voltage of device.
Detailed description of the invention
Fig. 1 is rf-ldmos semiconductor device structure in the prior art intention；
Fig. 2 is the rf-ldmos manufacturing method of semiconductor device that one embodiment of the invention provides
Flow chart；
Fig. 3 A-3G is each of the rf-ldmos semiconductor devices that one embodiment of the invention provides
The structural schematic diagram of step；
Fig. 4 be another embodiment of the present invention provides rf-ldmos semiconductor device structure signal
Figure.
Specific embodiment
The present embodiment provides a kind of production methods of rf-ldmos semiconductor devices.Such as Fig. 2 institute
Show, Fig. 2 is the flow chart of the rf-ldmos manufacturing method of semiconductor device of the embodiment of the present invention one, should
The production method of rf-ldmos semiconductor devices includes:
Step 201, groove is formed in the substrate；
Step 202, epitaxial layer is formed in the trench, and the upper surface of epitaxial layer is flushed with the upper surface of substrate；
Step 203, source region is formed in the epitaxial layer；
Step 204, metal connecting layer is formed on the surface of substrate and source region, so that substrate and source region pass through metal connecting layer
Conducting.
In the production method of the rf-ldmos semiconductor devices of the present embodiment, by the substrate
Groove is formed, the structure of substrate is changed, so that source region guided to the back side of device by substrate itself into, without carrying out for a long time
High temperature promote, ensure that the thickness of epitaxial layer, increase the breakdown voltage of device.
Specifically, Fig. 3 A-3G is the radio frequency lateral double diffused metal that one embodiment of the invention provides as shown in Fig. 3 A to 3G
The structural schematic diagram of each step of oxide semiconductor element.
As shown in Figure 3A, etching groove includes: to form mask layer 2 on 1 surface layer of substrate on substrate 1, specifically, in substrate
1 surface layer by low-pressure chemical vapor deposition deposition mask layer 2, mask layer 2 with a thickness of 20000 angstroms to 40000 angstroms.Wherein,
Substrate 1 can use silicon substrate, wherein the doping concentration of boron ion is 1 × 10 doped with boron ion18~1 × 1020Atom/vertical
Square centimetre, i.e. the resistivity of substrate 1 is 0.001 ohmcm to 0.01 ohmcm.
As shown in Figure 3B, it is formed on 2 surface of mask layer and has figuratum photoresist 3, be exposure mask with photoresist 3, etching first is pre-
If the mask layer 21 in region, as shown in Figure 3 C, keep the substrate 1 below the first predeterminable area exposed, retains photoresist 3 covers second
The mask layer 22 of predeterminable area.Specifically, the mask layer 21 of the first predeterminable area is etched away using dry etching, retain second
The mask layer 22 of predeterminable area is to be used as barrier layer in subsequent trench etch process.Herein it should be noted that
Using dry etching remove the first predeterminable area mask layer 21 when, due to dry etching to the selection of silica than high, because
This, it is preferred that mask layer 2 is silica, so as to etch the when etching the mask layer 21 of the first predeterminable area
Substrate 1 below one predeterminable area.Certainly, mask layer 2 or silicon nitride, need stringent control etch period at this time.
As shown in Figure 3 C, photoresist 3 is removed, using the mask layer 22 of the second predeterminable area as exposure mask, as shown in Figure 3D, is carved
The substrate 1 below the first predeterminable area is lost, groove 20 is formed, the depth of groove 20 is 6 microns to 15 microns.It is second pre- due to having
If the mask layer 22 in region is protected as exposure mask, so that the substrate 1 below the second predeterminable area is not etched.Wherein, work is etched
Skill can use wet etching, it is preferred that dry etching be used, so as to avoid sideetching substrate 1, the side wall of groove 20
Angle between 201 and channel bottom 200 is 85 degree to 90 degree.In order to generate epitaxial layer, need to remove the second predeterminable area
Mask layer 22, wherein the mixed solution using hydrofluoric acid solution or containing hydrofluoric acid can preferably remove mask layer 22.
As shown in FIGURE 3 E, thick epitaxial layer 5 is formed on substrate 1 and in groove 20 using epitaxy technique.
Further, as illustrated in Figure 3 F, it after the mask layer 22 for removing the second predeterminable area, is formed in groove 20 outer
Prolong layer 4, the upper surface of epitaxial layer 4 is flushed with the upper surface of substrate 1, and concrete implementation mode can be to the thick epitaxial layer in Fig. 3 E
5 carry out being planarized to form epitaxial layer 4, and the upper surface of epitaxial layer 4 is flushed with the upper surface of the substrate.Wherein it is possible to using
Chemical mechanical grinding (Chemical mechanical polishing, abbreviation CMP) is ground, and the upper surface of epitaxial layer 4 is made
It is smooth.In order to realize better filling effect, 1.5-3 times with a thickness of 20 depth of groove of thick epitaxial layer 5, to guarantee flat
Fill up groove 20 during smoothization.Preferably, thick epitaxial layer 5 with a thickness of 10 microns to 30 microns.It should be noted that
The thickness of thick epitaxial layer 5 mentioned here refers to the thickness of epitaxial layer when not carrying out CMP process.
Further, as shown in Figure 3 G, source region 6 is formed in epitaxial layer 4, wherein the conduction type and substrate 1 of source region 6
Conduction type on the contrary, therefore, it is necessary to form metal connecting layer 7 on the surface of substrate 1 and source region 6, so that substrate 1 and source region 6
It is connected by metal connecting layer 7.Specifically, there can be gap between source region 6 and substrate 1, go out as shown in Figure 3 G, certain source region
6 can also be close adjacent with substrate 1, as long as guaranteeing that metal connecting layer 7 is contacted with source region 6 and substrate 1 simultaneously, that is, realizes source region 6
With the conducting of substrate 1.
In the production method of the rf-ldmos semiconductor devices of the present embodiment, by substrate 1
Middle formation groove 20, changes the structure of substrate 1, so that by substrate 1 itself into source region 6 guided to the back side of device, be not necessarily into
The prolonged high temperature of row promotes, and ensure that the thickness of epitaxial layer 4, increases the breakdown voltage of device.
In addition, compared with prior art, sinking layer in the prior art during carrying out high temperature propulsion more it is deep extremely
Resistance is bigger at substrate, and the resistivity for the layer that sinks is generally the increase of gradual change, and upper surface is about 0.008 ohmcm, with
It is about 0.2 ohmcm at substrate contact.And the resistivity of the application substrate 1 is 0.001 ohmcm to 0.01 Europe
Nurse centimetre, the resistance of substrate 1 also will be from far away lower than the resistance of sinking layer in the prior art, by substrate 1 itself by source region 6
The back side for guiding device into reduces the conducting resistance of device, improves the performance of device.
On the basis of the above embodiments, the present embodiment provides a rf-ldmos semiconductor devices
Part, as shown in Figure 3 G, the device include: the fluted substrate 1 of tool, the epitaxial layer 4 formed in the trench, the shape in epitaxial layer 4
At source region 6 and metal connecting layer 7, which is formed in the surface of substrate 1 Yu source region 6, wherein epitaxial layer 4
Upper surface is flushed with the upper surface of substrate 1, and metal connecting layer 7 is metal for substrate 1 and source region 6, metal connecting layer 7 to be connected
The bottom of column, metal column is contacted with substrate 1 and source region 6, specifically, can have gap between source region 6 and substrate 1, certain source
Area 6 can also be adjacent with substrate 1, as long as guaranteeing that metal connecting layer 7 is contacted with source region 6 and substrate 1 simultaneously, that is, realizes 6 He of source region
The conducting of substrate 1.In order to guarantee the thickness of epitaxial layer 4, the depth of groove is 6 microns to 15 microns.In addition, substrate 1 can
To use silicon substrate, wherein the doping concentration of boron ion is 1 × 10 doped with boron ion18~1 × 1020Atom/cubic centimetre,
I.e. the resistivity of substrate 1 is 0.001 ohmcm to 0.01 ohmcm.
It should be noted that rf-ldmos semiconductor devices provided in this embodiment is according to upper
The production method stated in embodiment is made, and details are not described herein.
The rf-ldmos semiconductor devices of the present embodiment is changed by forming groove in substrate 1
The structure of substrate 1 is become, so that source region 6 to be guided into the back side of device by substrate 1 itself, has been pushed away without carrying out prolonged high temperature
Into ensure that the thickness of epitaxial layer 4, increase the breakdown voltage of device.Also, the resistance of substrate 1 is lower than existing skill from far away
Source region 6 is guided into the back side of device by substrate 1 itself by the resistance of sinking layer in art, reduces the conducting resistance of device, is improved
The performance of device.
On the basis of the above embodiments, in order to which complete this illustrates rf-ldmos semiconductor device
Part, Fig. 4 be another embodiment of the present invention provides rf-ldmos semiconductor device structure schematic diagram, such as
Shown in Fig. 4, the device further include: in the gate oxide 8 that the surface of substrate 1 and epitaxial layer 4 is formed, be formed on gate oxide 8
Polysilicon 9, and in epitaxial layer 4 pass through ion implanting formed body area 10, drain region 11 and drift region 12.Specifically, more
Grid of the crystal silicon 9 as the device, body area 10 is adjacent with source region 6, and between source region 6 and drain region 11, drain region 11 is located at drift
Between area 12 and body area 10.Wherein, when forming body area 10, source region 6, drain region 11 and drift region 12, body area 10 is formed at first, other
The sequence that region is formed is not limited.
Further, device further include: dielectric layer 13, grid region metal connecting layer 14, drain region metal connecting layer 15 and back
Face metal 16.Specifically, can by chemical vapor deposition gate oxide 8 surface deposit one dielectric layer 13, by
Deep hole is etched in dielectric layer 13, and then grid region metal connecting layer 14, drain region metal connecting layer 15 and metal are deposited in deep hole
Articulamentum 7.After the completion of the positive technique of the device, the back of back metal 16 is plated on the bottom surface of substrate 1, to have in device
So that electric current is led to substrate 1 by metal connecting layer 7 via source electrode 6 when applied voltage, and then leads to back metal 16.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used
To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features；
And these are modified or replaceed, the range for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution.
Claims (8)
1. a kind of production method of rf-ldmos semiconductor devices characterized by comprising
Groove is formed in the substrate；
Epitaxial layer is formed in the groove, and the upper surface of the epitaxial layer is flushed with the upper surface of the substrate；
Source region is formed in the epitaxial layer；
Metal connecting layer is formed on the surface of the substrate and the source region, so that the substrate and the source region pass through the gold
Belong to articulamentum conducting.
2. the production method of rf-ldmos semiconductor devices according to claim 1, feature
It is, etching groove includes: on substrate
Mask layer is formed in underlayer surface；
It is formed in the exposure mask layer surface and has figuratum photoresist；
Using the photoresist as exposure mask, the mask layer of the first predeterminable area is etched, keeps the substrate below first predeterminable area naked
Dew retains the mask layer of the second predeterminable area of the photoresist covering；
Remove the photoresist；
Using the mask layer of second predeterminable area as exposure mask, the substrate below first predeterminable area is etched, described in formation
Groove.
3. the production method of rf-ldmos semiconductor devices according to claim 1, feature
It is, forms epitaxial layer in the groove, comprising:
Thick epitaxial layer is formed in the groove over the substrate using epitaxy technique, the thick epitaxial layer is planarized
To form the epitaxial layer, the upper surface of the epitaxial layer is flushed with the upper surface of the substrate.
4. the production side of rf-ldmos semiconductor devices according to any one of claim 1-3
Method, which is characterized in that the depth of the groove is 6 microns to 15 microns.
5. the production method of rf-ldmos semiconductor devices according to claim 3, feature
Be, the thick epitaxial layer with a thickness of 10 microns to 30 microns.
6. a kind of rf-ldmos semiconductor devices characterized by comprising
Has fluted substrate；
The epitaxial layer formed in the groove, the upper surface of the epitaxial layer are flushed with the upper surface of the substrate；
The source region formed in the epitaxial layer；
Metal connecting layer is formed in the surface of the substrate Yu the source region, and the metal connecting layer is for being connected the substrate
With the source region.
7. rf-ldmos semiconductor devices according to claim 6, which is characterized in that the ditch
The depth of slot is 6 microns to 15 microns.
8. rf-ldmos semiconductor devices according to claim 6 or 7, which is characterized in that institute
Stating metal connecting layer is metal column, and the bottom of the metal column is contacted with the substrate and the source region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201510320704.1A CN106298927B (en) | 2015-06-11 | 2015-06-11 | Rf-ldmos semiconductor devices and preparation method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510320704.1A CN106298927B (en) | 2015-06-11 | 2015-06-11 | Rf-ldmos semiconductor devices and preparation method thereof |
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| CN106298927B true CN106298927B (en) | 2019-08-30 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6461902B1 (en) * | 2000-07-18 | 2002-10-08 | Institute Of Microelectronics | RF LDMOS on partial SOI substrate |
| SE522576C2 (en) * | 2001-03-09 | 2004-02-17 | Ericsson Telefon Ab L M | Radio frequency power LDMOS transistor |
| WO2010016008A1 (en) * | 2008-08-05 | 2010-02-11 | Nxp B.V. | Ldmos with discontinuous metal stack fingers |
| CN102376570B (en) * | 2010-08-19 | 2013-07-24 | 上海华虹Nec电子有限公司 | Manufacturing method of N-type radio frequency lateral double-diffused metal-oxide semiconductor (LDMOS) |
| CN201918391U (en) * | 2011-01-11 | 2011-08-03 | 苏州英诺迅科技有限公司 | Radio frequency transverse diffusion N-type MOS (metal oxide semiconductor) tube |
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Effective date of registration: 20220721 Address after: 518116 founder Microelectronics Industrial Park, No. 5, Baolong seventh Road, Baolong Industrial City, Longgang District, Shenzhen, Guangdong Province Patentee after: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. Address before: 100871, Beijing, Haidian District, Cheng Fu Road, No. 298, Zhongguancun Fangzheng building, 9 floor Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. |
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