CN106292098B - A kind of array substrate, display panel and display device - Google Patents
A kind of array substrate, display panel and display device Download PDFInfo
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- CN106292098B CN106292098B CN201610957297.XA CN201610957297A CN106292098B CN 106292098 B CN106292098 B CN 106292098B CN 201610957297 A CN201610957297 A CN 201610957297A CN 106292098 B CN106292098 B CN 106292098B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
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- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract
This application provides a kind of array substrate, display panel and display devices, by keeping the lead district of array substrate Chong Die with binding area at least partly region, wherein, the different layers of the array substrate are respectively at positioned at the bindings bit in the lead district and the binding area overlapping region and the lead, to reduce the area of the array substrate part rim area, increase screen accounts for screen ratio.
Description
Technical field
The present invention relates to technical field of liquid crystal display, more specifically to a kind of array substrate, display panel and display
Device.
Background technique
Liquid crystal display panel has been widely used in people's due to having many advantages, such as Low emissivity, small in size and low in energy consumption
In life and work, specifically such as apply in laptop, personal digital assistant, flat-surface television, mobile phone electronic equipment
In.
As shown in Figure 1, liquid crystal display panel can be divided into viewing area 101 and rim area 102, wherein the drive of rim area
Dynamic IC is electrically connected to the cabling of viewing area, to drive the component in viewing area to carry out corresponding response.Generally, driving IC passes through
Demultplexer (DEMUX) is electrically connected with cabling.Therefore, as shown in Fig. 2, usually by the rim area of the preset side of display panel
It is divided into binding area 103, demultplexer area 104 including driving IC bindings bit, and is located at binding area and demultplexer
Lead district 105 between area, the resistance harmony for considering lead and the gap between the lead of the lead area edge are (more
Situations such as gap between proximal edge, lead is smaller, is more easy to appear short circuit) etc. factors, to enable lead to work normally,
It needs to maintain a certain distance between binding area 103 and demultplexer area 104, to cause the liquid crystal display panel part
The area of rim area is larger, and influence screen accounts for screen ratio.
Summary of the invention
In view of this, reducing display floater frame area the present invention provides array substrate, display panel and display device
Area, increase screen accounts for screen ratio.
To achieve the above object, the invention provides the following technical scheme:
A kind of array substrate, comprising: viewing area is provided with a plurality of cabling in the viewing area；Bind area, the binding area
Inside it is provided with multiple bindings bits；Lead district is provided with a plurality of leads in the lead district；
The cabling of the viewing area is electrically connected by the lead of the lead district with the bindings bit in the binding area；
Wherein, the lead district is Chong Die with the binding area at least partly region, is located at the lead district and the binding
The bindings bit in area overlapping region and the lead are respectively at the different layers of the array substrate.
It preferably, further include the binding line for connecting the bindings bit to the lead, the binding line in the binding area
Extend from the bindings bit to away from the viewing area side.
Preferably, the binding line is extended in parallel along the direction away from the viewing area.
Preferably, at least partly described binding line extends to the diverging away from the viewing area side.
Preferably, the array substrate includes at least the first insulating layer；
The lead includes the second lead for connecting the first lead of the binding line and being connected with the first lead,
In, any first lead is at least partially disposed at the overlapping region of the lead district and the binding area；
The first lead is set to the first surface of first insulating layer, the bindings bit and binding line setting
In the second surface of first insulating layer, the first surface and the second surface are the opposite of first insulating layer
Face.
Preferably, second lead is set to the first surface.
Preferably, second lead is set to the second surface.
Preferably, the first lead is connect with second lead by via hole.
Preferably, at least partly described first lead dissipates extension to towards the viewing area side.
Preferably, any first lead and adjacent first lead length having the same.
Preferably, the array substrate further includes the second insulating layer opposite with first insulating layer, and described second absolutely
Edge layer is located above the second surface of first insulating layer；
The binding line is set to the third surface of the second insulating layer, and the bindings bit is set to second insulation
4th surface of layer, the third surface and the 4th surface are the opposite face of the second insulating layer, and the second surface and
The third surface is adjacent.
It preferably, further include the multichannel tap circuit being set between the viewing area and the lead district, the lead
Circuit electrical connection is tapped by the multichannel with the cabling.
A kind of display panel, including above-mentioned array substrate, the first substrate opposite with the array substrate is located at described
Liquid crystal layer between array substrate and the first substrate.
A kind of display device, including above-mentioned display panel.
Compared with prior art, the technical scheme provided by the invention has the following advantages:
By keeping lead district Chong Die with binding area at least partly region, wherein be located at the lead district and the binding area
The bindings bit of overlapping region and the lead are respectively at the different layers of the array substrate, to reduce display panel
The area of the part rim area, increase screen accounts for screen ratio.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1~2 are structure of liquid crystal display panel figure in the prior art；
Fig. 3 is the overlooking structure figure for the array substrate that one embodiment of the invention provides；
Fig. 4 is the sectional view of lead district and binding area overlapping region in Fig. 3；
Fig. 5 is the structural schematic diagram for the array substrate that one embodiment of the invention provides；
Fig. 6 be another embodiment of the present invention provides array substrate structural schematic diagram；
Fig. 7 is the diagrammatic cross-section for the array substrate that one embodiment of the invention provides；
Fig. 8 be another embodiment of the present invention provides array substrate structural schematic diagram；
Fig. 9 is the structural schematic diagram for the display panel that one embodiment of the invention provides.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
In the following description, numerous specific details are set forth in order to facilitate a full understanding of the present invention, but the present invention can be with
Implemented using other than the one described here other way, those skilled in the art can be without prejudice to intension of the present invention
In the case of do similar popularization, therefore the present invention is not limited by the specific embodiments disclosed below.
Secondly, combination schematic diagram of the present invention is described in detail, when describing the embodiments of the present invention, for purposes of illustration only, table
Show that the schematic diagram of device architecture can disobey general proportion and make partial enlargement, and the schematic diagram is example, is not answered herein
Limit the scope of protection of the invention.In addition, the three-dimensional space of length, width and depth should be included in actual fabrication.
As stated in the background art, as shown in Fig. 2, usually the rim area of the preset side of display panel is divided into including driving
Binding area 103, the demultplexer area 104 of dynamic IC bindings bit, and the lead between binding area and demultplexer area
Area 105.The width for binding the width c1 and driving IC in area 103 is adapted, therefore the width in usually less than demultplexer area 104
C2, therefore, connection demultplexer area 104 and the lead for binding area 103 can have certain angle a with the top edge in binding area
(a≤90 °), to avoid short circuit, the angle a is unsuitable too small, at this time drawing between demultplexer area 104 and binding area 103
The height d in line area 105 is larger.The resistance harmony for considering lead and the gap between the lead of the lead area edge
Factors such as (situations such as gap between edge, lead are smaller, is more easy to appear short circuit), to enable the normal work of lead
Make, the height d bound between area 103 and demultplexer area 104 needs to keep certain value, to cause liquid crystal display panel
The area of the rim area of the part is larger, and influence screen accounts for screen ratio.
In view of this, the embodiment of the invention provides a kind of array substrates, comprising: viewing area is arranged in the viewing area
There is a plurality of cabling；Area is bound, is provided with multiple bindings bits in the binding area；Lead district is provided in the lead district a plurality of
Lead；The cabling of the viewing area is electrically connected by the lead of the lead district with the bindings bit in the binding area；Wherein, described
Lead district is Chong Die with the binding area at least partly region, ties up positioned at the lead district with described in the binding area overlapping region
Positioning and the lead are respectively at the different layers of the array substrate.
And the display panel including above-mentioned array substrate, the display panel further include, it is opposite with the array substrate
First substrate, the liquid crystal layer between the array substrate and the first substrate.
And the display device including the display panel.
As can be seen that, by keeping lead district Chong Die with binding area at least partly region, making to be located at institute in the embodiment of the present application
The bindings bit and the lead of stating lead district and the binding area overlapping region are respectively at the difference of the array substrate
Layer, to reduce the area of the display panel part rim area, increase screen accounts for screen ratio.
It is the basic thought of the application above, in order to make the technical scheme provided by the embodiment of the invention clearer, below
Above-mentioned technical proposal of the present invention is described in detail.
One embodiment of the invention provides a kind of array substrate, as shown in Figure 3 and Figure 4, wherein Fig. 3 is the array
The overlooking structure figure of substrate, Fig. 4 are lead district and the sectional view for binding area overlapping region, comprising: viewing area 210, the display
A plurality of cabling 211 is provided in area；Area 220 is bound, is provided with multiple bindings bits 221 in the binding area；Lead district 230, institute
It states and is provided with a plurality of leads 231 in lead district；The lead 231 that the cabling 211 of the viewing area 210 passes through the lead district 230
It is electrically connected with the bindings bit 221 in the binding area 220；Wherein, the lead district 230 and at least partly area, the binding area 220
Domain overlapping positioned at the lead district 230 and the bindings bit 221 for binding 220 overlapping region 220/230 of area and described is drawn
Line 231 is respectively at the different layers of the array substrate.
By keeping lead district 230 Chong Die with the binding at least partly region of area 220, tied up positioned at the lead district 230 with described
The bindings bit 221 and the lead 231 of determining 220 overlapping region 220/230 of area are respectively at the difference of the array substrate
Layer, to reduce the area of the display panel part rim area, increase screen accounts for screen ratio.
Specifically, further including connecting the bindings bit 221 to the lead in the binding area 220 in the present embodiment
231 binding line 222, the binding line 222 extend from the bindings bit 221 to away from 210 side of viewing area.By setting
The binding line 222 is set, lead district 230 can be made further to move to binding area 220 away from the direction of 210 side of viewing area
It is dynamic, to increase lead district 230 and bind the overlapping area in area 220, so that further decreasing array substrate corresponds to the part side
The area in frame area.
Specifically, as shown in figure 5, in the present embodiment, the binding line 222 is along the direction for deviating from the viewing area 210
It extends in parallel, so that the overlapping area for increasing lead district 230 and binding area 220 is realized, to further decrease array substrate pair
Should part rim area area.Wherein, the mode that binding line 222 is extended in parallel along the direction away from the viewing area 210, can
To make bindings bit and binding line be easy to align in the production process, so that the structure in the present embodiment be made to be easy to real in technique
It is existing.
In other embodiments of the invention, as shown in fig. 6, at least partly described binding line 222 is from the bindings bit 221
Extend to the diverging away from 210 side of viewing area.Binding line 222 is subjected to diverging extension, is equivalent to and increases bindings bit 221
The distance between, to increase the gap between lead, avoid the short circuit problem between lead 231.Wherein, it ties up for convenience
Contraposition between alignment 222 and bindings bit 221 is arranged in the part binding line 222 that binding line 222 connects and binds 221 one end of position
To extend in parallel, the part binding line 222 in 222 connecting lead wire of binding line, 231 one end is set as diverging and extends.Of the invention
In other embodiments, the binding line 222 may be arranged as straight line, and direction is to dissipate to away from 210 side of viewing area
Extend, that is, the binding line 222 extends to the diverging away from 210 side of viewing area completely, so as to utilize limited sky
Between further increase gap between lead.
In array substrate in the present embodiment, as shown in fig. 7, the array substrate includes at least the first insulating layer 201；
The lead 231 includes second for connecting the first lead 231a of the binding line 222 and being connected with the first lead 231a
Lead 231b, wherein any first lead 231a is at least partially disposed at the lead district 230 and the binding area 220
Overlapping region 220/230；The first surface that the first lead 231a is set to first insulating layer 201 (is following table in figure
Face), it (is upper table in figure that the bindings bit 221 and the binding line 222, which are set to the second surface of first insulating layer 201,
Face), the first surface and the second surface are the opposite face of first insulating layer 201.
Specifically, in the present embodiment, first insulating layer 201 is data line and the scanning for separating array substrate
The insulating layer of line.Wherein, scan line is located at the first surface of first insulating layer 201, and data line bit is in first insulation
The second surface of layer 201.Therefore, in the present embodiment, the first lead 231a and the scan line same layer, binding line 222
With the data line same layer, so as to while forming data line with scan line, form corresponding binding line 222 and lead
231 structures.Also, since first lead 231a and binding line 222 are located at the different sides of the first insulating layer 201, institute can be set
First lead 231a is stated to connect with the binding line 222 by via hole.
To simplify technique, the second lead 231b can be with first lead 231a same layer, that is, sets the second lead 231b
It is placed in the first surface of first insulating layer 201, so as to be formed simultaneously first lead 231a and in one step
Two lead 231b.In the present embodiment, it is contemplated that the scanning line resistance of formation is generally higher than data line resistance, and corresponding lead
231 and binding line 222 formed while forming data line with scan line structure, for the resistance for reducing lead in the present embodiment,
The second lead 231b is set to second surface, that is, make the second lead 231b and the data line same layer.Draw due to first
Line 231a and the second lead 231b is located at the different sides of the first insulating layer 201, can be set the first lead 231a with it is described
Second lead 231b is connected by via hole a.
Meanwhile as shown in figure 8, all first lead 231a, which can be set, is to guarantee that the resistance of the lead is harmonious
(first lead 231a rises for identical length, i.e., any first lead 231a and adjacent first lead 231a length having the same
The one end connecting with binding line 222 is started from, the arcuate line segment β in Fig. 9 is terminated at).Wherein, for convenience of first lead 231a with tie up
Contraposition between alignment 222 is provided parallel in the part first lead 231a that first lead 231a connects and binds 222 one end of line
Extend, the part first lead 231a in the one end first lead 231a connection the second lead 231b is set as diverging and extends.At this
In the other embodiments of invention, the first lead can be set to straight line, and direction is to prolong towards viewing area side diverging
It stretches, that is, the first lead dissipates extension to towards the viewing area side completely.
Also, in the present embodiment, as shown in figure 3, further including being set to the viewing area 210 and the lead district 230
Between multichannel tap circuit 240, the lead 231 and the cabling 211 tap the electrical connection of circuit 240 by the multichannel.
Specifically, the second lead 231b and the cabling 211 tap circuit 240 by the multichannel and are electrically connected.
In the present embodiment, lead 231 is embedded in the layer structure of array substrate, with bonding wire in the prior art as lead
It is attached and compares, be not easy to form short circuit between the lead in the present embodiment, and align accurately.
In addition, in the present embodiment, as shown in fig. 7, the array substrate further includes opposite with first insulating layer 201
Second insulating layer 202, the second insulating layer 202 is located above the second surface of first insulating layer 201；The binding
Line 222 is set to the third surface of the second insulating layer 202, and the bindings bit 221 is set to the second insulating layer 202
4th surface, the third surface and the 4th surface are the opposite face of the second insulating layer 202, and the second surface and institute
It is adjacent to state third surface.By in this present embodiment bindings bit 221 and binding line 222 be located at different layers, therefore, in the present embodiment
Setting bindings bit 221 is connect with binding line 222 by via hole b.
Wherein, the second insulating layer 202 is the insulating layer in the array substrate between data line and ITO electrode line.
Therefore, in the present embodiment, bindings bit 221 and ITO electrode line same layer, binding line 222 and data line same layer.Wherein, originally for simplification
Circuit structure in embodiment is arranged between via hole a and via hole b and keeps preset distance.The preset distance can tie up for edge
Distance of the area towards viewing area direction is determined, specifically, can be 5 μm~50 μm, such as 5 μm, 20 μm, 35 μm or 50 μm, this field
Technical staff, which can according to need, to be configured.
Compared with prior art, the present embodiment is by keeping lead district Chong Die with binding area at least partly region, wherein is located at
The bindings bit and the lead in the lead district and the binding area overlapping region are respectively at the array substrate not
Same layer, to reduce the area of the display panel part rim area, increase screen accounts for screen ratio.
The present invention also provides a kind of display panels, as shown in figure 9, including array substrate described in above-described embodiment
310, the first substrate 320 opposite with the array substrate, between the array substrate 310 and the first substrate 320
Liquid crystal layer 330.
Wherein, the array substrate 310 can be the array substrate for including color blocking layer, or not include color blocking layer
Array substrate.When array substrate 310 includes color blocking layer, the first substrate 320 is only a glass plate, when the array substrate
310 when not including color blocking layer, and the first substrate 320 includes the color blocking layer, that is, first substrate 320 is color membrane substrates.
As can be seen that compared with prior art, the display panel in the present embodiment is by making lead district and binding area at least
Partial region overlapping, wherein positioned at the bindings bit and the lead point of the lead district and the binding area overlapping region
Other places, to reduce the area of the display panel part rim area, increase screen in the different layers of the array substrate
Zhan Ping ratio.
The present invention also provides a kind of display devices, including display panel described in above-described embodiment.
Compared with prior art, by display device in this present embodiment by making lead district and at least partly area, binding area
Domain overlapping, wherein be respectively at positioned at the bindings bit in the lead district with the binding area overlapping region and the lead
The different layers of the array substrate, to reduce the area of the display panel part rim area, increase screen accounts for screen ratio.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.For device disclosed in embodiment
For, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is said referring to method part
It is bright.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (10)
1. a kind of array substrate characterized by comprising
Viewing area is provided with a plurality of cabling in the viewing area；
Area is bound, is provided with multiple bindings bits in the binding area；
Lead district is provided with a plurality of leads in the lead district；
The cabling of the viewing area is electrically connected by the lead of the lead district with the bindings bit in the binding area；
Wherein, the lead district is Chong Die with the binding area at least partly region, is located at the lead district and binding area weight
The bindings bit in folded region and the lead are respectively at the different layers of the array substrate；
It further include the binding line for connecting the bindings bit to the lead in the binding area, the binding line is from the bindings bit
Extend to away from the viewing area side；
The array substrate includes at least the first insulating layer；
The lead includes the second lead for connecting the first lead of the binding line and being connected with the first lead, wherein
Any first lead is at least partially disposed at the overlapping region of the lead district and the binding area；
The first lead is set to the first surface of first insulating layer, and the bindings bit and the binding line are set to institute
The second surface of the first insulating layer is stated, the first surface and the second surface are the opposite face of first insulating layer；
Second lead is set to the second surface.
2. array substrate according to claim 1, which is characterized in that the binding line is along the direction for deviating from the viewing area
It extends in parallel.
3. array substrate according to claim 1, which is characterized in that at least partly described binding line is to away from the display
The diverging of area side extends.
4. array substrate according to claim 1, which is characterized in that the first lead and second lead passed through
Hole connection.
5. array substrate according to claim 1, which is characterized in that at least partly described first lead is shown to towards described
Show that the diverging of area side extends.
6. array substrate according to claim 5, which is characterized in that any first lead has phase with adjacent first lead
Same length.
7. array substrate according to claim 1, it is characterised in that:
The array substrate further includes the second insulating layer opposite with first insulating layer, and the second insulating layer is located at described
Above the second surface of first insulating layer；
The binding line is set to the third surface of the second insulating layer, and the bindings bit is set to the second insulating layer
4th surface, the third surface and the 4th surface are the opposite face of the second insulating layer, and the second surface and described
Third surface is adjacent.
8. array substrate according to claim 1, which is characterized in that further include being set to the viewing area and described drawing
Multichannel between line area taps circuit, the lead and the cabling and taps circuit electrical connection by the multichannel.
9. a kind of display panel, which is characterized in that including array substrate according to any one of claims 1 to 8, with the array
The opposite first substrate of substrate, the liquid crystal layer between the array substrate and the first substrate.
10. a kind of display device, which is characterized in that including display panel as claimed in claim 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610957297.XA CN106292098B (en) | 2016-11-03 | 2016-11-03 | A kind of array substrate, display panel and display device |
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| CN201610957297.XA CN106292098B (en) | 2016-11-03 | 2016-11-03 | A kind of array substrate, display panel and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107300793A (en) * | 2017-06-30 | 2017-10-27 | 厦门天马微电子有限公司 | Display panel and display device |
| CN107703664A (en) * | 2017-09-27 | 2018-02-16 | 武汉华星光电技术有限公司 | Embedded touch control panel |
| CN109616480B (en) * | 2018-12-27 | 2020-11-10 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111610879B (en) * | 2020-05-20 | 2023-03-31 | 业成科技（成都）有限公司 | Touch panel, preparation method of touch panel, touch assembly and electronic equipment |
| CN113643613A (en) * | 2021-08-10 | 2021-11-12 | 深圳市华星光电半导体显示技术有限公司 | Display panel, manufacturing method thereof and splicing display device |
| CN116704941B (en) * | 2023-08-07 | 2023-10-17 | 苏州华星光电技术有限公司 | Display panel and display device |
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| KR20140061815A (en) * | 2012-11-14 | 2014-05-22 | 엘지디스플레이 주식회사 | Array substrate for liquid crystal display |
| CN103901690A (en) * | 2014-03-20 | 2014-07-02 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
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| TWI395037B (en) * | 2008-10-13 | 2013-05-01 | Prime View Int Co Ltd | Active device array substrate and testing method thereof |
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| CN102819995A (en) * | 2011-06-10 | 2012-12-12 | 乐金显示有限公司 | Flat display device and method of fabricating the same |
| KR20140061815A (en) * | 2012-11-14 | 2014-05-22 | 엘지디스플레이 주식회사 | Array substrate for liquid crystal display |
| CN103901690A (en) * | 2014-03-20 | 2014-07-02 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
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