CN106257970B - Board structure of circuit and its manufacturing method - Google Patents
Board structure of circuit and its manufacturing method Download PDFInfo
- Publication number
- CN106257970B CN106257970B CN201510340281.XA CN201510340281A CN106257970B CN 106257970 B CN106257970 B CN 106257970B CN 201510340281 A CN201510340281 A CN 201510340281A CN 106257970 B CN106257970 B CN 106257970B
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- hole
- layer
- dielectric layer
- ditches
- irrigation canals
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a kind of board structure of circuit and its manufacturing method.The manufacturing method of the board structure of circuit comprises the steps of.Firstly, forming first line layer on bearing substrate.Then, the first dielectric layer is formed on bearing substrate and first line layer.Then, at least one first hole of exposed part first line layer is formed in the first dielectric layer.Then, the second dielectric layer is formed on the first dielectric layer and first line layer.Then, at least one irrigation canals and ditches of the first dielectric layer of exposed part and at least one second hole of exposed part first line layer are formed in the second dielectric layer.Finally, forming the metal layer for filling up irrigation canals and ditches and the second hole.By allowing irrigation canals and ditches to be formed simultaneously with the second hole, the conductive hole being filled in the second hole space shared in the second dielectric layer will be effectively reduced, thus increase by the second dielectric layer and the space of line layer can be set, and then promote the wiring density of board structure of circuit.
Description
Technical field
The present invention relates to a kind of board structure of circuit and its manufacturing method.
Background technique
With flourishing for electronic industry, electronic product also progresses into multi-functional, high performance R&D direction.It is full
Sufficient semiconductor element high integration (Integration) and be miniaturized (Miniaturization) requirement, circuit board it is each
Item requires also higher and higher.For example, the line width of the route on circuit board requires smaller and smaller, circuit with line-spacing (Pitch)
The wiring density of plate also wishes that the higher the better.In addition, assist side using upper, in order to improve the wiring density in wiring board,
It is trend that making, which has the wiring board of embedded type circuit luxuriant,.
In order to further improve every characteristic of circuit board, related fields is there's no one who doesn't or isn't painstakingly developed.How one is provided
Kind has the circuit board of preferable characteristic, real to belong to one of current important research and development project, also needs as currently associated field improved
Target.
Summary of the invention
It is an object of the present invention to provide a kind of manufacturing methods of board structure of circuit, to promote the cloth of board structure of circuit
Line density.
According to an embodiment of the present invention, a kind of manufacturing method of board structure of circuit comprises the steps of.Firstly, carrying
First line layer is formed on substrate.Then, the first dielectric layer is formed on bearing substrate and first line layer.Then, first
At least one first hole of exposed part first line layer is formed in dielectric layer.Then, in the first dielectric layer and first line
The second dielectric layer is formed on layer.Then, at least one irrigation canals and ditches of the first dielectric layer of exposed part are formed in the second dielectric layer, and
The second hole of exposed first line layer is formed in place of corresponding first hole, and the aperture of the second hole is less than the first hole
Aperture is simultaneously located among the first hole.Finally, the metal layer for filling up irrigation canals and ditches and the second hole is formed, wherein filling up the metal of irrigation canals and ditches
Layer becomes the second line layer, and the metal layer for filling up the second hole becomes conductive hole.
In one or more embodiments of the invention, irrigation canals and ditches and the second hole are formed simultaneously.
In one or more embodiments of the invention, irrigation canals and ditches and the second hole are formed using same board.
In one or more embodiments of the invention, irrigation canals and ditches and the second hole are to pass through the second dielectric layer of exposure development
And it is formed, and the first dielectric layer and first line layer are as barrier layer.
In one or more embodiments of the invention, formed metal layer the step of comprise the steps of.Firstly, in quilt
On the first exposed dielectric layer of irrigation canals and ditches with formed seed layer on the exposed first line layer of the second hole.Then, it is electroplated
Metal layer is formed, and metal layer is planarized and removed the top half of metal layer, and then expose the second dielectric layer.
In one or more embodiments of the invention, the manufacturing method of board structure of circuit is also included in form second Jie
Before electric layer, the first dielectric layer is toasted, hardens the first dielectric layer.
Another embodiment according to the present invention, a kind of board structure of circuit include bearing substrate, first line layer, the first dielectric
Layer, the second dielectric layer, the second line layer and conductive hole.First line layer is arranged on bearing substrate.The setting of first dielectric layer
On bearing substrate and first line layer, wherein the first dielectric layer has at least one first hole, with exposed part First Line
Road floor.Second dielectric layer is arranged on first line layer and the first dielectric layer, wherein the second dielectric layer has at least one irrigation canals and ditches
With at least one the second hole, exposed first dielectric layer of irrigation canals and ditches, the exposed first line layer of the second hole.The setting of second line layer exists
In irrigation canals and ditches.Conductive hole is arranged in the second hole, and conductive hole is not in contact with the first hole, and the aperture of the second hole is less than the first hole
The aperture in hole is simultaneously located among the first hole, and wherein conductive hole has bottom surface, top surface and the side for connecting bottom surface and top surface.
In one or more embodiments of the invention, irrigation canals and ditches are connected to the second hole, and the connection of the second line layer is led
Electric hole.
In one or more embodiments of the invention, the second dielectric layer is actinodielectric material.
Above embodiment of the present invention is by allowing irrigation canals and ditches to be formed simultaneously with the second hole or be formed using same board, therefore
Relevant technical process error is substantially negligible.Then, the diameter of the top half of the second hole is substantially not required to be greater than
The diameter of the lower half portion of second hole, and the top half for filling up the conductive hole of the second hole will not compared to its lower half portion
With outer ring structure.Therefore, conductive hole space shared in the second dielectric layer will effectively reduce, thus increase by the second dielectric
The space of the second line layer can be set in layer, and then promotes the wiring density of board structure of circuit.
Detailed description of the invention
Figure 1A to Fig. 1 I respectively cuing open according to each step of manufacturing method of the board structure of circuit of an embodiment of the present invention
Face figure.
Fig. 2 is the sectional view according to the board structure of circuit of another embodiment of the present invention.
Specific embodiment
Multiple embodiments of the invention will be disclosed with attached drawing below, as clearly stated, many concrete details will
It is explained in the following description.It should be appreciated, however, that these concrete details are not applied to limit the present invention.That is,
In some embodiments of the present invention, these concrete details are non-essential.In addition, for the sake of simplifying attached drawing, it is some existing
Usual structure will be indicated in a manner of simply illustrating in the accompanying drawings with element.
In order to meet semiconductor element high integration (Integration) and be miniaturized (Miniaturization)
It is required that the requirements of circuit board are also higher and higher.For example, the wiring density of circuit board wishes that the higher the better.The present invention
Different embodiments provide a kind of manufacturing method of board structure of circuit, and by the manufacturing process of special designing, it is hardened to promote circuit
The wiring density of structure.
Figure 1A to Fig. 1 I is respectively each step of manufacturing method according to the board structure of circuit 100 of an embodiment of the present invention
Sectional view.Herein it should be noted that each structure is all respectively symmetrically formed in each step of manufacturing method because of board characteristic
In the two sides of bearing substrate 110, each structure for being formed in the wherein side of bearing substrate 110 is only discussed below.Foregoing description
It is not intended to limit the present invention, in other embodiments, each structure can be made only in carrying base in each step of manufacturing method
The wherein side of plate 110.
Bearing substrate 110 includes core layer 112 and conductive layer 114,116.Conductive layer 114,116 is separately positioned on core layer
112 two sides.
The material of core layer 112 can be metal, dielectric material or combinations thereof.For example, core layer 112 can be copper foil base
Plate (Copper Clad Laminate, CCL).
Specifically.Conductive layer 114,116 can be copper foil or conductive seed.It will be understood that conductive layer provided above
114,116 specific embodiment is merely illustrative, is not intended to limit the invention, and has in the technical field of the invention usual
The personnel of knowledge should regard actual needs, the specific embodiment of elasticity selection conductive layer 114,116.
As shown in Figure 1A, first line layer 120 is formed on bearing substrate 110.
The method for forming first line layer 120 can be the photoresist layer of the formation e.g. dry film first on bearing substrate 110
(not shown), photoresist layer pattern exposed portion bearing substrate 110 via photo-etching technological process again, carry out galvanizer again later
Skill process and the removal technical process of photoresist layer are to form first line layer 120.
The material of first line layer 120 can be metal, e.g. silver, nickel, copper, gold, palladium or combinations thereof.It will be understood that with
On the material of first line layer 120 lifted it is merely illustrative, be not intended to limit the invention, have in the technical field of the invention
There are the personnel of usual knowledge, actual needs, the material of elasticity selection first line layer 120 should be regarded.
As shown in Figure 1B, the first dielectric layer 130 is formed on bearing substrate 110 and first line layer 120.
The material of first dielectric layer 130 can be photosensitive type dielectric material, such as Hitachi (Hitachi) company model DIF03
Material.It will be understood that the material of the first dielectric layer 130 provided above is merely illustrative, it is not intended to limit the invention, this hair
Those who have general knowledge in bright technical field should regard actual needs, the material of elasticity the first dielectric layer 130 of selection.
First dielectric layer 130 can be formed by press mold technical process or coating process.It will be understood that provided above
The forming method of first dielectric layer 130 is merely illustrative, is not intended to limit the invention, and has in the technical field of the invention logical
The personnel of Chang Zhishi should regard actual needs, the forming method of elasticity the first dielectric layer 130 of selection.
As shown in Figure 1 C, at least one first hole of exposed part first line layer 120 is formed in the first dielectric layer 130
Hole 132.
First hole 132 is to be formed by the first dielectric layer of exposure development 130, and first line layer 120 is as blocking
Layer.After forming the first hole 132, the first dielectric layer 130 is toasted, hardens the first dielectric layer 130.
In another embodiment, the first hole 132 is to be formed by the first dielectric layer of laser ablation 130, and first
Line layer 120 is used as barrier layer.In addition, in this embodiment, the material of the first dielectric layer 130 can be photosensitive type dielectric material
Or non-photo-sensing type dielectric material.If the material of the first dielectric layer 130 be photosensitive type dielectric material, formed the first hole 132 it
Before, the first dielectric layer 130 is toasted, the first dielectric layer 130 is hardened.
As shown in figure iD, the second dielectric layer 140 is formed on the first dielectric layer 130 and first line layer 120.Then, portion
Divide the second dielectric layer 140 that will be arranged in the first hole 132.
The material of second dielectric layer 140 is photosensitive type dielectric material, such as the material of Hitachi, Ltd model DIF03.Ying Liao
It solves, the material of the second dielectric layer 140 provided above is merely illustrative, is not intended to limit the invention, technology belonging to the present invention
Those who have general knowledge in field should regard actual needs, the material of elasticity the second dielectric layer 140 of selection.
Second dielectric layer 140 can be formed by press mold technical process or coating process.It will be understood that provided above
The forming method of second dielectric layer 140 is merely illustrative, is not intended to limit the invention, and has in the technical field of the invention logical
The personnel of Chang Zhishi should regard actual needs, the forming method of elasticity the second dielectric layer 140 of selection.
Second dielectric layer 140 thickness t (i.e. be located at the first dielectric layer 130 on the second dielectric layer 140 thickness) can be
About 10 to 20 microns.The thickness t of second dielectric layer 140 can be about 15 microns.
As referring to figure 1E, at least one irrigation canals and ditches of the first dielectric layer of exposed part 130 are formed in the second dielectric layer 140
142, and second hole 144 of exposed first line layer 120 is formed in place of corresponding first hole 132, and the second hole 144
Aperture less than the first hole 132 aperture and be located within the first hole 132.
Irrigation canals and ditches 142 and the second hole 144 are by the formation of the second dielectric layer of exposure development 140, and the first dielectric layer 130
Barrier layer is used as with first line layer 120.After forming irrigation canals and ditches 142 and the second hole 144, the second dielectric layer 140 is toasted, is made
The hardening of second dielectric layer 140.
Partial trench 142 can be connected to the second hole of part 144, and partial trench 142 can connect with another part irrigation canals and ditches 142
It is logical.
In the present embodiment, irrigation canals and ditches 142 and the second hole 144 are formed simultaneously.Irrigation canals and ditches 142 and the second hole 144
It is formed to use same the second dielectric layer of light shield exposure development 140.
In another embodiment, irrigation canals and ditches 142 and the second hole 144 are to expose (Direct Image using through image
Exposure it) is formed.Firstly, using the laser head of through image exposure device with lower the second dielectric layer of energy exposure 140
And form irrigation canals and ditches 142.Then, in the case where not moving bearing substrate 110, using the laser head of through image exposure device with
Higher-energy exposes the second dielectric layer 140 and forms the second hole 144.It is previously formed the sequence of irrigation canals and ditches 142 and the second hole 144
It can overturn, it can be initially formed the second hole 144 and re-form irrigation canals and ditches 142.In summary, irrigation canals and ditches 142 are with the second hole 144
In the case where not moving bearing substrate 110, formed using same board.
As shown in fig. 1F, the metal layer 150 for filling up irrigation canals and ditches 142 and the second hole 144 is formed.
Firstly, on first dielectric layer 130 exposed by irrigation canals and ditches 142 with the First Line exposed by the second hole 144
Conductive seed 160 is formed on road floor 120.Then, plating forms metal layer 150.
The material of metal layer 150 can be silver, nickel, copper, gold, palladium or combinations thereof.The material of conductive seed 160 can be change
Copper changes palladium or jet-plating metallization such as sputter copper, sputter titanium copper (Ti/Cu).It will be understood that metal layer 150 provided above with lead
The material of electric seed layer 160 is merely illustrative, is not intended to limit the invention, and has usual knowledge in the technical field of the invention
Personnel, actual needs should be regarded, the material of elasticity selection metal layer 150 and conductive seed 160.
As shown in Figure 1 G, metal layer 150 is planarized and is removed the top half of metal layer 150, and then expose second
Dielectric layer 140.Then, the metal layer 150 for filling up irrigation canals and ditches 142 and the second hole 144 forms the interior line for being embedded in the second dielectric layer 140
Road (i.e. embedded line).
The metal layer 150 for filling up irrigation canals and ditches 142 becomes the second line layer 152, fill up the metal layer 150 of the second hole 144 at
For conductive hole 154.Conductive hole 154 has bottom surface 154b, top surface 154t and connects the side of bottom surface 154b and top surface 154t
154s.Side 154s is the curved surface being extended continuously or plane, and in other words, conductive hole 154 is cylindrical structure or trapezoid cylinder etc.
Cylinder.
The height (i.e. the distance between top surface 154t and bottom surface 154b) of conductive hole 154 can be about 30 to 50 microns.It is conductive
The height in hole 154 can be about 40 microns.
The diameter of top surface 154t can be about 10 to 60 microns, 15 to 50 microns or 20 to 30 microns.It will be understood that the above institute
The diameter of the top surface 154t of act is merely illustrative, is not intended to limit the invention, and has usually know in the technical field of the invention
The personnel of knowledge should regard actual needs, the diameter of elasticity selection top surface 154t.
Because partial trench 142 can be connected to another part irrigation canals and ditches 142, in being to fill up the metal layer 150 of irrigation canals and ditches 142 (i.e.
Second line layer 152) different piece can interconnect.Because partial trench 142 can be connected to the second hole of part 144,
It (is led in the metal layer 150 (i.e. the second line layer 152) for being to fill up irrigation canals and ditches 142 with the metal layer 150 for filling up the second hole 144
Electric hole 154) it can interconnect.
The method of planarization can be brushing, chemical mechanical grinding (Chemical-Mechanical Polishing, CMP)
The methods of.It will be understood that the specific implementation method of planarization provided above is merely illustrative, it is not intended to limit the invention, this
Those who have general knowledge in technical field that the present invention belongs to should regard actual needs, the specific embodiment party of elasticity selection planarization
Method.
As shown in fig. 1H, metal layer 150 is being planarized after removing the top half of metal layer 150, is removing core
Layer 112, that is, allow conductive layer 114 to separate (at the same time, conductive layer 116 is also separated with core layer 112) with core layer 112.
It is noted that the step of above-mentioned removal core layer 112, is not particularly limited.It for example, can be hardened in circuit
Structure 100 removes core layer 112 before being packaged technical process, or can be packaged technical process in board structure of circuit 100
Core layer 112 is removed later.
As shown in Fig. 1 H and Fig. 1 I, conductive layer 114 is removed, to form the board structure of circuit 100 of seedless central layer.
During traditional handicraft, although the top half of irrigation canals and ditches and the second hole is usually to use same process process shape
At, but the lower half portion of the second hole is then formed with aforementioned the two using different process process, therefore it is forming second
It will generate error when the top half of hole and lower half portion, and top half and lower half portion in order to avoid the second hole
Between error overall structure is impacted, it will usually allow the diameter of the top half of the second hole to be greater than second hole
The diameter of lower half portion, thus it is aligned the top half of the second hole and the lower half portion of the second hole.Then, it fills up
The top half of the conductive hole of second hole will have outer ring structure compared to its lower half portion.
Compared to this, by previous building methods, because irrigation canals and ditches 142 and the second hole 144 are to be formed simultaneously or using same
One board is formed, therefore relevant technical process error is substantially negligible.Then, the top half of the second hole 144
Diameter is substantially not required to the diameter of the lower half portion greater than the second hole 144, and fill up the conductive hole 154 of the second hole 144
Top half will not have outer ring structure compared to its lower half portion.Therefore, conductive hole 154 is shared in the second dielectric layer 140
Space will effectively reduce, thus increase by the second dielectric layer 140 and the space of the second line layer 152 can be set, and then promoted
The wiring density of board structure of circuit 100.
It is board structure of circuit 100 made by the manufacturing method via Figure 1A to 1I with continued reference to Fig. 1 I.Circuit is hardened
Structure 100 includes first line layer 120, the first dielectric layer 130, the second dielectric layer 140, the second line layer 152 and conductive hole
154.First dielectric layer 130 is arranged on first line layer 120, wherein the first dielectric layer 130 has at least one first hole
132, with exposed part first line layer 120.Second dielectric layer 140 is arranged in first line layer 120 and the first dielectric layer 130
On, wherein the second dielectric layer 140 has at least one irrigation canals and ditches 142 and at least one second hole 144, irrigation canals and ditches 142 exposed first
Dielectric layer 130, the exposed first line layer 120 of the second hole 144.Second line layer 152 is arranged in irrigation canals and ditches 142.Conductive hole 154
It is arranged in the second hole 144, conductive hole 154 is not in contact with the first hole 132, and the aperture of the second hole 144 is less than the first hole
The aperture in hole 132 is simultaneously located among the first hole 132.Wherein conductive hole 154 has bottom surface 154b, top surface 154t and connection bottom
The side 154s of face 154b and top surface 154t.
Fig. 2 is the sectional view according to the board structure of circuit 100 of another embodiment of the present invention.The board structure of circuit 100 of Fig. 2
It is roughly the same with the board structure of circuit 100 of Fig. 1 I, its different place is mainly described below.
As shown in Fig. 2, board structure of circuit 100 also includes bearing substrate 110.First line layer 120 is arranged in bearing substrate
On 110.The setting of first dielectric layer 130 is on bearing substrate 110 and first line layer 120.
In addition, board structure of circuit 100 also includes conductive seed 170, it is arranged in bearing substrate 110 and first line layer
Between 120, function is similar with the conductive layer 114,116 of Figure 1A, to form first line layer 120 to be electroplated.
The material of conductive seed 170 can be change copper, change palladium or jet-plating metallization such as sputter copper, sputter titanium copper.It should be appreciated that
It arrives, the material of conductive seed 170 provided above is merely illustrative, is not intended to limit the invention, the neck of technology belonging to the present invention
Those who have general knowledge in domain should regard actual needs, the material of elasticity selection conductive seed 170.
Above embodiment of the present invention is by allowing irrigation canals and ditches 142 and the second hole 144 to be formed simultaneously or use same board shape
At, therefore relevant technical process error is substantially negligible.Then, the diameter of the top half of the second hole 144 is basic
On be not required to the diameter of lower half portion greater than the second hole 144, and fill up the top half of the conductive hole 154 of the second hole 144
To not have outer ring structure compared to its lower half portion.Therefore, the space shared in the second dielectric layer 140 of conductive hole 154 will
It can effectively reduce, thus increase by the second dielectric layer 140 and the space of the second line layer 152 can be set, and then it is hardened to promote circuit
The wiring density of structure 100.
Although the present invention is disclosed as above with embodiment, however, it is not to limit the invention, any this field skill
Art personnel, without departing from the spirit and scope of the present invention, when various variations and retouching, therefore protection scope of the present invention can be made
Subject to view as defined in claim.
Claims (7)
1. a kind of manufacturing method of board structure of circuit, which is characterized in that the manufacturing method of the board structure of circuit includes following step
It is rapid:
First line layer is formed on bearing substrate；
The first dielectric layer is formed on the bearing substrate and the first line layer；
At least one first hole of first line layer described in exposed part is formed in first dielectric layer；
The second dielectric layer is formed on first dielectric layer and the first line layer；
At least one irrigation canals and ditches of the first dielectric layer described in exposed part are formed in second dielectric layer, and in correspondence described the
The second hole of the exposed first line layer is formed in place of one hole, and the aperture of second hole is less than first hole
The aperture in hole is simultaneously located among first hole, and the irrigation canals and ditches are formed simultaneously or use same with second hole
What board was formed；And
It is formed and fills up the metal layers of the irrigation canals and ditches Yu second hole, wherein filling up the metal layers of the irrigation canals and ditches as the
Two line layers, the metal layer for filling up second hole become conductive hole.
2. the manufacturing method of board structure of circuit as described in claim 1, which is characterized in that the irrigation canals and ditches and second hole
To be formed by the second dielectric layer described in exposure development, and first dielectric layer and the first line layer are as blocking
Layer.
3. the manufacturing method of board structure of circuit as described in claim 1, which is characterized in that the step of forming metal layer packet
Contain:
On first dielectric layer exposed by the irrigation canals and ditches with the first line exposed by second hole
Seed layer is formed on layer；
Plating forms the metal layer；And
The metal layer is planarized and removed the top half of the metal layer, and then exposes second dielectric layer.
4. the manufacturing method of board structure of circuit as described in claim 1, which is characterized in that also include:
Before forming second dielectric layer, first dielectric layer is toasted, hardens first dielectric layer.
5. a kind of board structure of circuit, which is characterized in that the board structure of circuit includes:
First line layer；
First dielectric layer is arranged on the first line layer, wherein first dielectric layer has at least one first hole
Hole, with first line layer described in exposed part；
Second dielectric layer, setting is on the first line layer and first dielectric layer, wherein second dielectric layer has
There are at least one irrigation canals and ditches and at least one second hole, exposed first dielectric layer of irrigation canals and ditches, second hole is exposed
The first line layer, and the irrigation canals and ditches and second hole are formed simultaneously or are formed using same board；
Second line layer is arranged in the irrigation canals and ditches；And
Conductive hole is arranged in second hole, and the conductive hole is not in contact with first hole, and second hole
Aperture be less than first hole aperture and be located among first hole, wherein the conductive hole have bottom surface, top
The side of face and the connection bottom surface and the top surface.
6. board structure of circuit as claimed in claim 5, which is characterized in that the irrigation canals and ditches are connected to second hole, and institute
It states the second line layer and connects the conductive hole.
7. board structure of circuit as claimed in claim 5, which is characterized in that second dielectric layer is actinodielectric material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510340281.XA CN106257970B (en) | 2015-06-18 | 2015-06-18 | Board structure of circuit and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510340281.XA CN106257970B (en) | 2015-06-18 | 2015-06-18 | Board structure of circuit and its manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106257970A CN106257970A (en) | 2016-12-28 |
| CN106257970B true CN106257970B (en) | 2019-02-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201510340281.XA Active CN106257970B (en) | 2015-06-18 | 2015-06-18 | Board structure of circuit and its manufacturing method |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1976560A (en) * | 2005-11-29 | 2007-06-06 | 三星电机株式会社 | Core substrate and multiplayer printed circuit board using paste bump and method of manufacturing thereof |
| CN102867807A (en) * | 2011-07-08 | 2013-01-09 | 欣兴电子股份有限公司 | Coreless packaging substrate and manufacturing method thereof |
| CN103491729A (en) * | 2012-06-11 | 2014-01-01 | 欣兴电子股份有限公司 | Circuit board and manufacturing method thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5198748B2 (en) * | 2006-08-31 | 2013-05-15 | 本田技研工業株式会社 | Circuit board and manufacturing method thereof |
| JP2008198734A (en) * | 2007-02-09 | 2008-08-28 | Fujikura Ltd | Printed-wiring board and manufacturing method thereof |
-
2015
- 2015-06-18 CN CN201510340281.XA patent/CN106257970B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1976560A (en) * | 2005-11-29 | 2007-06-06 | 三星电机株式会社 | Core substrate and multiplayer printed circuit board using paste bump and method of manufacturing thereof |
| CN102867807A (en) * | 2011-07-08 | 2013-01-09 | 欣兴电子股份有限公司 | Coreless packaging substrate and manufacturing method thereof |
| CN103491729A (en) * | 2012-06-11 | 2014-01-01 | 欣兴电子股份有限公司 | Circuit board and manufacturing method thereof |
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| Publication number | Publication date |
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| CN106257970A (en) | 2016-12-28 |
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