CN106249660A - The conflation unit of compatible to IEC 61,850 92 and IEC60044 8 stipulations and method - Google Patents

The conflation unit of compatible to IEC 61,850 92 and IEC60044 8 stipulations and method Download PDF

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Publication number
CN106249660A
CN106249660A CN201610767469.7A CN201610767469A CN106249660A CN 106249660 A CN106249660 A CN 106249660A CN 201610767469 A CN201610767469 A CN 201610767469A CN 106249660 A CN106249660 A CN 106249660A
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cpu
iec60044
module
iec61850
data
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CN201610767469.7A
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CN106249660B (en
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赵谦
谢坤
陈福锋
龚世敏
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Nanjing SAC Automation Co Ltd
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Nanjing SAC Automation Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • G05B19/0425Safety, monitoring
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/26Pc applications
    • G05B2219/2604Test of external equipment
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/26Pc applications
    • G05B2219/2612Data acquisition interface

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Electronic Switches (AREA)
  • Small-Scale Networks (AREA)

Abstract

The invention discloses the conflation unit of a kind of compatible to IEC 61,850 92 and IEC60044 8 harvester stipulations, it include for opening of providing that intake accesses into module, DIO (input and output module) module, for providing the CPU module of intelligent acess and signal-data processing and providing the power module of working power for each plug-in unit;Described CPU module gathers the message of standard by grafting reception IEC61850 92 collection standard and IEC60044 8, and the packet parsing of reception is processed as consolidation form synchronization process.The present invention supports that IEC61850 92 and IEC60044 8 256 point sampling rate, IEC61850 92 and IEC60044 880 point sampling rate input;Support 80 IEC61850 92 sampling value messages of output and 256 IEC61850 92 sampling value messages simultaneously;Compatibility on device harvester input interface hardware, it is only necessary to change the input of optical module the most changeable different types of harvester, use this kind of device can maximize the input of compatible various harvester stipulations.

Description

The conflation unit of compatible to IEC 61850-9-2 and IEC60044-8 stipulations and method
Technical field
The present invention relates to a kind of compatible to IEC 61850-9-2 harvester stipulations and the numeral of IEC60044-8 harvester stipulations Combining unit and compatibility method thereof, belong to intelligent substation automatic safety device field.
Background technology
From 20 end of the centurys, intelligence is directly adopted by tradition transformer by there being original protection device in substation secondary side Changing transformer station is become digital quantity to be sent to protection, the more directly number to a new generation's station electronic mutual inductor by combining unit sample conversion Word amount exports, and transformer station is just stepping into digital area.The features such as it is strong that digitizing technique has interference resistance, and wiring is simple, Transformer station's rugged environment can be preferably adapted to traditional wired mode ratio.Significant as digitizing station of electronic mutual inductor Equipment, the importance of matched digital combining unit also shows one spot.
Although each electronic mutual inductor is based on IEC61850-9-2(SV) and privately owned IEC60044-8(FT3) form, But the message format of output is not fixed, and the most matched digital combining unit often uses according to electronic mutual inductor The message format of output carry out the mode that customizing device receives and research and develop.The mode that this " one to one " customizes, limits greatly Make the compatibility of device.
Additionally, this customization mode also add production cost and the cost of transformer station's O&M.Therefore, the need that market is urgent Want a kind of digital combining unit, not only can compatible to IEC 61850-9-2(SV) message, it is also compatible with the IEC60044-of main flow simultaneously 8(FT3) stipulations, to solve the problem of digital combining unit poor compatibility, reduce on-the-spot O&M difficulty and cost.
Summary of the invention
It is an object of the invention to overcome deficiency of the prior art, and provide a kind of compatible to IEC 61850-9-2 and The conflation unit of IEC60044-8 harvester stipulations and method of work thereof, to solve digital combining unit poor compatibility Problem, reduces on-the-spot O&M difficulty and cost.
For reaching above-mentioned purpose, the technical solution adopted in the present invention is:
A kind of compatible to IEC 61850-9-2 and the conflation unit of IEC60044-8 harvester stipulations, it is characterised in that: its bag Include for providing what intake accessed to open into module, DIO(input and output module) module, it is used for providing intelligent acess and signal number According to the CPU module processed and the power module providing working power for each plug-in unit;Described CPU module is received by grafting IEC61850-9-2 gathers standard and the message of IEC60044-8 collection standard, and the packet parsing of reception is processed as unified lattice Formula synchronization process.
Plug-in unit is provided with 2 tunnels cascade Ethernet interface (0,1 mouthful), 6 roads electronic mutual inductor data access mouth (2-7 mouth), a road Signal port (SYNC) when Ethernet debugging mouth (PPC mouth) and a road pair.Additionally, the merits such as the dissection process of device docking receiving literary composition Can also complete on plug-in unit.
A kind of compatibility method using above-mentioned conflation unit, its method includes the following:
(1) buffer area of FPGA is expanded, internal memory carries out zoning by mouth;
(2) FPGA Yu CPU uses the data interaction of CPU inquiry mode, and CPU inquires about the reception of FPGA at regular intervals and sends out Send relief area BD, when CPU inquires reception buffering BD non-NULL, CPU be responsible for reading and walk appointed buffer data and by BD non-NULL Identify clear 0;If it is full up to receive buffering, no longer receive other message until CPU will receive the non-NULL mark clear 0 of buffering BD;
When CPU needs to send message, it is necessary first to inquiry transmission buffering BD takies mark, is designated 1 if taken, Then this transmission buffer data does not the most send and terminates, and CPU must not write data toward this relief area;
If having taken and being designated 0, then this transmission relief area does not has data to be sent, and CPU can write data toward this relief area, writes Put 1 by CPU data are sent taking mark by FPGA after complete.
(3) configuration file being carried out type expansion, in configuration message type, first distribute access port, next defines light Type IEC61850-9-2 of Ethernet interface and IEC60044-8256 point sampling rate, IEC61850-9-2 and IEC60044-880 Point sampling rate, channel type and the number of last opposed inlet configure, the type of configuration, number and electronic mutual inductor shape State is consistent, to ensure that digital combining unit processes the accuracy of outgoing message after data.
In described step (1), each mouth carries out zoning by function and is divided into cascade district, 256 SV memory blocks, and FT3 deposits Storage area, synchronizes time zone.
In described step (2), described certain time is 0.5ms.
Combining unit device support simultaneously IEC61850-9-2 and IEC60044-880 point harvester sample rate, The input of IEC61850-9-2 and IEC60044-8256 point harvester sample rate message, supports output IEC61850-9-2 simultaneously With IEC60044-880 point sampling value message and IEC61850-9-2256 point IEC61850-9-2 sampling value message.
Compatibility on combining unit device harvester input interface hardware, it is only necessary to change optical module the most changeable different types of Harvester inputs.
Compared with prior art, the present invention is reached to provide the benefit that:
The functions such as the present invention has digital output, digital output, voltage switching, and clock synchronizes, voltage switching, can be convenient Access various with IEC61850-9-2 stipulations or IEC60044-8 stipulations the electronic mutual inductor as source, there is the strongest compatibility Property, solve current digital combining unit " one to one " customization the strongest compatible problem.
Accompanying drawing explanation
Fig. 1 is the systematic schematic diagram of the present invention.
Fig. 2 is the flow chart of the present invention.
Detailed description of the invention
Following example are only used for clearly illustrating technical scheme, and can not limit the present invention with this Protection domain.
See Fig. 1 and Fig. 2, the numeral conjunction of compatible to IEC 61850-9-2 and the IEC60044-8 harvester stipulations of the present embodiment And unit, it includes for providing what intake accessed to open into module, DIO(input and output) module, it is used for providing intelligent acess With the CPU module of signal-data processing and the power module that provides working power for each plug-in unit;Described CPU module passes through Grafting receives IEC61850-9-2 and gathers standard and the message of IEC60044-8 collection standard, and the packet parsing that will receive processes For consolidation form synchronization process.
The present embodiment have employed unified platform technology, and all of plug-in unit uses unified hardware platform to research and develop, motherboard position Anterior in cabinet, plug mode after the employing of all of plug-in unit, it is simple to modularized design pressed by plug-in unit.Device is specifically divided on hardware CPU module, power module, opens into (DI) module, DIO() module.
CPU module is the core of device, and main offer intelligent acess and signal-data processing function, plug-in unit has 2 tunnel levels Connection Ethernet interface (0,1 mouthful), 6 roads electronic mutual inductor data access mouth (2-7 mouth), road Ethernet debugging mouth (PPC mouth) with And signal port (SYNC) during road pair.Additionally, the functions such as the dissection process of device docking receiving literary composition also complete on plug-in unit.
DI module is that device is provided traditional intake access, including maintenance, disconnecting link position etc..
Power module is that each plug-in unit of device provides working power, alternating current-direct current self adaptation.DIO module provides for device 2 groups of tripping operation alarming node.
The data interaction of FPGA Yu CPU, synchronization when completing pair, FT3 data receiver, FT3 data send, temporal interpolation with The work such as step, the reception of IEC61850-9-2 SV message, the transmission of IEC61850-9-2 SV message, GOOSE message forwarding.The present invention Data compatibility method as follows:
1. couple FPGA(Field-Programmable Gate Array, i.e. field programmable gate array) buffer area expand Filling, divide by mouth on internal memory, each mouth is divided into cascade district, 256 SV memory blocks by function, and FT3 memory block, it is right to synchronize Time zone etc..
2. the data interaction of FPGA Yu CPU no longer uses interrupt mode, and changes CPU inquiry mode into.CPU is every 0.5ms The reception of inquiry FPGA and transmission relief area BD.When CPU inquires reception buffering BD non-NULL, CPU it is responsible for reading and walks to specify slow Rush district's data and BD non-NULL is identified clear 0, if it is full up to receive buffering, no longer receiving other message until reception is buffered by CPU The non-NULL mark clear 0 of BD.When CPU need send message time firstly the need of inquiry send buffering BD take mark, if Taking and be designated this transmission buffer data of 1 explanation and the most do not send and terminate, CPU must not write data, if toward this relief area Taking and be designated this transmission relief area of 0 explanation and do not have data to be sent, CPU can write data in this relief area in the past, after writing by CPU puts 1 data sent taking mark by FPGA.
3. pair configuration file carries out type expansion, in configuration message type, first distributes access port, secondly definition light with The too type 9-2LE(SV electronic mutual inductor of network interface), 9-2(SV cascade), FT3(FT3 electronic mutual inductor), finally to access Channel type and the number of mouth configure, and type and number must be digital to ensure with electronic mutual inductor state consistency The accuracy of outgoing message after combining unit process data.
A kind of compatible to IEC 61850-9-2 harvester stipulations of the present embodiment and the numeral of IEC60044-8 harvester stipulations The functions such as combining unit has digital output, digital output, voltage switching, and clock synchronizes, voltage switching, can connect easily Enter various with IEC61850-9-2 stipulations or IEC60044-8 stipulations the electronic mutual inductor as source, there is the strongest compatibility Property.
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For Yuan, on the premise of without departing from the technology of the present invention principle, it is also possible to make some improvement and deformation, these improve and deformation Also should be regarded as protection scope of the present invention.

Claims (5)

1. a compatible to IEC 61850-9-2 and the conflation unit of IEC60044-8 harvester stipulations, it is characterised in that: its Including for opening of providing that intake accesses into module, open into going out module, for providing intelligent acess and signal-data processing CPU module and provide the power module of working power for each plug-in unit;Described CPU module is received by grafting IEC61850-9-2 gathers standard and the message of IEC60044-8 collection standard, and the packet parsing of reception is processed as unified lattice Formula synchronization process.
Conflation unit the most according to claim 1, it is characterised in that described plug-in unit is provided with 2 tunnel cascade Ethernets Signal port when mouth, six road electronic mutual inductor data access mouths, a road Ethernet debugging mouth and a road pair.
3. one kind uses the compatibility method of conflation unit described in claim 1, it is characterised in that its method includes the following:
(1) buffer area of FPGA is expanded, internal memory carries out zoning by mouth;
(2) FPGA Yu CPU uses the data interaction of CPU inquiry mode, and CPU inquires about the reception of FPGA at regular intervals and sends out Send relief area BD, when CPU inquires reception buffering BD non-NULL, CPU be responsible for reading and walk appointed buffer data and by BD non-NULL Identify clear 0;If it is full up to receive buffering, no longer receive other message until CPU will receive the non-NULL mark clear 0 of buffering BD;
When CPU needs to send message, it is necessary first to inquiry transmission buffering BD takies mark, is designated 1 if taken, Then this transmission buffer data does not the most send and terminates, and CPU must not write data toward this relief area;
If having taken and being designated 0, then this transmission relief area does not has data to be sent, and CPU can write data toward this relief area, writes Put 1 by CPU data are sent taking mark by FPGA after complete;
(3) configuration file being carried out type expansion, in configuration message type, first distribute access port, next defines luminiferous ether Type IEC61850-9-2 of network interface and IEC60044-8 256 point sampling rate, IEC61850-9-2 and IEC60044-880 point Sample rate, channel type and the number of last opposed inlet configure, the type of configuration, number and electronic mutual inductor state Unanimously, to ensure that digital combining unit processes the accuracy of outgoing message after data.
Compatibility method the most according to claim 3, it is characterised in that in described step (1), each mouth is carried out drawing by function Subregion is divided into cascade district, 256 SV memory blocks, FT3 memory block, synchronizes time zone.
Compatibility method the most according to claim 3, it is characterised in that in described step (2), described certain time is 0.5ms。
CN201610767469.7A 2016-08-30 2016-08-30 The conflation unit and method of compatible to IEC 61850-9-2 and IEC60044-8 specification Active CN106249660B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107300651A (en) * 2017-07-24 2017-10-27 中国电力科学研究院 A kind of digital quantity input type standard combining unit
CN114095797A (en) * 2021-10-15 2022-02-25 南京南瑞继保电气有限公司 Fault recording module and fault recording circuit

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102231568A (en) * 2011-07-05 2011-11-02 国电南瑞科技股份有限公司 Multifunctional intelligent data collecting device
CN103200280A (en) * 2013-02-20 2013-07-10 中国电力科学研究院 Process level interface device of intelligent substation
CN103995193A (en) * 2014-04-30 2014-08-20 贵州电力试验研究院 Digital substation whole-substation power quality on-line monitoring device
JP2015070769A (en) * 2013-09-30 2015-04-13 株式会社東芝 Protection control system and merging unit
EP3001535A1 (en) * 2013-05-21 2016-03-30 Mitsubishi Electric Corporation Protection control system for process bus, merging unit, and computation device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102231568A (en) * 2011-07-05 2011-11-02 国电南瑞科技股份有限公司 Multifunctional intelligent data collecting device
CN103200280A (en) * 2013-02-20 2013-07-10 中国电力科学研究院 Process level interface device of intelligent substation
EP3001535A1 (en) * 2013-05-21 2016-03-30 Mitsubishi Electric Corporation Protection control system for process bus, merging unit, and computation device
JP2015070769A (en) * 2013-09-30 2015-04-13 株式会社東芝 Protection control system and merging unit
CN103995193A (en) * 2014-04-30 2014-08-20 贵州电力试验研究院 Digital substation whole-substation power quality on-line monitoring device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107300651A (en) * 2017-07-24 2017-10-27 中国电力科学研究院 A kind of digital quantity input type standard combining unit
CN114095797A (en) * 2021-10-15 2022-02-25 南京南瑞继保电气有限公司 Fault recording module and fault recording circuit
CN114095797B (en) * 2021-10-15 2024-06-18 南京南瑞继保电气有限公司 Fault recording module and fault recording circuit

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