CN106229812B - A kind of preparation method of the GaAs base lasers with different depth groove - Google Patents
A kind of preparation method of the GaAs base lasers with different depth groove Download PDFInfo
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- CN106229812B CN106229812B CN201610779128.1A CN201610779128A CN106229812B CN 106229812 B CN106229812 B CN 106229812B CN 201610779128 A CN201610779128 A CN 201610779128A CN 106229812 B CN106229812 B CN 106229812B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
- H01S5/2214—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers based on oxides or nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/24—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a grooved structure, e.g. V-grooved, crescent active layer in groove, VSIS laser
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/34313—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer having only As as V-compound, e.g. AlGaAs, InGaAs
- H01S5/3432—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer having only As as V-compound, e.g. AlGaAs, InGaAs the whole junction comprising only (AI)GaAs
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Abstract
A kind of preparation method of the GaAs base lasers with different depth groove, first mask of the layer dielectric as dry etching is deposited on the surface of epitaxial wafer, make the region of the first depth by lithography using first piece of lithography mask version, fall the medium at first area as mask corrosion using photoresist to touch, then the region of the second depth is made by lithography using second piece of lithography mask version, using the photoresist and deielectric-coating formed above dry etching is carried out as mask, the different groove of depth is obtained, laser is eventually formed.Photoresist of this method spin coating is just simultaneously as the mask for preparing the first depth areas figure and the second depth areas figure, carry out the groove that a dry etching has just obtained different depth requirement, realize the etching to the position of different depth different zones, it is easy to operate, simplify processing step, the production cycle is shortened, while reducing the consumption of raw material, increases the repeatability and stability of entire technique.
Description
Technical field
The present invention relates to a kind of preparation methods of the GaAs base lasers with different depth groove, belong to the skill of semiconductor
Art field.
Background technology
Semiconductor laser since the advent of the world, as a kind of novel light source, due to its is small, power is high, long lifespan,
The advantages that easy to use, receives favor in the fields such as optical storage, optic communication and national defence, medical treatment.In the system of semiconductor laser
During standby, photoetching process is to utilize photoresist by exposing, developing, will be in the pattern transfer to epitaxial wafer on mask plate
Face makes the photoetching offset plate figure pattern above epitaxial wafer with the device for wanting to make, then by chemistry or physical method, will scheme
Shape structure is transferred to above epitaxial wafer.Since the different position of epitaxial wafer sometimes needs depth not in actual operating process
Same trench mesas, this just needs to carry out multiple growth mask, photoetching, etching and surface treatment.Increase the numerous of technique
Trivial property, the unstability in production cost and technical process are very unfavorable to the stability and easy of technique.
Disclosed in Chinese patent literature CN101471534A《A kind of making high power semiconductor conical laser/amplifier
Method》, using first time optical graving for the figure table top gone out using media protection material as mask, then in no medium
Protection materials do the local spin coating photoresist again of mask, carry out photoetching and prepare the taper using photoresist as mask protection
Behind gain region, the media protection material and photoresist mask prepared using Twi-lithography above are as mask, using dry method
Etching or wet etching will not have the place of protection to corrode and ridged scheme control area table top in secondary photoetching, using being situated between after removing photoresist
Quality guarantee protective material prepares tapered gain region table top as mask, using the method for wet etching.Corrode remaining media material, clearly
Again media protection material is deposited after washing；Mask is formed using standard photolithography process, on erosion pattern control zone and tapered zone
Media protection material outputs electric current injection window；Then pass through p side electrode vapor deposition, the thinned, faces N electrode vapor deposition, alloy and encapsulation
Equal work steps.
Disclosed in CN105589131A《A kind of silicon chip groove etching method for optical waveguide》, be surface of silicon according to
The dielectric layer and polysilicon of secondary SiO deposit or silicon nitride or the shielded layer of amorphous silicon layer process reticle using silicon trench
The shielding figure of photoresist is formed in shielding layer surface, first is carried out to the shielded layer using dry plasma etching process
Second is carried out to the dielectric layer to etch, then use turning over for silicon trench processing reticle after secondary etching with the shielded layer of formation
Version or the method for photoresist planarization, the shielding figure that photoresist is formed in exposed surface of silicon carry out third time quarter
Erosion finally carries out the silicon trench that silicon etching is needed by shielded layer of remaining dielectric layer.
Above two method all carries out multiple whirl coating, photoetching, etches and cleaning of removing photoresist, the flow ratio of technique
Cumbersome, operation is more complicated, while increasing the unstability in technical process.Especially one in the preparation engineering of semiconductor
The relatively high chip of a little performance requirements, needs in the preparation process of tube core by more work step, some products also need to
The same chip not by position it is prepared above go out the different trench mesas of depth, will be into conventional technical process
The work steps such as the cleaning of the multiple photoetching of row, dry method or wet etching and chip surface, whole process compares cumbersome, operable
Property is poor, and for the repeatability of entire technique and stability, this is also a bigger potential risk,
The production cycle of chip is increased simultaneously.
Invention content
Insufficient existing for technology of preparing for existing semiconductor, a kind of process of present invention offer is simple and convenient to operate, makes
The preparation method of the standby efficient GaAs base lasers with different depth groove.
The preparation method of the GaAs base lasers with different depth groove of the present invention, includes the following steps：
(1) somatomedin film：
A layer dielectric is grown as the required mask layer of dry etching using pecvd process in extension on piece；
(2) litho patterns：
One layer photoresist of spin coating on the deielectric-coating of growth, using first piece of mask plate by exposure, development and post bake,
Obtain the figure of the first depth areas；
(3) corrode the figure of the first depth areas：
Using photoresist as mask, being got rid of using the method for wet method or dry etching does not have photoresist protection zone
Deielectric-coating (deielectric-coating under " figure of the first depth areas " that is namely obtained in step (1))；
(4) secondary litho pattern：
Photoresist above is exposed using second piece of lithography mask version, is developed and post bake, the second depth area is obtained
The figure in domain；
(5) dry etching：
Using photoresist and deielectric-coating above as mask, dry etching is carried out, while obtaining the first depth and second
Depth areas, the photoresist and medium on epitaxial wafer surface are touched after then removal etching is completed；
(6) it grows current barrier layer and photoetching electric current injects window：
Current barrier layer is grown on the epitaxial wafer surface that cleaning is completed, in the position photoetching corrosion power down flow barrier of vallum
It forms electric current and injects window；
(7) epitaxial wafer for completing above-mentioned steps is processed, forms GaAs- base lasers.
Deielectric-coating in the step (1) is SiO2Or SiNx.
The thickness of deielectric-coating is the 1/3-1/5 of the first depth and the second depth difference in the step (1).
The thickness of photoresist is 20000 angstroms -30000 angstroms in the step (2).
Post bake in the step (2) and step (4) be in baking oven at 90 DEG C -110 DEG C post bake -30 minutes 20 minutes or
90 DEG C -110 DEG C of person's hot plate toasts -4 minutes 1 minute.
Wet method in the step (3) is to use volume ratio HF：NH4F：H2O=3：6：20 mixed solution corrosion, dry method
For ICP or RIE dry etchings.
The photoresist exposed in the step (4) is the photoresist of spin coating in step (2).
Dry etching is ICP or RIE dry etchings in the step (5).
In the step (5) during dry etching, the first depth areas only etches epitaxial layer, and the second depth areas will
Deielectric-coating has been etched to be performed etching with followed by externally prolonging layer, and material is thus formed the depth differences in two regions.
Current barrier layer in the step (6) is SiO2, thickness is 1000-2000 angstroms.
The present invention deposits a layer dielectric on the surface of epitaxial wafer first, and first is made by lithography using first piece of lithography mask version
The region of depth is fallen the medium at first area as mask corrosion using photoresist and is touched, and second piece of photo etched mask is then utilized
Version makes the region of the second depth by lithography, carries out dry etching as mask using the photoresist and deielectric-coating formed above, obtains
The different groove of depth, finally routinely technique forms laser.Photoresist of spin coating of the present invention is simultaneously as preparing the
As soon as the mask of depth areas figure and the second depth areas figure carries out a dry etching and has obtained different depth requirement
Groove avoids and needs to carry out multiple photoetching, dry method or wet etching and chip surface in conventional technical process
The work steps such as cleaning realize the etching to the position of different depth different zones, easy to operate, simplify processing step, shorten
Production cycle, while the consumption of raw material is reduced, increase the repeatability and stability of entire technique.
Description of the drawings
Fig. 1 is the flow chart of preparation method of the present invention.
Fig. 2 is the pictorial diagram of the first depth areas formed after a photoetching.
Fig. 3 is the schematic diagram of the first depth areas after etching mask layer.
Fig. 4 is the pictorial diagram of the second depth areas formed after secondary photoetching.
Fig. 5 is two different depth groove schematic diagrames being formed after dry etching.
In figure：001, epitaxial wafer, 002, deielectric-coating, 003, photoresist, the 004, first depth areas, the 005, second depth area
Domain.
Specific implementation mode
Embodiment 1
The preparation method of the GaAs base lasers with different depth groove of the present invention, as shown in Figure 1, first in extension
The surface of piece deposits a layer dielectric, and the first depth areas is made by lithography using first piece of lithography mask version, using photoresist as
Mask corrosion falls the medium at first area and touches, and then makes the second depth areas by lithography using second piece of lithography mask version, utilizes
The photoresist and deielectric-coating formed above carries out dry etching as mask, obtains the different groove of depth, finally routinely work
Skill forms laser.Specifically include that steps are as follows：
(1) somatomedin film
On epitaxial wafer 001 one layer of ICP dry method is grown using pecvd process (plasma enhanced chemical vapor deposition method)
Etch the SiO needed2Deielectric-coating 002, thickness are 2000 angstroms ((13000-7000)/3, referring to step (6))；
(2) litho patterns
The positive photoresist 003 that spin coating a layer thickness is 20000 angstroms on the deielectric-coating 002 of growth, utilizes first piece
Mask plate is exposed and developed, and 100 DEG C of post bake 20 minutes or hot plate toast 2 minutes at 100 DEG C in baking oven, obtain the first depth
The figure in region 004, as shown in Figure 2.
(3) corrode the first depth areas figure
Using photoresist 003 as mask, with volume ratio HF：NH4F：H2O=3：6：20 mixed solution as corrosive liquid,
Erode the SiO of no photoresist protection zone2Deielectric-coating.Corrode the first depth areas 004 as shown in Figure 3.
(4) secondary litho pattern
The photoresist of spin coating in step (2) is exposed and is developed using second piece of lithography mask version, 100 in baking oven
100 DEG C of post bake 20 minutes or hot plate toast 2 minutes at DEG C, obtain the figure of the second depth areas 005, as shown in Figure 4.
(5) ICP dry etchings
Utilize photoresist and SiO above2It as mask, is performed etching using the method for ICP dry etchings, the first depth
Region only etch epitaxial layer, the region of the second depth has etched deielectric-coating to be performed etching with followed by externally prolonging layer, in this way
It is formed the depth difference in two regions.Obtain simultaneously 13000 angstroms of depth the first depth areas 004 and 7000 angstroms of depth the
Two depth areas 005, the photoresist and SiO on epitaxial wafer surface after removal etching is completed2.The first of the different depth of formation is deep
It spends region 004 and 005 two grooves of the second depth areas is as shown in Figure 5.
(6) current barrier layer (SiO that the epitaxial wafer surface growth thickness completed in cleaning is 2000 angstroms2), in vallum
Position photoetching corrosion falls SiO2It forms electric current and injects window.
P side electrode vapor deposition is carried out again by existing common process to the epitaxial wafer after completion above-mentioned steps, is thinned, the faces N electrode
The work steps such as vapor deposition, alloy and encapsulation form GaAs- base lasers.
Embodiment 2
The present embodiment and embodiment 1 difference lies in：
In step (1), the deielectric-coating of growth is SiNx, and thickness is 1000 angstroms ((11000-6000)/5, referring to subsequent step
Suddenly (6)).
In step (2), it is in epitaxial wafer surface spin coating thicknessPositive photoresist, the post bake at 110 DEG C in baking oven
25 minutes or the baking 1 minute of 110 DEG C of hot plate, remove the solvent in photoresist, obtain the region of the first depth requirements.
In step (3), the mask of no photoresist protection zone is got rid of using the method for ICP dry etchings.
After step (4) development, by epitaxial wafer, 110 DEG C of post bake 25 minutes or hot plate toast 1 point at 110 DEG C in baking oven
Clock.
Using RIE dry etchings in step (5), at the same obtain 11000 angstroms the first depth and 6000 angstrom second it is deep
The region of degree.
Current blocking layer thickness in step (6) is 1000 angstroms.
Embodiment 3
The present embodiment and embodiment 1 difference lies in：
In step (1), the deielectric-coating of growth is SiNx, and thickness is 1250 angstroms ((12000-7000)/4, referring to step
(6))；
In step (2), it is in epitaxial wafer surface spin coating thicknessPositive photoresist, 90 DEG C of post bakes 30 divide in baking oven
90 DEG C of clock or hot plate toast 4 minutes, remove the solvent in photoresist, obtain the region of the first depth requirements.
In step (3), the mask of no photoresist protection zone is got rid of using the method for RIE dry etchings.
After step (4) development, by epitaxial wafer, 90 DEG C of 90 DEG C of post bakes 30 minutes or hot plate toast 4 minutes in baking oven.
Using RIE dry etchings in step (5), at the same obtain 12000 angstroms the first depth and 7000 angstrom second it is deep
The region of degree.
Current blocking layer thickness in step (6) is 1500 angstroms.
GaAs base lasers prepared by the various embodiments described above, including growth have the epitaxial wafer of epitaxial material, in epitaxial wafer
The groove of ridge structure and different depth is prepared on surface, and current barrier layer covers the two sides of ridge structure, in the ridge
Electric current injection window is provided at the top of shape structure.
Claims (10)
1. a kind of preparation method of the GaAs base lasers with different depth groove, characterized in that include the following steps：
（1）Somatomedin film：
A layer dielectric is grown as the required mask layer of dry etching using pecvd process in extension on piece；
（2）Litho pattern：
One layer photoresist of spin coating on the deielectric-coating of growth obtains first using first piece of mask plate exposure, development and post bake
The figure of depth areas；
（3）Corrode the figure of the first depth areas：
Using photoresist as mask, Jie of no photoresist protection zone is got rid of using the method for wet method or dry etching
Plasma membrane；
（4）Secondary litho pattern：
Photoresist above is exposed using second piece of lithography mask version, is developed and post bake, the second depth areas is obtained
Figure；
（5）Dry etching：
Using photoresist and deielectric-coating above as mask, dry etching is carried out, while obtaining the first depth and the second depth
Region, the photoresist and deielectric-coating on epitaxial wafer surface after removal etching is completed；
（6）It grows current barrier layer and photoetching electric current injects window：
Current barrier layer is grown on the epitaxial wafer surface that cleaning is completed, is formed in the position photoetching corrosion power down flow barrier of vallum
Electric current injects window；
（7）Epitaxial wafer to completing above-mentioned steps is processed, and forms GaAs base lasers.
2. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that institute
State step（1）In deielectric-coating be SiO2Or SiNx.
3. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that institute
State step（1）The thickness of middle deielectric-coating is the 1/3-1/5 of the first depth and the second depth difference.
4. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that institute
State step（2）The thickness of middle photoresist is 20000 angstroms -30000 angstroms.
5. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that institute
State step（2）And step（4）In post bake be post bake -30 minutes 20 minutes or hot plate 90 at 90 DEG C -110 DEG C in baking oven
DEG C -110 DEG C toast -4 minutes 1 minute.
6. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that institute
State step（3）In wet method be use volume ratio HF：NH4F：H2O=3：6：20 mixed solution corrosion, dry method are dry for ICP or RIE
Method etches.
7. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that institute
State step（4）The photoresist of middle exposure is step（2）The photoresist of middle spin coating.
8. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that step
Suddenly（5）Middle dry etching is ICP or RIE dry etchings.
9. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that institute
State step（5）During middle dry etching, the first depth areas only etches epitaxial layer, and the second depth areas etches deielectric-coating
Complete to be performed etching with followed by externally prolonging layer, material is thus formed the depth differences in two regions.
10. the preparation method of the GaAs base lasers according to claim 1 with different depth groove, characterized in that
The step（6）In current barrier layer be SiO2, thickness is 1000-2000 angstroms.
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| CN108198750A (en) * | 2017-11-28 | 2018-06-22 | 厦门市三安集成电路有限公司 | A kind of photoetching process of gaas wafer |
| CN111106527A (en) * | 2018-10-29 | 2020-05-05 | 潍坊华光光电子有限公司 | Method for improving cavity surface coating quality of semiconductor laser |
| CN111208658A (en) * | 2020-03-02 | 2020-05-29 | 合肥鑫晟光电科技有限公司 | Transfer printing plate, preparation method thereof, display substrate and display panel |
| CN114551226A (en) * | 2020-11-26 | 2022-05-27 | 华为技术有限公司 | Method and system for preparing device with grooves with different depths |
| CN114361099A (en) * | 2021-12-13 | 2022-04-15 | 苏州芯镁信电子科技有限公司 | Deep silicon etching method |
| CN114447763A (en) * | 2022-01-25 | 2022-05-06 | 中国工程物理研究院应用电子学研究所 | Ridge waveguide electrode window manufacturing method based on self-aligned etching process |
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| CN101471534A (en) * | 2007-12-28 | 2009-07-01 | 中国科学院半导体研究所 | Method for making high brightness semiconductor conical laser/amplifier |
| CN105589131A (en) * | 2016-01-19 | 2016-05-18 | 中国电子科技集团公司第二十三研究所 | Etching method of silicon chip grooves for optical waveguide |
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| KR100290852B1 (en) * | 1999-04-29 | 2001-05-15 | 구자홍 | method for etching |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101471534A (en) * | 2007-12-28 | 2009-07-01 | 中国科学院半导体研究所 | Method for making high brightness semiconductor conical laser/amplifier |
| CN105589131A (en) * | 2016-01-19 | 2016-05-18 | 中国电子科技集团公司第二十三研究所 | Etching method of silicon chip grooves for optical waveguide |
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