CN106226865B - Nanometer straight hole cyclic array preparation method in a kind of photonic crystal - Google Patents
Nanometer straight hole cyclic array preparation method in a kind of photonic crystal Download PDFInfo
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- G—PHYSICS
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- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/138—Integrated optical circuits characterised by the manufacturing method by using polymerisation
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12083—Constructional arrangements
- G02B2006/1213—Constructional arrangements comprising photonic band-gap structures or photonic lattices
Abstract
The present invention provides nanometer straight hole cyclic array preparation method in a kind of photonic crystal, and this method can fast implement the self-positioning periodically preparation of straight hole array in nanoscale photonic crystal.Method includes the following steps: selecting material first, then sample is prepared, the PECVD deposit silicon nitride on silicon wafer, then photoetching is carried out, again with the silicon nitride of ion beam bombardment removal graph area, first time electrochemical corrosion is then carried out, oxidation forms porous substrate POPS, chemically mechanical polishing, KOH solution corrosion form inverted pyramid tip, finally carry out second of electrochemical corrosion preparation with nanometer straight hole array periodical and with self-locating function.Upper this method is easily operated, and processing is simple, is suitble to the preparation of high-volume rapid nano grade non-periodic pore, and the nano-pore positioning of this method preparation is more accurate.
Description
Technical field
The invention belongs to electrochemical corrosion fields, more particularly to using anodic oxidation device to prepare nanometer in photonic crystal straight
The method of hole cyclic array.
Background technique
Photonic crystal is to have photon by dielectric structure made of certain periodic arrangement in space as different dielectric material
Energy band and photon band gap can be controlled and be adjusted to the propagation of light, referred to as " semiconductor of light ", its appearance makes people
The dream of manipulation and control photon is possibly realized.Multiple periodic photonic crystal is the photon by two or more periodic arrangement
Micro-structure is constituted.When new structure is added in the single cycle in photonic crystal, the symmetry of original lattice is destroyed, is introduced more
The structural parameters of forbidden band characteristic can be controlled to get to multiple periodic photonic crystal, be conducive to increase forbidden bandwidth, in multiband
Forbidden photon band is generated simultaneously.Therefore periodic photonic crystal is the photon microstructure more with application value again.
The process of the multiple periodic photonic crystal of preparation at present is simultaneously immature, and mainly has in terms of the method for photonic crystal sharp
Light holographic interferometry, colloidal self-assembly method, Precision Machining method etc..However, for laser-holographic interferometry, existing laser interference skill
The structural cycle that art obtains commonly greater than optical maser wavelength, periodic structure by laser interference distribution intensity, number of beams and space
Position determines.For photonic crystal prepared by colloidal self-assembly method, does not often have high dielectric ratio and suitable network is opened up
Structure is flutterred, thus complete photonic band gap can not be generated.For Precision Machining method, complex process involves great expense, and by existing
There is the limitation of semiconductor technology level.Chinese patent 201410018381.6 emits laser beam and laser beam is passed through poly-lens component
It is converted into multi beam coherent beam, interferes coherent beam after Fourier transformation, interference figure is generated, by interference figure
It projects on photosensitive material to form photon crystal structure in photosensitive material.Chinese patent 200610113418.9 is micro- by colloid
The single-layer or multi-layer colloid crystal film of ball composition rule arrangement, then uses this film as template again, utilizes hydro-thermal or molten
The method of agent heat prepares 2 D photon crystal on semiconductor monocrystal substrate.Chinese patent 200910235973.2 utilizes molecular beam
Epitaxy technology grows layer of semiconductor film on a silicon substrate, then using focused-ion-beam lithography technology on semiconductive thin film
Photon crystal micro cavity structure is etched, finally prepares one layer of organic coating layer on photon crystal micro cavity structure using spin coating technique.
Process above method has certain reference function to multiple periodic photonic crystal is prepared, but its preparation process has structure
Single, low efficiency, higher cost, large-area manufacturing are difficult, hardly result in the disadvantages of extensive use.Therefore finding one kind being capable of letter
Single, efficient, the multiple periodic photonic crystal of large area preparation process is the research hotspot of current people.
Summary of the invention
The purpose of the present invention is provide nanometer straight hole cyclic array preparation side in a kind of photonic crystal regarding to the issue above
Method sets the new method of preparation " self-positioning " nanometer straight hole array using anodic oxidation, and preparation method is simple, cheap, is convenient for
Large-scale batch production.
The technical scheme is that nanometer straight hole cyclic array preparation method in a kind of photonic crystal, including it is as follows
Step:
Step S1, select material: selection N-shaped is double to throw silicon wafer;
Step S2, prepare sample: the PECVD deposit silicon nitride on the double throwing silicon wafers of N-shaped then carries out photoetching, obtains photoetching
Silicon wafer is divided into square silicon wafer with the silicon nitride of ion beam bombardment Ion-beam bombard removal graph area by figure;
Step S3, first time electrochemical corrosion: the electrolysis square silicon wafer in step S2 being put into anodic oxidation device
Electrochemical corrosion is carried out in liquid, obtains macro hole array;
Step S4, the formation of partial oxidation porous silicon POPS substrate: the macro hole array in step S3 is aoxidized, macro hole
Hole side wall on form silica, i.e. POPS substrate is formed;
Step S5, it forms inverted pyramid tip: the partial oxidation porous silicon POPS substrate made in step S4 is carried out
Chemically mechanical polishing, which is put into solution, corrodes, and inverted pyramid type point is formed at the top of the hole wall of partial oxidation porous silicon POPS substrate
End;
Step S6, the inverted pyramid type tip sample that step S5 is prepared second of electrochemical corrosion: is put into electrolyte
In, it prepares with nanometer straight hole array periodical and with self-locating function.
In above scheme, the double silicon wafer resistance of throwing of N-shaped are 3-8 Ω cm in the step S12, with a thickness of 450 μm.
In above scheme, litho pattern is 1.5 μm of aperture in the step S2, and pitch of holes is equal to 3 μm of circular hole equilateral three
Angle array.
In above scheme, the step S3 specifically:
Square silicon wafer in step S2 is put into the electrolyte in anodic oxidation device under conditions of 18 ± 1 DEG C and is carried out
Electrochemical corrosion, the electrolyte are mixed by 48wt%HF acid and deionized water in the ratio of 1:19, and halogen lamp is placed in rectangular
Silicon chip back side 12cm, netted platinum electrode are placed at the 5mm of sample front, and it is inclined to add 2V on silicon chip sample with Agilent power supply
Pressure, etching time 20min obtain 2 μm of aperture, the macro hole array that about 12 μm of hole depth.
In above scheme, the step S4 specifically:
The macro hole silicon sample that step S3 is prepared first is pre-oxidized ten minutes under 300 DEG C of condition of normal pressure, it is raw in hole surface
Grow a thin layer silica;Then sample is put into wet oxygen four hours in oxidation furnace, then dry oxygen ten minutes, on the hole side wall in macro hole
Form the silica of thickness about 800nm.
Further, oxidation furnace temperature is 1100 DEG C.
In above scheme, the step S5 specifically:
The POPS substrate that step S4 is made carries out chemically mechanical polishing CMP, removes the silica at the top of hole wall, makes
Silicon at the top of hole wall exposes, and then to aoxidize the silica generated as exposure mask, sample is put into TMAH tetramethylammonium hydroxide
Corrode 2-3 minutes in solution, forms inverted pyramid type tip at the top of the hole wall of partial oxidation porous silicon POPS substrate, then again
Sample is placed on 5~10min of corrosion in potassium hydroxide KOH solution, grows the tip of falling quintar down, and there is self-stopping technology function
Energy.
Further, TMAH tetramethyl ammonium hydroxide solution temperature is 85 DEG C in the step S5, concentration 25wt%.
Further, the temperature of KOH solution is 50 DEG C in the step S5, concentration 40wt%.
In above scheme, the step S6 specifically:
The inverted pyramid tip sample that step S5 is prepared is put into electrolyte;It is 50W's that silicon chip back side, which places power,
Halogen lamp;3V bias, etching time 30min are added on sample;The straight hole of nano-scale will be along these " self-positioning " tips
Pore-forming down, thus " self-positioning " the generation nanometer straight hole array between aoxidizing macro hole array.
Compared with prior art the beneficial effects of the present invention are:
1) the anodic oxidation device structure that the method for the present invention uses is simple, easily operated.
2) electrolyte that the method for the present invention uses is easy to configure.
3) photoetching that the method for the present invention uses, the processing steps such as ion beam bombardment are simple and easy, low in cost.
4) product surface that the method for the present invention is prepared compared with other methods is more smooth, and specific surface area is bigger.
5) the nano-pore positioning of the method for the present invention preparation is more accurate.
Detailed description of the invention
Fig. 1 be in one embodiment of the invention on silicon wafer depositing silicon nitride figure;
Fig. 2 is sample drawing after the bombardment of one embodiment of the invention intermediate ion beam;
Fig. 3 is first time electrochemical corrosion figure in one embodiment of the invention;
Fig. 4 is POPS tpo substrate in one embodiment of the invention;
Fig. 5 is first time electrochemical corrosion schematic diagram in one embodiment of the invention;
Fig. 6 is that self-positioning tip schematic diagram is formed in one embodiment of the invention;
Fig. 7 is second of electrochemical corrosion schematic diagram in one embodiment of the invention;
Fig. 8 is nanometer straight hole cyclic array in the photonic crystal of one embodiment of the invention completion.
In figure: 1- silicon wafer, 2- silicon nitride, 3- litho pattern, 4-HF electrolyte, the macro hole 5-, 6- silica, 7-KOH are molten
Liquid, nanometer straight hole cyclic array in 8-photonic crystals.
Specific embodiment
Invention is further described in detail with reference to the accompanying drawings and detailed description, but protection scope of the present invention
It is not limited to this.
Step S1, select material: silicon wafer 1, silicon wafer 1 are [100] crystal orientation twin polishing monocrystalline silicon as shown in figure 1 for selection.
Step S2, prepare sample: on experimental bench, PECVD deposits the nitridation of 500nm thickness first on the silicon wafer 1 chosen
Silicon 2 is used as exposure mask, as shown in figure 1 shown in silicon nitride 2;Then photoetching is carried out, litho pattern is the circular hole equilateral triangle in 1.5 μm of aperture
Array, 3 μm of pitch of holes, such as litho pattern 3 in Fig. 2;Litho pattern area is removed with ion beam bombardment Ion-beam bombard again
Silicon nitride expose silicon, as shown in Figure 2.
Step S3, first time electrochemical corrosion: room temperature is adjusted to 18 ± 1 DEG C, and silicon wafer 1 is fixed on anodic oxygen makeup
It sets, there is electrolyte, 48wt%HF acid and deionized water to mix in device in the ratio of 1:19, such as HF electrolyte 4 in Fig. 3, open
It is placed on the 12cm halogen lamp at 1 back side of silicon wafer, carries out electrochemical corrosion after applying 2V bias in 1 sample anodes of silicon wafer, is corroded
20min obtains 2 μm of aperture, and 3 μm of pitch of holes, for the macro hole array that about 12 μm of hole depth as shown in hole 5 macro in Fig. 4, electrochemical corrosion is complete
It is dried up at rear all samples with nitrogen gun, as shown in Figure 4.
Step S4, the formation of partial oxidation porous silicon POPS substrate: the macro hole silicon sample that step S3 is prepared is first 300
It is pre-oxidized ten minutes under DEG C condition of normal pressure, grows a thin layer silica in hole surface;Then sample is put into wet in oxidation furnace
Oxygen four hours, oxidation furnace temperature was 1100 DEG C, then dry oxygen ten minutes, the dioxy of thickness about 800nm is formed on the hole side wall in macro hole
SiClx, so that part oxidized porous silicon POPS substrate is formed, as shown in silica 6 in Fig. 5.
Step S5, inverted pyramid tip: the partial oxidation porous silicon POPS substrate that step S4 is made is formed
Mechanical polishing CMP is learned, the silica at the top of hole wall is removed, exposes the silicon at the top of hole wall, then to aoxidize the dioxy generated
SiClx is exposure mask, and sample is put into TMAH tetramethyl ammonium hydroxide solution and is corroded 2-3 minutes, TMAH tetramethylammonium hydroxide is molten
Liquid temperature is 85 DEG C, concentration 25wt%;Inverted pyramid type point is formed at the top of the hole wall of partial oxidation porous silicon POPS substrate
Then sample is placed on 5~10min of corrosion in KOH solution again by end, the temperature of KOH solution is 50 DEG C, concentration 40wt%, such as
It in Fig. 5 shown in KOH solution 7, grows the tip of falling quintar down, and has the function of self-stopping technology.And chemistry is carried out in KOH solution
Corrosion, as shown in Figure 6.
Step S6, second of electrochemical corrosion forms " self-positioning " nanometer straight hole cyclic array: step S5 is made
Sample is put into electrolyte, carries out second of electrochemical corrosion, as shown in Figure 7;Place the halogen that power is 50W in 1 back side of silicon wafer
Lamp;3V bias, etching time 30min are added on sample;The straight hole of nano-scale will be along these " self-positioning " tips down
Pore-forming, thus " self-positioning " the generation nanometer straight hole array between aoxidizing macro hole array, nanometer straight hole as shown in Figure 8 is periodical
Array 8.
Although not each embodiment only includes one it should be appreciated that this specification describes according to various embodiments
A independent technical solution, this description of the specification is merely for the sake of clarity, and those skilled in the art should will say
As a whole, the technical solutions in the various embodiments may also be suitably combined for bright book, and forming those skilled in the art can be with
The other embodiments of understanding.
The series of detailed descriptions listed above are illustrated only for possible embodiments of the invention,
The protection scope that they are not intended to limit the invention, it is all without departing from equivalent embodiment made by technical spirit of the present invention or change
It should all be included in the protection scope of the present invention.
Claims (10)
1. nanometer straight hole cyclic array preparation method in a kind of photonic crystal, which comprises the steps of:
Step S1, select material: selection N-shaped is double to throw silicon wafer;
Step S2, prepare sample: the PECVD deposit silicon nitride on the double throwing silicon wafers of N-shaped then carries out photoetching, obtains litho pattern,
The litho pattern is circular hole equilateral triangle array, with the nitridation of ion beam bombardment Ion-beam bombard removal graph area
Silicon wafer is divided into square silicon wafer by silicon;
Step S3, first time electrochemical corrosion: the square silicon wafer in step S2 is put into the electrolyte in anodic oxidation device
Electrochemical corrosion is carried out, macro hole array is obtained;
Step S4, the formation of partial oxidation porous silicon POPS substrate: the macro hole array in step S3 is aoxidized, the hole in macro hole
Silica is formed on side wall, i.e. partial oxidation porous silicon POPS substrate is formed;
Step S5, it forms inverted pyramid tip: the partial oxidation porous silicon POPS substrate made in step S4 is subjected to chemistry
Mechanical polishing removes the silica at the top of hole wall, exposes the silicon at the top of hole wall, be put into solution and corrode, in partial oxidation
Inverted pyramid type tip is formed at the top of the hole wall of porous silicon POPS substrate;
Step S6, second of electrochemical corrosion: the inverted pyramid type tip sample that step S5 is prepared is put into electrolyte, system
For with nanometer straight hole array periodical and with self-locating function.
2. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 1, which is characterized in that described
The double silicon wafer resistance of throwing of N-shaped are 3-8 Ω cm in step S12, with a thickness of 450 μm.
3. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 1, which is characterized in that described
Litho pattern is 1.5 μm of aperture in step S2, and pitch of holes is equal to 3 μm of circular hole equilateral triangle array.
4. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 1, which is characterized in that described
Step S3 specifically:
Square silicon wafer in step S2 is put into the electrolyte in anodic oxidation device under conditions of 18 ± 1 DEG C and carries out electrification
Corrosion is learned, the electrolyte is mixed by 48wt%HF acid and deionized water in the ratio of 1:19, and halogen lamp is placed in square silicon wafer
Back side 12cm, netted platinum electrode are placed at the 5mm of sample front, and 2V bias is added on silicon chip sample with Agilent power supply, rotten
The erosion time is 20min, obtains 2 μm of aperture, the macro hole array that about 12 μm of hole depth.
5. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 1, which is characterized in that described
Step S4 specifically:
The macro hole silicon sample that step S3 is prepared first is pre-oxidized ten minutes under 300 DEG C of condition of normal pressure, is grown in hole surface
A thin layer silica;Then sample is put into wet oxygen four hours in oxidation furnace, then dry oxygen ten minutes, is formed on the hole side wall in macro hole
The silica of thickness about 800nm.
6. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 5, which is characterized in that oxidation
Furnace temperature is 1100 DEG C.
7. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 1, which is characterized in that described
Step S5 specifically:
The partial oxidation porous silicon POPS substrate that step S4 makes is subjected to chemically mechanical polishing CMP, is removed at the top of hole wall
Silica exposes the silicon at the top of hole wall, and then to aoxidize the silica generated as exposure mask, sample is put into TMAH tetramethyl
Corrode 2-3 minutes in base Ammonia, forms inverted pyramid type at the top of the hole wall of partial oxidation porous silicon POPS substrate
Then sample is placed on 5~10min of corrosion in potassium hydroxide KOH solution again, grows the tip of falling quintar down, and had by tip
There is self-stopping technology function.
8. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 7, which is characterized in that described
TMAH tetramethyl ammonium hydroxide solution temperature is 85 DEG C in step S5, concentration 25wt%.
9. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 7, which is characterized in that described
The temperature of KOH solution is 50 DEG C in step S5, concentration 40wt%.
10. nanometer straight hole cyclic array preparation method in photonic crystal according to claim 1, which is characterized in that institute
State step S6 specifically:
The inverted pyramid tip sample that step S5 is prepared is put into electrolyte;Silicon chip back side places the halogen that power is 50W
Lamp;3V bias, etching time 30min are added on sample;The straight hole of nano-scale will be along these " self-positioning " tips down
Pore-forming, thus " self-positioning " the generation nanometer straight hole array between aoxidizing macro hole array.
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CN102214742A (en) * | 2011-06-02 | 2011-10-12 | 华中科技大学 | Method for preparing two-dimensional photonic crystal structure GaN (gallium nitride) based LED (light emitting diode) |
CN102478685A (en) * | 2010-11-24 | 2012-05-30 | 上海复莱信息技术有限公司 | Silicon on insulator (SOI) photonic crystal device |
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CN102478685A (en) * | 2010-11-24 | 2012-05-30 | 上海复莱信息技术有限公司 | Silicon on insulator (SOI) photonic crystal device |
CN102812164A (en) * | 2010-11-29 | 2012-12-05 | 佳能株式会社 | Method of manufacturing an x-ray diffraction grating microstructure for imaging apparatus |
CN102041539A (en) * | 2011-01-07 | 2011-05-04 | 北京大学 | GaN-based photonic crystal template and preparation method thereof |
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