CN106211559B - A kind of anti-welding alignment method of printed circuit board - Google Patents
A kind of anti-welding alignment method of printed circuit board Download PDFInfo
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- CN106211559B CN106211559B CN201610657140.5A CN201610657140A CN106211559B CN 106211559 B CN106211559 B CN 106211559B CN 201610657140 A CN201610657140 A CN 201610657140A CN 106211559 B CN106211559 B CN 106211559B
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- circuit board
- positioning
- target
- location hole
- welding
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0008—Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The present invention relates to circuit board manufacture field more particularly to a kind of anti-welding alignment methods of printed circuit board.For etching carve process after, before anti-welding process, soldermask layer egative film is navigated on circuit board, it is characterised in that including step：S1：At the second positioning target position of circuit board, second location hole is set；S2：According in each anti-welding aligning structure on circuit board, the relative positional relationship of reference target and first positioning hole, selecting one of second location hole of then circuit board is main second location hole；S3：It will be aligned and be fixed together with the main corresponding third positioning target of second location hole and main second location hole on soldermask layer egative film；S4：Remaining third location hole on soldermask layer egative film is fixed together with corresponding second location hole respectively.
Description
Technical field
The present invention relates to circuit board manufacture field more particularly to a kind of anti-welding alignment methods of printed circuit board.
Background technique
Authorization Notice No. CN 205071431U, on 03 02nd, 2016 utility model patent of authorized announcement date disclose
A kind of anti-bias aligning structure of pcb board.By in outer layer egative film several targets of edge editing corresponding with solder prevention bottom plate,
In outer layer exposure, the target of outer layer egative film is shifted with the outer graphics of outer layer egative film in pcb board, and in anti-welding exposure aligning
When, it is positioned with PCB target hole.Improve the aligning accuracy between the outer tomographic image of pcb board and solder prevention bottom plate.
But the deformation that circuit board generates in etching process is not uniformly, not only to have and cheaply can also apart from upper
Offset on angled.The outer tomographic image of printing on circuit boards, the deformation generated during as circuit board type becomes
It is non-uniform.Therefore, even if the method according to aforementioned patent carries out anti-welding positioning, in this case it is still possible to cause solder prevention bottom plate and outer
Dislocation between tomographic image reduces aligning accuracy.
Summary of the invention
The present invention proposes a kind of anti-welding alignment method of printed circuit board, for etching carve process after, anti-welding process it
Before, soldermask layer egative film is navigated on circuit board, it is characterised in that including step：
S1：At the second positioning target position of circuit board, second location hole is set；
S2：According in each anti-welding aligning structure on circuit board, the relative positional relationship of reference target and first positioning hole,
The one of second location hole for selecting then circuit board is main second location hole；
S3：By on soldermask layer egative film with the main corresponding third positioning target of second location hole and main second location hole pair
Standard is simultaneously fixed together；
S4：Remaining third location hole on soldermask layer egative film is fixed on one with corresponding second location hole respectively
It rises.
Further, in the pattern transfer process before etching work procedure, figure is positioned using the first positioning hole of circuit board
Shape layer egative film, and by graph layer egative film reference target and the second positioning target be printed on the circuit board.
Further, fixed according to first on graph layer egative film in the drilling operating before the pattern transfer process
First positioning hole is arranged on the circuit board in position target.
Further, S2：According in each anti-welding aligning structure on circuit board, reference target and first positioning hole it is opposite
Position judges that in etching process, the positional shift distance that each second positioning target being printed on the circuit board generates is selected
Then the positional shift distance corresponding second location hole of the second positioning target placed in the middle is fixed as main second in each second positioning target
Position hole.
Further, in step s 2, according in each anti-welding aligning structure on circuit board, the reference point of reference target and
The relative position of first anchor point of first positioning hole, judges in etching process, each second be printed on the circuit board
The positional shift distance that positioning target generates.
Further, S2：According in each anti-welding aligning structure on circuit board, reference target and first positioning hole it is opposite
Position judges that in etching process, the positional shift angle that each second positioning target being printed on the circuit board generates is selected
Then the corresponding second location hole of positional shift angle the second positioning target placed in the middle is fixed as main second in each second positioning target
Position hole.
Further, in step s 2, according in each anti-welding aligning structure on circuit board, the reference edge of reference target and
The relative position on the first positioning side of first positioning hole, judges in etching process, each second be printed on the circuit board
The positional shift angle that positioning target generates.
Further, S2：According in each anti-welding aligning structure on circuit board, reference target and first positioning hole it is opposite
Position judges in etching process, positional shift distance that each second positioning target being printed on the circuit board generates and
Positional shift angle selects the corresponding second location hole of the second positioning target that then positional shift is placed in the middle as main second location hole.
Further, in step s 2, according in each anti-welding aligning structure on circuit board, the reference point of reference target and
The relative position of first anchor point of first positioning hole, judges in etching process, each second be printed on the circuit board
The positional shift distance that positioning target generates；According in each anti-welding aligning structure on circuit board, the reference edge of reference target and
The relative position on the first positioning side of first positioning hole, judges in etching process, each second be printed on the circuit board
The positional shift angle that positioning target generates.
The present invention is arranged reference target corresponding with the first positioning target on graph layer egative film, after pattern transfer,
First positioning hole is arranged in the corresponding position of first target.In subsequent etching process, the deformation of circuit board will will lead to first
The variation of the corresponding reference target relative position of location hole.If the deformation of circuit board is uneven, different location
Relative position between reference target and its first positioning hole will become inconsistent.Therefore, the reference target of different location and
The variation degree of relative position between its first positioning hole can reflect the deformation degree of circuit board at the position.It is anti-in positioning
When layer egative film, the corresponding second location hole in position for being in by-level using deformation degree is selected to position as main second
Hole first fixes soldermask layer egative film with circuit board in second location hole position.Reduce soldermask layer egative film and circuit board figure it
Between dislocation, improve soldermask layer aligning accuracy.
Detailed description of the invention
Fig. 1 graph layer egative film schematic diagram one.
Fig. 2 soldermask layer egative film schematic diagram.
Fig. 3 board structure of circuit schematic diagrames one.
Fig. 4 graph layer egative film schematic diagram two.
Fig. 5 board structure of circuit schematic diagrames two.
Specific embodiment
Embodiments of the present invention are described in detail below in conjunction with attached drawing.
Such as Fig. 1, graph layer egative film 1 includes that intermediate circuitous pattern 14 to be printed is arranged in and is arranged in circuit diagram
The first positioning target 11, the second positioning target 12 and the reference target 13 of shape surrounding, four apex angles of the graph layer egative film of rectangle
Place is respectively arranged with two the first positioning targets, 11, two the second positioning targets 12 and four reference targets 13.Reference target
13 is corresponding with one of them first positioning target 11 in same apex angle, and is arranged concentrically with first positioning target 11.The
One positioning target, 11 area is smaller, 13 area of reference target is larger, so that the first positioning target 11 is located in reference target 13
The heart.Soldermask layer egative film 2 includes that anti-welding figure 22 to be printed among egative film is arranged in and is arranged in the of anti-welding figure surrounding
Three positioning targets 21.Four vertex of the soldermask layer egative film of rectangle are respectively arranged with right with the second positioning target 12 of graph layer
The third positioning target 21 answered, each apex angle are distributed two third positioning targets 21.
The manufacturing process of printed circuit board, including the drilling, pattern transfer, etching, anti-welding contraposition, anti-welding etc. successively carried out
Process.Anti-welding alignment method of the invention includes：
It is in drilling operating, graph layer egative film is fixed on circuit boards, determined using CCD perforating press the first of graph layer
It is punched out at the position of position target, forms first positioning hole in the corresponding position of circuit board.Such as Fig. 3, graph layer location structure
Including the first positioning hole 31 on circuit board 3 and the first positioning target 11 being arranged on graph layer egative film 1.Graph layer positioning knot
Structure is for positioning graph layer egative film during pattern transfer.
In pattern transfer process, by the first positioning corresponding with circuit board of the first positioning target position of graph layer egative film
Hole is fixed.Pattern transfer is then carried out, all by circuitous pattern, the second positioning target and the reference target on graph layer egative film
It is transferred to circuit board surface.
It then is etched process, and carries out soldermask layer contraposition before next anti-welding process：
S1：It is punched out to form second location hole at the second positioning target position of circuit board using CCD perforating press.It is anti-
Layer location structure includes the second location hole 32 being arranged on circuit board 3, second be arranged on graph layer egative film 1 positioning target
Mark 12 and the third positioning target 21 corresponding with second location hole 32 being arranged on soldermask layer egative film 2.
S2：Soldermask layer egative film reference configuration include be arranged in it is corresponding with the first positioning target 11 on graph layer egative film 1
Reference target 13（Circuit board surface is transferred in pattern transfer process）.According to each reference target 13 on four apex angles of circuit board
With the relative position of first positioning hole 31, judge in etching process, prints each second positioning target on circuit boards（I.e.
Two location holes 32）The positional shift distance of generation selects the second positioning that positional shift distance is placed in the middle in then each second positioning target
The corresponding second location hole of target is as main second location hole.
S3：First by third positioning target 21 corresponding with the main second location hole on soldermask layer egative film 2 and main second
Location hole is aligned and is fixed together, and carries out Primary Location and fixation to soldermask layer egative film.
S4：Remaining third location hole on soldermask layer egative film is fixed on one with corresponding second location hole respectively
It rises.
Anti-welding process is finally carried out, soldermask layer is set on circuit boards.
Wherein, the reference target 13 on graph layer egative film and the first positioning target 11 can be concentric design（As Fig. 1,
3）It may be concentric triangular design（Such as Fig. 4,5）.
When concentric design, the first positioning hole of design inside and outside on circuit board can be passed through（It is corresponding with the first positioning target）
The position that each second positioning target of circuit class generates is printed on the concentricity of reference target to judge in etching process
Set offset distance.
When concentric triangular design, select one of apex angle of concentric triangle as reference, it is corresponding with the apex angle
The vertex of reference target is reference point, and the vertex of the first positioning target corresponding with the apex angle is the first anchor point.With the apex angle
The wherein a line of corresponding reference target is reference edge, and the side of first positioning target parallel with the reference edge is fixed as first
Position side.In the step S2 of anti-welding contraposition, according in each anti-welding aligning structure on circuit board, the reference point of reference target and
First anchor point of a positioning hole（It is corresponding with the first positioning target）Relative position（Distance）, judge in etching process, print
The positional shift distance that each second positioning target of system on circuit boards generates.It can also in step s 2, according on circuit board
Each anti-welding aligning structure in, the reference edge of reference target（The a line of reference target triangle）With the first of first positioning hole
Position side（It is corresponding with the first positioning target）Relative position（Angle）, judge in etching process, print on circuit boards
The positional shift angle that each second positioning target generates.Or in step s 2, in step s 2, according to each anti-on circuit board
It welds in aligning structure, the relative position of the first anchor point of the reference point and first positioning hole of reference target judges etched
Cheng Zhong prints the positional shift distance that each second positioning target on circuit boards generates；According to each anti-welding right on circuit board
In bit architecture, the relative position on the first positioning side of the reference edge and first positioning hole of reference target judges in etching process,
The positional shift angle that each second positioning target of printing on circuit boards generates.
Although the embodiments of the invention are described in conjunction with the attached drawings, but those of ordinary skill in the art can be in appended power
Benefit makes various deformations or amendments in the range of requiring.
Claims (7)
1. a kind of anti-welding alignment method of printed circuit board is used for after process is carved in etching, before anti-welding process, by soldermask layer bottom
Piece navigates on circuit board, it is characterised in that including step：
S1：At the second positioning target position of circuit board, second location hole is set；
S2：According in each anti-welding aligning structure on circuit board, the relative positional relationship of reference target and first positioning hole, choosing is then
One of second location hole of circuit board is main second location hole；
S3：It will be aligned simultaneously on soldermask layer egative film with the main corresponding third positioning target of second location hole and main second location hole
It is fixed together；
S4：Remaining third location hole on soldermask layer egative film is fixed together with corresponding second location hole respectively；
In the pattern transfer process before etching work procedure, using the first positioning hole positioning pattern layer egative film of circuit board, and by figure
Reference target and the second positioning target on layer egative film are printed on the circuit board；Brill before the pattern transfer process
In the process of hole, first positioning hole is arranged on the circuit board according to the first positioning target on graph layer egative film.
2. the anti-welding alignment method of a kind of printed circuit board according to claim 1, it is characterised in that：
S2：According in each anti-welding aligning structure on circuit board, the relative position of reference target and first positioning hole judges losing
During quarter, the positional shift distance that each second positioning target being printed on the circuit board generates, choosing then each second positioning
The positional shift distance corresponding second location hole of the second positioning target placed in the middle is as main second location hole in target.
3. the anti-welding alignment method of a kind of printed circuit board according to claim 2, it is characterised in that：In step s 2, root
According in each anti-welding aligning structure on circuit board, the opposite position of the first anchor point of the reference point and first positioning hole of reference target
It sets, judges in etching process, the positional shift distance that each second positioning target being printed on the circuit board generates.
4. the anti-welding alignment method of a kind of printed circuit board according to claim 1, it is characterised in that：
S2：According in each anti-welding aligning structure on circuit board, the relative position of reference target and first positioning hole judges losing
During quarter, the positional shift angle that each second positioning target being printed on the circuit board generates, choosing then each second positioning
The positional shift angle corresponding second location hole of the second positioning target placed in the middle is as main second location hole in target.
5. the anti-welding alignment method of a kind of printed circuit board according to claim 4, it is characterised in that：In step s 2, root
According in each anti-welding aligning structure on circuit board, the opposite position on the first positioning side of the reference edge and first positioning hole of reference target
It sets, judges in etching process, the positional shift angle that each second positioning target being printed on the circuit board generates.
6. the anti-welding alignment method of a kind of printed circuit board according to claim 1, it is characterised in that：
S2：According in each anti-welding aligning structure on circuit board, the relative position of reference target and first positioning hole judges losing
During quarter, the positional shift distance and positional shift angle that each second positioning target being printed on the circuit board generates,
Select the corresponding second location hole of the second positioning target that then positional shift is placed in the middle as main second location hole.
7. the anti-welding alignment method of a kind of printed circuit board according to claim 6, it is characterised in that：
In step s 2, according in each anti-welding aligning structure on circuit board, the reference point of reference target and first positioning hole
The relative position of first anchor point, judges in etching process, and each second positioning target being printed on the circuit board generates
Positional shift distance；Or according in each anti-welding aligning structure on circuit board, the reference edge of reference target and first is positioned
The relative position on the first positioning side in hole, judges in etching process, each second positioning target being printed on the circuit board
The positional shift angle of generation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610657140.5A CN106211559B (en) | 2016-08-12 | 2016-08-12 | A kind of anti-welding alignment method of printed circuit board |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610657140.5A CN106211559B (en) | 2016-08-12 | 2016-08-12 | A kind of anti-welding alignment method of printed circuit board |
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| CN106211559A CN106211559A (en) | 2016-12-07 |
| CN106211559B true CN106211559B (en) | 2018-11-16 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10303780A (en) * | 1997-04-24 | 1998-11-13 | Mitsubishi Electric Corp | Portable terminal |
| CN202857150U (en) * | 2012-11-14 | 2013-04-03 | 胜华电子（惠阳）有限公司 | Auxiliary structure for aligning precision tests of LED (Light-Emitting Diode) light bar |
| CN103052272A (en) * | 2012-12-21 | 2013-04-17 | 胜宏科技（惠州）股份有限公司 | Exposure film anti-welding manual contraposition graph design method |
| CN204069470U (en) * | 2014-06-10 | 2014-12-31 | 骏亚（惠州）电子科技有限公司 | A kind of structure detecting the anti-welding aligning accuracy of high-precision circuit board |
| CN205071431U (en) * | 2015-09-11 | 2016-03-02 | 东莞市诚志电子有限公司 | PCB board is with preventing partially to bit architecture |
-
2016
- 2016-08-12 CN CN201610657140.5A patent/CN106211559B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10303780A (en) * | 1997-04-24 | 1998-11-13 | Mitsubishi Electric Corp | Portable terminal |
| CN202857150U (en) * | 2012-11-14 | 2013-04-03 | 胜华电子（惠阳）有限公司 | Auxiliary structure for aligning precision tests of LED (Light-Emitting Diode) light bar |
| CN103052272A (en) * | 2012-12-21 | 2013-04-17 | 胜宏科技（惠州）股份有限公司 | Exposure film anti-welding manual contraposition graph design method |
| CN204069470U (en) * | 2014-06-10 | 2014-12-31 | 骏亚（惠州）电子科技有限公司 | A kind of structure detecting the anti-welding aligning accuracy of high-precision circuit board |
| CN205071431U (en) * | 2015-09-11 | 2016-03-02 | 东莞市诚志电子有限公司 | PCB board is with preventing partially to bit architecture |
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| Publication number | Publication date |
|---|---|
| CN106211559A (en) | 2016-12-07 |
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