CN106209291A - Clock source list update, clock synchronizing method and the system that base station clock synchronizes - Google Patents
Clock source list update, clock synchronizing method and the system that base station clock synchronizes Download PDFInfo
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Abstract
The present invention relates to clock source list update, clock synchronizing method and system that a kind of base station clock synchronizes, its update method includes: after target clock source step-out being detected, the step-out number of times in target clock source is added one, or after the synchronizing signal instability in target clock source being detected, the unstable number of times in target clock source is added one；Judge whether step-out number of times or unstable number of times reach default punishment threshold value；If so, carry out target clock source reducing priority processing or delete processing.Use the solution of the present invention, can by synchronizing signal poor stability or step-out clock source often carries out demoting or deletes from clock source priority list, making the clock source being stored in clock source priority list is that relative stability is compared with strong and the less clock source of step-out number of times, clock source priority list in the present invention program is used for base station clock source synchronize, can effectively promote the stability that base station clock source synchronizes.
Description
Technical field
The present invention relates to wireless communication technology field, particularly relate to the clock source list of a kind of base station clock synchronization more
Newly, clock synchronizing method and system.
Background technology
Small cell base station refers in particular to small-sized integrated cellular basestation, is the system of the base station type being different from macrocell base stations at present
Claim, support that number of users and coverage are divided into Microcell (microcell base station), Picocell (Pico cell base according to it
Stand), Femtocell (flying cellular basestation) etc., small cell base station have integrated level height, strong adaptability, open station quickly, safeguard just
The advantage of profit, is widely used in family, office and public place, can improve user network and experience, reduce customer churn
And help operator to win the market share.
The extensively application of data service makes indoor communications become the hotly contested spot of mobile operator.Indoor permeability is not only
It is related to ARPU (Ayerage Revenue Per User, every user's average income) value, is more related to user's sense to network
Degree of knowing, urban construction speed is accelerated especially at present, and urban architecture density also continues to increase, signal difference, easy call drop under indoor environment
Or network busy, problem that customer complaint rate is higher are more and more prominent, therefore small cell base station application is more and more extensive.But problem is also
Thereupon, wherein one of most significant problems is no more than holding frequency and the time synchronized how ensureing that little base station is reliable and stable,
Deadline and frequency collaborative, it is provided that frequency reference, accurate timing, synchronous base and system clock necessary to system.
The method of synchronization used at present has GPS (Global Positioning System, global positioning system))/Big Dipper
Synchronization, the synchronization of IEEE1588 network clocking, the wave point method of synchronization or the various combination of several ways, but due to website
, there is the problem that clock source signals is unstable, cause synchronizing signal to be lost in the impact of installation site, synchronous abnormality produces frequency
Deviation, frame head drift about, thus cause the problem such as frequency interferences, time-slot cross interference, have a strong impact on Consumer's Experience and KPI (Key
Performance Indicators, KPI Key Performance Indicator) index.Existing step-out treatment measures be limited by hardware platform or
The restriction of key chip, to all not doing optimization further after clock source step-out, even simple restarting equipment solves step-out problem, sternly
Ghost image rings Consumer's Experience.
Summary of the invention
Based on this, it is necessary to for clock source stability problem, it is provided that the clock source list that a kind of base station clock synchronizes is more
Newly, clock synchronizing method and system, the stability that base station clock source synchronizes can be promoted, promote Consumer's Experience.
The technical solution adopted in the present invention is as follows:
The clock source list updating method that a kind of base station clock synchronizes, comprises the steps:
After target clock source step-out being detected, the step-out number of times in described target clock source is added one, or is detecting
After the synchronizing signal instability in described target clock source, the unstable number of times in described target clock source is added one；
Judge whether described step-out number of times or described unstable number of times reach default punishment threshold value；
If so, carry out described target clock source reducing priority processing or delete processing, reducing priority processing
Or after delete processing, update the clock source priority list synchronized for base station clock being pre-configured with；
Wherein, each clock source in described clock source priority list is arranged according to the priority of each described clock source
Sequence.
A kind of base station clock synchronization method, based on after the clock source list updating method renewal that above-mentioned base station clock synchronizes
Clock source priority list carry out clock synchronization, described method includes step:
After the present clock source step-out of base station, choose next clock source according to described clock source priority list；
The synchronizing signal detecting the currently selected clock source taken is the most stable；
If unstable, then return the described step choosing next clock source according to described clock source priority list；
If stable, carry out clock synchronization by the currently selected clock source taken.
The clock source list updating system that a kind of base station clock synchronizes, including:
Number of times adjusting module, for after detecting target clock source step-out, by the step-out number of times in described target clock source
Add one, or after the synchronizing signal instability described target clock source being detected, by unstable time of described target clock source
Number adds one；
Judge module, for judging whether described step-out number of times or described unstable number of times reach default punishment thresholding
Value；
Adjusting module, for when the judged result of described judge module is for being, reduces described target clock source
Priority processing or delete processing；
More new module, after reducing priority processing or delete processing at described adjusting module, renewal is pre-configured with
For base station clock synchronize clock source priority list；
Wherein, each clock source in described clock source priority list is arranged according to the priority of each described clock source
Sequence.
A kind of base station clock synchronizes system, the clock source list updating system synchronized including base station clock described above, also
Including:
Choose module, for after the present clock source step-out of base station, or in the testing result of first detection module be
Time unstable, choose next clock source according to described clock source priority list；
First detection module, the most stable for detecting the synchronizing signal of the currently selected clock source taken；
Synchronization module, for described first detection module testing result for stablize time, by currently selected take time
Zhong Yuan carries out clock synchronization.
According to the scheme of the invention described above, it is after target clock source step-out being detected, by described target clock source
Step-out number of times adds one, or after the synchronizing signal instability described target clock source being detected, by described target clock source
Unstable number of times adds one, it is judged that whether described step-out number of times or described unstable number of times reach default punishment threshold value, if
It is to carry out described target clock source reducing priority processing or delete processing, is reducing at priority processing or deletion
After reason, updating the clock source priority list synchronized for base station clock being pre-configured with, wherein, described clock source priority arranges
Each clock source in table is ranked up according to the priority of each described clock source, uses this scheme, can be steady by synchronizing signal
Qualitative difference or step-out clock source often carries out demoting or deletes from clock source priority list so that be stored in
The clock source of clock source priority list is relative stability compared with strong and the less clock source of step-out number of times, and each clock source is according to respectively
The priority of described clock source is ranked up, and the clock source priority list in the present invention program is used for base station clock source same
Step, can effectively promote the stability that base station clock source synchronizes, and promotes Consumer's Experience.
Accompanying drawing explanation
Fig. 1 is that the flow process that realizes of the clock source list updating method of the base station clock synchronization of the embodiment of the present invention one is illustrated
Figure；
Fig. 2 is that the flow process that realizes of the clock source list updating method of the base station clock synchronization of the embodiment of the present invention two is illustrated
Figure；
Fig. 3 is that the flow process that realizes of the clock source list updating method of the base station clock synchronization of the embodiment of the present invention three is illustrated
Figure；
Fig. 4 be the base station clock synchronization method of the embodiment of the present invention four realize schematic flow sheet；
Fig. 5 is the composition structural representation of the clock source list updating system of the base station clock synchronization of the embodiment of the present invention five
Figure；
Fig. 6 is the judge module in Fig. 5, the adjusting module refinement composition structural representation in a concrete example；
Fig. 7 is the judge module in Fig. 5, adjusting module refinement composition structural representation in another specific example；
Fig. 8 is the composition structural representation of the base station clock synchronization structure of the embodiment of the present invention six.
Detailed description of the invention
For making the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, to this
Invention is described in further detail.Should be appreciated that detailed description of the invention described herein only in order to explain the present invention,
Do not limit protection scope of the present invention.
The present invention program is to be pre-configured with a clock source priority list, each clock in this clock source priority list
Source is ranked up according to the priority of each described clock source.In order to ensure the stability that clock source synchronizes, increase step-out punishment machine
System, if a certain level clock source step-out number of times exceedes threshold value, then reduces this clock source priority, even from described clock
Source priority list is deleted；Synchronizing signal poor stability penalty mechanism can also be increased, if a certain level clock source is same
Step qualitative the reaching of swinging of signal then reduces this clock source priority, even from described clock source priority list in certain thresholding
Middle deletion.Hereinafter the present invention program is described in detail.
Embodiment one
The embodiment of the present invention one provides the clock source list updating method that a kind of base station clock synchronizes.Shown in Figure 1, for
The clock source list updating method that the base station clock of the embodiment of the present invention one synchronizes realize schematic flow sheet.As it is shown in figure 1, this
The clock source list updating method that the base station clock of embodiment synchronizes comprises the steps:
Step S101: after target clock source step-out being detected, adds one by the step-out number of times in described target clock source, or
After the synchronizing signal instability described target clock source being detected, the unstable number of times in described target clock source is added one；
Here, described target clock source can be any one clock source in clock source priority list；
Specifically, described target clock source whether step-out can be detected, this target clock detected after base station powers on
After the step-out of source, the step-out number of times in this target clock source is added one；Or periodically or during re-synchronizing, detection is described
The synchronizing signal in target clock source is the most stable, after the synchronizing signal instability in this target clock source being detected, during by target
The unstable number of times of Zhong Yuan adds one；
Step S102: judge whether described step-out number of times or described unstable number of times reach default punishment threshold value,
If so, step S103 is entered；
Wherein, described step-out number of times or described unstable punishment threshold value corresponding to number of times can be different, it is also possible to
Identical；
Step S103: carry out described target clock source reducing priority processing or delete processing, is reducing priority
Process or after delete processing, update the clock source priority list synchronized for base station clock being pre-configured with；
Wherein, each clock source in described clock source priority list is arranged according to the priority of each described clock source
Sequence, the method for synchronization that described clock source priority list relates to includes that the GPS/ Big Dipper synchronizes, IEEE1588 network clocking synchronizes, nothing
The line interface method of synchronization or the various combination of several ways, and it is not limited to this several methods of synchronization；
Here, reduce priority processing to generally refer to the priority in described target clock source is reduced one-level, such as, by 2
Level reduces to 3 grades；
Here, described delete processing refers to delete described target clock source from described clock source priority list.
It addition, when the judged result of described step S102 is no, do not carry out the renewal of described clock source priority list
Process.
Embodiment two
The embodiment of the present invention two provides the clock source list updating method that a kind of base station clock synchronizes.The present embodiment two is with real
The difference executing example one is, described punishment threshold value includes the first threshold value and the second threshold value, wherein, described first
Limit value is less than described second threshold value；Described first threshold value and not is reached at described step-out number of times or described unstable number of times
When reaching described second threshold value, carry out described target clock source reducing priority processing, reach institute at described step-out number of times
When stating the second threshold value, described target clock source is carried out delete processing.
The realization of clock source list updating method shown in Figure 2, that synchronize for the base station clock of the embodiment of the present invention two
Schematic flow sheet.As in figure 2 it is shown, the clock source list updating method that the base station clock of the present embodiment two synchronizes includes walking as follows
Rapid:
Step S201: after target clock source step-out being detected, adds one by the step-out number of times in described target clock source, or
After the synchronizing signal instability described target clock source being detected, the unstable number of times in described target clock source is added one；
Step S202: judge whether described step-out number of times or described unstable number of times reach described first threshold value, if
It is then to enter step S203；
Step S203: judge whether described step-out number of times or described unstable number of times reach described second threshold value, if
No, then enter step S204, the most then enter step S205；
Step S204: carry out described target clock source reducing priority processing；
Step S205: described target clock source is carried out delete processing；
Step S206: after reducing priority processing or delete processing, it is same for base station clock that renewal is pre-configured with
The clock source priority list of step, wherein, each clock source in described clock source priority list is according to each described clock source
Priority is ranked up.
Step-out number of times or described unstable punishment threshold value corresponding to number of times can be different as mentioned above, it is also possible to phase
With, in like manner, described step-out number of times or described unstable the first threshold value corresponding to number of times can be different, it is also possible to identical,
Described step-out number of times or described unstable the second threshold value corresponding to number of times can be different, it is also possible to identical；
Other technologies feature in the present embodiment two is identical with in embodiment one, does not repeats them here.
Embodiment three
The embodiment of the present invention three provides the clock source list updating method that a kind of base station clock synchronizes.The present embodiment three is with real
The difference executing example two is, in embodiment two, is to first carry out to judge that described step-out number of times or described unstable number of times are
The no process reaching described first threshold value, then perform to judge whether described step-out number of times or described unstable number of times reach institute
State the process of the second threshold value, in the present embodiment three, be to first carry out to judge that described step-out number of times or described unstable number of times are
The no process reaching described second threshold value, then perform to judge whether described step-out number of times or described unstable number of times reach institute
State the process of the first threshold value.
Step S301: after target clock source step-out being detected, adds one by the step-out number of times in described target clock source, or
After the synchronizing signal instability described target clock source being detected, the unstable number of times in described target clock source is added one；
Step S302: judge whether described step-out number of times or described unstable number of times reach described second threshold value, if
It is then to enter step S303, if it is not, then enter step S304；
Step S303: described target clock source is carried out delete processing；
Step S304: judge whether described step-out number of times or described unstable number of times reach described first threshold value, if
It is then to enter step S305；
Step S305: if reaching described first threshold value, then carry out described target clock source reducing priority processing.
Step S306: after reducing priority processing or delete processing, it is same for base station clock that renewal is pre-configured with
The clock source priority list of step, wherein, each clock source in described clock source priority list is according to each described clock source
Priority is ranked up.
Other technologies feature in the present embodiment three is identical with in embodiment two, does not repeats them here.
It is considered that in the above-described embodiment, after the synchronizing signal instability described target clock source being detected, by institute
The unstable number of times stating target clock source adds one, accordingly, it would be desirable to judge that the synchronizing signal in described target clock source is the most stable, for
This, the clock source list updating method that the base station clock in an embodiment synchronizes wherein, in any one embodiment above-mentioned
On the basis of, it is also possible to include step: detect timing stability and/or the frequency stable of the synchronizing signal in described target clock source
Property, the sequential of the synchronizing signal in described target clock source is unstable or frequency is unstable, then judge described target clock source
Synchronizing signal unstable.
Embodiment four
The clock source list updating method that base station clock according to the invention described above embodiment synchronizes, the embodiment of the present invention four
A kind of base station clock synchronization method is provided.Base station clock synchronization method in the embodiment of the present invention four is based on any one reality above-mentioned
Execute the clock source priority list after the clock source list updating method renewal that the base station clock in example synchronizes and carry out clock synchronization.
Fig. 4 be the base station clock synchronization method embodiment of the embodiment of the present invention four realize schematic flow sheet.As shown in Figure 4, this enforcement
Base station clock synchronization method in example 4 comprises the steps:
Step S401: the present clock source whether step-out of detection base station, when described present clock source step-out being detected, enters
Enter step S402；
Step S402: choose next clock source according to described clock source priority list, enter step S403；
Wherein, present clock source refers to the clock source that described base station is being currently used；
Here, described next clock source is the sequence next one in present clock source or sorts upper once selected
The Next clock source of clock source；Described next clock source can with present clock source or last time selected by time
Zhong Yuanwei same priority, can be different priority；
Step S403: the synchronizing signal detecting the currently selected clock source taken is the most stable, if unstable, returns step
S402, if stable, enters step S404；
Step S404: carry out clock synchronization by the currently selected clock source taken.
In view of it sometimes appear that clock synchronizes unsuccessful situation, to this end, as shown in Figure 4, an embodiment wherein
In base station clock synchronization method, it is also possible to include step:
Step S405: by the currently selected clock source taken, detection is described carries out clock synchronizes whether to synchronize successfully, if not
Synchronizing successfully, return step S402, if synchronizing successfully, entering step S406；
Step S406: enter the normal mode of operation of described base station.
The clock source list updating method that base station clock according to the invention described above synchronizes, the present invention also provides for a kind of base station
The clock source list updating system that clock synchronizes, the clock source the list updating system below base station clock of the present invention synchronized
Embodiment is described in detail.
Embodiment five
The embodiment of the present invention five provides the clock source list updating system that a kind of base station clock synchronizes.Fig. 5 is that the present invention is real
Execute the composition structural representation of the clock source list updating system of the base station clock synchronization of example five.
As it is shown in figure 5, the clock source list updating system that the base station clock in the present embodiment five synchronizes includes:
Number of times adjusting module 501, for after detecting target clock source step-out, by the step-out in described target clock source time
Number adds one, or after the synchronizing signal instability described target clock source being detected, by the instability in described target clock source
Number of times adds one；
Judge module 502, for judging whether described step-out number of times or described unstable number of times reach default punishment
Threshold value；
Adjusting module 503, for when the judged result of described judge module is for being, drops described target clock source
Low priority processes or delete processing；
More new module 504, for after adjusting module 503 reduces priority processing or delete processing, updates and joins in advance
The clock source priority list synchronized for base station clock put；
Wherein, each clock source in described clock source priority list is arranged according to the priority of each described clock source
Sequence.
In in a concrete example, described punishment threshold value includes the first threshold value and the second threshold value, wherein, described
First threshold value is less than described second threshold value；As shown in Figure 6, it is judged that module 502 includes that the first judging unit 601 and second is sentenced
Disconnected unit 602, adjusting module 503 includes the first deletion unit 603 and the first degraded cell 604, wherein:
First judging unit 601 is used for judging whether described step-out number of times or described unstable number of times reach described first
Threshold value；
Second judging unit 602 is for when the result of determination of the first judging unit 601 is for being, it is judged that described step-out number of times
Or whether described unstable number of times reaches described second threshold value；
First degraded cell 604 is for when the result of determination of the first judging unit 601 is no, to described target clock source
Carry out reducing priority processing；
First deletes unit 603 is used for when the result of determination of the second judging unit 602 is for being, to described target clock source
Carry out delete processing.
Wherein in a concrete example, described punishment threshold value includes the first threshold value and the second threshold value, wherein, institute
State the first threshold value less than described second threshold value；As it is shown in fig. 7, judge module 502 includes the 3rd judging unit 701 and the 4th
Judging unit 702, adjusting module 503 includes the second deletion unit 703 and the second degraded cell 704, wherein:
3rd judging unit 701 is used for judging whether described step-out number of times or described unstable number of times reach described second
Threshold value；
Second deletes unit 703 is used for when the result of determination of the 3rd judging unit 701 is for being, to described target clock source
Carry out delete processing；
4th judging unit 702 for the result of determination of the 3rd judging unit 701 be no time, it is judged that described step-out number of times or
Described in person, whether unstable number of times reaches described first threshold value；
Second degraded cell 704 is for when the result of determination of the 4th judging unit 702 is for being, to described target clock source
Carry out reducing priority processing.
The clock source list updating system that a kind of base station clock in a concrete example synchronizes wherein, as it is shown in figure 5,
Can also include:
Detection module 505, for detecting timing stability and/or the frequency stable of the synchronizing signal in described target clock source
Property, the sequential of the synchronizing signal in described target clock source is unstable or frequency is unstable, then judge described target clock source
Synchronizing signal unstable.
The clock source list updating system that the base station clock that the embodiment of the present invention provides synchronizes, it is pointed out that more than:
Description to the clock source list updating system that base station clock synchronizes, the clock source list update side synchronize with above-mentioned base station clock
The description of method is similar, and has the beneficial effect of said method, for saving length, repeats no more；Therefore, above to this
The ins and outs not disclosed in the clock source list updating system that the base station clock that inventive embodiments provides synchronizes, refer to above-mentioned
The description of the clock source list updating method that the base station clock provided synchronizes.
According to the base station clock synchronization method of the invention described above, the present invention also provides for a kind of base station clock and synchronizes system, with
The lower embodiment with regard to base station clock of the present invention synchronization system is described in detail.
Embodiment six
The embodiment of the present invention six provides a kind of base station clock to synchronize system.Fig. 8 is the base station clock of the embodiment of the present invention six
The composition structural representation of synchronization system.Fig. 8 showing, the base station clock of the present invention synchronizes a preferred embodiment of system
Structural representation.According to different Considerations, when the base station clock implementing the present invention synchronizes system, can comprise
Whole shown in Fig. 8, it is also possible to only comprise a portion shown in Fig. 8.
A kind of base station clock in the present embodiment six synchronizes system, including the base station clock in example performed as described above synchronize time
Clock source list updating system 800, also includes:
Choose module 801, be used for after the present clock source step-out of base station, or the detection at first detection module 802
When result is unstable, choose next clock source according to described clock source priority list；
First detection module 802, the most stable for detecting the synchronizing signal of the currently selected clock source taken；
Synchronization module 803, for when the testing result of first detection module 802 is for stablizing, taking by currently selected
Clock source carries out clock synchronization.
Further, the base station clock in a concrete example synchronizes system wherein, as shown in Figure 8, it is also possible to include
Second detection module 804 and mode switch module 805:
By the currently selected clock source taken, second detection module 804 carries out clock synchronizes whether to synchronize described in detecting
Success；
Choose module 801 and be additionally operable to when the testing result of the second detection module 804 is not for synchronizing successful, according to time described
Clock source priority list chooses next clock source；
Mode switch module 805, for when the testing result of described second detection module is for synchronizing successfully, enters described
The normal mode of operation of base station.
The base station clock that the embodiment of the present invention provides synchronizes system, it is pointed out that: above base station clock is synchronized system
The description of system, the description with above-mentioned base station clock synchronization method is similar, and has above-mentioned base station clock synchronization method
Beneficial effect, for saving length, repeats no more；Therefore, in the above base station clock synchronization system that the embodiment of the present invention is provided
The ins and outs not disclosed, refer to the description of the base station clock synchronization method of above-mentioned offer.
Each technical characteristic of embodiment described above can combine arbitrarily, for making description succinct, not to above-mentioned reality
The all possible combination of each technical characteristic executed in example is all described, but, as long as the combination of these technical characteristics is not deposited
In contradiction, all it is considered to be the scope that this specification is recorded.
Embodiment described above only have expressed the several embodiments of the present invention, and it describes more concrete and detailed, but also
Can not therefore be construed as limiting the scope of the patent.It should be pointed out that, come for those of ordinary skill in the art
Saying, without departing from the inventive concept of the premise, it is also possible to make some deformation and improvement, these broadly fall into the protection of the present invention
Scope.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (10)
1. the clock source list updating method that a base station clock synchronizes, it is characterised in that comprise the steps:
After target clock source step-out being detected, the step-out number of times in described target clock source is added one, or described detecting
After the synchronizing signal instability in target clock source, the unstable number of times in described target clock source is added one；
Judge whether described step-out number of times or described unstable number of times reach default punishment threshold value；
If so, carry out described target clock source reducing priority processing or delete processing, reduce priority processing or
After delete processing, update the clock source priority list synchronized for base station clock being pre-configured with；
Wherein, each clock source in described clock source priority list is ranked up according to the priority of each described clock source.
The clock source list updating method that base station clock the most according to claim 1 synchronizes, it is characterised in that described punishment
Threshold value includes the first threshold value and the second threshold value, and wherein, described first threshold value is less than described second threshold value；
Described judge whether described step-out number of times or described unstable number of times reach default punishment threshold value, if so, to institute
State target clock source to carry out reducing the process of priority processing or delete processing and comprise the steps:
Judge whether described step-out number of times or described unstable number of times reach described first threshold value；
If reaching described first threshold value, then judge whether described step-out number of times or described unstable number of times reach described second
Threshold value；
If the most described second threshold value, then carry out described target clock source reducing priority processing；
If reaching described second threshold value, then described target clock source is carried out delete processing；
Or
Described judge whether described step-out number of times or described unstable number of times reach default punishment threshold value, if so, to institute
State target clock source to carry out reducing the process of priority processing or delete processing and comprise the steps:
Judge whether described step-out number of times or described unstable number of times reach described second threshold value；
If reaching described second threshold value, then described target clock source is carried out delete processing；
If the most described second threshold value, then judge whether described step-out number of times or described unstable number of times reach described the
One threshold value；
If reaching described first threshold value, then carry out described target clock source reducing priority processing.
The clock source list updating method that base station clock the most according to claim 1 synchronizes, it is characterised in that also include step
Rapid:
Detect timing stability and/or the frequency stability of the synchronizing signal in described target clock source, if described target clock source
The sequential of synchronizing signal unstable or frequency unstable, then judge that the synchronizing signal in described target clock source is unstable.
4. a base station clock synchronization method, it is characterised in that same based on the base station clock as described in one of claims 1 to 3
Clock source priority list after the clock source list updating method of step updates carries out clock synchronization, and described method includes step:
After the present clock source step-out of base station, choose next clock source according to described clock source priority list；
The synchronizing signal detecting the currently selected clock source taken is the most stable；
If unstable, then return the described step choosing next clock source according to described clock source priority list；
If stable, carry out clock synchronization by the currently selected clock source taken.
Base station clock synchronization method the most according to claim 4, it is characterised in that further comprise the steps of:
By the currently selected clock source taken, detection is described carries out clock synchronizes whether to synchronize successfully；
If not synchronizing successfully, then return the described step choosing next clock source according to described clock source priority list；
If synchronizing successfully, then enter the normal mode of operation of described base station.
6. the clock source list updating system that a base station clock synchronizes, it is characterised in that including:
Number of times adjusting module, for after target clock source step-out being detected, adds one by the step-out number of times in described target clock source,
Or after the synchronizing signal instability described target clock source being detected, the unstable number of times in described target clock source is added
One；
Judge module, for judging whether described step-out number of times or described unstable number of times reach default punishment threshold value；
Adjusting module, for when the judged result of described judge module is for being, carries out described target clock source reducing preferentially
Level processes or delete processing；
More new module, after reducing priority processing or delete processing at described adjusting module, updates the use being pre-configured with
In the clock source priority list that base station clock synchronizes；
Wherein, each clock source in described clock source priority list is ranked up according to the priority of each described clock source.
The clock source list updating system that base station clock the most according to claim 6 synchronizes, it is characterised in that described punishment
Threshold value includes the first threshold value and the second threshold value, and wherein, described first threshold value is less than described second threshold value；
Described judge module includes the first judging unit and the second judging unit, described adjusting module include the first deletion unit and
First degraded cell；
Described first judging unit is used for judging whether described step-out number of times or described unstable number of times reach described first
Limit value；
Described second judging unit is for when the result of determination of described first judging unit is for being, it is judged that described step-out number of times or
Described in person, whether unstable number of times reaches described second threshold value；
Described target clock source, for when the result of determination of described first judging unit is no, is entered by described first degraded cell
Row reduces priority processing；
Described first deletes unit is used for when the result of determination of described second judging unit is for being, then to described target clock source
Carry out delete processing；
Or described judge module includes that the 3rd judging unit and the 4th judging unit, described adjusting module include the second deletion list
Unit and the second degraded cell:
Described 3rd judging unit is used for judging whether described step-out number of times or described unstable number of times reach described second
Limit value；
Described second deletes unit is used for when the result of determination of described 3rd judging unit is for being, enters described target clock source
Row delete processing；
Described 4th judging unit is for when the result of determination of described 3rd judging unit is no, it is judged that described step-out number of times or
Described in person, whether unstable number of times reaches described first threshold value；
Described target clock source, for when the result of determination of described 4th judging unit is for being, is entered by described second degraded cell
Row reduces priority processing.
The clock source list updating system that base station clock the most according to claim 6 synchronizes, it is characterised in that also include:
Detection module, for detecting timing stability and/or the frequency stability of the synchronizing signal in described target clock source, in institute
The sequential of the synchronizing signal stating target clock source is unstable or frequency is unstable, then judge the synchronization letter in described target clock source
Number instability.
9. a base station clock synchronizes system, it is characterised in that include that base station clock synchronizes as described in one of claim 6 to 8
Clock source list updating system, also include:
Choose module, for after the present clock source step-out of base station, or be shakiness in the testing result of first detection module
Regularly, next clock source is chosen according to described clock source priority list；
First detection module, the most stable for detecting the synchronizing signal of the currently selected clock source taken；
Synchronization module, for when the testing result of described first detection module is for stablizing, by the currently selected clock source taken
Carry out clock synchronization.
Base station clock the most according to claim 9 synchronizes system, it is characterised in that also include the second detection module and mould
Formula handover module:
By the currently selected clock source taken, described second detection module carries out clock synchronizes whether to synchronize into described in detecting
Merit；
Described module of choosing is additionally operable to when the testing result of described second detection module is not for synchronizing successful, according to described clock
Source priority list chooses next clock source；
Described mode switch module is for when the testing result of described second detection module is for synchronizing successfully, entering described base station
Normal mode of operation.
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| CN111148211A (en) * | 2019-12-31 | 2020-05-12 | 京信通信***（中国）有限公司 | Clock synchronization method and device, computer equipment and storage medium |
| CN112398568A (en) * | 2020-11-24 | 2021-02-23 | 广东省新一代通信与网络创新研究院 | System and method for synchronizing clocks in multiple cells |
| WO2021238377A1 (en) * | 2020-05-28 | 2021-12-02 | 华为技术有限公司 | Method and apparatus for clock source management |
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| CN106209291B (en) | 2018-09-14 |
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