CN106206512B - Substrate structure - Google Patents
Substrate structure Download PDFInfo
- Publication number
- CN106206512B CN106206512B CN201510235625.0A CN201510235625A CN106206512B CN 106206512 B CN106206512 B CN 106206512B CN 201510235625 A CN201510235625 A CN 201510235625A CN 106206512 B CN106206512 B CN 106206512B
- Authority
- CN
- China
- Prior art keywords
- conductive bump
- height
- layer
- tin
- metal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000000758 substrate Substances 0.000 title claims abstract description 16
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000002184 metal Substances 0.000 claims description 41
- 229910052751 metal Inorganic materials 0.000 claims description 41
- QCEUXSAXTBNJGO-UHFFFAOYSA-N [Ag].[Sn] Chemical compound [Ag].[Sn] QCEUXSAXTBNJGO-UHFFFAOYSA-N 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 6
- 238000005476 soldering Methods 0.000 abstract description 5
- 229910000570 Cupronickel Inorganic materials 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
A substrate structure, comprising: the substrate body is provided with a plurality of electrical contact pads, a first conductive bump and a second conductive bump, the first conductive bump comprises a first pre-soldering tin layer, the second conductive bump comprises a second pre-soldering tin layer, the width of the second conductive bump is smaller than that of the first conductive bump, and the height of the second conductive bump is larger than that of the first conductive bump, so that after reflow soldering, the height difference between the first and second pre-soldering tin layers is compensated by the height difference, and the first and second conductive bumps with the same height are obtained.
Description
Technical field
The present invention relates to a kind of board structure, espespecially a kind of board structure for having conductive bump.
Background technique
Due to electronic component (such as chip, package substrate) line width, line-spacing reduce, therefore each electric contact mat of the electronic component it
Between spacing it is more and more narrower, and in forming solder bump on the respectively electric contact mat, will become solder ball after reflow (reflow).
However, because the spacing between each electric contact mat is narrow, therefore the problem of adjacent solder ball bridge joint can occur, and cause short circuit.
Therefore, it develops then prior to forming higher melting-point metal column (such as copper, nickel) on electric contact mat, later then at this
A small amount of scolding tin (scolding tin is as following layer use) is formed on metal column, with by when reflow metal column will not be melt into it is spherical,
So mode can be used on the electric contact mat of thin space.
In the prior art, respectively the diameter of the electric contact mat be it is identical, keep the diameter of metal column thereon identical, and formed
It is also identical in the soldering tin amount on metal column, therefore after reflow, the height of solder ball can reach identical height, i.e., coplanar
(coplanarity), to avoid the then generation reliability between electronic component the problem of, wherein coplanar definition is each convex
The difference in height of block is the smaller the better.
However, with technological evolvement, in order to meet more multiple-contact (i.e. I/O) and electrical probe the needs of testing simultaneously, therefore
The electric contact mat of small diameter need to be designed to meet the needs of more I/O, and need to design larger-diameter electric contact mat with
Conducive to the contact of electrical probe, the design there are two types of different size of electric contact mat therefore, on same electronic component is understood,
In, coplanar demand is that the difference in height between the height of major diameter convex block and the height of minor diameter convex block need to be less than 8um.
As shown in Figure 1A, existing package substrate 1 includes: one with multiple electric contact mat 100a, the substrate body of 100b
10, the first conductive bump 11 and the second conductive bump 12 being respectively arranged on different electric contact mat 100a, 100b.This
One conductive bump 11 include the first cupro-nickel layer 110 and the first pre- tin silver layer 111, make the first pre- tin silver layer 111 set on this first
On cupro-nickel layer 110, and second conductive bump 12 includes the second cupro-nickel layer 120 and the second pre- tin silver layer 121, makes the second pre- tin
Silver layer 121 is set on the second cupro-nickel layer 120.Wherein, respectively electric contact mat 100a, 100b divide the ruler there are two types of different-diameter
Very little type makes the width W of second conductive bump 12 be less than the width R of first conductive bump 11, and second conductive bump
12 height L is equal to the height L of first conductive bump 11.
In the application package substrate 1, i.e., when the package substrate 1 combines chip (figure omit), can reflow this first and the
Two pre- tin silver layers 111,121 make first and second pre- tin silver layer 111 ', 121 ' become solder ball, with the combination chip, and in
When reflow, which will not be melt into spherical.
Only, because the width R of first conductive bump 11 is different from the width W of second conductive bump 12, therefore thickness is identical
First and second pre- tin silver layer 111,121 after reflow, will cause the height L ' of first conductive bump 11 and second led with this
Height L " the height of electric convex block 12 is inconsistent, and the difference in height of the two is greater than 8um, thus does not meet coplanar demand, such as schemes
Shown in 1B, the height L " of second conductive bump 12 is less than the height L ' of first conductive bump 11, will so make the encapsulation base
Then generation reliability issues between plate 1 and chip.
Therefore, how to overcome above-mentioned problem of the prior art, have become the project for wanting to solve at present in fact.
Summary of the invention
In view of the disadvantages of the above-mentioned prior art, the present invention provides a kind of board structure, to meet coplanar demand.
Board structure of the invention, comprising: substrate body, with multiple electric contact mats；First conductive bump, sets
It on the electric contact mat, and include the first pre- soldering-tin layer；And second conductive bump, it is set on the electric contact mat, and
Include the second pre- soldering-tin layer, wherein the width of second conductive bump is less than the width of first conductive bump, and this second is led
The height of electric convex block is greater than the height of first conductive bump.
In board structure above-mentioned, the material of the first pre- soldering-tin layer includes tin silver, and the material of the second pre- soldering-tin layer
Include tin silver.
In board structure above-mentioned, which also includes the first metal layer, is set to the first pre- soldering-tin layer
On the first metal layer, and second conductive bump also includes second metal layer, and the second pre- soldering-tin layer is made to be set to second gold medal
Belong on layer.For example, the height of the second metal layer is greater than the height of the first metal layer；Alternatively, the fusing point of the first metal layer
Higher than the first pre- soldering-tin layer, and the fusing point of the second metal layer is higher than the second pre- soldering-tin layer；Alternatively, the first metal layer
The height that height accounts for about first conductive bump is 10% to 90%, and the height of the second metal layer accounts for about second conductive stud
The height of block is 10% to 90%.
In board structure above-mentioned, the height of first conductive bump is the 10% to 90% of the height of second conductive bump.
From the foregoing, it will be observed that in board structure of the invention, mainly by the height of the first conductive bump less than the second conductive stud
The height of block second metal layer to be compensated the difference in height of first and second pre- soldering-tin layer using this difference in height after reflow, and is obtained
To first and second consistent conductive bump of height, to meet coplanar demand.
Detailed description of the invention
Figure 1A is the schematic cross-sectional view of existing package substrate；
Figure 1B is the schematic cross-sectional view after the subsequent back welding process of existing board structure；
Fig. 2A is the schematic cross-sectional view of board structure of the invention；And
Fig. 2 B is the schematic cross-sectional view after the subsequent back welding process of board structure of the invention.
Symbol description
1 package substrate
10,20 substrate bodies
100a, 100b, 200a, 200b electric contact mat
11,21 first conductive bumps
110 first cupro-nickel layers
111,111 ' first pre- tin silver layers
12,22 second conductive bumps
120 second cupro-nickel layers
121,121 ' second pre- tin silver layers
2 board structures
210 the first metal layers
211,211 ' first pre- soldering-tin layers
220 second metal layers
221,221 ' second pre- soldering-tin layers
R, W width
L, L ', L ", D, D ', H, H ' and, d, d ', h, h ' height.
Specific embodiment
Illustrate embodiments of the present invention by particular specific embodiment below, people skilled in the art can be by this theory
The bright revealed content of book is understood other advantages and efficacy of the present invention easily.
It should be clear that this specification structure depicted in this specification institute accompanying drawings, ratio, size etc., only to cooperate specification to be taken off
The content shown is not intended to limit the invention enforceable qualifications for the understanding and reading of people skilled in the art,
Therefore not having technical essential meaning, the modification of any structure, the change of proportionate relationship or the adjustment of size are not influencing this hair
Under bright the effect of can be generated and the purpose that can reach, it should all still fall in disclosed technology contents and obtain and can cover
In range.Meanwhile cited such as "upper", " first ", " second " and " one " term in this specification, it is also only convenient for narration
Be illustrated, rather than to limit the scope of the invention, relativeness is altered or modified, and is changing technology without essence
It inside holds, when being also considered as the enforceable scope of the present invention.
Fig. 2A is the diagrammatic cross-section of board structure 2 of the invention.As shown in Figure 2 A, which includes: one to have
The substrate body 20 of multiple electric contact mat 200a, 200b, first be respectively arranged on different electric contact mat 200a, 200b
Conductive bump 21 and the second conductive bump 22.
The board structure 2 is such as wafer, chip or package substrate.
There are two types of the electric contact mat 200a, 200b of the Dimension Types of different-diameter for the tool of substrate body 20.
First conductive bump 21 includes the first metal layer 210 and the first pre- soldering-tin layer 211, makes the first pre- scolding tin
Layer 211 is set on the first metal layer 210.
Second conductive bump 22 includes second metal layer 220 and the second pre- soldering-tin layer 221, makes the second pre- scolding tin
Layer 221 is set in the second metal layer 220.
In this present embodiment, the fusing point of the first metal layer 210 is higher than the first pre- soldering-tin layer 211, and second metal
The fusing point of layer 220 is higher than the second pre- soldering-tin layer 221.For example, the material of first and second metal layer 210,220 include copper or
Nickel, and the material of first and second pre- soldering-tin layer 211,221 includes tin silver.
In addition, the width W of second conductive bump 22 is less than the width R of first conductive bump 21.
Also, being greater than the height h of the first metal layer 210 by the height d of the second metal layer 220, and first prewelding
The height h ' of tin layers 211 is equal to the height d ' of the second pre- soldering-tin layer 221, and being greater than the height D of second conductive bump 22 should
The height H of first conductive bump 21, for example, the height H of first conductive bump 21 is the height D's of second conductive bump 22
10% to 90%.
In addition, the height H that the height h of the first metal layer 210 accounts for about first conductive bump 21 is 10% to 90%, and
The height D that the height of second metal layer d accounts for about second conductive bump is 10% to 90%.
When the board structure 2 combines electronic device (figure omits), meeting reflow first and second pre- soldering-tin layer 211,221,
First and second conductive bump 21,22 is set to combine the electronic component.The electronic device is wiring board, active member, quilt
The combination of dynamic element or the two, wherein the active member is such as semiconductor wafer, which is such as resistance, electricity
Appearance and inductance.
In addition, as shown in Figure 2 B, after reflow, which can become with the second pre- soldering-tin layer 221 '
Scolding tin body, and through reflow first and second pre- soldering-tin layer 211 ', 221 ' and after becoming scolding tin body, second conductive bump 22
Height D ' is no better than the height H ' of first conductive bump 21, for example, the difference in height of the two about 7.2um, that is, meet coplanar
Demand.
In conclusion the first metal of board structure 2 of the invention by major diameter convex block (i.e. the first conductive bump 21)
The height h of layer 210 is less than the height d of the second metal layer 220 of minor diameter convex block (i.e. the second conductive bump 22), in reflow
Afterwards, using the difference in height of first and second spherical pre- soldering-tin layer 211 ', 221 ' of the difference in height compensation different-diameter of metal layer, and
Obtain height H ', first and second consistent conductive bump 21,22 of D '.
Above-described embodiment is only to be illustrated the principle of the present invention and its effect, and is not intended to limit the present invention.Appoint
What those skilled in the art without departing from the spirit and scope of the present invention, modifies to above-described embodiment.Cause
This scope of the present invention, should be as listed in the claims.
Claims (10)
1. a kind of board structure, it is characterized in that, which includes:
Substrate body, with multiple electric contact mats；
First conductive bump is set on the electric contact mat, and includes the first pre- soldering-tin layer；And
Second conductive bump is set on the electric contact mat, and includes the second pre- soldering-tin layer, wherein second conductive bump
Width be less than first conductive bump width, and the height of second conductive bump be greater than first conductive bump height
Degree, after reflow, to obtain first and second consistent conductive bump of height.
2. board structure as described in claim 1, it is characterized in that, the material of the first pre- soldering-tin layer includes tin silver.
3. board structure as described in claim 1, it is characterized in that, the material of the second pre- soldering-tin layer includes tin silver.
4. board structure as described in claim 1, it is characterized in that, which also includes the first metal layer, makes this
First pre- soldering-tin layer is set on the first metal layer, and second conductive bump also includes second metal layer, makes second prewelding
Tin layers are set in the second metal layer.
5. board structure as claimed in claim 4, it is characterized in that, the height of the second metal layer is greater than the first metal layer
Highly.
6. board structure as claimed in claim 4, it is characterized in that, the fusing point of the first metal layer is higher than the first pre- scolding tin
Layer.
7. board structure as claimed in claim 4, it is characterized in that, the fusing point of the second metal layer is higher than the second pre- scolding tin
Layer.
8. board structure as claimed in claim 4, it is characterized in that, the height of the first metal layer accounts for first conductive bump
Height is 10% to 90%.
9. board structure as claimed in claim 4, it is characterized in that, the height of the second metal layer accounts for second conductive bump
Height is 10% to 90%.
10. board structure as described in claim 1, it is characterized in that, the height of first conductive bump is second conductive stud
The 10% to 90% of the height of block.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW104114027 | 2015-05-01 | ||
| TW104114027 | 2015-05-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106206512A CN106206512A (en) | 2016-12-07 |
| CN106206512B true CN106206512B (en) | 2019-03-12 |
Family
ID=57459279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510235625.0A Active CN106206512B (en) | 2015-05-01 | 2015-05-11 | Substrate structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106206512B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI736802B (en) * | 2018-10-23 | 2021-08-21 | 矽品精密工業股份有限公司 | Electronic package |
| CN111640719B (en) * | 2020-06-01 | 2022-04-01 | 厦门通富微电子有限公司 | Semiconductor device and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101360388A (en) * | 2007-08-01 | 2009-02-04 | 全懋精密科技股份有限公司 | Electricity connection terminal construction of circuit board and preparation thereof |
| US7564130B1 (en) * | 2007-07-06 | 2009-07-21 | National Semiconductor Corporation | Power micro surface-mount device package |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070257375A1 (en) * | 2006-05-02 | 2007-11-08 | Roland James P | Increased interconnect density electronic package and method of fabrication |
-
2015
- 2015-05-11 CN CN201510235625.0A patent/CN106206512B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7564130B1 (en) * | 2007-07-06 | 2009-07-21 | National Semiconductor Corporation | Power micro surface-mount device package |
| CN101360388A (en) * | 2007-08-01 | 2009-02-04 | 全懋精密科技股份有限公司 | Electricity connection terminal construction of circuit board and preparation thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106206512A (en) | 2016-12-07 |
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