CN106170850A - The method of preparation semiconductor packages and contactless upwards spraying system purposes in preparation semiconductor packages - Google Patents
The method of preparation semiconductor packages and contactless upwards spraying system purposes in preparation semiconductor packages Download PDFInfo
- Publication number
- CN106170850A CN106170850A CN201480072846.4A CN201480072846A CN106170850A CN 106170850 A CN106170850 A CN 106170850A CN 201480072846 A CN201480072846 A CN 201480072846A CN 106170850 A CN106170850 A CN 106170850A
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- Prior art keywords
- epoxy resin
- semiconductor chip
- resin composition
- contact points
- curable epoxy
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 45
- 238000005507 spraying Methods 0.000 title claims abstract description 11
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 239000003822 epoxy resin Substances 0.000 claims abstract description 64
- 229920000647 polyepoxide Polymers 0.000 claims abstract description 64
- 229910000679 solder Inorganic materials 0.000 claims abstract description 52
- 239000000203 mixture Substances 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 239000003795 chemical substances by application Substances 0.000 claims description 11
- 239000004593 Epoxy Substances 0.000 claims description 9
- 230000008569 process Effects 0.000 claims description 8
- 239000003085 diluting agent Substances 0.000 claims description 6
- 238000002347 injection Methods 0.000 description 19
- 239000007924 injection Substances 0.000 description 19
- 230000004907 flux Effects 0.000 description 17
- 238000005476 soldering Methods 0.000 description 15
- 239000000463 material Substances 0.000 description 13
- 238000007598 dipping method Methods 0.000 description 12
- 238000005538 encapsulation Methods 0.000 description 10
- 238000000576 coating method Methods 0.000 description 9
- 238000012360 testing method Methods 0.000 description 9
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- 150000001875 compounds Chemical class 0.000 description 5
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- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 3
- 150000008064 anhydrides Chemical class 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
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- ARCGXLSVLAOJQL-UHFFFAOYSA-N anhydrous trimellitic acid Natural products OC(=O)C1=CC=C(C(O)=O)C(C(O)=O)=C1 ARCGXLSVLAOJQL-UHFFFAOYSA-N 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
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- 239000002184 metal Substances 0.000 description 1
- VYKXQOYUCMREIS-UHFFFAOYSA-N methylhexahydrophthalic anhydride Chemical compound C1CCCC2C(=O)OC(=O)C21C VYKXQOYUCMREIS-UHFFFAOYSA-N 0.000 description 1
- 125000000325 methylidene group Chemical group [H]C([H])=* 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
- C09D11/00—Inks
- C09D11/02—Printing inks
- C09D11/10—Printing inks based on artificial resins
- C09D11/101—Inks specially adapted for printing processes involving curing by wave energy or particle radiation, e.g. with UV-curing following the printing
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
- C09D11/00—Inks
- C09D11/30—Inkjet printing inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3489—Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/1182—Applying permanent coating, e.g. in-situ coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7515—Means for applying permanent coating, e.g. in-situ coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8134—Bonding interfaces of the bump connector
- H01L2224/81355—Bonding interfaces of the bump connector having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Materials Engineering (AREA)
- Wood Science & Technology (AREA)
- Organic Chemistry (AREA)
- Life Sciences & Earth Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The present invention relates to a kind of method preparing semiconductor packages, it comprises the following steps: a) provide semiconductor chip, the basal surface of described semiconductor chip to have one or more solder contact points；B) by noncontact jetting system, curable epoxy resin composition is upwards applied at least one solder contact points of at least some of of described basal surface and/or described semiconductor chip；C) coated semiconductor chip is placed on circuit board or on carrier substrate；D) make the one or more solder contact points be connected with described circuit board or described carrier substrate, and make described epoxy resin composition.Invention also discloses contactless upwards spraying system purposes in preparation semiconductor packages.
Description
Technical field
The present invention relates to a kind of new deposition process, solder joint (solder joint) protection material such as epoxy resin is helped weldering
Agent (flux) be applied to IC encapsulation basal surface, described IC encapsulate such as BGA (BGA), CSP (chip size packages),
WLP (wafer-level packaging), PoP (packaging body lamination) and LGA (land grid array)), to overcome and existing encapsulation dipping
Sprayed on material in the bottom package of method, PCB (printed circuit board (PCB)) substrate or PoP encapsulation or the relevant problem of coating material.
Background technology
In order to protect BGA and LGA solder joint on mobile electronic device to avoid fall-down test failure in early days, by various forms of
Solder joint protection material is used for protecting solder joint to avoid impact endurance test shock.Epoxy resin soldering flux is one of solder joint protection material, and with
Conventional capillaries bottom filling is compared, and possesses following advantage.
1. it can solidify in solder reflow process, to save dispersion and the solidification step of capillary tube bottom filling
Suddenly.
2. it can be solidified by solder reflow method so that one pack system EMI (electromagnetic interference) shielding is not using
It is carried out in the case of solder and the second low temperature reflux method.The shielding of monoblock EMI reduces the whole height of described shielding
(compared with two pieces of fence and covering EMI shielding).
3. there is little fillet (fillet) to sprawl, hence in so that modern mobile devices can be arranged with high density components.
But, due to the following restriction of current application method, the drawback of epoxy resin soldering flux maximum is to have protected
Whole pedestal.
Method one, infusion process: IC encapsulation is immersed epoxy resin soldering flux pond, and wiping is to controllable height.
Method two, material is deposited on circuit board: before connecting assembly, by described injection of material, prints or disperses
First-class in circuit board.
First method, infusion process, there is encapsulation pickup (pick up) problem and solder tailing problem.And the second side
Method (is sprayed or coats on circuit boards), there is solder tailing problem and voiding problem that humidity causes.
Based on before for the negative results of LGA dipping method, insertion machine supplier develops customized nozzle and makes
The pickup force of impregnation section maximizes.But this can not be fully solved the problem that pickup is failed.
Additionally, engineer is intended to reduce the impregnating depth of LGA, but problem yet suffers from.
The application uses the injection method of inversion type that material is incident upon the back side of encapsulation.Described method can be with sequencing
Accurate coatings is produced in pattern space on each I/O plate of LGA or between the ball of BGA.Due to epoxy resin soldering flux
High adhesion strength, described method can overcome the encapsulation pickup problem relevant with dipping technique.Owing to amount and pattern can be with sequencing, institute
The method of stating can also overcome solder tailing problem.
In order to avoid picking up unsuccessfully, existing impregnating depth is restricted to be the 70% of BGA ball height to the maximum.As a result, only
The bottom contact of ball is protected, and top does not has.Therefore, the fall-down test performance of epoxy resin soldering flux it is reported and is inferior to fill out
Fill the capillary tube bottom filling of whole ball height.From the method for base injcction, if correctly sequencing, it is possible to achieve ball would be connect
The protection that the 100% of point covers and offer is similar with capillary tube bottom filling.
Summary of the invention
Therefore, it is an object of the invention to provide a kind of new method that can overcome above-mentioned problem of the prior art.
This purpose is realized by the method for preparation semiconductor packages (semiconductor package), described method bag
Include following steps:
A) providing semiconductor chip, the basal surface of described semiconductor chip connects with (attached) one or more solder
Contact (solder contact points)；
B) by noncontact jetting system, curable epoxy resin composition (epoxy composition) is upwards executed
For at least some of of described basal surface and/or at least one solder contact points of described semiconductor chip；
C) coated semiconductor chip is placed on circuit board or on carrier substrate；
D) make the one or more solder contact points be connected with described circuit board or described carrier substrate, and make described
Epoxy resin composition.
According to a further aspect in the invention, it is provided that contactless upwards spraying system use in preparation semiconductor packages
On the way.
Accompanying drawing explanation
With reference to the following description of embodiment of the present invention and accompanying drawing, the above-mentioned and other feature of the present invention, advantage and
The method realizing these features and advantage can become apparent from, it is also possible to is more fully understood that the present invention self, wherein:
Fig. 1 illustrates the conventional impregnation methods of BGA；
Fig. 2 illustrates the schematic diagram of the contactless upwards spraying system of the present invention；
Fig. 3 and 4 illustrates operation and the structure of the upwards injection valve of the present invention.
Detailed description of the invention
The present invention relates to a kind of method preparing semiconductor packages, it comprises the following steps:
A) providing semiconductor chip, the basal surface of described semiconductor chip has one or more solder contact points；
B) by noncontact jetting system, curable epoxy resin composition is upwards applied to described basal surface extremely
At least one solder contact points of few a part of and/or described semiconductor chip；
C) coated semiconductor chip is placed on circuit board or on carrier substrate；
D) make the one or more solder contact points be connected with described circuit board or described carrier substrate, and make described
Epoxy resin composition.
A) semiconductor chip is provided
Semiconductor chip is selected from BGA, CSP, WLP, PoP and LGA.One or more solder contact points invest described
The basal surface of semiconductor chip.
B) curable composition epoxy resin is upwards used by contactless upwards spraying system
According in the embodiment of the inventive method, contactless upwards spraying system can include to epoxy composite
The device (means) of thing pressurization；Operation valve system, it controls curable ring via the outlet device 1 being connected to described valve system
The dispersion of epoxy resin composition, wherein said valve system is driven by Piexoelectric actuator 3, disperses curable ring especially for high frequency
Epoxy resin composition provides probability (see Fig. 2).
The present invention uses the upwards jet power of modern injection valve (such as but not limited to EFD picoDot), thus passes through
The pattern of sequencing is by the desired site (see Fig. 3-4) of injection of material to the encapsulation back side.This can solve and encapsulate dipping side
The difficult problem that method or PCB injection or painting method are correlated with.
The operation valve system of contactless upwards spraying system can include nozzle plate 10, and it has as outlet device 1
Nozzle；Ball sealer 9, it is used for opening and close described nozzle, and contacts with Piexoelectric actuator 3；Wherein nozzle plate 10 and close
The mode that blocking 9 is mutually arranged and arranges makes described nozzle be closed by described ball sealer 9, stops curable epoxy combination
The flowing of thing, and when ball sealer 9 rises via Piexoelectric actuator 3 and/or has certain distance with nozzle plate 10, curable
Composition epoxy resin flows through nozzle and is disperseed.
Nozzle plate 10 and/or ball sealer 9 are preferably made up of pottery or alloy steel material.
Piexoelectric actuator 3 can include two piezoelectric actuators.
Valve system can include the upper member with Piexoelectric actuator 3 and have nozzle plate 10 and ball sealer 9 times
Portion's parts, are wherein provided for heat insulation device 8, the most heat insulation the air gap between upper member and lower member.
Valve system can include the fluid intake 4 being preferably placed at the curable epoxy resin composition of bottom, to connect valve system
System and the device to curable epoxy resin composition pressurization；Fluid passage 5, it provides the stream of curable epoxy resin composition
Connection between body entrance 4 and nozzle；Firing equipment 6, it provides heating probability to described valve system；And measurement apparatus 7,
It is for measuring curable epoxy resin composition and/or the parameter of described valve system, and preferably at least one temperature survey passes
Sensor.
Valve system can include the integrated counting assembly being preferably placed at top, is preferably configured to integrated electronic enumerator 2, especially
It is for circulation and/or power-on time counting.
In embodiments of the present invention, curable epoxy resin composition is applied to bottom semiconductor die surface
Angle of incidence less than 20 °, preferably smaller than 10 °, more preferably less than 5 °.
In embodiments of the present invention, under the pressure of about 10psi-about 30psi, curable epoxy is used
Compositions.
In embodiments of the present invention, between noncontact jetting system and the basal surface of semiconductor chip away from
From about 0.8mm-5mm.
In embodiments of the present invention, at a temperature of about 40 DEG C-about 75 DEG C, curable epoxy group is used
Compound.
In the inventive method embodiment, curable epoxy resin composition is about 3000mPa the viscosity of 25 DEG C
S-about 30000mPa s.
In the inventive method embodiment, curable epoxy resin composition comprises at least one epoxy resin, at least
A kind of diluent, at least one firming agent and at least one accelerator.
As at least one epoxy resin, it is possible to use all epoxy resin known in the art, such as United States Patent (USP)
Application publication number No.2011/0241228 A1 (entirety quotes addition herein), as long as it is difunctionality or more polyfunctional.From
From the point of view of viscosity minimizing, low water absorbable and high-fire resistance, be preferably used in these epoxy resin has bisphenol type epoxy tree
Fat, bisphenol f type epoxy resin, the polyfunctional epoxy resin containing naphthalene skeleton, the polyfunctional epoxy resin containing bicyclopentadiene skeleton
And the polyfunctional epoxy resin containing triphenyl methane skeleton: these epoxy resin can be liquid or solid at 25 DEG C, but
When solder adds heat fusing for connecting, the fusing point of solid epoxy used or softening point are preferably shorter than the fusing point of solder.
These epoxy resin can be used alone or two or more are applied in combination.
As at least one firming agent, it is possible to use the anhydride that prior art is commonly known, such as U.S. Patent application is public
The number of opening No.2011/0241228 A1 (entirety quotes addition herein).In view of thermostability and humidity resistance, particularly preferred acid
Acid anhydride has methyl tetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, carbic anhydride, methyl bridge
Methylene tetrabydrophthalic anhydride, 3,4-dimethyl-6-(2-methyl-1-propylene base)-4-cyclohexene-1,2-dicarboxylic anhydride,
1-isopropyl-4-methyl-dicyclo [2.2.2] octyl-5-docosene dicarboxylic acid acid anhydride, double trimellitic acid glycol ester and three dehydration trimellitic acids
Glycerine ester.Any one in these firming agent can be used alone or two or more are applied in combination.
At least one epoxy resin is not particularly limited with the ratio of at least one firming agent, and can be by this area skill
Art personnel determine.As with the equivalent proportion of epoxy resin (epoxide group number and the carboxyl number purpose ratio produced from anhydride=
Epoxide group number/carboxyl number), the amount of at least one firming agent is preferably 0.5-1.5, more preferably 0.7-1.2.If equivalent
Ratio, less than 0.5, can retain the carboxyl of excess, and water absorption can increase, and moistureproof reliability can reduce.If equivalent proportion is more than
1.5, solidification can not fully be carried out.
At least one diluent used is preferably selected from alcohol, phenol and carboxylic acid.Alcohol used herein is preferably in molecule tool
There is the compound of two or more alcoholic extract hydroxyl group.Phenol used herein preferably has the compound of at least two phenolic hydroxyl group.
Carboxylic acid used herein includes aliphatic carboxylic acid and aromatic carboxylic acid.These compounds can be used alone or two kinds or more
Multiple combination uses.
Relative at least one epoxy resin and the total amount of at least one firming agent of 100 weight portions, at least one dilution
The amount of agent is preferably 0.1-15 weight portion, more preferably 0.5-10 weight portion, and even more preferably 1-10 weight portion.If at least
The amount of a kind of diluent is less than 0.1 weight portion, it is impossible to show the effect of the oxide layer fully removed on solder surface.If extremely
The amount of few a kind of diluent is beyond 15 weight portions, and carboxyl may react with the epoxy resin in scaling powder, reduces storage potentially
Stability.These compounds can be used alone or two or more are applied in combination.
As at least one accelerator, it is possible to use the quaternary salt that prior art is commonly known, such as U.S. Patent number
No.7,074,738 (entirety quotes addition herein).
Relative at least one epoxy resin and the total amount of at least one firming agent of 100 weight portions, at least one promotes
The amount of agent is preferably 0.01-10 weight portion, more preferably 0.1-5 weight portion.If the amount of at least one accelerator is less than 0.01 weight
Amount part, curable can weaken, and reduces connection reliability potentially.If beyond 10 weight portions, storage stability may reduce.
Curable epoxy resin composition can optionally comprise filler, such as organic filler or inorganic filler, adjusts
Whole viscosity or the performance of control cured article.
C) coated semiconductor chip is placed on circuit board or on carrier substrate
In embodiments of the present invention, one or more solder contact are encapsulated with curable epoxy resin composition
Point.Especially, the semiconductor chip of coating in step b) can be placed on circuit boards or carrier base in a spaced apart manner
On plate, wherein the gap between semiconductor chip and circuit board or carrier substrate is by one or more solder contact point-shaped
Becoming, described solder contact points is encapsulated by curable epoxy resin composition, thus forms semiconductor packages and assemble.
It addition, semiconductor chip and circuit board or carrier substrate can align and press together.
D) (coupling) and solidification are connected
In an embodiment of the inventive method, semiconductor package can be made to stand to be enough in Reflow Soldering gap
One or more solder contact points and the condition of cure curable composition epoxy resin, wherein in described gap, described
Circuit board or described carrier substrate described in one or more solder contact point cantact.
Especially, semiconductor package can be heated to the temperature of solder contact points fusing point or higher than solder contact points
The temperature of fusing point, thus described semiconductor chip links together with described circuit board or carrier substrate.The present invention consolidates
Change the diluent in composition epoxy resin and can remove the oxide layer on solder contact points surface by reduction reaction, thus institute
State solder contact points can smoothly carry out Reflow Soldering and connect formation contact by metal.
The upwards advantage of injection method
1., for Lead-free in Electronic Packaging such as LGA, current dipping method can cause LGA to pick up unsuccessfully often.The present invention is upwards
Injection method makes the most directly to contact with epoxy resin soldering flux pond, and can solve pickup problem.
2., compared to using dipping method to produce coating on the whole backboard of LGA, the upwards injection method of the present invention can
Only to produce accurate, the coating of programmable on the I/O plate of LGA.Which overcome in placement the hangover of solder cream on PCB to ask
Topic, prevents short circuit problem.
3. in BGA package, dipping method can with practical coating solder ball height less than 70%.Higher coating water
Flat meeting causes picking up unsuccessfully.Therefore, epoxy resin soldering flux can not arrive and protect the top contact of solder ball, cause compared to
Capillary tube bottom filling worse fall-down test performance.The upwards injection method of the present invention can only between ball blasting materials with
Coat whole ball, it is thus achieved that the fall-down test performance suitable with capillary tube bottom filling.
4. can carry out pattern control for all parts, thus realize accurate profile and volume, with traditional dipping
Method generally has unique impregnating depth to compare in PCB side, and it has flexible and wide process window.
The most generally speaking, the upwards injection method of the present invention allows to be helped by epoxy resin by accurate fixing fabric structure
Solder flux is accurately deposited on the back side of encapsulation.Which overcome use capillary tube bottom filling to fill the minute solder gap of LGA
Difficulty, it is to avoid the epoxy resin pickup failure problem of BGA and LGA of fluxes method, asphalt mixtures modified by epoxy resin is allowed for BGA
The coating of 100% ball height of fat scaling powder, it is achieved the fall-down test performance suitable with capillary tube bottom filling.
The invention enables epoxy resin to help the selection being welded into the solder joint into main flow, which in turn eliminates and fill out bottom capillary tube
The dispersion of material and solidification process, solve dispersion and the flooding problems of capillary tube bottom filling small space, enabling integrates
Monoblock EMI screen method (need not the additional cryogenic solder printing for two pieces of EMI shieldings and backflow with the solder backflow of standard
Process).
Owing to LGA and BGA is the Typical Representative of semiconductor packages, therefore based on embodiment 1 (LGA) and embodiment 2 (BGA)
Described in following as a result, it is possible to expection is for the effect of upwards injection method of the present invention of CSP, WLP and PoP.
The present invention also relates to contactless upwards spraying system purposes in preparation semiconductor packages.
Following non-limiting example elaborates various features and the feature of the present invention, and it is not construed as the present invention
Restriction.
Embodiment
The dipping method of comparative example 1:LGA
LGA package only has I/O plate bottom it and does not has solder ball.When epoxy resin soldering flux pond and ring are immersed in encapsulation
When epoxy resins scaling powder contacts with the whole bottom of LGA, the biggest challenge, viscous epoxy are proposed existing dipping application process
The effect of rosin flux is contrary with pickup force, causes picking up unsuccessfully.By dipping method, the whole bottom of LGA is completely by ring
Epoxy resins scaling powder covers.When being adhered to onboard by LGA, epoxy resin soldering flux dispersion is pre-printed on the connection of circuit board
Wet welding cream on plate, causes electric fault.
The upwards injection method of embodiment 1:LGA
In the upwards injection method of the present invention, use injector head (EFD PICO DOT spraying system, model: 774MV-
100), operating parameter is as follows:
Upwards injection method, parts is used the most directly to contact with epoxy resin soldering flux pond, the upwards injection of the present invention
Method can solve to pick up a difficult problem.Upwards injection method is programmed, thus produces the epoxy resin mated with the I/O plate of LGA
The exact pattern of soldering flux coating, thus overcome the scattered difficult problem of solder.
The dipping method (Fig. 1) of comparative example 2:BGA
BGA package has solder ball bottom it, and expect epoxy resin soldering flux coat and protect whole ball height with
And the solder joint of the top of ball and bottom is to prevent the failure of fall-down test in early days.According to field data, conventional impregnation methods
Only can impregnate ball height less than 70%.Higher impregnating depth makes on ball the wetting power of epoxy resin soldering flux too
Greatly, cause picking up unsuccessfully.Do not coat the height of whole ball the top of ball and top contact can be made to be protected thus
Cause the failure of fall-down test in early days.
The upwards injection method of embodiment 2:BGA
Same injector head such as embodiment 1 and operating parameter are used for BGA.Make upwards injection method sequencing to incite somebody to action
Enough material depositions are to fill the space between solder sphere, and provide the covering of 100%.This makes top contact be protected,
And obtain the fall-down test performance suitable with capillary tube bottom filling.
Although having described that some embodiment, but these embodiments are all to be presented by way of example, are not meaning
Figure limits the scope of the present invention.Appended claims and equivalent thereof are intended to cover the institute being within the scope and spirit of the invention
There is modification, replace and change.
Claims (9)
1. the method preparing semiconductor packages, it comprises the following steps:
A) providing semiconductor chip, the basal surface of described semiconductor chip has one or more solder contact points；
B) by noncontact jetting system, curable epoxy resin composition is upwards applied at least the one of described basal surface
Part and/or at least one solder contact points of described semiconductor chip；
C) coated semiconductor chip is placed on circuit board or on carrier substrate；
D) make the one or more solder contact points be connected with described circuit board or described carrier substrate, and make described epoxy
Resin composition.
2. the process of claim 1 wherein and described curable epoxy resin composition is applied to the end of described semiconductor chip
The angle of incidence on surface is less than 20 °.
3. the method for claim 1 or 2, wherein uses described curable epoxy under the pressure of about 10psi-about 30psi
Compositions.
4. the end of the method any one of claim 1-3, wherein said noncontact jetting system and described semiconductor chip
Distance between surface is about 0.8mm-5mm.
5. the method any one of claim 1-4, wherein uses described curable epoxy at a temperature of about 40 DEG C-about 75 DEG C
Resin combination.
6. the method any one of claim 1-5, wherein said curable epoxy resin composition comprises at least one epoxy
Resin, at least one diluent, at least one firming agent and at least one accelerator.
7. the method any one of claim 1-6, wherein said curable epoxy resin composition is about the viscosity of 25 DEG C
3000mPa s-about 30000mPa s.
8. the method any one of claim 1-7, wherein in step c), encapsulates with described curable epoxy resin composition
The one or more solder contact points.
The most contactless upwards spraying system purposes in preparation semiconductor packages.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2014/070388 WO2015103757A1 (en) | 2014-01-09 | 2014-01-09 | A method for fabricating a semiconductor package, and the use of a non-contact upward jetting system in the fabrication of a semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106170850A true CN106170850A (en) | 2016-11-30 |
Family
ID=53523452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480072846.4A Pending CN106170850A (en) | 2014-01-09 | 2014-01-09 | The method of preparation semiconductor packages and contactless upwards spraying system purposes in preparation semiconductor packages |
Country Status (3)
| Country | Link |
|---|---|
| CN (1) | CN106170850A (en) |
| TW (1) | TW201530666A (en) |
| WO (1) | WO2015103757A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113611616A (en) * | 2021-07-29 | 2021-11-05 | 矽磐微电子(重庆)有限公司 | Semiconductor packaging method |
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| CN1153266C (en) * | 1996-11-06 | 2004-06-09 | 新潟精密株式会社 | Method for forming bump and semiconductor device |
| JP2007214346A (en) * | 2006-02-09 | 2007-08-23 | Sumitomo Bakelite Co Ltd | Semiconductor device and manufacturing method thereof |
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| US20130234317A1 (en) * | 2012-03-09 | 2013-09-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging Methods and Packaged Semiconductor Devices |
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| JP4328645B2 (en) * | 2004-02-26 | 2009-09-09 | 太陽インキ製造株式会社 | Photocurable / thermosetting resin composition and printed wiring board using the same |
| US7553680B2 (en) * | 2004-08-09 | 2009-06-30 | Delphi Technologies, Inc. | Methods to provide and expose a diagnostic connector on overmolded electronic packages |
| CN102088822B (en) * | 2009-12-08 | 2014-12-17 | 三星半导体(中国)研究开发有限公司 | PCB (printed circuit board) substrate with welding spot self-protection function and manufacturing process of pad of PCB substrate |
-
2014
- 2014-01-09 CN CN201480072846.4A patent/CN106170850A/en active Pending
- 2014-01-09 WO PCT/CN2014/070388 patent/WO2015103757A1/en active Application Filing
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2015
- 2015-01-07 TW TW104100351A patent/TW201530666A/en unknown
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| CN1153266C (en) * | 1996-11-06 | 2004-06-09 | 新潟精密株式会社 | Method for forming bump and semiconductor device |
| JP2003124621A (en) * | 2001-10-15 | 2003-04-25 | Senju Metal Ind Co Ltd | Fluxer for partial soldering of printed board |
| JP2007214346A (en) * | 2006-02-09 | 2007-08-23 | Sumitomo Bakelite Co Ltd | Semiconductor device and manufacturing method thereof |
| CN101894772A (en) * | 2010-06-28 | 2010-11-24 | 华为终端有限公司 | Method for enhancing reliability of chip welding spot, printed circuit board and electronic device |
| US20130234317A1 (en) * | 2012-03-09 | 2013-09-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging Methods and Packaged Semiconductor Devices |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113611616A (en) * | 2021-07-29 | 2021-11-05 | 矽磐微电子(重庆)有限公司 | Semiconductor packaging method |
| CN113611616B (en) * | 2021-07-29 | 2023-12-26 | 矽磐微电子(重庆)有限公司 | Semiconductor packaging method |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2015103757A1 (en) | 2015-07-16 |
| TW201530666A (en) | 2015-08-01 |
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