CN106128390A - A kind of TFT LCD liquid crystal display screen delay circuit control method - Google Patents
A kind of TFT LCD liquid crystal display screen delay circuit control method Download PDFInfo
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- CN106128390A CN106128390A CN201610754016.0A CN201610754016A CN106128390A CN 106128390 A CN106128390 A CN 106128390A CN 201610754016 A CN201610754016 A CN 201610754016A CN 106128390 A CN106128390 A CN 106128390A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
A kind of TFT LCD liquid crystal display screen delay circuit control method.By mu balanced circuit by after AC rectification, part alternating current is converted into unidirectional current by inverter, and by unidirectional current electrical power storage to battery；When the unexpected power-off of power supply, electric energy is discharged to inverter by battery, and inverter will be delivered to mu balanced circuit after converting direct-current power into alternating-current power, and mu balanced circuit keeps normal work.The present invention connects simply, economical and practical, and the driving stabilized circuit outputting voltage of liquid crystal display module is stable so that production cost is substantially reduced.
Description
Technical field
The present invention relates to drive mu balanced circuit technical field, particularly relate to a kind of TFT-LCD liquid crystal display screen delay circuit and control
Method.
Background technology
Along with the progress of lcd technology, liquid crystal display application in daily life is more and more extensive,
The driving of liquid crystal display is an ingredient indispensable in lcd applications.Cost and profit are that businessman is concerned about
Two eternal themes, the input voltage driving mu balanced circuit of liquid crystal display module is 3.3 volts, and output voltage is respectively VGH
=15 volts.VGL=-10 lies prostrate, and AVDD=10 lies prostrate, and the circuit driving mu balanced circuit of available liquid crystal display module connects complexity, and
The spread of voltage of output, needs other regulated power supply to coordinate so that relatively costly.
Summary of the invention
The invention aims to solve shortcoming present in prior art, and a kind of TFT-LCD liquid crystal display screen proposed
Delay circuit control method.
To achieve these goals, present invention employs following technical scheme:
A kind of TFT-LCD liquid crystal display screen delay circuit control method, its scheme is as follows:
By mu balanced circuit by after AC rectification, part alternating current is converted into unidirectional current by inverter, and will be straight
Stream electricity electrical power storage is to battery；
When the unexpected power-off of power supply, electric energy is discharged to inverter by battery, and inverter is by after converting direct-current power into alternating-current power
Being delivered to mu balanced circuit, mu balanced circuit keeps normal work.
Further, described mu balanced circuit includes that pin 5 connection of chip U1 and element U2, described chip U1 has resistance
R4, inductance L1, electric capacity C6 and high level VCC, the other end of described resistance R4 is connected with the pin 4 of chip U1, described electric capacity
The other end of C6 and the equal ground connection of pin 2 of chip U1, the pin 1 of described chip U1 connects the other end of inductance L1, diode
The positive pole of D4 and electric capacity C2, the other end of described electric capacity C2 connects negative pole and the positive pole of diode D1 having diode D2, described
The positive pole of diode D2 connects resistance R3, and the other end ground connection of resistance R3, and the negative pole of described diode D1 connects electric capacity
C1, resistance R1 and the emitter stage of NPN type triode Q1, the colelctor electrode of described NPN type triode Q1 connects outfan VGH, institute
State the equal ground connection of the other end of the base stage of NPN type triode Q1, the other end of resistance R1 and electric capacity C1, the negative pole of described diode D4
Connecting has electric capacity C5, electric capacity C4, resistance R2 and output terminals A VDD, the other end of described electric capacity C5 to be connected with the pin 3 of chip U1
Connecing, second end of described resistance R2 is connected with output terminals A VDD, and the three-terminal link of resistance R2 have diode D3 negative pole,
The positive pole of electric capacity C3 and outfan VCOM, and the equal ground connection of the other end of the negative pole of electric capacity C3, the positive pole of diode D3 and electric capacity C4,
Described output terminals A VDD connects electric capacity C7 and resistance R5, and the other end connection of electric capacity C7 has the other end of resistance R5, positive-negative-positive
The base stage of audion Q2 and the base stage of PNP type triode Q3, the emitter stage of described PNP type triode Q2 connects high level VCC,
The colelctor electrode of described PNP type triode Q2 connects pin 1 and the emitter stage of PNP type triode Q3 having element U2, and positive-negative-positive three
The grounded collector of pole pipe Q3, the pin of described element U2 connects has the other end connection of electric capacity C8, described electric capacity C8 to have resistance
First end of R6 and the second end, and the other end ground connection of electric capacity C8, the three-terminal link of described resistance R6 has outfan VGL and unit
The pin 3 of part U2.
Preferably, described element U2 is integrated regulator, and the model of element U2 is LM7810.
Preferably, described resistance R2 and resistance R6 is swept resistance.
Preferably, described electric capacity C3 is electrochemical capacitor, and diode D3 is Zener diode.
Preferably, the model of described chip U1 uses LM27313.
Beneficial effects of the present invention: by PNP type triode Q2 respectively with PNP type triode Q3, electric capacity C7 and resistance R5
Having collectively constituted a negater circuit, output terminals A vdd voltage can be directly changed into the anti-of output terminals A VDD by this negater circuit
To voltage so that circuit connects simple, greatly reduces production cost；By PNP type triode Q1 respectively with resistance R1, electricity
Holding C1 and collectively constituted the first mu balanced circuit, this mu balanced circuit can carry out voltage stabilizing process to the voltage of outfan VGH so that defeated
Go out voltage stabilization；Together constituting the second mu balanced circuit with electric capacity C8, resistance R6 respectively by element U2, this mu balanced circuit is permissible
The voltage of outfan VGL is carried out voltage stabilizing process so that output voltage stabilization；The circuit of the present invention connects simple, economical and practical,
And the output voltage stabilization driving mu balanced circuit of liquid crystal display module, it is not necessary to regulated power supply coordinates so that production cost
It is substantially reduced.
Accompanying drawing explanation
Fig. 1 is the fundamental diagram of the present invention.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Describe, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments wholely.
With reference to Fig. 1, a kind of TFT-LCD liquid crystal display screen delay circuit control method, by mu balanced circuit by after AC rectification,
Part alternating current is converted into unidirectional current by inverter, and by unidirectional current electrical power storage to battery.When the unexpected power-off of power supply,
Electric energy is discharged to inverter by battery, and inverter will be delivered to mu balanced circuit after converting direct-current power into alternating-current power, and mu balanced circuit is protected
Hold normal work.
Described mu balanced circuit includes chip U1 and element U2, and the pin 5 of chip U1 connects resistance R4, inductance L1, electric capacity
The pin 4 of C6 and high level VCC, the other end of resistance R4 and chip U1 is connected, the other end of electric capacity C6 and drawing of chip U1
The equal ground connection of foot 2, the pin 1 of chip U1 connects the other end of inductance L1, the positive pole of diode D4 and electric capacity C2, and electric capacity C2's is another
One end connects negative pole and the positive pole of diode D1 having diode D2, and the positive pole of diode D2 connects resistance R3, and resistance R3
Other end ground connection, the negative pole of diode D1 connects electric capacity C1, resistance R1 and the emitter stage of NPN type triode Q1, NPN type three
The colelctor electrode of pole pipe Q1 connects outfan VGH, and the base stage of NPN type triode Q1, the other end of resistance R1 and electric capacity C1's is another
The equal ground connection in one end, the negative pole of diode D4 connects electric capacity C5, electric capacity C4, resistance R2 and output terminals A VDD, another of electric capacity C5
End is connected with the pin 3 of chip U1, and second end of resistance R2 is connected with output terminals A VDD, and the three-terminal link of resistance R2
There are the negative pole of diode D3, the positive pole of electric capacity C3 and outfan VCOM, and the negative pole of electric capacity C3, the positive pole of diode D3 and electric capacity
The equal ground connection of the other end of C4, output terminals A VDD connects electric capacity C7 and resistance R5, and the other end connection of electric capacity C7 has resistance R5
The other end, the base stage of PNP type triode Q2 and the base stage of PNP type triode Q3, the emitter stage of PNP type triode Q2 connects to be had
High level VCC, the colelctor electrode of PNP type triode Q2 connects pin 1 and the emitter stage of PNP type triode Q3 having element U2, and
The grounded collector of PNP type triode Q3, the pin of element U2 connects has the other end connection of electric capacity C8, electric capacity C8 to have resistance R6
The first end and the second end, and the other end ground connection of electric capacity C8, the three-terminal link of resistance R6 has outfan VGL's and element U2
Pin 3, element U2 is integrated regulator, and the model of element U2 is LM7810, and resistance R2 and resistance R6 is swept resistance, electricity
Appearance C3 is electrochemical capacitor, and diode D3 is Zener diode, and the model of chip U1 uses LM27313.
Operation principle: chip U1 together constitutes power driving circuit with resistance R4, inductance L1 and electric capacity C6 respectively, this electricity
Source driving circuit can be that the regulating circuit that diode D4, electric capacity C5 and electric capacity C4 collectively constitute provides input voltage, and adjusts
The outfan of volt circuit be drive mu balanced circuit output terminals A VDD, this power driving circuit can also be resistance R3, electric capacity C2,
The first output circuit that diode D1, diode D2, electric capacity C1, resistance R1 and NPN type triode Q1 collectively form provides input
Voltage, this first output circuit provides the outfan of input voltage to be the outfan VGH driving mu balanced circuit, the first output simultaneously
NPN type triode Q1, resistance R1 and electric capacity C1 on potential circuit match, and NPN type triode Q1, resistance R1 and electric capacity C1 can
With to drive mu balanced circuit outfan VGH carry out voltage stabilizing process, the outfan of regulating circuit can be PNP type triode Q2,
The second output circuit that PNP type triode Q3, electric capacity C7, resistance R5, element U2, resistance R6 and electric capacity C8 collectively constitute provides defeated
Entering voltage, the outfan of the second output circuit is the outfan VGL driving mu balanced circuit, the element in the second output circuit simultaneously
U2, resistance R6 and electric capacity C8 match, and element U2, resistance R6 and electric capacity C8 can be that the outfan VGL driving mu balanced circuit enters
Row voltage stabilizing processes, the 3rd output that resistance R2, diode D3 and electric capacity C3 can also be collectively constituted by the outfan of regulating circuit
Circuit provides voltage input, and the outfan of the 3rd output voltage is the outfan VCOM driving mu balanced circuit, simultaneously the 3rd output
Diode D3 in circuit can carry out voltage stabilizing process to the outfan VCOM driving mu balanced circuit.
The above, the only present invention preferably detailed description of the invention, but protection scope of the present invention is not limited thereto,
Any those familiar with the art in the technical scope that the invention discloses, according to technical scheme and
Inventive concept equivalent or change in addition, all should contain within protection scope of the present invention.
Claims (6)
1. a TFT-LCD liquid crystal display screen delay circuit control method, it is characterised in that its scheme is as follows:
By mu balanced circuit by after AC rectification, part alternating current is converted into unidirectional current by inverter, and by unidirectional current
Electrical power storage is to battery；
When the unexpected power-off of power supply, electric energy release to inverter, inverter will be carried after converting direct-current power into alternating-current power by battery
To mu balanced circuit, mu balanced circuit keeps normal work.
Method the most according to claim 1, it is characterised in that described mu balanced circuit includes chip U1 and element U2, described
The pin 5 of chip U1 connects resistance R4, inductance L1, electric capacity C6 and high level VCC, the other end of described resistance R4 and chip U1
Pin 4 be connected, the other end of described electric capacity C6 and the equal ground connection of pin 2 of chip U1, the pin 1 of described chip U1 connects to be had
The other end of inductance L1, the positive pole of diode D4 and electric capacity C2, the other end of described electric capacity C2 connects the negative pole having diode D2
With the positive pole of diode D1, the positive pole of described diode D2 connects resistance R3, and the other end ground connection of resistance R3, described two poles
The negative pole of pipe D1 connects electric capacity C1, resistance R1 and the emitter stage of NPN type triode Q1, the current collection of described NPN type triode Q1
Pole connects has outfan VGH, the other end of the base stage of described NPN type triode Q1, the other end of resistance R1 and electric capacity C1 all to connect
Ground, the negative pole of described diode D4 connects electric capacity C5, electric capacity C4, resistance R2 and output terminals A VDD, another of described electric capacity C5
End is connected with the pin 3 of chip U1, and second end of described resistance R2 is connected with output terminals A VDD, and the 3rd end of resistance R2
Connect and have the negative pole of diode D3, the positive pole of electric capacity C3 and an outfan VCOM, and the negative pole of electric capacity C3, the positive pole of diode D3 and
The equal ground connection of the other end of electric capacity C4, described output terminals A VDD connects electric capacity C7 and resistance R5, and the other end of electric capacity C7 connects
There are the other end of resistance R5, the base stage of PNP type triode Q2 and the base stage of PNP type triode Q3, described PNP type triode Q2
Emitter stage connects high level VCC, and the colelctor electrode of described PNP type triode Q2 connects pin 1 and positive-negative-positive three pole having element U2
The emitter stage of pipe Q3, and the grounded collector of PNP type triode Q3, the pin of described element U2 connects electric capacity C8, described electricity
Hold the other end of C8 to connect and have the first end and second end of resistance R6, and the other end ground connection of electric capacity C8, the of described resistance R6
Three-terminal link has the pin 3 of outfan VGL and element U2.
Method the most according to claim 1, it is characterised in that described element U2 is integrated regulator, and the type of element U2
Number it is LM7810.
Method the most according to claim 1, it is characterised in that described resistance R2 and resistance R6 is swept resistance.
Method the most according to claim 1, it is characterised in that described electric capacity C3 is electrochemical capacitor, and diode D3 is steady
Pressure diode.
Method the most according to claim 1, it is characterised in that the model of described chip U1 uses LM27313.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610754016.0A CN106128390A (en) | 2016-08-29 | 2016-08-29 | A kind of TFT LCD liquid crystal display screen delay circuit control method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610754016.0A CN106128390A (en) | 2016-08-29 | 2016-08-29 | A kind of TFT LCD liquid crystal display screen delay circuit control method |
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| CN106128390A true CN106128390A (en) | 2016-11-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610754016.0A Withdrawn CN106128390A (en) | 2016-08-29 | 2016-08-29 | A kind of TFT LCD liquid crystal display screen delay circuit control method |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1014258A (en) * | 1996-06-27 | 1998-01-16 | Matsushita Electric Works Ltd | Power converter |
| CN2593256Y (en) * | 2002-12-10 | 2003-12-17 | 许芸 | Computer protective power source of AC-DC input |
| CN201243214Y (en) * | 2008-04-02 | 2009-05-20 | 曾文健 | Combined uninterruptible power supply apparatus for solar module |
| CN202094711U (en) * | 2010-12-31 | 2011-12-28 | 保定天威集团有限公司 | Direct current supply device capable of obtaining electric energy from cable in service |
| CN202979355U (en) * | 2012-11-30 | 2013-06-05 | 广州众恒光电科技有限公司 | Anti-myopia LED table lamp |
-
2016
- 2016-08-29 CN CN201610754016.0A patent/CN106128390A/en not_active Withdrawn
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1014258A (en) * | 1996-06-27 | 1998-01-16 | Matsushita Electric Works Ltd | Power converter |
| CN2593256Y (en) * | 2002-12-10 | 2003-12-17 | 许芸 | Computer protective power source of AC-DC input |
| CN201243214Y (en) * | 2008-04-02 | 2009-05-20 | 曾文健 | Combined uninterruptible power supply apparatus for solar module |
| CN202094711U (en) * | 2010-12-31 | 2011-12-28 | 保定天威集团有限公司 | Direct current supply device capable of obtaining electric energy from cable in service |
| CN202979355U (en) * | 2012-11-30 | 2013-06-05 | 广州众恒光电科技有限公司 | Anti-myopia LED table lamp |
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Application publication date: 20161116 |
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