CN106126151A - Mosaic screen frame data split multistage synchronous display method - Google Patents
Mosaic screen frame data split multistage synchronous display method Download PDFInfo
- Publication number
- CN106126151A CN106126151A CN201610564190.9A CN201610564190A CN106126151A CN 106126151 A CN106126151 A CN 106126151A CN 201610564190 A CN201610564190 A CN 201610564190A CN 106126151 A CN106126151 A CN 106126151A
- Authority
- CN
- China
- Prior art keywords
- decoder
- video card
- display
- encoder
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
- G06F3/1446—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
- G09G2370/042—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller for monitor identification
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Multimedia (AREA)
- Human Computer Interaction (AREA)
- General Engineering & Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
Mosaic screen frame data split multistage synchronous display method.Use three-color LED light that the gap between liquid crystal display screen is filled with；Each output port of selected video card is write identical EDID data；Each output port of video card is numbered according to the display unit of mosaic screen and the three-color LED light of gap filling；Encoder is that every frame data stamp timestamp；Display signal and the three-color LED light of the video card output after numbering are carried out the display of unity logic screen by pure hardware effort station；Synchronized the timestamp of frame under process by Ethernet interacting message between multiple decoders；Encoder adjusts transmission rate according to the report received.The inventive method writes identical EDID data to each output port of selected video card, each output port of video card is numbered according to the display unit of mosaic screen, solve that display nonsynchronous technical problem occurs between video card, the internal clocking of the display module in each decoder is synchronized.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of mosaic screen frame data and split multistage synchronous display method.
Background technology
Mosaic screen is a complete liquid crystal splicing display unit, can use separately as display, again can be with liquid
Crystalline substance is spliced into jumbotron and uses.Demand is used, it is achieved the variable changeable large-size screen monitors function that also can diminish greatly: single screen is divided according to difference
Cut display, single screen individually shows, combination in any shows, full frame screen display liquid crystal-spliced, perpendicular, the optional compensation of framing mask or screening
Lid.
In present large screen splicing display market application, work station is often equipped with one or more video card, due to LED's
Wall block resolution is certain, and the resolution of every video card delivery the most likely can be caused to be not quite similar, thus nothing
Method is configured as unity logic screen, so will result in and shows nonsynchronous problem between video card.
Summary of the invention
A kind of mosaic screen frame data that the embodiment of the present invention provides split multistage synchronous display method, in order to solve background skill
Problem present in art, technical solution of the present invention is as follows:
A kind of mosaic screen frame data split multistage synchronous display method, including:
Use three-color LED light that the gap between liquid crystal display screen is filled with；
Each output port of selected video card is write identical EDID data；
Each output port of video card is numbered according to the display unit of mosaic screen and the three-color LED light of gap filling；
Encoder is that every frame data stamp timestamp；
Display signal and the three-color LED light of the video card output after numbering are carried out the aobvious of unity logic screen by pure hardware effort station
Show；
It is sequentially connected with by line synchro between multiple decoders, using one of them decoder as main equipment, remaining decoder
As from equipment, main equipment is to from equipment tranmitting data register signal and synchrodata, from equipment by clock signal synchronization oneself
Internal clocking；
Synchronized the timestamp of frame under process by Ethernet interacting message between multiple decoders；
Decoder sends data receiver report to encoder, and described encoder adjusts transmission rate according to the report received；
Every frame data are split into the burst of regular length by encoder, and every frame burst is identified by by incremental sequence number；
Decoder receiver module, after receiving fragment message, checks that sequence number is the most continuous, adds up packet loss, out of order message number, with
And frame timeout number；
Decoder timing sends to encoder and receives report, carries this road signal connecing during this decoder receives in report
Packet receiving sum, number of dropped packets, out of order message number, and frame timeout number；And transmission rate set-up procedure: encoder is according to reception
The report of the decoder arrived adjusts the speed sending data to this decoder.
The inventive method writes identical EDID data to each output port of selected video card, each defeated to video card
Go out port to be numbered according to the display unit of mosaic screen, solve that display nonsynchronous technical problem occurs between video card, will be every
The internal clocking of the display module in individual decoder synchronizes, and is synchronized, the most really by the frame of each decoder inter-process
Realize image synchronization to show on screen.
Detailed description of the invention
A kind of mosaic screen frame data split multistage synchronous display method, including:
Use three-color LED light that the gap between liquid crystal display screen is filled with；
Each output port of selected video card is write identical EDID data；
Each output port of video card is numbered according to the display unit of mosaic screen and the three-color LED light of gap filling；
Encoder is that every frame data stamp timestamp；
Display signal and the three-color LED light of the video card output after numbering are carried out the aobvious of unity logic screen by pure hardware effort station
Show；
It is sequentially connected with by line synchro between multiple decoders, using one of them decoder as main equipment, remaining decoder
As from equipment, main equipment is to from equipment tranmitting data register signal and synchrodata, from equipment by clock signal synchronization oneself
Internal clocking；
Synchronized the timestamp of frame under process by Ethernet interacting message between multiple decoders；
Decoder sends data receiver report to encoder, and described encoder adjusts transmission rate according to the report received；
Every frame data are split into the burst of regular length by encoder, and every frame burst is identified by by incremental sequence number；
Decoder receiver module, after receiving fragment message, checks that sequence number is the most continuous, adds up packet loss, out of order message number, with
And frame timeout number；
Decoder timing sends to encoder and receives report, carries this road signal connecing during this decoder receives in report
Packet receiving sum, number of dropped packets, out of order message number, and frame timeout number；And transmission rate set-up procedure: encoder is according to reception
The report of the decoder arrived adjusts the speed sending data to this decoder.
The inventive method writes identical EDID data to each output port of selected video card, each defeated to video card
Go out port to be numbered according to the display unit of mosaic screen, solve that display nonsynchronous technical problem occurs between video card, will be many
The system clock of individual decoder synchronizes, and is synchronized by the internal clocking of the display module in each decoder, by each decoder
The frame that portion processes synchronizes, and the most really realizes image synchronization and shows on screen.
Finally it is noted that the foregoing is only the preferred embodiments of the present invention, it is not limited to the present invention,
Although being described in detail the present invention with reference to previous embodiment, for a person skilled in the art, it still may be used
So that the technical scheme described in foregoing embodiments to be modified, or wherein portion of techniques feature is carried out equivalent.
All within the spirit and principles in the present invention, any modification, equivalent substitution and improvement etc. made, should be included in the present invention's
Within protection domain.
Claims (1)
1. mosaic screen frame data split multistage synchronous display method, it is characterised in that including:
Use three-color LED light that the gap between liquid crystal display screen is filled with；Each output port of selected video card is write phase
Same EDID data；
Each output port of video card is numbered according to the display unit of mosaic screen and the three-color LED light of gap filling；Compile
Code device is that every frame data stamp timestamp；
Display signal and the three-color LED light of the video card output after numbering are carried out the aobvious of unity logic screen by pure hardware effort station
Show；
It is sequentially connected with by line synchro between multiple decoders, using one of them decoder as main equipment, remaining decoder
As from equipment, main equipment is to from equipment tranmitting data register signal and synchrodata, from equipment by clock signal synchronization oneself
Internal clocking；
Synchronized the timestamp of frame under process by Ethernet interacting message between multiple decoders；Decoder sends to encoder
Data receiver is reported, described encoder adjusts transmission rate according to the report received；
Every frame data are split into the burst of regular length by encoder, and every frame burst is identified by by incremental sequence number；
Decoder receiver module, after receiving fragment message, checks that sequence number is the most continuous, adds up packet loss, out of order message number, with
And frame timeout number；
Decoder timing sends to encoder and receives report, carries this road signal connecing during this decoder receives in report
Packet receiving sum, number of dropped packets, out of order message number, and frame timeout number；And transmission rate set-up procedure: encoder is according to reception
The report of the decoder arrived adjusts the speed sending data to this decoder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610564190.9A CN106126151A (en) | 2016-07-18 | 2016-07-18 | Mosaic screen frame data split multistage synchronous display method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610564190.9A CN106126151A (en) | 2016-07-18 | 2016-07-18 | Mosaic screen frame data split multistage synchronous display method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106126151A true CN106126151A (en) | 2016-11-16 |
Family
ID=57283843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610564190.9A Pending CN106126151A (en) | 2016-07-18 | 2016-07-18 | Mosaic screen frame data split multistage synchronous display method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106126151A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107068089A (en) * | 2017-04-21 | 2017-08-18 | 安徽森度科技有限公司 | Mosaic screen synchronous display method |
| CN112995737A (en) * | 2021-05-10 | 2021-06-18 | 北京小鸟科技股份有限公司 | Distributed network screen-on-screen synchronization method, system and equipment for multi-screen display card output |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101968730A (en) * | 2010-10-27 | 2011-02-09 | 广东威创视讯科技股份有限公司 | Interactive synchronous processing method and system for multiprocessor cascading signal transmission data |
| CN103065610A (en) * | 2013-01-08 | 2013-04-24 | 北京淳中视讯科技有限公司 | Split joint screen synchronous disposal method and split joint screen synchronous disposal device |
| CN103135955A (en) * | 2012-10-17 | 2013-06-05 | 深圳市骄阳数字图像技术有限责任公司 | Splicing screen synchronizer with a large resolution ratio |
| CN105609014A (en) * | 2016-04-01 | 2016-05-25 | 北京小鸟科技发展有限责任公司 | Implementation method for seamless splicing point-to-point display of liquid crystal screens |
| CN105635752A (en) * | 2016-01-27 | 2016-06-01 | 广州偕作信息科技有限公司 | Multi-level synchronous display system and method used for distributed splicing screen |
| CN105700837A (en) * | 2015-12-30 | 2016-06-22 | 广东威创视讯科技股份有限公司 | Splice screen synchronous displaying method, device and system |
-
2016
- 2016-07-18 CN CN201610564190.9A patent/CN106126151A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101968730A (en) * | 2010-10-27 | 2011-02-09 | 广东威创视讯科技股份有限公司 | Interactive synchronous processing method and system for multiprocessor cascading signal transmission data |
| CN103135955A (en) * | 2012-10-17 | 2013-06-05 | 深圳市骄阳数字图像技术有限责任公司 | Splicing screen synchronizer with a large resolution ratio |
| CN103065610A (en) * | 2013-01-08 | 2013-04-24 | 北京淳中视讯科技有限公司 | Split joint screen synchronous disposal method and split joint screen synchronous disposal device |
| CN105700837A (en) * | 2015-12-30 | 2016-06-22 | 广东威创视讯科技股份有限公司 | Splice screen synchronous displaying method, device and system |
| CN105635752A (en) * | 2016-01-27 | 2016-06-01 | 广州偕作信息科技有限公司 | Multi-level synchronous display system and method used for distributed splicing screen |
| CN105609014A (en) * | 2016-04-01 | 2016-05-25 | 北京小鸟科技发展有限责任公司 | Implementation method for seamless splicing point-to-point display of liquid crystal screens |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107068089A (en) * | 2017-04-21 | 2017-08-18 | 安徽森度科技有限公司 | Mosaic screen synchronous display method |
| CN112995737A (en) * | 2021-05-10 | 2021-06-18 | 北京小鸟科技股份有限公司 | Distributed network screen-on-screen synchronization method, system and equipment for multi-screen display card output |
| CN112995737B (en) * | 2021-05-10 | 2021-07-30 | 北京小鸟科技股份有限公司 | Distributed network screen-on-screen synchronization method, system and equipment for multi-screen display card output |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105635752B (en) | A kind of multistage synchronous display system and display methods for distributed mosaic screen | |
| CN105975237A (en) | Multi-stage synchronous display method for spliced screen | |
| CN103165104A (en) | Video signal synchronously displaying method of spliced screen | |
| US20080240169A1 (en) | Method, system and device for clock transmission between sender and receiver | |
| US20080129868A1 (en) | Method and Apparatus For Providing A Synchronized Video Presentation Without Video Tearing | |
| CN103986960A (en) | Method for single-video picture division route teletransmission precise synchronization tiled display | |
| CN102226943A (en) | System and method for realizing screen splicing | |
| CN102938676A (en) | Method, device and system for processing time synchronization | |
| EP1343090A3 (en) | Distributed resource architecture and system | |
| CN105979335A (en) | Novel multistage synchronous display method for spliced screen | |
| CN107068089A (en) | Mosaic screen synchronous display method | |
| CN106412633A (en) | Screen mapping method and display clock synchronization control method and system of distributed multi-screen splicing controller | |
| US20040101077A1 (en) | Method for synchronization through accelerated advance of counters | |
| CN106097917A (en) | The multistage synchronous display method of mosaic screen | |
| EP1450568A2 (en) | Method for transmitting signals in a projection system and projection system which applies such method | |
| CN106126151A (en) | Mosaic screen frame data split multistage synchronous display method | |
| CN107135329A (en) | A kind of multistage synchronization video monitoring method of mosaic screen | |
| WO2007120974A3 (en) | Wireless video link synchronization | |
| CN106656385A (en) | Air interface time synchronization method and device for relay system | |
| US7003062B1 (en) | Method and system for distribution of clock and frame synchronization information | |
| US6751239B2 (en) | Immersive visualization theater system and method | |
| CN113424466B (en) | Method and device for clock synchronization | |
| US10224005B2 (en) | Driving device and driving method | |
| US9973747B2 (en) | Method for the synchronization of 3D devices and corresponding synchronization device | |
| KR101140323B1 (en) | Multivision system and frame synchronization method between video play apparatuses |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20161116 |