CN106026640A

CN106026640A - Buck-boost switching circuit and control method thereof

Info

Publication number: CN106026640A
Application number: CN201610472166.2A
Authority: CN
Inventors: 欧阳茜
Original assignee: Chengdu Monolithic Power Systems Co Ltd
Current assignee: Chengdu Monolithic Power Systems Co Ltd
Priority date: 2016-06-24
Filing date: 2016-06-24
Publication date: 2016-10-12
Anticipated expiration: 2036-06-24
Also published as: CN106026640B

Abstract

The invention provides a buck-boost switching circuit. The buck-boost switching circuit: in the voltage reduction mode, a fixed-duration on circuit or a fixed-duration off circuit is adopted to control a voltage reduction switch pair; in the boosting mode, a fixed-duration on circuit or a fixed-duration off circuit is adopted to control a boosting switch pair; and under the voltage boosting and reducing mode, a fixed-time-length switching-on circuit or a fixed-time-length switching-off circuit is adopted to simultaneously control the voltage reducing switch pair and the voltage boosting switch pair. And the voltage-boosting and voltage-reducing switching circuit realizes the constant voltage and constant current output of the system by adopting a mode of combining voltage feedback and current feedback, and can be applied to a battery control system. The buck-boost switching circuit provided by the invention does not need a loop compensation circuit, and is simple in circuit structure. Meanwhile, the buck-boost switching circuit provided by the invention is convenient to switch each working mode, can realize seamless butt joint of each working mode, and has better transient characteristics.

Description

Buck on-off circuit and control method thereof

Technical field

The present invention relates to a kind of electronic circuit, it is more particularly related to a kind of on-off circuit and control method thereof.

Background technology

Buck on-off circuit has boost mode, decompression mode and three kinds of mode of operations of buck-boost mode.Under normal circumstances, when input voltage is higher than output voltage, buck on-off circuit works in decompression mode；When the input voltage is lower than the output voltage, buck on-off circuit works in boost mode；When input voltage and output voltage are close, buck on-off circuit works in buck-boost mode.

Fig. 1 shows traditional buck on-off circuit 10.Described buck on-off circuit 10 includes: the first power switch PA and the second power switch PB, is coupled between input voltage vin and ground；3rd power switch PC and the 4th power switch PD, is coupled between output voltage Vout and ground；Inductance L1, is coupled between the first power switch PA and the junction point of the second power switch PB and the 3rd power switch PC and the junction point of the 4th power switch PD；Output capacitance Cout is coupled between output voltage and ground；Error amplifier 101, receives feedback signal Vfb characterizing output voltage Vout and reference signal Vref, and the difference exporting both amplifies signal Vcom；Comparator 102, receives current detection signal Vcs1 and difference amplification the signal Vcom, output switch control signal PWM_1 characterizing the electric current flowing through inductance L1 under decompression mode；Comparator 103, receives current detection signal Vcs2 and difference amplification the signal Vcom, output switch control signal PWM_2 characterizing the electric current flowing through inductance L1 under boost mode；Drive circuit 104, receive switch controlling signal PWM_1 and switch controlling signal PWM_2, export the first switch controlling signal GA, second switch control signal GB, the 3rd switch controlling signal GC and the 4th switch controlling signal GD control the first power switch PA, the second power switch PB, the 3rd power switch PC and the 4th power switch PD respectively.Described first power switch PA, the second power switch PB, the 3rd power switch PC and the 4th power switch PD respectively control signal GA, GB, GC and GD control under turn-on and turn-off in an orderly manner, to control output voltage Vout and to flow through the electric current of load RL.

In the buck on-off circuit 10 shown in Fig. 1, owing to the dutycycle of each switch is controlled by error amplification signal Vcom, therefore, the ripple of error amplification signal Vcom and noise will cause the switching harmonics of the output voltage under buck-boost mode and in each mode handover procedure.Meanwhile, in the case of underloading, buck on-off circuit 10 inefficient, and the switching of each pattern has bigger sluggishness, and the ripple causing output voltage is bigger.Additionally, the buck on-off circuit 10 shown in Fig. 1 merely illustrates the control circuit of part.In actual applications, the circuit structure of buck on-off circuit 10 is sufficiently complex.

Therefore, there is a need to propose a kind of circuit structure simple, pattern easy switching, and the buck on-off circuit that output voltage ripple is less.

Summary of the invention

One or more technical problems in view of prior art, it is proposed that a kind of buck on-off circuit and control method thereof.

Embodiment according to this technology, propose the control circuit of a kind of buck on-off circuit, described buck on-off circuit includes receiving the input port of input voltage, providing the output port of output voltage, inductance, the first power switch, the second power switch, the 3rd power switch and the 4th power switch, described control circuit includes: mode selection circuit, relatively input voltage and the value of output voltage, enables signal according to comparative result output buck and boosting enables signal；Mode control circuit, based on feedback signal, reference signal, blood pressure lowering enables signal and boosting enables signal, output has the first duty cycle adjustment signal and the second duty cycle adjustment signal of fixing conducting duration, or output has fixing the first duty cycle adjustment signal turning off duration and the second duty cycle adjustment signal；And driving logic circuit, based on the first duty cycle adjustment signal and the second duty cycle adjustment signal, export the first switch controlling signal, second switch control signal, the 3rd switch controlling signal and the 4th switch controlling signal and control the first power switch, the second power switch, the 3rd power switch and the break-make of the 4th power switch respectively.

In one embodiment, described mode control circuit includes: feedback comparison circuit, receives reference signal and feedback signal, and according to reference signal and the comparative result of feedback signal, output feedback ontrol signal；First fixing conducting duration control circuit, receive feedback control signal, blood pressure lowering enables signal and boosting enables signal, export the first duty cycle adjustment signal, wherein, when blood pressure lowering enable signal is effective, described first duty cycle adjustment signal is the pulse width signal with the first fixing conducting duration, when boosting enable signal is effective, described first duty cycle adjustment signal is the pulse width signal with the second fixing conducting duration, when blood pressure lowering enables signal and boosting enable signal is the most invalid, described first duty cycle adjustment signal is the pulse width signal with the 3rd fixing conducting duration；Delay circuit, receives feedback control signal, and output has the delay control signal of default delay duration compared with feedback control signal；And the second fixing conducting duration control circuit, reception delay control signal, blood pressure lowering enable signal and boosting enables signal, export the second duty cycle adjustment signal, wherein, when blood pressure lowering enables signal or boosting enable signal is effective, described second duty cycle adjustment signal has unity logic level, and when blood pressure lowering enables signal and boosting enable signal is the most invalid, described second duty cycle adjustment signal is the pulse width signal with the 4th fixing conducting duration.

In one embodiment, described the 4th default fixing conducting duration is later than the 3rd fixing conducting duration to start, and terminates early than the 3rd fixing conducting duration.

In one embodiment, described mode control circuit includes: feedback comparison circuit, receives reference signal and feedback signal, and according to reference signal and the comparative result of feedback signal, output feedback ontrol signal；First fixing shutoff duration control circuit, receive feedback control signal, blood pressure lowering enables signal and boosting enables signal, export the first duty cycle adjustment signal, wherein, when blood pressure lowering enable signal is effective, described first duty cycle adjustment signal is to have the first fixing pulse width signal turning off duration, when boosting enable signal is effective, described first duty cycle adjustment signal is to have the second fixing pulse width signal turning off duration, when blood pressure lowering enables signal and boosting enable signal is the most invalid, described first duty cycle adjustment signal is to have the 3rd fixing pulse width signal turning off duration；And second fixing turn off duration control circuit, receive feedback control signal, blood pressure lowering enables signal and boosting enables signal, export the second duty cycle adjustment signal, wherein, when blood pressure lowering enables signal or boosting enable signal is effective, described second duty cycle adjustment signal has unity logic level, and when blood pressure lowering enables signal and boosting enable signal is the most invalid, described second duty cycle adjustment signal is to have the 4th fixing pulse width signal turning off duration.

In one embodiment, described default 4th fixing duration the turn off duration fixing with the 3rd that turn off starts simultaneously at or is later than the 3rd fixing duration that turns off and start, and is later than the 3rd fixing shutoff duration and terminates.

Embodiment according to this technology, also proposed a kind of buck on-off circuit, including being coupled in series in input voltage and with reference to the first power switch between ground and the second power switch, it is coupled in series in output voltage and with reference to the 3rd power switch between ground and the 4th power switch, and it is coupled in the first power switch and the junction point of the second power switch, and the inductance between the 3rd power switch and the junction point of the 4th power switch, it is characterized in that, including: mode selection circuit, relatively input voltage and the value of output voltage, enable signal according to comparative result output buck and boosting enables signal；Mode control circuit, based on feedback signal, reference signal, blood pressure lowering enables signal and boosting enables signal, exports the first duty cycle adjustment signal and the second duty cycle adjustment signal；And driving logic circuit, based on the first duty cycle adjustment signal and the second duty cycle adjustment signal, export the first switch controlling signal, second switch control signal, the 3rd switch controlling signal and the 4th switch controlling signal and control the first power switch, the second power switch, the 3rd power switch and the break-make of the 4th power switch respectively.

Embodiment according to this technology, also proposed the control method of a kind of buck on-off circuit, described buck on-off circuit includes inductance, the first power switch, the second power switch, the 3rd power switch and the 4th power switch, and described control method includes: determine the mode of operation of buck on-off circuit according to the input voltage of buck on-off circuit and the value of output voltage；nullIf buck on-off circuit works in buck mode，Keep the 4th power switch conducting，3rd power switch turns off，And when characterizing the feedback signal of output voltage less than voltage reference signal and when characterizing the feedback signal of inductive current less than current reference signal，Turn on the first power switch，Simultaneously turn off the second power switch，When the first power switch turns on the first fixing conducting duration that duration reaches default，Turn off the first power switch，Simultaneously turn on the second power switch，And again compare the value of input voltage and output voltage，If comparative result maintains buck on-off circuit to work in buck mode，Then until voltage feedback signal again less than voltage reference signal and current feedback signal again less than current reference signal time，Again turn on the first power switch，Simultaneously turn off the second power switch，Start another switch periods；If buck on-off circuit is operated under boost mode, the first power switch is kept to turn off, second power switch conducting, and when voltage feedback signal is less than current reference signal less than voltage reference signal and current feedback signal, turn on the 3rd power switch, simultaneously turn off the 4th power switch, when the 3rd power switch turns on the second fixing conducting duration that duration reaches default, turn off the 3rd power switch, simultaneously turn on the 4th power switch, and again compare the value of input voltage and output voltage, if comparative result maintains buck on-off circuit to be operated under boost mode, until voltage feedback signal again less than voltage reference signal and current feedback signal again less than current reference signal, conducting the 3rd power switch again, simultaneously turn off the 4th power switch, start another switch periods；nullAnd if buck on-off circuit is operated under buck-boost mode，When voltage feedback signal is less than current reference signal less than voltage reference signal and current feedback signal，Turn on the first power switch，Simultaneously turn off the second power switch，Now，3rd power switch turns off，4th power switch conducting，One section of default delay time is begun to pass through from the first power switch turn-on instant，3rd power switch conducting，4th power switch turns off，When after the 4th fixing conducting duration that the conducting duration of the 3rd power switch reaches default，Turn off the 3rd power switch to lead，Turn on the 4th power switch，When the conducting duration of the first power switch reaches the 3rd default fixing conducting duration，First power switch turns off，Second power switch conducting，And again compare the value of input voltage and output voltage，If comparative result maintains buck on-off circuit to be operated under buck-boost mode，Until voltage feedback signal again less than voltage reference signal and current feedback signal again less than current reference signal time，First power switch and the conducting of the 4th power switch，Second power switch and the 3rd power switch turn off，Start next switch periods.

Embodiment according to this technology, also proposed the control method of a kind of buck on-off circuit, described buck on-off circuit includes inductance, the first power switch, the second power switch, the 3rd power switch and the 4th power switch, and described control method includes: determine the mode of operation of buck on-off circuit according to the input voltage of buck on-off circuit and the value of output voltage；nullIf buck on-off circuit works in buck mode，Keep the 4th power switch conducting，3rd power switch turns off，And when the voltage feedback signal characterizing output voltage is more than current reference signal more than the current feedback signal of voltage reference signal or sign inductive current，Turn off the first power switch，Simultaneously turn on the second power switch，When turning off the first fixing shutoff duration that duration reaches default of the first power switch，Turn on the first power switch，Simultaneously turn off the second power switch，And again compare the value of input voltage and output voltage，If comparative result maintains buck on-off circuit to work in buck mode，During until voltage feedback signal is more than current reference signal again more than voltage reference signal or current feedback signal again，Again turn off the first power switch，Simultaneously turn on the second power switch，Start another switch periods；If buck on-off circuit is operated under boost mode, the first power switch is kept to turn off, second power switch conducting, and when voltage feedback signal is more than current reference signal more than voltage reference signal or current feedback signal, turn off the 3rd power switch, simultaneously turn on the 4th power switch, when the 3rd power switch turns off the second fixing shutoff duration that duration reaches default, turn on the 3rd power switch, simultaneously turn off the 4th power switch, and again compare the value of input voltage and output voltage, if comparative result maintains buck on-off circuit to be operated under boost mode, until voltage feedback signal is more than current reference signal again more than voltage reference signal or current feedback signal again, again turn off the 3rd power switch, simultaneously turn on the 4th power switch, start another switch periods；nullAnd if buck on-off circuit is operated under buck-boost mode，When voltage feedback signal is more than current reference signal more than voltage reference signal or current feedback signal，Turn off the first power switch，Simultaneously turn on the second power switch，Now，3rd power switch turns off，4th power switch conducting，When the first power switch turns off the 3rd fixing shutoff duration that duration reaches default，Turn on the 3rd power switch，Turn off the 4th power switch，When after the 4th fixing shutoff duration that the shutoff duration of the 3rd power switch reaches default，Turn on the 3rd power switch，Turn off the 4th power switch，And again compare the value of input voltage and output voltage，If comparative result maintains buck on-off circuit to be operated under buck-boost mode，During until voltage feedback signal is more than current reference signal again more than voltage reference signal or current feedback signal again，First power switch and the 3rd power switch turn off，Second power switch and the conducting of the 4th power switch，Start next switch periods.

The buck on-off circuit provided according to the above-mentioned each side of the present invention and control method thereof, circuit structure loop is simple, pattern easy switching, it is not necessary to uses error amplifier and compensates circuit, not only having preferable stability, and have less output voltage ripple.Further, when being used for battery control system according to the buck on-off circuit of the present invention, the automatic switchover of constant current constant voltage pattern can be realized.

Accompanying drawing explanation

In order to be better understood from the present invention, will describe the present invention according to the following drawings:

Fig. 1 shows traditional buck on-off circuit 10；

Fig. 2 shows the electrical block diagram of buck on-off circuit 20 according to an embodiment of the invention；

Fig. 3 shows the electrical block diagram of mode selection circuit 30 according to an embodiment of the invention；

Fig. 4 shows the electrical block diagram of mode control circuit 40 according to an embodiment of the invention；

Fig. 5 shows and first fixes duration control circuit 50 according to an embodiment of the invention；

Fig. 6 shows the electrical block diagram feeding back comparison circuit 60 according to an embodiment of the invention；

Fig. 7 shows each signal waveforms under buck on-off circuit 20 works in decompression mode according to an embodiment of the invention；

Fig. 8 shows each signal waveforms under buck on-off circuit 20 works in buck-boost mode according to an embodiment of the invention；

Fig. 9 shows the electrical block diagram of driving logic circuit 90 according to an embodiment of the invention；

The waveform diagram of switch controlling signal GA～GD when Figure 10 shows Fig. 9 circuit and Fig. 4 circuit connected applications；

Figure 11 shows the control method 110 of buck on-off circuit according to an embodiment of the invention.

Figure 12 shows the control method 120 of buck on-off circuit according to an embodiment of the invention.

Detailed description of the invention

The specific embodiment of the present invention is described more fully below, it should be noted that the embodiments described herein is served only for illustrating, and is not limited to the present invention.In the following description, in order to provide thorough understanding of the present invention, elaborate a large amount of specific detail.It will be apparent, however, to one skilled in the art that: these specific detail need not be used to carry out the present invention.In other instances, in order to avoid obscuring the present invention, do not specifically describe known circuit, material or method.

Throughout the specification, " embodiment ", " embodiment ", " example " or " example " is mentioned and being meaned: the special characteristic, structure or the characteristic that combine this embodiment or example description are comprised at least one embodiment of the present invention.Therefore, it is not necessarily all referring to same embodiment or example in the local phrase " in one embodiment " that occurs of each of entire disclosure, " in an embodiment ", " example " or " example ".Furthermore, it is possible to any suitable combination and/or sub-portfolio by specific feature, structure or property combination in one or more embodiments or example.Additionally, it should be understood by one skilled in the art that accompanying drawing is provided to descriptive purpose provided herein, and accompanying drawing is not necessarily drawn to scale.Should be appreciated that it can be to be directly connected or coupled to another element or can there is intermediary element when claiming element " to be connected to " or during " being couple to " another element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, there is not intermediary element.The element that identical reference instruction is identical.Term "and/or" used herein includes any and all combination of one or more relevant project listed.

Fig. 2 shows the electrical block diagram of buck on-off circuit 20 according to an embodiment of the invention.As in figure 2 it is shown, buck on-off circuit 20 includes: input port 24, receive input voltage vin；Output port 25, it is provided that output voltage Vout；Step-down switching pair, including the first power switch PA being coupled in series between input port 24 and ground and the second power switch PB；Boosted switch pair, including the 3rd power switch PC being coupled in series between output port 25 and ground and the 4th power switch PD；Inductance L1, is coupled between the junction point of step-down switching pair and the junction point of boosted switch pair；Mode selection circuit 21, compares input voltage vin and the value of output voltage Vout, enables signal Buck_en according to comparative result output buck and boosting enables signal Boost_en；Mode control circuit 22, based on feedback signal FB, reference signal REF, blood pressure lowering enables signal Buck_en and boosting enables signal Boost_en, exports the first duty cycle adjustment signal PWM1 and the second duty cycle adjustment signal PWM2；And driving logic circuit 23, receive the first duty cycle adjustment signal PWM1 and the second duty cycle adjustment signal PWM2, export the first switch controlling signal GA, second switch control signal GB, the 3rd switch controlling signal GC and the 4th switch controlling signal GD control the first power switch PA, the second power switch PB, the 3rd power switch PC and the break-make of the 4th power switch PD respectively.Described first power switch PA, the second power switch PB, the 3rd power switch PC and the 4th power switch PD turn-on and turn-off in an orderly manner under the control of switch controlling signal GA, GB, GC and GD respectively, to control output voltage Vout and to flow through the electric current of load RL.

In one embodiment, described power switch PA～PD includes any controllable semiconductor switch, such as metal oxide semiconductor field effect tube, bipolar transistor etc..

Fig. 3 shows the electrical block diagram of mode selection circuit 30 according to an embodiment of the invention.As shown in Figure 3, described mode selection circuit 30 includes: the first comparator 301, there is first input end, the second input and outfan, described first input end receives the first voltage signal VT1 proportional to output voltage, described second input receives input voltage vin, based on the first voltage signal VT1 and input voltage vin, described outfan output buck enables signal Buck_en；And second comparator 302, there is first input end, the second input and outfan, described first input end receives the second voltage signal VT2 proportional to output voltage, described second input receives input voltage vin, based on the second voltage signal VT2 and input voltage vin, the output boosting of described outfan enables signal Boost_en.

In one embodiment, the value of described first voltage signal VT1 is K1 × Vout, the value of described second voltage signal VT2 is K2 × Vout, and the value of described Proportional coefficient K 1 is more than 1, the value of described Proportional coefficient K 2 is more than 0 and less than 1, i.e. K1 ＞ 1,0 ＜ K2 ＜ 1.In one embodiment, described first comparator 301 and the second comparator 302 are hysteresis comparator, and its retarding window can need according to reality application and adjust.

In one embodiment, described mode selection circuit 30 can also be by comparing output voltage Vout and the value with the voltage signal of input voltage vin proportion relation reaches to select the purpose of different working modes.

In one embodiment, the inverting input of described first comparator 301 receives the first voltage signal VT1, and normal phase input end receives input voltage vin；The inverting input of described second comparator 302 receives the second voltage signal VT2, and normal phase input end receives input voltage vin.When the value of input voltage vin is more than or equal to K1 × Vout, it is high level that the blood pressure lowering of described first comparator 301 output enables signal Buck_en, i.e. blood pressure lowering enables signal Buck_en effectively, and described buck on-off circuit 20 works in decompression mode；When the value of input voltage vin is less than or equal to K2 × Vout, it is high level that the boosting of described second comparator 302 output enables signal, i.e. boosting enable signal Boost_en is effective, and described buck on-off circuit 20 works in boost mode.

In one embodiment, described mode selection circuit 30 also includes logic circuit 303, and described logic circuit receives blood pressure lowering and enables signal Buck_en and boosting enable signal Boost_en, and output buck enables signal Buck-Boost_en.When described blood pressure lowering enables signal Buck_en and boosting enable signal Boost_en is invalid, it is effective that described buck enables signal Buck-Boost_en.I.e. when the value of input voltage vin is less than K1 × Vout, and during more than K2 × Vout, described blood pressure lowering enables signal Buck_en and boosting enables signal Boost_en and is low level, it is high level that the buck of the most described logic circuit 303 output enables signal Buck-Boost_en, i.e. buck enables signal Buck-Boost_en effectively, and described buck on-off circuit 20 works in buck-boost mode.

In one embodiment, described selection logic circuit 303 uses OR-NOT circuit.

Described buck enables signal Buck-Boost_en and is not necessarily required to signal.In one embodiment, when blood pressure lowering enables signal Buck_en and boosting enable signal Boost_en is the most invalid, described buck on-off circuit 20 just works under buck-boost mode.The most described blood pressure lowering enables signal Buck_en and boosting enable signal Boost_en and can control buck on-off circuit 20 and work in decompression mode, boost mode or buck-boost mode respectively.

Those of ordinary skill in the art it should be understood that described blood pressure lowering enables signal Buck_en, boosting enables signal Boost_en and buck enable signal Buck-Boost_en can be with other level forms as effective status.Such as in circuit shown in Fig. 3, when the normal phase input end of comparator 301 receives voltage signal VT1, inverting input receives input voltage vin, and the normal phase input end of comparator 302 receives input voltage vin, inverting input receives voltage signal VT2, when logic circuit 303 uses NAND gate circuit simultaneously, blood pressure lowering enables signal Buck_en, boosting enables signal Boost_en and buck enable signal Buck-Boost_en is then Low level effective.

Fig. 4 shows the electrical block diagram of mode control circuit 40 according to an embodiment of the invention.As shown in Figure 4, described mode control circuit 40 includes: feedback comparison circuit 401, receives reference signal REF and feedback signal FB, and according to reference signal REF and the comparative result of feedback signal FB, output feedback ontrol signal FB_ctrl；First fixes duration control circuit 402, receive feedback control signal FB_ctrl, blood pressure lowering enables signal Buck_en and boosting enables signal Boost_en, export the first duty cycle adjustment signal PWM1, wherein, when blood pressure lowering enable signal Buck_en is effective, described first duty cycle adjustment signal PWM1 is the pulse width signal with the first fixing conducting duration Ton1, when boosting enable signal Boost_en is effective, described first duty cycle adjustment signal PWM2 is the pulse width signal with the second fixing conducting duration Ton2, when blood pressure lowering enables signal Buck_en and boosting enable signal Boost_en is the most invalid, described first duty cycle adjustment signal PWM1 is the pulse width signal with the 3rd fixing conducting duration Ton3；Delay circuit 403, receives feedback control signal FB_ctrl, and output has the delay control signal DFB_ctrl of default delay duration TDelay compared with feedback control signal FB_ctrl；And second fix duration control circuit 404, receive feedback control signal FB_ctrl, blood pressure lowering enables signal Buck_en and boosting enables signal Boost_en, export the second duty cycle adjustment signal PWM2, wherein, when blood pressure lowering enables signal Buck_en or boosting enable signal Boost_en is effective, described second duty cycle adjustment signal PWM2 has unity logic level, when blood pressure lowering enables signal Buck_en and boosting enable signal Boost_en is the most invalid, described second duty cycle adjustment signal PWM2 is the pulse width signal with the 4th fixing conducting duration Ton4.

In one embodiment, when blood pressure lowering enables signal Buck_en or boosting enable signal Boost_en is effective, described second duty cycle adjustment signal PWM2 is logic-low signal.Described first duty cycle adjustment signal PWM1 and the second duty cycle adjustment signal PWM2 is logic high during fixing conducting duration, is logic low in other times section.

In one embodiment, the first of described first duty cycle adjustment signal PWM1 fixing conducting duration Ton1, the second fixing conducting duration Ton2 and the 3rd fixing conducting duration Ton3 are corresponding in a switch periods of buck on-off circuit 20, and described first duty cycle adjustment signal PWM1 controls the conducting duration of the first power switch PA.

In one embodiment, the 4th of described second duty cycle adjustment signal PWM2 fixing conducting duration Ton4 is corresponding in a switch periods of buck on-off circuit 20, and described second duty cycle adjustment signal PWM2 controls the conducting duration of the 3rd power switch PC.

In one embodiment: when blood pressure lowering enable signal Buck_en effective time, a length of first fixing conducting duration Ton1 during the logic high of described first duty cycle adjustment signal PWM1；When boosting enable signal Boost_en effective time, a length of second fixing conducting duration Ton2 during the logic high of described first duty cycle adjustment signal PWM1；When blood pressure lowering enable signal Buck_en and boosting enable signal Boost_en the most invalid time, the most described buck enable signal Buck-Boost_en effective time, a length of 3rd fixing conducting duration Ton3 during the logic high of described first duty cycle adjustment signal PWM1.

In one embodiment, when blood pressure lowering enables signal Buck_en or boosting enable signal Boost_en is effective, described second duty cycle adjustment signal PWM2 is logic-low signal；When blood pressure lowering enable signal Buck_en and boosting enable signal Boost_en the most invalid time, the most described buck enable signal Buck-Boost_en effective time, a length of 4th fixing conducting duration Ton4 during the logic high of described second duty cycle adjustment signal PWM2.

Those of ordinary skill in the art it should be understood that described fixing conducting duration Ton1～Ton4 can also be described first duty cycle adjustment signal PWM1 and the logic low duration of the second duty cycle adjustment signal PWM2.If correspondingly amendment circuit logic.Such as, the logic low duration of the first duty cycle adjustment signal PWM1 is corresponded to the conducting duration of the first power switch PA.

The described first fixing duration Ton1 of conducting, the second fixing conducting duration Ton2, the 3rd fixing conducting duration Ton3 and the 4th fix the time span of conducting duration Ton4 can be different according to the difference of systematic parameter.

Described fixing duration control circuit has multiple implementation, such as, can be realized by the combination of rest-set flip-flop and delay circuit.

Fig. 5 shows and first fixes duration control circuit 50 according to an embodiment of the invention.Described first fixes duration control circuit 50 includes rest-set flip-flop FF1 and short impulse circuit 501～503.Described feedback control signal FB_ctrl set rest-set flip-flop FF1 so that it is export the first duty cycle adjustment signal PWM1.Meanwhile, feedback control signal FB_ctrl exports reset signal RT1～RT3 after short impulse circuit 501～503 respectively.Described reset signal RT1 has the delay duration of the first constant conduction duration Ton1 relative to feedback control signal FB_ctrl, described reset signal RT2 has the delay duration of the second constant conduction duration Ton2 relative to feedback control signal FB_ctrl, and described reset signal RT3 has the delay duration of the 3rd constant conduction duration Ton3 relative to feedback control signal FB_ctrl.When blood pressure lowering enable signal Buck_en is effective, switch S1 Guan Bi, after rest-set flip-flop FF1 set after the first fixing conducting duration Ton1, described reset signal RT1 reset rest-set flip-flop FF1, so that the first duty cycle adjustment signal PWM1 has the first fixing conducting duration Ton1.When boosting enable signal Boost_en is effective, switch S2 Guan Bi, after rest-set flip-flop FF1 set after the second fixing conducting duration Ton2, described reset signal RT2 reset rest-set flip-flop FF1, so that the first duty cycle adjustment signal PWM1 has the second fixing conducting duration Ton2.When buck enable signal Buck-Boost_en is effective, switch S3 Guan Bi, after rest-set flip-flop FF1 set after the 3rd fixing conducting duration Ton3, described reset signal RT3 reset rest-set flip-flop FF1, so that the first duty cycle adjustment signal PWM1 has the 3rd fixing conducting duration Ton3.

Described buck enables signal Buck-Boost_en and can obtain, as shown in Figure 3 by blood pressure lowering enables signal Buck_en and the logical operations of boosting enable signal Boost_en.

In one embodiment, described short impulse circuit 501～503 includes delay circuit.Described short impulse circuit 501～503 is those skilled in the art's common technology means, the most reinflated narration.

Described second fixes duration control circuit 404, and fix duration control signal 402 with first similar, for simplicity, no longer describes in detail.

In one embodiment, when blood pressure lowering enables signal Buck_en effectively, and described buck on-off circuit 20 works in buck mode.Now, the 4th power switch PD is held on, and the 3rd power switch PC is held off, and step-down switching to PA and PB break-make in an orderly manner under the control of the first duty cycle adjustment signal PWM1, passes to the energy of outfan controlling input.

In one embodiment, described feedback comparison circuit 401 includes that comparator, described feedback signal FB include characterizing the voltage feedback signal Vfb of output voltage Vout, and described reference signal REF includes voltage reference signal Vref.

In one embodiment, described feedback comparison circuit 401 includes that comparator, described feedback signal FB include characterizing the current feedback signal Ifb of inductive current IL, and described reference signal REF includes current reference signal Iref.

In one embodiment, described feedback signal FB includes the voltage feedback signal Vfb characterizing output voltage Vout and characterizes the current feedback signal Ifb of inductive current, and described reference signal REF includes voltage reference signal Vref and current reference signal Iref.Fig. 6 shows the electrical block diagram feeding back comparison circuit 60 according to an embodiment of the invention.As shown in Figure 6, described feedback comparison circuit 60 includes: Voltage Feedback compares device 601, receive voltage feedback signal Vfb and voltage reference signal Vref, and based on voltage feedback signal Vfb and the comparative result of voltage reference signal Vref, output voltage control signal VST；Current feedback comparator 602, receives current feedback signal Ifb and current reference signal Iref, and based on current feedback signal Ifb and the comparative result of current reference signal Iref, exports current controling signal IST；Logic circuit 603, receives voltage control signal VST and current controling signal IST, voltage control signal VST and current controling signal IST carries out output feedback ontrol signal FB_ctrl after logical operations.

In one embodiment, described logic circuit 603 is AND gate.

In one embodiment, described buck on-off circuit 20 is in battery control system.Those of ordinary skill in the art it should be understood that when using on-off circuit to charge the battery, the most first experience constant-current charge process, then experiences constant-voltage charge process.

When buck on-off circuit 20 uses feedback comparison circuit 60 as shown in Figure 6, and when battery control system, first described buck on-off circuit 20 works under constant current mode, then works under constant voltage mode.In one embodiment, under constant current mode, i.e. output electric current Iout is constant, described voltage feedback signal Vfb is less than voltage reference signal Vref, described voltage control signal VST is logic-high signal, AND gate 603 to described voltage control signal VST and current controling signal IST after logic and operation so that described feedback control signal FB_ctrl is equal to current controling signal IST；Under constant voltage mode, i.e. output voltage Vout is constant, and described current feedback signal Ifb is high level signal less than current reference signal Iref, described current controling signal IST, and described feedback control signal FB_ctrl is equal to voltage control signal VST.

By arranging the value of voltage reference signal Vref, make under constant current mode, what comparator 601 was exported voltage control signal VST is unity logic level signal, and by arranging the value of current reference signal Iref, make under constant voltage mode, the current controling signal IST that comparator 602 is exported is unity logic level signal, for the common technology means of those skilled in the art, the most reinflated narration.

Fig. 7 shows each signal waveforms when buck on-off circuit 20 works under decompression mode and output voltage Vout is constant.Illustrate that buck on-off circuit 20 works in the operation principle under decompression mode below in conjunction with Fig. 4 and Fig. 7.As shown in Figure 7, when characterizing feedback signal Vfb of output voltage Vout of buck on-off circuit 20 and dropping to reference signal Vref, described voltage control signal VST output pulse signal, now, current controling signal IST is logic-high signal, when, after the logic and operation through logic circuit 603, described feedback control signal FB_ctrl is equal to voltage control signal VST.It is effective status owing to now blood pressure lowering enables signal Buck_en, first duty cycle adjustment signal PWM1 is the pulse width signal with the first fixing conducting duration Ton1, and its pulsewidth starts from the pulse time of feedback control signal FB_ctrl, terminate after continuing the length of the first fixing conducting duration Ton1.During the first fixing conducting duration Ton1, described first power switch PA conducting, the second power switch PB turns off, and now, voltage feedback signal Vfb rises.After the first fixing conducting duration Ton1 terminates, the first duty cycle adjustment signal PWM1 is low level, and the first power switch PA turns off, and the second power switch PB conducting, now, voltage feedback signal Vfb declines.When voltage feedback signal Vfb is again below voltage reference signal Vref, described feedback control signal FB_ctrl exports pulse again, starts the next first fixing conducting duration Ton1.So move in circles, form buck on-off circuit 20 work process in buck mode.

When boosting enable signal Boost_en is effective, described buck on-off circuit 20 is operated under boost mode.Now, the first power switch PA is held on, and the second power switch PB is held off, and boosted switch to PC and PD break-make in an orderly manner under the control of the first duty cycle adjustment signal PWM1, passes to the energy of outfan controlling input.The boost mode of buck on-off circuit 20 is similar with decompression mode, the most reinflated narration.

When blood pressure lowering enables signal Buck_en and boosting enable signal Boost_en is the most invalid, when i.e. buck enable signal Buck-Boost_en is effective, described buck on-off circuit 20 is operated under buck-boost mode.In an embodiment of the present invention, buck-boost mode is the combination of boost mode and decompression mode.I.e. in a switch periods, PA and PB is worked in buck mode by the step-down switching in buck on-off circuit 20, PC and PD is operated under boost mode by boosted switch.Step-down switching is to PA and PB break-make in an orderly manner under the control of the first duty cycle adjustment signal PWM1, and boosted switch is to PC and PD break-make in an orderly manner under the control of the second duty cycle adjustment signal PWM2, and co-controlling input passes to the energy of outfan.

Fig. 8 shows that buck on-off circuit 20 works in each signal waveforms under buck-boost mode.Illustrate that buck on-off circuit 20 works under buck-boost mode below in conjunction with Fig. 4 and Fig. 8, and operation principle when output voltage Vout is constant.As shown in Figure 8, when voltage feedback signal Vfb drops to voltage reference signal Vref, described voltage control signal VST output pulse signal, now, current controling signal IST is logic-high signal, when through logic circuit 603 with computing after, described feedback control signal FB_ctrl is equal to voltage control signal VST.Enable signal Buck_en due to now blood pressure lowering and boosting enables signal Boost_en and is disarmed state, i.e. buck enables signal Buck-Boost_en is effective status, first duty cycle adjustment signal PWM1 is the pulse width signal with the 3rd fixing conducting duration Ton3, and its pulsewidth starts from the pulse time of feedback control signal FB_ctrl, terminate after continuing the length of the 3rd fixing conducting duration Ton3.During the 3rd fixing conducting duration Ton3, the first power switch PA conducting, the second power switch PB turns off, and now, feedback signal Vfb rises.After the 3rd fixing conducting duration Ton3 terminates, the first power switch PA turns off, and the second power switch PB conducting, now, feedback signal Vfb declines.Meanwhile, under buck-boost mode, delay circuit 403 receives feedback control signal FB_ctrl, and exports and have, relative to feedback control signal FB_ctrl, the delay control signal DFB_ctrl that delay duration is TDelay.Described second fixes duration control circuit 404 has the second duty cycle adjustment signal PWM2 of the 4th fixing conducting duration Ton4 based on delay control signal DFB_ctrl output.As shown in Figure 8, compared to the 3rd, fixing conducting duration Ton3 has delay duration TDelay to the described 4th fixing conducting duration Ton4.During the 4th fixing conducting duration Ton4, the 3rd power switch PC conducting, the 4th power switch PD turns off.And the time period outside the 4th fixing conducting duration Ton4, the 4th power switch PD conducting, the 3rd power switch PC turns off, as shown in Figure 8.When voltage feedback signal Vfb is again below voltage reference signal Vref, described feedback control signal FB_ctrl output pulse signal again.So move in circles, form the buck on-off circuit 20 work process under buck-boost mode.

In one embodiment, time delay TDelay is the switch periods of buck on-off circuit of 1/2.In one embodiment, after the described 4th fixing conducting duration Ton4 originates in the initial time of the 3rd fixing conducting duration Ton3, and terminate early than the 3rd fixing conducting duration Ton3.

Fig. 7 and Fig. 8 shows that buck on-off circuit 20 works in the signal waveform under constant voltage mode.When buck on-off circuit 20 works in constant current mode, described feedback control signal FB_ctrl is equivalent to current controling signal IST.Buck on-off circuit 20 works in the signal waveform under constant current mode, and work in the signal waveform under constant voltage mode with it similar, the most reinflated narration.

Foregoing examples describe when the situation of the pulse width signal that the first duty cycle adjustment signal PWM1 and the second duty cycle adjustment signal PWM2 is fixing conducting duration.Described first duty cycle adjustment signal PWM1 and the second duty cycle adjustment signal PWM2 can also be the fixing pulse width signal turning off duration.In buck mode, the first of described first duty cycle adjustment signal PWM1 the fixing duration Toff1 of shutoff corresponds to the shutoff duration of the first power switch PA.Under boost mode, the second of described first duty cycle adjustment signal PWM1 is fixing turns off the duration Toff2 shutoff duration corresponding to the 3rd power switch PC.Under buck-boost mode, the 3rd of described first duty cycle adjustment signal PWM1 is fixing turns off the duration Toff3 shutoff duration corresponding to the first power switch PA, and the 4th of described second duty cycle adjustment signal PWM2 is fixing turns off the duration Toff4 shutoff duration corresponding to the 3rd power switch PC.The mode control circuit of described fixing shutoff duration is similar with the mode control circuit 40 shown in Fig. 4, and difference is that first fixes the first duty cycle adjustment signal PWM1 and second that duration control circuit 401 exported and fix the second duty cycle adjustment signal PWM2 that duration control circuit 402 exported and have the fixing pulse width signal turning off duration.

In one embodiment, compared to the 3rd, the fixing duration Toff3 that turns off delays beginning to the described default 4th fixing duration Toff4 of shutoff, and is later than the 3rd fixing duration Toff3 that turns off and terminates.

In one embodiment, the described default 4th fixing duration Toff3 that turns off of the fixing duration Toff4 and the 3rd of shutoff starts simultaneously at, and is later than the 3rd fixing shutoff duration Toff3 and terminates.The delay duration of the most described delay circuit 403 is 0.

Fig. 9 shows the electrical block diagram of driving logic circuit 90 according to an embodiment of the invention.As it is shown in figure 9, described driving logic circuit 90 includes: or gate logic OR1～OR3, AND gate AND1～AND5 and NOT gate logic circuit N1～N2.The waveform diagram of switch controlling signal GA～GD when Figure 10 shows Fig. 9 circuit and Fig. 4 circuit connected applications.As shown in Figure 10, when described blood pressure lowering enable signal Buck_en is effective, when described boosting enable signal Boost_en and buck enable signal Buck-Boost_en is invalid, described AND gate AND1 and or gate logic OR2 by first duty cycle adjustment signal PWM1 transmit output, as the first switch controlling signal GA, and described AND gate AND3 and or gate logic OR3 by logic-low signal (0) transmit output, as the 3rd switch controlling signal GC；When described boosting enable signal Boost_en is effective, when described blood pressure lowering enable signal Buck_en and buck enable signal Buck-Boost_en is invalid, described AND gate AND2 and or gate logic OR2 by logic-low signal (0) transmit output, as the first switch controlling signal GA, and described AND gate AND4 and or gate logic OR3 by first duty cycle adjustment signal PWM1 transmit output, as the 3rd switch controlling signal GC；When described buck enable signal Buck-Boost_en is effective, when described blood pressure lowering enable signal Buck_en and boosting enable signal Boost_en is invalid, described AND gate AND1 and or gate logic OR2 by first duty cycle adjustment signal PWM1 transmit output, as the first switch controlling signal GA, and described AND gate AND5 and or gate logic OR3 by second duty cycle adjustment signal PWM2 transmit output, as the 3rd switch controlling signal GC.

Described inverted logic circuit N1 receives the first switch controlling signal GA, output and second switch control signal GB of the first switch controlling signal GA opposite in phase；Described inverted logic circuit N2, receives the 3rd switch controlling signal GC, output and the 4th switch controlling signal GD of the 3rd switch controlling signal GC opposite in phase.

In one embodiment, switch controlling signal GA～GD high level are effective.When switch controlling signal GA～GD is effective, power switch PA～the PD conducting that each switch controlling signal is corresponding.

Those of ordinary skill in the art it should be understood that in other embodiments, the first duty cycle adjustment signal PWM1 and the second duty cycle adjustment signal PWM2, and the effective status of switch controlling signal GA～GD can be any level value.Meanwhile, driving logic circuit may be made that corresponding adjustment.Fig. 9 driving logic circuit 90 only makees exemplary illustration.Those of ordinary skill in the art can utilize hardware description language Verilog or VHDL etc. to automatically generate logic drive circuit according to the enable signal Buck_en shown in Figure 10, Boost_en, Buck-Boost_en, logical relation between duty cycle adjustment signal PWM1～PWM2 and switch controlling signal GA～GD.

Figure 11 shows the control method 110 of buck on-off circuit according to an embodiment of the invention.Described buck on-off circuit includes the buck on-off circuit as shown in Fig. 2,4,5,6 and 9.Described control method 110 includes:

Step 1101, input voltage vin according to buck on-off circuit and the value of output voltage Vout determine the mode of operation of buck on-off circuit, if buck on-off circuit works in buck mode, start step 1102～1106, if buck on-off circuit is operated under boost mode, start step 1107～1111, if buck on-off circuit is operated under buck-boost mode, start step 1112～1120.

Step 1102, if buck on-off circuit works in buck mode, keeps the 4th power switch PD conducting, and the 3rd power switch PC turns off；If

Step 1103, when current feedback signal Ifb is less than current reference signal Iref when the voltage feedback signal Vfb characterizing output voltage Vout is less than voltage reference signal Vref while, goes to step 1104, if it is not, go to step 1106；

Step 1104, turns on the first power switch PA, simultaneously turns off the second power switch PB；

Step 1105, when detecting the first fixing conducting duration Ton1 whether the first power switch PA conducting duration reaches default, if so, goes to step 1106, if it is not, go to step 1104；

Step 1106, turns off the first power switch PA, simultaneously turns on the second power switch PB.

Step 1107, if buck on-off circuit is operated under boost mode, keeps the first power switch PA to turn off, the second power switch PB conducting；

Step 1108, when current feedback signal Ifb is less than current reference signal Iref when the voltage feedback signal Vfb characterizing output voltage Vout is less than voltage reference signal Vref while, goes to step 1109, if it is not, go to step 1111；

Step 1109, turns on the 3rd power switch PC, simultaneously turns off the 4th power switch PD；

Step 1110, whether detection the 3rd power switch PC conducting duration reaches the second default fixing conducting duration Ton2, if so, goes to step 1111, if it is not, go to step 1112；

Step 1111, turns off the 3rd power switch PC, simultaneously turns on the 4th power switch PD.

Step 1112, if buck on-off circuit is operated under buck-boost mode, detects voltage feedback signal Vfb and current feedback signal Ifb；

Step 1113, when current feedback signal Ifb is less than current reference signal Iref when the voltage feedback signal Vfb characterizing output voltage Vout is less than voltage reference signal Vref while, jumps to step 1114, goes to step 1116 if not；

Step 1114, turns on the first power switch PA and the 3rd power switch PC, simultaneously turns off the second power switch PB and the 4th power switch PD；

Step 1115, detects delay duration TDelay whether the first power switch PA conducting duration reaches default, if so, goes to step 1116, if it is not, go to step 1114；

Step 1116, keeps the first power switch PA conducting, and the second power switch PB turns off, and simultaneously turns on the 3rd power switch PC, turns off the 4th power switch PD；

Step 1117, the 4th fixing conducting duration Ton4 that the conducting duration of detection the 3rd power switch PC is the most up to preset, if so, go to step 1118, if it is not, go to step 1116；

Step 1118, keeps the first power switch PA conducting, and the second power switch PB turns off, and simultaneously turns off the 3rd power switch PC, turns on the 4th power switch PD；

Step 1119, that detects the first power switch PA turns on the 3rd fixing conducting duration Ton3 whether duration reaches default, if so, goes to step 1120, if it is not, go to step 1118；

Step 1120, keeps the 3rd power switch PC to turn off, the 4th power switch PD conducting, simultaneously turns off the first power switch PA, turns on the second power switch PB.

In one embodiment, step 1101 includes: when the input voltage vin of buck on-off circuit is more than or equal to the product value of output voltage Vout and a Proportional coefficient K 1 being more than 1, described buck on-off circuit works in decompression mode；When buck on-off circuit input voltage vin less than or equal to output voltage Vout with one less than 1 and be more than 0 the product value of Proportional coefficient K 2 time, described buck on-off circuit works in boost mode；And when the input voltage vin of buck on-off circuit is less than output voltage Vout and the product value of a Proportional coefficient K 1 more than 1, and more than output voltage with one less than 1 and be more than 0 the product value of Proportional coefficient K 2 time, described buck on-off circuit works in buck-boost mode.

In one embodiment, the described default switch periods that delay time TDelay is 1/2.

In one embodiment, described the 4th default fixing conducting duration Ton4 is later than the 3rd fixing conducting duration Ton3 to start, and terminates early than the 3rd fixing conducting duration Ton3.

Figure 12 shows the control method 120 of buck on-off circuit according to an embodiment of the invention.Described buck on-off circuit includes the buck on-off circuit as shown in Fig. 2,4,5,6 and 9.Described control method 120 includes:

Step 1201, input voltage vin according to buck on-off circuit and the value of output voltage Vout determine the mode of operation of buck on-off circuit, if buck on-off circuit works in buck mode, start step 1202～1206, if buck on-off circuit is operated under boost mode, start step 1207～1211, if buck on-off circuit is operated under buck-boost mode, start step 1212～1218.

Step 1202, if buck on-off circuit works in buck mode, keeps the 4th power switch PD conducting, and the 3rd power switch PC turns off；

Step 1203, when voltage feedback signal Vfb is more than current reference signal Iref more than voltage reference signal Vref or current feedback signal Ifb, goes to step 1204, otherwise, goes to step 1206；

Step 1204, turns off the first power switch PA, and turns on the second power switch PB；

Step 1205, whether the shutoff duration detecting the first power switch PA reaches the first fixing shutoff duration, if so, goes to step 1206, if it is not, go to step 1204；

Step 1206, turns on the first power switch PA, and turns off the second power switch PB.

Step 1207, if buck on-off circuit is operated under boost mode, keeps the first power switch PA to turn off, the second power switch PB conducting；

Step 1208, when characterizing voltage feedback signal Vfb and being more than current reference signal Iref more than voltage reference signal Vref or current feedback signal Ifb, goes to step 1209, otherwise goes to step 1211；

Step 1209, turns off the 3rd power switch PC, simultaneously turns on the 4th power switch PD；

Step 1210, detection the 3rd power switch PC turns off the second fixing shutoff duration Toff2 whether duration reaches default, if so, goes to step 1211, if it is not, go to step 1209；

Step 1211, turns on the 3rd power switch PC, simultaneously turns off the 4th power switch PD.

Step 1212, if buck on-off circuit is operated under buck-boost mode, detects voltage feedback signal Vfb and current feedback signal Ifb；

Step 1213, when voltage feedback signal Vfb is more than current reference signal Iref more than voltage reference signal Vref or current feedback signal Ifb, goes to step 1214, otherwise, goes to step 1218；

Step 1214, turns off the first power switch PA and the 3rd power switch PC, simultaneously turns on the second power switch PB and the 4th power switch PD.

Step 1215, that detects the first power switch PA turns off the 3rd fixing shutoff duration Toff3 whether duration reaches default, if so, goes to step 1216, if it is not, go to step 1214；

Step 1216, keeps the 3rd power switch PC to turn off, and the 4th power switch PD conducting, simultaneously turns on the first power switch PA, and turns off the second power switch PB；

Step 1217, detection the 3rd power switch PC turns off the 4th fixing shutoff duration Toff_4 whether duration reaches default, if so, goes to step 1218, if it is not, go to step 1216.

In one embodiment, step 1201 includes: when the input voltage vin of buck on-off circuit is more than the product value of output voltage Vout and a Proportional coefficient K 1 being more than 1, described buck on-off circuit works in decompression mode；When buck on-off circuit input voltage vin less than or equal to output voltage Vout with one less than 1 and be more than 0 the product value K2 of proportionality coefficient time, described buck on-off circuit works in boost mode；And when the input voltage vin of buck on-off circuit is less than output voltage Vout and the product value of a Proportional coefficient K 1 more than 1, and more than output voltage Vout with one less than 1 and be more than 0 the product value of Proportional coefficient K 2 time, described buck on-off circuit works in buck-boost mode.

In one embodiment, the described default 4th fixing duration Toff_3 that turns off of the fixing duration Toff_4 and the 3rd of shutoff starts simultaneously at or delays beginning, and delaying duration can need to arrange according to system, and is later than the 3rd fixing shutoff duration Toff_3 and terminates.

In one embodiment, described voltage feedback signal Vfb characterizes output voltage Vout, described current feedback signal Ifb and characterizes inductive current IL.

The buck on-off circuit that the present invention provides is without using loop compensation circuit, and circuit structure is simple.Meanwhile, each mode of operation easy switching of the buck on-off circuit that the present invention provides, and the slitless connection of each mode of operation can be realized, there is preferable transient response.Further, when described buck on-off circuit is for battery control system, described constant current constant voltage pattern can automatically switch.

Although exemplary embodiment describing the present invention with reference to several, it is to be understood that, term used is explanation and exemplary and nonrestrictive term.Owing to the present invention can be embodied as the spirit without deviating from invention or essence in a variety of forms, it is to be understood that, above-described embodiment is not limited to any aforesaid details, and should explain widely in the spirit and scope that appended claims are limited, therefore fall into the whole changes in claim or its equivalent scope and remodeling all should be appended claims and contained.

Claims

1. a control circuit for buck on-off circuit, described buck on-off circuit includes Receive the input port of input voltage, the output port of output voltage, inductance, the first merit are provided Rate switch, the second power switch, the 3rd power switch and the 4th power switch, described control electricity Road includes:

Mode selection circuit, compares the value of input voltage and output voltage, defeated according to comparative result Go out blood pressure lowering and enable signal and boosting enable signal；

Mode control circuit, enables signal and boosting based on feedback signal, reference signal, blood pressure lowering Enabling signal, output has the first duty cycle adjustment signal and second duty of fixing conducting duration Than regulation signal, or output has fixing the first duty cycle adjustment signal turning off duration and the Two duty cycle adjustment signals；And

Driving logic circuit, based on the first duty cycle adjustment signal and the second duty cycle adjustment signal, Export the first switch controlling signal, second switch control signal, the 3rd switch controlling signal and Four switch controlling signals control the first power switch respectively, the second power switch, the 3rd power are opened Close and the break-make of the 4th power switch.

2. the control circuit of buck on-off circuit as claimed in claim 1, its feature exists In, described mode control circuit includes:

Feedback comparison circuit, receives reference signal and feedback signal, and according to reference signal and The comparative result of feedback signal, output feedback ontrol signal；

First fixing conducting duration control circuit, receives feedback control signal, blood pressure lowering enable signal Enable signal with boosting, export the first duty cycle adjustment signal, wherein, when blood pressure lowering enables signal Time effectively, described first duty cycle adjustment signal is the pulsewidth letter with the first fixing conducting duration Number, when boosting enable signal is effective, described first duty cycle adjustment signal is solid for having second Surely the pulse width signal of duration is turned on, when blood pressure lowering enables signal and boosting enable signal is the most invalid, Described first duty cycle adjustment signal is the pulse width signal with the 3rd fixing conducting duration；

Delay circuit, receives feedback control signal, and output has pre-compared with feedback control signal If the delay control signal of delay duration；And

Second fixing conducting duration control circuit, reception delay control signal, blood pressure lowering enable signal Enable signal with boosting, export the second duty cycle adjustment signal, wherein, when blood pressure lowering enables signal Or boosting enable signal effective time, described second duty cycle adjustment signal has unity logic level, When blood pressure lowering enables signal and boosting enable signal is the most invalid, described second duty cycle adjustment signal For having the pulse width signal of the 4th fixing conducting duration.

3. the control circuit of buck on-off circuit as claimed in claim 2, wherein said The 4th preset fixing conducting duration is later than the 3rd fixing conducting duration to start, and solid early than the 3rd Surely conducting duration terminates.

4. the control circuit of buck on-off circuit as claimed in claim 2, its feature exists In, described mode control circuit includes:

The first fixing duration control circuit that turns off, reception feedback control signal, blood pressure lowering enable signal Enable signal with boosting, export the first duty cycle adjustment signal, wherein, when blood pressure lowering enables signal Time effectively, described first duty cycle adjustment signal is to have the first fixing pulsewidth letter turning off duration Number, when boosting enable signal is effective, described first duty cycle adjustment signal is solid for having second Surely the pulse width signal of duration is turned off, when blood pressure lowering enables signal and boosting enable signal is the most invalid, Described first duty cycle adjustment signal is to have the 3rd fixing pulse width signal turning off duration；And

The second fixing duration control circuit that turns off, reception feedback control signal, blood pressure lowering enable signal Enable signal with boosting, export the second duty cycle adjustment signal, wherein, when blood pressure lowering enables signal Or boosting enable signal effective time, described second duty cycle adjustment signal has unity logic level, When blood pressure lowering enables signal and boosting enable signal is the most invalid, described second duty cycle adjustment signal For having the 4th fixing pulse width signal turning off duration.

5. the control circuit of buck on-off circuit as claimed in claim 4, wherein said The 4th fixing duration and the 3rd fixing shutoff duration of turning off preset starts simultaneously at or is later than the The three fixing durations that turn off start, and are later than the 3rd fixing duration that turns off and terminate.

6. the control circuit of the buck on-off circuit as described in any one of claim 2-5, its In, described reference signal includes current reference signal and voltage reference signal, described feedback signal Including characterizing the current feedback signal of inductive current and characterizing the voltage feedback signal of output voltage, Described feedback comparison circuit is defeated according to the comparative result of current reference signal and current feedback signal Go out current feedback control signal, according to voltage reference signal and the comparative result of voltage feedback signal Output voltage feedback control signal, and export current feedback control signal and Voltage Feedback control The logical operations signal of signal is as feedback control signal.

7. a buck on-off circuit, including being coupled in series in input voltage and with reference to ground Between the first power switch and the second power switch, be coupled in series in output voltage and with reference to ground Between the 3rd power switch and the 4th power switch, and be coupled in the first power switch and second Between the junction point of power switch, and the 3rd power switch and the junction point of the 4th power switch Inductance, it is characterised in that including:

8. a control method for buck on-off circuit, described buck on-off circuit includes Inductance, the first power switch, the second power switch, the 3rd power switch and the 4th power switch, Described control method includes:

Input voltage and the value of output voltage according to buck on-off circuit determine buck The mode of operation of on-off circuit；

If buck on-off circuit works in buck mode, keep the 4th power switch conducting, 3rd power switch turns off, and when characterizing the voltage feedback signal of output voltage less than voltage base Calibration signal and when characterizing the current feedback signal of inductive current less than current reference signal, conducting First power switch, simultaneously turns off the second power switch, is up to when the first power switch conducting During to first preset fixing conducting duration, turn off the first power switch, simultaneously turn on the second merit Rate switchs, and again compares the value of input voltage and output voltage, rises if comparative result maintains Step-down switching circuit works in buck mode, then until voltage feedback signal is again less than voltage When reference signal and current feedback signal are again less than current reference signal, again turn on first Power switch, simultaneously turns off the second power switch, starts another switch periods；

If buck on-off circuit is operated under boost mode, the first power switch is kept to turn off, Second power switch conducting, and when characterize voltage feedback signal less than voltage reference signal and When current feedback signal is less than current reference signal, turn on the 3rd power switch, simultaneously turn off the Four power switch, when the 3rd power switch turns on the second fixing conducting duration that duration reaches default Time, turn off the 3rd power switch, simultaneously turn on the 4th power switch, and again compare input Voltage and the value of output voltage, if comparative result maintains buck on-off circuit to be operated in a liter pressing mold Under formula, until voltage feedback signal is again less than voltage reference signal and current feedback signal again Secondary less than current reference signal, conducting the 3rd power switch, simultaneously turns off the 4th power and opens again Close, start another switch periods；And

If buck on-off circuit is operated under buck-boost mode, when voltage feedback signal is less than electricity When pressure reference signal and current feedback signal are less than current reference signal, turn on the first power and open Closing, simultaneously turn off the second power switch, now, the 3rd power switch turns off, and the 4th power is opened Close conducting, begin to pass through one section of default delay time from the first power switch turn-on instant, the Three power switch conductings, the 4th power switch turns off, is up to when the conducting of the 3rd power switch After the 4th preset fixing conducting duration, turn off the 3rd power switch and lead, turn on the 4th power Switch, when the conducting duration of the first power switch reaches the 3rd default fixing conducting duration, First power switch turns off, the second power switch conducting, and again compares input voltage and defeated Go out the value of voltage, if comparative result maintains buck on-off circuit to be operated under buck-boost mode, Until voltage feedback signal is the least again less than voltage reference signal and current feedback signal When current reference signal, the first power switch and the conducting of the 4th power switch, the second power is opened Close and the 3rd power switch turns off, start next switch periods.

9. control method as claimed in claim 8, the wherein said default 4th fixing leads Logical duration is later than the 3rd fixing conducting duration to start, and terminates early than the 3rd fixing conducting duration.

10. a control method for buck on-off circuit, described buck on-off circuit includes Inductance, the first power switch, the second power switch, the 3rd power switch and the 4th power switch, Described control method includes:

If buck on-off circuit works in buck mode, keep the 4th power switch conducting, 3rd power switch turns off, and when the feedback signal characterizing output voltage is believed more than voltage reference Number or characterize inductive current feedback signal more than current reference signal time, turn off the first power Switch, simultaneously turns on the second power switch, when the shutoff duration of the first power switch reaches default First fixing when turning off duration, turn on the first power switch, simultaneously turn off the second power switch, And again compare the value of input voltage and output voltage, if comparative result maintains buck switch Circuit works in buck mode, until voltage feedback signal again more than voltage reference signal or When person's current feedback signal is again more than current reference signal, again turn off the first power switch, Simultaneously turn on the second power switch, start another switch periods；

If buck on-off circuit is operated under boost mode, the first power switch is kept to turn off, Second power switch conducting, and voltage feedback signal is anti-more than voltage reference signal or electric current When feedback signal is more than current reference signal, turns off the 3rd power switch, simultaneously turn on the 4th power Switch, when the 3rd power switch turns off the second fixing shutoff duration that duration reaches default, leads Logical 3rd power switch, simultaneously turns off the 4th power switch, and again compare input voltage and The value of output voltage, if comparative result maintains buck on-off circuit to be operated under boost mode, Until voltage feedback signal is again the biggest more than voltage reference signal or current feedback signal In current reference signal, again turn off the 3rd power switch, simultaneously turn on the 4th power switch, Start another switch periods；And

If buck on-off circuit is operated under buck-boost mode, when voltage feedback signal is more than electricity When pressure reference signal or current feedback signal are more than current reference signal, turn off the first power and open Closing, simultaneously turn on the second power switch, now, the 3rd power switch turns off and the 4th power Switch conduction, when the first power switch turns off the 3rd fixing shutoff duration that duration reaches default, Turn on the 3rd power switch, turn off the 4th power switch, when the shutoff duration of the 3rd power switch Reach the default 4th fixing turn off duration after, turn on the 3rd power switch, turn off the 4th power Switch, and again compare the value of input voltage and output voltage, if comparative result maintains lifting The circuit that compresses switch is operated under buck-boost mode, until voltage feedback signal is again more than voltage base Calibration signal or current feedback signal again more than current reference signal time, the first power switch and 3rd power switch turns off, the second power switch and the conducting of the 4th power switch, starts the next one Switch periods.