CN105991160B - A kind of signal processing apparatus - Google Patents
A kind of signal processing apparatus Download PDFInfo
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- CN105991160B CN105991160B CN201510077147.5A CN201510077147A CN105991160B CN 105991160 B CN105991160 B CN 105991160B CN 201510077147 A CN201510077147 A CN 201510077147A CN 105991160 B CN105991160 B CN 105991160B
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Abstract
The present embodiments relate to telecommunication circuit field more particularly to a kind of signal processing apparatus, to realize normal communication in 485 interface circuit reversal connections of RS.In the embodiment of the present invention, the saltus step situation for the first signal that conversion module is exported according to the positive port of 485 interface circuits of RS or negative terminal mouth generates the first pulse train and exports, and first each pulse in pulse train sequentially corresponds to a signal transition edges in the first signal, and first all pulses in pulse train are in-phase pulse, i.e. no matter 485 interface circuits of RS are just to connect or reversal connection, the first pulse train can be converted to by the first signal that will be received, then according to the first pulse train, it recovers 485 interface circuits of RS and is just connecing correct communication data information under state, it can be with the purpose of normal communication in 485 interface circuit reversal connections of RS to realize, further improve the reliability of communication.
Description
Technical field
The present embodiments relate to telecommunication circuit field more particularly to a kind of signal processing apparatus.
Background technology
RS-485 interface circuits are a kind of well known serial digital communications systems, due to fast and to noise the robust of speed
Property and be widely used in various fields.For example, RS-485 communication systems are widely used in programmable logic controller (PLC)
Data transmission in (Programmable Logic Controller, abbreviation PLC) system between control device.RS-485 connects
The pin of mouthful circuit is divided into AB polarity, the differential signal realization data transmission that when communication is exported by differential interface, thus RS-
The communication terminal of 485 interface circuits must be connected with cable by identical polarity, that is, is pressed A-A, B-B and connected.However it is applied in networking
It is very easy to occur communicating unsuccessful problem caused by the reversal connection of the end A, B in work, seriously affects the construction efficiency at scene.
Agreement provides that communication data when RS-485 interface circuits just connect has following characteristics：It is defeated when not exporting communication data
Go out high level, start bit and stop bits are all high level during communication data transfer, and single communication data transfer process is most
Long bit wide only has 12, therefore even if 12 low is only kept if exporting low level always at most during communication data transfer
Level.Therefore, when RS-485 interface circuits just connect, it is more than in the period of 12-bit data transmission time at one and is continuously in
If high level is more than in the period of 12-bit data transmission time at one and persistently locates when RS-485 interface circuit reversal connections
In low level.Based on the feature, the prior art is by judging that the data that RS-485 interface circuit interfaces transmit are in height for a long time
Level or low level determine that current RS-485 interface circuits are just to connect or reversal connection.
But point-to-point RS-485 interface circuits connection can only be solved in above-mentioned technical proposal, when RS-485 interface circuits
It connects, i.e., when a RS-485 interface circuit connects multiple loads simultaneously, and ought largely load, only for point-to-points bus type
When having certain sub-fraction reversal connection, the high level due to largely just connecing load drives, thus the fraction of reversal connection can be caused to be supported on
Level cannot be totally turned over when communication, to influence RS-485 interface circuits to high level and low level be appropriately determined.
It gives one example, it is assumed that a RS-485 interface circuits interface connects 20 loads simultaneously, wherein 19 just connect, 1
A reversal connection.When the RS-485 interface circuits transmit the high level of 5V, the load just connect should export 5V high level, and reversal connection is negative
Load should invert the level signal completely, to export the low level of -5V.And it is just connecing load and can give tacit consent to RS-485 due to 19
The pressure of interface circuit bus is drawn high, and to make the load of reversal connection at this time signal can not be totally turned over, effect is exactly when just connecing
Load output 5V high level when, the load of reversal connection is only capable of exporting the low level of 2V.At this point, by the judgement principle of the prior art,
When receiving 0V low levels below could logic judgment be 0, otherwise equal logic judgment is 1.As it can be seen that at this point, the prior art
The load just connect with reversal connection can not be correctly distinguished, to which subsequent processing can not be carried out.
In conclusion there is an urgent need for a kind of signal processing apparatus, it is normal to be realized in RS-485 interface circuit reversal connections
Communication.
Invention content
The embodiment of the present invention provides a kind of signal processing apparatus, to be realized just in RS-485 interface circuit reversal connections
Normal open is believed.
The embodiment of the present invention provides a kind of signal processing apparatus, including：Conversion module and recovery module, conversion module it is defeated
Entering positive port or the negative terminal mouth of end connection RS-485 interface circuits, the output end of conversion module connects the input terminal of recovery module,
The output end connection processing device of recovery module；
The saltus step feelings for the first signal that conversion module is used to be exported according to the positive port of RS-485 interface circuits or negative terminal mouth
Condition generates the first pulse train and simultaneously exports, and all pulses in the first pulse train are in-phase pulse, in the first pulse train
Each pulse sequentially correspond to the first signal in a signal transition edges；
Recovery module is used to generate second signal according to the first pulse train and export, and each signal in second signal is jumped
Change edge sequentially corresponds to a pulse in the first pulse train.
Preferably, conversion module specifically includes：The blocking list being connect with the positive port of RS-485 interface circuits or negative terminal mouth
The output end connection of member, the rectification unit being connect with blocking unit, the isolated location being connect with rectification unit, isolated location restores
Module；
Blocking unit is used to generate the second pulse train according to the saltus step situation of the first signal and export, the second pulse train
In each pulse sequentially correspond to a signal transition edges in the first signal, the jump of each pulse in the second pulse train
The transition edges for becoming edge corresponding signal in the first signal are in the same direction；
Rectification unit is used to negate the negative-going pulse in the second pulse train or by the positive arteries and veins in the second pulse train
Punching negates, and obtains third pulse train, and all pulses in third pulse train are in-phase pulse；
Isolated location is for obtaining the first pulse train according to third pulse train and exporting.
Preferably, blocking unit specifically includes the first capacitance and first resistor；
The positive port of one end connection RS-485 interface circuits of first capacitance or negative terminal mouth, the other end connect first resistor；
One end of first resistor connects the first capacitance, other end ground connection；
A tie point between first resistor and the first capacitance is the first output end of blocking unit, and first resistor connects
Ground terminal is the second output terminal of blocking unit.
Preferably, rectification unit is rectifier bridge；
The first input end of rectifier bridge and the second input terminal are separately connected the first output end and the second output of blocking unit
End, the third output end and the 4th output end of rectifier bridge are separately connected the third input terminal and the 4th input terminal of isolated location.
Preferably, isolated location is photoelectric coupling circuit or controllable switch circuit.
Preferably, recovery module includes d type flip flop；
The output end of the CP pins connection conversion module of d type flip flop, the QN pin connection processing devices of d type flip flop, d type flip flop
D pins connect with QN pins；
Saltus step occurs in the output signal of the rising edge or failing edge of the signal that the CP pins of d type flip flop input, QN pins.
Preferably, recovery module further includes reset unit, the output end of the input terminal connection conversion module of reset unit is multiple
The reseting pin of the output end connection d type flip flop of bit location；
Reset unit is used for：
When the output end of conversion module exports high level, high level is exported to the reseting pin of d type flip flop, so that D is touched
Send out device work；
When the output end of conversion module exports the time span of low level and holding no more than the first duration, triggered to D
The reseting pin of device exports high level, so that d type flip flop works；Wherein, the first duration is greater than or equal to R485 12 digits of transmission
According to required time span；
When the output end of conversion module exports the time span of low level and holding more than the first duration, to d type flip flop
Reseting pin export low level so that d type flip flop reset.
Preferably, reset unit specifically includes diode, the second capacitance, second resistance；
Second capacitance is in parallel with second resistance, and first end that the second capacitance is connected with second resistance and d type flip flop are answered
Position pin connection, and the cathode of diode is connected, the output end of the anode connection conversion module of diode；
The second end ground connection that second capacitance is connected with second resistance, connects between ground terminal and the output end of conversion module
It is connected to 3rd resistor；
When the output end of conversion module exports high level, diode current flow, the second capacitor charging, to answering for d type flip flop
Position pin exports high level；When the output end of conversion module exports low level, diode shutdown, the second capacitance passes through the second electricity
Resistance is discharged over the ground, and high level is exported to the reseting pin of d type flip flop；
The resistance value of second resistance ensures that the retention time after the second capacitance is charged to high level is the first duration.
Preferably, further including processor, the second signal that processor is used to be exported according to recovery module is handled.
In the embodiment of the present invention, signal processing apparatus includes conversion module and recovery module, and the input terminal of conversion module connects
Positive port or the negative terminal mouth of RS-485 interface circuits are connect, the input terminal of the output end connection recovery module of conversion module restores mould
The output end connection processing device of block；Conversion module is used for first according to the positive port of RS-485 interface circuits or the output of negative terminal mouth
The saltus step situation of signal generates the first pulse train and exports, and all pulses in the first pulse train are in-phase pulse, the
Each pulse in one pulse train sequentially corresponds to a signal transition edges in the first signal；Recovery module is used for according to the
One pulse train generates second signal and exports, and each signal transition edges in second signal sequentially correspond to the first pulse train
In a pulse.
Due to the saltus step feelings for the first signal that conversion module is exported according to the positive port of RS-485 interface circuits or negative terminal mouth
Condition generates the first pulse train and exports, and each pulse in the first pulse train sequentially corresponds to a letter in the first signal
Number transition edges, and all pulses in the first pulse train are in-phase pulse, therefore the first pulse train only describes first
The timing information of saltus step occurs for signal in signal, does not reflect the saltus step direction of the transition edges in the first signal, neglects at this time
Produced by having omited in the case of generated saltus step direction and RS-485 interface circuits under RS-485 interface circuit reversal connection situations just connect
The opposite situation in saltus step direction, i.e., no matter RS-485 interface circuits are just connecing or reversal connection, conversion module can pass through the first arteries and veins
The timing information of saltus step occurs for the signal rushed in sequence description first signal.Further as recovery module according to the first pulse
Sequence generates second signal and exports, and each signal transition edges in second signal sequentially correspond to one in the first pulse train
The characteristic of a pulse, i.e. recovery module based on RS-485 interface circuit transmission datas, that is, when transmitting communication data, start bit and knot
Beam position is high level, RS-485 interface circuits output high level during communication data is not transmitted, according further to first arteries and veins
The timing information that saltus step occurs for signal described in sequence is rushed, is just being connect under state correctly to produce RS-485 interface circuits
Communication data information, i.e. second signal.
As it can be seen that no matter RS-485 interface circuits are just to connect or reversal connection, the embodiment of the present invention can be by that will receive
First signal is converted to the first pulse train that the timing information of saltus step occurs for signal in the first signal of description, then according to above-mentioned
The characteristic and the first pulse train of RS-485 interface circuit transmission datas recover RS-485 interface circuits and are just connecing under state correctly
Communication data information, can be with the purpose of normal communication, further in the reversal connection of RS-485 interface circuits to realize
Improve the reliability of communication.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly introduced, it should be apparent that, drawings in the following description are only some embodiments of the invention, for this
For the those of ordinary skill in field, without having to pay creative labor, it can also be obtained according to these attached drawings
His attached drawing.
Fig. 1 is a kind of system architecture schematic diagram that the embodiment of the present invention is applicable in；
Fig. 2 is the schematic diagram that communication data is transmitted when a kind of RS-485 interface circuits provided in an embodiment of the present invention just connect；
Fig. 3 is the signal that communication data is transmitted when another kind RS-485 interface circuits provided in an embodiment of the present invention just connect
Figure；
Fig. 4 is a kind of structural schematic diagram of signal processing apparatus provided in an embodiment of the present invention；
Fig. 5 is the structural schematic diagram of another signal processing apparatus provided in an embodiment of the present invention；
Fig. 6 is a kind of signal processing apparatus signal processing flow schematic diagram provided in an embodiment of the present invention；
Fig. 7 is another signal processing apparatus signal processing flow schematic diagram provided in an embodiment of the present invention.
Specific implementation mode
In order to make the purpose of the present invention, technical solution and advantageous effect be more clearly understood, below in conjunction with attached drawing and implementation
Example, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only used to explain this hair
It is bright, it is not intended to limit the present invention.
The transition edges of the pulse or signal that are previously mentioned in the embodiment of the present invention and another pulse or the jump of signal
Become edge " in the same direction ", refer to that the edge of two pulses or signal is rising edge or is failing edge, is i.e. the saltus step at edge
Direction is identical." same to phase " pulse being previously mentioned in the embodiment of the present invention, refers to that the phase of pulse is identical.
Transmission pin (the T pipes of the transmission pin (T pins) of processor and RS-485 interface circuits in the embodiment of the present invention
Foot) it connects, the direction pin (D pins) of processor is connect with the direction pin (D pins) of RS-485 interface circuits, and of the invention
The reception pin (R pins) of the first RS-485 interface circuits in embodiment vacantly, the signal processing device in the embodiment of the present invention
Set positive port or the negative terminal mouth of one end connection RS-485 chips, the reception pin (R pins) of other end connection processing device, so that originally
The data received by RS-485 chips in inventive embodiments have to pass through signal processing apparatus provided in an embodiment of the present invention
Processing, can just be transferred to the reception pin (R pins) of processor.
As shown in Figure 1, a kind of system architecture schematic diagram that the embodiment of the present invention is applicable.The embodiment of the present invention can be used for one
RS-485 interface circuits only connect a load, i.e., point-to-point connection type is equally applicable to point-to-points connection type, i.e.,
One RS-485 interface circuit connects multiple loads.
Fig. 1 illustrates the schematic diagram of two loads of a RS-485 interface circuit while connection, as shown in Figure 1, packet
First processor 101 is included, the first RS-485 interface circuits 102 being connect with first processor 101, specifically, first processor
101 transmission pin (T pins) is connect with the transmission pin (T pins) of the first RS-485 interface circuits, first processor 101
Direction pin (D pins) is connect with the direction pin (D pins) of the first RS-485 interface circuits, and first in the embodiment of the present invention
The reception pin (R pins) of RS-485 interface circuits is hanging.It is connected to the first positive port of the first RS-485 interface circuits 102
The first signal processing apparatus 105 on 103, the first signal processing apparatus 105 are connect with first processor 101 simultaneously, specifically
Reception pin (R pins) connection of the output end and first processor 101 of first signal processing apparatus 105.Further include and second
The 2nd RS-485 interface circuits 107 that processor 106 connects, the second positive port 108 of the 2nd RS-485 interface circuits 107 and the
First positive port 103 of one RS-485 interface circuits 102 connects, the second negative terminal mouth 109 of the 2nd RS-485 interface circuits 107 with
First negative terminal mouth 104 of the first RS-485 interface circuits 102 connects, further include simultaneously with second processor 106 and the 2nd RS-
The second signal processing unit 110 of the second positive port 108 connection of 485 interface circuits 107.Further, further include in Fig. 1 and the
3rd RS-485 interface circuits 112 of three processors 111 connection, the 4th negative terminal mouth 115 of the 3rd RS-485 interface circuits 112 with
The positive port 116 of third of first RS-485 interface circuits 102 connects, the 4th positive port 114 of the 3rd RS-485 interface circuits 112
Connect with the third negative terminal mouth 117 of the first RS-485 interface circuits 102, further include simultaneously with third processor 111 and third
The third signal processing apparatus 113 of the 4th negative terminal mouth 115 connection of RS-485 interface circuits 112.And first signal processing apparatus
105 also need the positive port of the third for connecting the first RS-485 interface circuits 102 simultaneously 116.
It can be seen from figure 1 that the first RS-485 interface circuits are just to connect with the 2nd RS-485 interface circuits, and the first RS-
485 interface circuits and the 3rd RS-485 interface circuits are reversal connections.By RS-485 interface circuits into line number between each processor
According to transmission.
On the other hand, a kind of possible structure is illustrated only in Fig. 1, skilled person will appreciate that, signal processing apparatus
It is attached in any a port in the positive port and negative terminal mouth of RS-485 interface circuits, the embodiment of the present invention does not limit
System.As shown in Figure 1, the first signal processing apparatus is connected to the positive port of the first RS-485 interface circuits, and at third signal
Reason device is then connected to the negative interface of the 3rd RS-485 interface circuits.The positive port of RS-485 interface circuits in the embodiment of the present invention
With negative terminal mouth be usually said RS-485 interface circuits carry the polar ports A and the ports B.
The signal processing apparatus that the embodiment of the present invention is provided mainly handles RS-485 interface circuits as receiving side when institute
The data received, for the data that processor is sent out, the processor institute connection signal processing unit is simultaneously without any processing.
It is communication number when just connecing that the embodiment of the present invention just sends RS-485 interface circuits with second processor to first processor respectively
It is situated between for, by taking third processor sends communication data when RS-485 interface circuits are reversal connection to first processor as an example
It continues.
Another factor that the embodiment of the present invention is based on is that RS-485 interface circuits transmission communication number is provided in agreement
According to characteristic.The signal that i.e. RS-485 interface circuits are exported when not exporting communication data is high level, communication data transfer
Start bit and stop bits are all high level in the process, and single communication data transfer process longest bit wide only has 12, therefore i.e.
Make to export low level always during communication data transfer, at most also only keeps 12 low levels.Therefore, when RS-485 interfaces
When circuit just connects, at one more than high level is continuously in the period of 12-bit data transmission time, if working as RS-485 interfaces
When circuit reversal connection, then it is more than in the period of 12-bit data transmission time at one and is continuously in low level.
The characteristic for transmitting communication data to regulation RS-485 interface circuits in agreement in conjunction with Fig. 2 and Fig. 3 is introduced.Fig. 2
Illustrate the schematic diagram that communication data is transmitted when a kind of RS-485 interface circuits just connect.As shown in Fig. 2, in the first communication
The letter that RS-485 is transmitted in data transmission period section 202 and the first free time section 201 and the second free time section 203
Number.In the first communication data transfer period 202, that is, when thering is specific communication data to be transmitted, first start bit 204
For high level, the first stop bits 205 is also high level.And it is specific logical between first start bit 204 and the first stop bits 205
Letter data, high level or low level are related with practical communication data.
Further, agreement regulation single communication data transfer process longest bit wide only has 12, i.e., first start bit 204 with
Maximum length also only has the time span of 12-bit data transmission between first stop bits 205.
Fig. 3 illustrates the schematic diagram that communication data is transmitted when another RS-485 interface circuits just connect.In Fig. 3
RS-485 institutes in second communication data transfer period 209 and third free time section 208 and the 4th free time section 210
The signal of transmission.In the second communication data transfer period 209, that is, when thering is specific communication data to be transmitted, second
Start bit 206 is high level, and the second stop bits 207 is also high level.And between the second start bit 206 and the second stop bits 207
It is specifically to communicate number between the second start bit 206 and the second stop bits 207 even if being that specific communication data is all low level
Also there was only the time span of 12-bit data transmission according to maximum length.
Fig. 4 illustrates a kind of structural schematic diagram of signal processing apparatus；Fig. 5 illustrates another signal
The structural schematic diagram of processing unit.
Based on foregoing teachings, a kind of signal processing apparatus 400 that the embodiment of the present invention is provided is described in detail below.Such as figure
Shown in 4 and Fig. 5, including conversion module 401 and recovery module 402.Preferably, conversion module 401 specifically includes：Blocking unit
403, rectification unit 404, isolated location 405；Recovery module 402 specifically includes d type flip flop 406 and reset unit 407：
Conversion module and recovery module, the positive port of the input terminal connection RS-485 interface circuits of conversion module or negative terminal
Mouthful, the input terminal of the output end connection recovery module of conversion module, the output end connection processing device of recovery module；
The saltus step feelings for the first signal that conversion module is used to be exported according to the positive port of RS-485 interface circuits or negative terminal mouth
Condition generates the first pulse train and simultaneously exports, and all pulses in the first pulse train are in-phase pulse, in the first pulse train
Each pulse sequentially correspond to the first signal in a signal transition edges；
Recovery module is used to generate second signal according to the first pulse train and export, and each signal in second signal is jumped
Change edge sequentially corresponds to a pulse in the first pulse train.
Specifically, the positive port in the embodiment of the present invention due to conversion module according to RS-485 interface circuits or negative terminal mouth
The saltus step situation of first signal of output generates the first pulse train, it is seen that the embodiment of the present invention is independent of RS-485 interface electricity
The change in polarity on road only reads the first signal from any a port in positive port or negative terminal mouth.
The letter exported further as the no matter plug-in how many load of RS-485 interface circuits and RS-485 interface circuits
Number whether can be totally turned over, the signal that single port is exported centainly has voltage change.For example, it is assumed that RS-485 connects
The high level that mouth circuit normally exports is 5V, and the low level inverted completely routinely exported is -5V, when RS-485 interface circuits
It when more due to the load of connection, and just connecing the more level signal exported so as to cause RS-485 and can not invert completely, into one
When the low level that walking causes RS-485 interface circuits to be exported only has 2V, in the prior art since logic judgment 5V and 2V are 1,
Therefore, communication data can not be correctly understood in the prior art.And when detecting on RS-485 interface circuits in the embodiment of the present invention
Single port output signal when becoming 2V from 5V, you can determine that the signal becomes low level from high level, and successfully
The changing condition is converted into the pulse in the first pulse train.As it can be seen that in the embodiment of the present invention, even if RS-485 interface circuits
Middle exported level signal can not invert completely, but the level signal exported only changes, the embodiment of the present invention
It is correct to capture.
In specific implementation, it is preferred that can be configured to entire circuit structure, so that the either end of RS-485 interface circuits
Difference between the mouth high level exported and low level at least should be greater than the conducting voltage of isolation circuit in the embodiment of the present invention.
For example, it is assumed that the isolation circuit in the embodiment of the present invention selects conducting voltage to be realized for the photoelectric coupling circuit of 0.3V, then this hair
Difference between the either port high level exported and low level of RS-485 interface circuits in bright embodiment at least should be big
In 0.3V, in order to improve the signal processing apparatus that the embodiment of the present invention is provided successfully realize RS-485 in the case that reversal connection just
The probability of normal open letter, and improve the adaptability of the embodiment of the present invention.
Lower mask body introduces the conversion module 401 in the embodiment of the present invention.
Specifically, preferably, conversion module 401 specifically includes blocking unit 403, rectification unit 404, isolated location
405：
The blocking unit being connect with the positive port of RS-485 interface circuits or negative terminal mouth, the rectification list being connect with blocking unit
The output end of member, the isolated location being connect with rectification unit, isolated location connects recovery module.
Blocking unit is used to generate the second pulse train according to the saltus step situation of the first signal and export, the second pulse train
In each pulse sequentially correspond to a signal transition edges in the first signal, the jump of each pulse in the second pulse train
The transition edges for becoming edge corresponding signal in the first signal are in the same direction；
Rectification unit is used to negate the negative-going pulse in the second pulse train or by the positive arteries and veins in the second pulse train
Punching negates, and obtains third pulse train, and all pulses in third pulse train are in-phase pulse；
Isolated location is for obtaining the first pulse train according to third pulse train and exporting.
Specifically, blocking unit is used to generate the second pulse train according to the saltus step situation of the first signal and export to whole
Flow unit.Blocking unit is mainly used for each signal transition edges in the first signal, corresponding to generate second pulse
Pulse in sequence corresponds in the falling edge of the first signal and generates a pulse, also given birth at the rising edge of the first signal
At a pulse.The saltus step side of the transition edges signal corresponding in the first signal of each pulse in second pulse train
Along in the same direction, specifically, the as failing edge of the first signal corresponding pulse in the second pulse train is the pulse of negative direction.
The corresponding pulse in the second pulse train of the rising edge of first signal is the pulse of positive direction.As it can be seen that the second pulse train is not
The timing condition that the first signal sends edge transition can be only characterized, the specific edge transition direction of the first signal can be also characterized.
For example, the high level for the second pulse train that blocking unit is provided is 3V, and low level is -3V, and center line is
0V, then it is to become from 0V that the first signal jumps to the pulse corresponding in the second pulse train of low level failing edge by high level
- 3V is turned to, the pulse for a negative direction for being again then 0V from -3V variations；Correspondingly, the first signal is by low transition to height
It is 3V that the pulse corresponding in the second pulse train of the rising edge of level, which is from 0V variations, and it is the one of 0V then to change again from 3V
The pulse of a positive direction.
Preferably, as shown in figure 5, blocking unit 403 specifically includes the first capacitance 501 and first resistor 502：
The positive port of one end connection RS-485 interface circuits of first capacitance 501 or negative terminal mouth, the as shown in Figure 5 first electricity
The other end of the 5th input terminal 503 held, the first capacitance 501 connects first resistor 502；One end connection the of first resistor 502
One capacitance 501, other end ground connection；A tie point between first resistor 502 and the first capacitance 501 is the first of blocking unit
Output end 504, the ground terminal of first resistor 502 are the second output terminal 505 of blocking unit.
Due to capacitance have blocking characteristic, at the 5th input terminal 503 of the first capacitance by first letter
When high level or low level in number pass through the first capacitance, the letter at the signal of the first capacitance output, i.e. the first output end 504
Number federation becomes the positive negative signal using 0V as median.It further, can be by first with the first capacitance connection in order to form pulse
The resistance value of resistance is adjusted smaller, so that the first capacitance achievees the purpose that repid discharge by smaller first resistor, even if the
The signal of one capacitance output can be quickly returning to 0V after signal saltus step each time.
It gives one example, when one end of the first capacitance of connection RS-485 interface circuits, i.e. the 5th input of the first capacitance
When the first signal at 503 being held to be reduced to 2V from 5V, that is, reduce 3V, the other end of the first capacitance, i.e. at the first output end 504
The same variation is will produce, is i.e. can be reduced to -3V from 0V rapidly at the first output end 504, and due to the presence of first resistor, and
First resistor be grounded, therefore, the first capacitance always by electric discharge turn again to 0V, when by first resistor tune it is smaller when, first
Capacitance can be quickly returning to 0V, become -3V from 0V to just form an elder generation at the second tie point at this time, fast from -3V later
Speed becomes the negative-going pulse of 0V.
Correspondingly, one end of the first capacitance when connection RS-485 interface circuits, i.e. the 5th input terminal 503 of the first capacitance
First signal at place from 2V when rising to 5V, that is, when increasing 3V, the other end of the first capacitance, i.e. and meeting at the first output end 504
The same variation is generated, i.e., is increased to 3V from 0V rapidly, and due to the presence of first resistor, and first resistor is grounded, therefore, the
One capacitance always by electric discharge turn again to 0V, when by first resistor tune it is smaller when, the first capacitance can be quickly returning to 0V, to
An elder generation is just formd at the first output end 504 at this time becomes 3V from 0V, quickly becomes the direct impulse of 0V from 3V later.
The rectification unit that the embodiment of the present invention is provided is used to negate the negative-going pulse in the second pulse train or by the
Direct impulse in two pulse trains negates, and obtains third pulse train, and all pulses in third pulse train are same phase
Pulse.
Specifically, since the pulse in the second pulse train for being exported by blocking unit not only characterizes the first letter
The sequential of transition edges in number, but also reflect saltus step direction.Further as when RS-485 interface circuit reversal connections, first
Opposite when the saltus step direction of signal is with saltus step direction when just connecing, therefore, the embodiment of the present invention generates the by rectification unit
Three-pulse sequence, all pulses in third pulse train are in-phase pulse, and therefore, third pulse train can be ignored first
Signal in signal jumps nyctitropic characteristic, only characterizes the sequential of transition edges in the first signal.
The specific effect of rectification unit is that the pulse of both direction present in the second pulse train is integrated into a side
To pulse.Concretely all negative-going pulses in the second pulse train are negated, or by the institute in the second pulse train
There is direct impulse to negate.
Preferential, as shown in figure 5, rectification unit 404 is rectifier bridge 605；The first input end 602 of rectifier bridge 605 and
Two input terminals 601 are separately connected the first output end 504 and second output terminal 505 of blocking unit, the third output end of rectifier bridge
603 and the 4th output end 604 be separately connected the third input terminal 702 and the 4th input terminal 701 of isolated location.Preferably, rectification
Second input terminal 601 of bridge 605 is grounded.
Specifically, the first input end 602 of rectifier bridge 605 and the second input terminal 601 are for receiving 403 institute of blocking unit
Second pulse signal of output.
Rectifier bridge is a kind of basic component, the characteristic of rectifier bridge be when first input end 602 and the second input terminal 601 it
Between when applying a positive level voltage, such as+3V, between the third output end 603 and the 4th output end 604 of rectifier bridge can the output phase answer
Positive level voltage, i.e.+3V.And when applying a negative level voltage between first input end 602 and the second input terminal 601, such as-
3V can export corresponding positive level voltage, i.e.+3V between the third output end 603 and the 4th output end 604 of rectifier bridge.
Even if as it can be seen that the effect of rectifier bridge all negates the pulse of all negative senses in the second pulse train, to make
The pulse being formed by all third pulse trains is in-phase pulse.
Isolated location in the embodiment of the present invention mainly obtains the first pulse train according to third pulse train and exports.Tool
For body, the pulse in the first pulse train is corresponded with the pulse in third pulse train, and in the first pulse train
Pulse is also in-phase pulse.
Preferably, isolated location is photoelectric coupling circuit or controllable switch circuit.Controllable switch circuit can be triode etc.
Circuit element.The embodiment of the present invention is introduced so that isolated location is photoelectric coupling circuit as an example.
As shown in figure 5, isolated location 405 is photoelectric coupling circuit 708, the 4th input terminal 701 of photoelectric coupling circuit 708
It is connect with the 4th output end 604 of rectifier bridge, the third input terminal 702 of photoelectric coupling circuit 708 is exported with the third of rectifier bridge
603 connection of end, the 5th output end 703 connection photoelectric coupling circuit power end 705 of photoelectric coupling circuit 708, the 6th output end
The input terminal of 704 connection recovery modules 402.
The concrete property of photoelectric coupling circuit is, when input high level between the 4th input terminal 701 and third input terminal 702
When, the 5th output end 703 of photoelectric coupling circuit and the 6th output end 704 are just connected, at this time 704 exportable light of the 6th output end
The voltage signal for the high level that electric coupling circuit power end 705 is provided.Correspondingly, when the 4th input terminal 701 and third input
Between end 702 when the low level voltage signal of input 0V, the 5th output end 703 of photoelectric coupling circuit and the 6th output end 704
Just it turns off, the 6th output end 704 just exports the voltage signal of 0V at this time.
Preferably, can also third input terminal 702 and the rectifier bridge of photoelectric coupling circuit 708 third output end 603 it
Between connect 3rd resistor 706, for coordinating photoelectric coupling circuit 708 to use, 3rd resistor 706 is for limiting photoelectric coupling circuit
708 maximum current can carry out value, it might even be possible to 0 ohm, i.e., according to the requirement of different photoelectric coupling circuits：Third
Resistance both ends are in short-circuit condition.
Preferably, photoelectric coupling circuit 708 may also include the 4th resistance 707, in system electrification, giving photoelectric coupling
The output end one of circuit stablizes low level acquiescence pull down resistor.It can be taken according to the requirement of different photoelectric coupling circuits
Value, it might even be possible to 0 ohm, i.e.,：4th resistance both ends are in short-circuit condition.
As can be seen from the above description, after conversion module receives the first signal, ultimately formed into the processing for crossing some row
First pulse train, and the first pulse train is exported to recovery module.
Specifically, as shown in figure 5, the recovery module 402 in the embodiment of the present invention includes d type flip flop 406；
The CP pins 802 of d type flip flop 406 connect the output end of conversion module, 804 junction of QN pins of d type flip flop 406
Device is managed, the D pins 801 of d type flip flop 406 are connect with QN pins 804；In the signal that the CP pins 802 of d type flip flop 406 input
Saltus step occurs for the output signal of rising edge or failing edge, QN pins 804.Preferably, the QN pins connection of d type flip flop 406 restores
The 5th output end 904 of module.
Further, preferably, d type flip flop further includes VCC pins 803, for providing voltage signal for d type flip flop.
Preferably, recovery module 402 further includes reset unit 407, the input terminal connection conversion module of reset unit 407
Output end, the reseting pin 805 of the output end connection d type flip flop 406 of reset unit 407；
Reset unit 407 is used for when the output end of conversion module exports high level, to the reseting pin 805 of d type flip flop
High level is exported, so that d type flip flop works；The time span that low level and holding are exported in the output end of conversion module is not more than
When the first duration, high level is exported to the reseting pin 805 of d type flip flop, so that d type flip flop works；Wherein, the first duration is more than
Or equal to the time span needed for RS-485 transmission 12-bit data；When the output end of conversion module exports low level and holding
Between length be more than the first duration when, to the reseting pin 805 of d type flip flop export low level so that d type flip flop reset.
Specifically, d type flip flop, is a kind of existing general basic component, and operation principle is specially：
In the state that reseting pin exports high level, when the CP pins of d type flip flop input a failing edge, D triggerings
Device can negate the voltage signal that current QN pins export.Further as QN pin connection processing devices, therefore this is of the inverted
Voltage signal is exported eventually by QN pins to processor.
In the state that reseting pin exports high level, when the CP pins of d type flip flop input one in addition to failing edge
When state, when such as 0V signals of rising edge or non-edge transition signal, the D pin output voltage signals of d type flip flop, d type flip flop
QN pins can be enabled to keep the state of the voltage signal currently exported.Further as QN pin connection processing devices, therefore the electricity
Pressure signal is exported eventually by QN pins to processor.
In the state that reseting pin exports low level, when the CP pins of d type flip flop input a rising edge or failing edge
Or when other any states, the voltage signal of d type flip flop D pins output directly exports.And d type flip flop can enable QN pins lasting defeated
Go out high level.
It takes a particular example, in the state that reseting pin exports high level, when the CP pins of d type flip flop input one
When failing edge, it is assumed that the output voltage of the D pins of d type flip flop is 5V, since QN pins export d type flip flop by default
It is high level, therefore the voltage signal that then d type flip flop can export QN pins at this time negates, i.e., becomes low electricity from high level
It is flat, it is assumed that the low level being arranged in d type flip flop is 0V, then the QN pins of d type flip flop start to export 0V at this time；Later, d type flip flop
CP pins when inputting a state in addition to failing edge, when such as 0V signals of rising edge or non-edge transition signal, D is touched
The voltage signal that hair device enables QN pins export keeps current state, i.e. d type flip flop persistently to export 0V signals, until d type flip flop
CP pins input next rising edge when, the voltage signal that d type flip flop exports current QN pins negates again, i.e., QN pins this
When negated from low level as high level, to export 5V signals, and maintained until receive failing edge next time.Assuming that first
In the entire period of duration, the CP pins of d type flip flop do not receive edge transition signal, i.e., do not receive with rising edge
Or the signal of failing edge, 0V signals are such as all, then what signal the QN pins of d type flip flop are currently without discuss output, are started
Export high level.
Below with table 1 come the specific operation principle for indicating d type flip flop：
The operation principle of 1 d type flip flop of table
Another realization method is that can be configured to d type flip flop, makes it when the state of reseting pin output high level
Under, when the CP pins of d type flip flop input a rising edge, d type flip flop can negate the voltage signal that current QN pins export,
And it is exported from QN pins.Further as QN pin connection processing devices, therefore the voltage signal of the inverted is managed eventually by QN
Foot is exported to processor.
In the state that reseting pin exports high level, when the CP pins of d type flip flop input one except rising edge is in addition to
State when, when such as 0V signals of failing edge or non-edge transition signal, the D pin output voltage signals of d type flip flop, D triggerings
Device can enable QN pins keep the state of voltage signal currently exported.Further as QN pin connection processing devices, therefore should
Voltage signal is exported eventually by QN pins to processor.
In the state that reseting pin exports low level, when the CP pins of d type flip flop input a rising edge or failing edge
Or when other any states, the voltage signal of d type flip flop D pins output directly exports.And d type flip flop can enable QN pins lasting defeated
Go out high level.
The operation principle of another d type flip flop is specifically indicated with table 2 below：
Another operation principle of 2 d type flip flop of table
Specifically, reseting pin can be specially following implemented form.
Preferably, reset unit 407 specifically includes diode 901, the second capacitance 902, second resistance 903；
Second capacitance 902 is in parallel with second resistance 903, the first end that the second capacitance 902 is connected with second resistance 903 with
The reseting pin 805 of d type flip flop connects, and connects the cathode of diode 901, the output of the anode connection conversion module of diode
End；The second end ground connection that second capacitance 902 is connected with second resistance 903, between ground terminal and the output end of conversion module
It is connected with the 4th resistance 707；
When the output end of conversion module exports high level, diode current flow, the second capacitor charging, to answering for d type flip flop
Position pin exports high level；When the output end of conversion module exports low level, diode shutdown, the second capacitance passes through the second electricity
Resistance is discharged over the ground, and high level is exported to the reseting pin of d type flip flop；The resistance value of second resistance ensures that the second capacitance is charged to height
Retention time after level is the first duration.
Specifically, when the output end of conversion module exports high level to diode, diode is in the conduction state, from
And can be to the second capacitor charging, and the reseting pin of d type flip flop exports high level at this time；
When the output end of conversion module exports low level to diode, diode is off state, and the second capacitance is logical
Second resistance electric discharge is crossed, the reseting pin of d type flip flop exports high level at this time；Second resistance can be adjusted to ensure second
The electric discharge duration of capacitance.Due to the transmission up to 12-bit data transmission time of single communication data, the second electricity is adjusted
Resistance ensures the electric discharge duration of the second capacitance, i.e. it is the first duration that the second capacitance, which is charged to the retention time after high level,
A length of time span more than or equal to needed for R485 transmission 12-bit data when wherein first；
Further, when the output end of conversion module persistently exports low level to diode, diode remains in shutdown
State, after off state is more than the first duration, i.e. it is more than the first duration that the time of high level is kept after the second capacitor charging,
Then the reseting pin of d type flip flop exports low level.
By above-mentioned discussion it is found that the function of recovery module is main there are two：One is the conversion module institute that will be received
The first pulse train sent is converted to the edge of second signal, to recover original RS-485 signals, further as
The recovery module of signal processing apparatus is connected with processor, therefore, the second signal that processor is used to be exported according to recovery module
It is handled.Another is when recovery module receives low level for a long time, and does not receive pulse signal, and recovery module needs
Acquiescence output high level, so as to be properly received the signal of RS-485 interface circuits next time.
The concrete structure and operation principle of each unit has been described in detail in the above, enumerates two separately below specifically
Example.
Example one, as shown in fig. 6, Fig. 6 is a kind of signal processing apparatus signal processing flow provided in an embodiment of the present invention
Schematic diagram.When conversion module reception is the signal that positive port is inputted when RS-485 interface circuits just connect, RS-485 interfaces
The start bit and stop bits for the communication data that circuit is transmitted are high level.The third of first signal 1101 as shown in FIG. 6
Shown in the communication data transfer period 1107.
After blocking unit effect of first signal 1101 by conversion module, the second pulse train 1102 is formed.From
It can be seen that in Fig. 6, each pulse in second pulse train sequentially corresponds to a signal saltus step in first signal
Edge, the saltus step of the transition edges and the corresponding signal in first signal of each pulse in second pulse train
Edge is in the same direction.
After effect of second pulse train 1102 by the rectification unit of conversion module, third pulse train is formed
1103.As can be seen from Figure 6, each pulse in the third pulse train sequentially corresponds to one in second pulse train
Pulse, all pulses in the third pulse train are in-phase pulse.
After effect of the third pulse train 1103 by the isolated location of conversion module, the first pulse train is formed
1104.As can be seen from Figure 6, each pulse in first pulse train sequentially corresponds to one in the third pulse train
Pulse, all pulses in first pulse train are in-phase pulse.To, each pulse in the first pulse train according to
Ordered pair answers a signal transition edges in first signal.
Recovery module generates reseting pin signal 1106 according to the first pulse train 1104, it is seen then that when the first signal corresponds to
When output has specific communication data, that is, when having rising edge and failing edge, reseting pin signal 1106 is always high level state.
Recovery module generates second signal 1105 according to the first pulse train 1104 at this time.As it can be seen that each letter in the second signal
Number transition edges sequentially correspond to a pulse in first pulse train.Specifically, each signal in second signal
The rising edge or each signal in second signal that transition edges sequentially correspond to a pulse in first pulse train
Transition edges sequentially correspond to the failing edge of a pulse in first pulse train.
Further, after the first pulse train 1104 is in third communication data transmission period section in the first duration 1108 not
When exporting pulse, the reseting pin signal of recovery module is after the first duration 1108 after third communication data transmission period section
Start to export low level, so that first duration 1108 after third communication data transmission period section of second signal 1105 is followed by
Output high level.
Can be seen that by example one, when RS-485 interface circuits just connect, signal processing apparatus recovered second letter
Number consistent with the first signal, the start bit and stop bits of specific communication data are high level.And do not transmitting specific communication
When data, second signal also persistently exports high level, to ensure that next time receives the accuracy of RS-485 communication datas.
The concrete structure and operation principle of each unit has been described in detail in the above, enumerates two separately below specifically
Example.
Example two, as shown in fig. 7, Fig. 7 is another signal processing apparatus signal processing stream provided in an embodiment of the present invention
Journey schematic diagram.When the signal that positive port is inputted when it is RS-485 interface circuit reversal connections that conversion module, which receives, RS-485 connects
The start bit and stop bits for the communication data that mouth circuit is transmitted are low level.The of first signal 1101 as shown in Figure 7
Shown in four communication data transmission periods 1201.
After blocking unit effect of first signal 1101 by conversion module, the second pulse train 1102 is formed.From
It can be seen that in Fig. 7, each pulse in second pulse train sequentially corresponds to a signal saltus step in first signal
Edge, the saltus step of the transition edges and the corresponding signal in first signal of each pulse in second pulse train
Edge is in the same direction.
After effect of second pulse train 1102 by the rectification unit of conversion module, third pulse train is formed
1103.As can be seen from Figure 7, each pulse in the third pulse train sequentially corresponds to one in second pulse train
Pulse, all pulses in the third pulse train are in-phase pulse.
After effect of the third pulse train 1103 by the isolated location of conversion module, the first pulse train is formed
1104.As can be seen from Figure 7, each pulse in first pulse train sequentially corresponds to one in the third pulse train
Pulse, all pulses in first pulse train are in-phase pulse.To, each pulse in the first pulse train according to
Ordered pair answers a signal transition edges in first signal.
Recovery module generates reseting pin signal 1106 according to the first pulse train 1104, it is seen then that when the first signal corresponds to
When output has specific communication data, that is, when having rising edge and failing edge, reseting pin signal 1106 is always high level state.
Recovery module generates second signal 1105 according to the first pulse train 1104 at this time.As it can be seen that each letter in the second signal
Number transition edges sequentially correspond to a pulse in first pulse train.Specifically, each signal in second signal
The rising edge or each signal in second signal that transition edges sequentially correspond to a pulse in first pulse train
Transition edges sequentially correspond to the failing edge of a pulse in first pulse train.
Further, after the first pulse train 1104 is in fourth communication data transmission period section in the first duration 1202 not
When exporting pulse, the reseting pin signal of recovery module is after the first duration 1202 after fourth communication data transmission period section
Start to export low level, so that first duration 1202 after fourth communication data transmission period section of second signal 1105 is followed by
Output high level.
Can be seen that by example two, when RS-485 interface circuit reversal connections, signal processing apparatus recovered second letter
Number with the first signal on the contrary, the start bit of specific communication data and stop bits are high level.And do not transmitting specific communication
When data, second signal also persistently exports high level, to ensure that next time receives the accuracy of RS-485 communication datas.
It can be seen from the above：Since conversion module is exported according to the positive port of RS-485 interface circuits or negative terminal mouth
The saltus step situation of the first signal generate and the first pulse train and export, and each pulse in the first pulse train sequentially corresponds to
A signal transition edges in first signal, and all pulses in the first pulse train are in-phase pulse, therefore first
Pulse train only describes the timing information that saltus step occurs for signal in the first signal, does not reflect the transition edges in the first signal
Saltus step direction has ignored generated saltus step direction and RS-485 interface circuits under RS-485 interface circuit reversal connection situations at this time
The opposite situation in generated saltus step direction in the case of just connecing, i.e., no matter RS-485 interface circuits are just connecing or reversal connection, modulus of conversion
Block can describe the timing information that saltus step occurs for the signal in first signal by the first pulse train.Further as recovery
Module is generated according to the first pulse train and second signal and is exported, and each signal transition edges in second signal sequentially correspond to the
A pulse in one pulse train, i.e. characteristic of the recovery module based on RS-485 interface circuit transmission datas, i.e. transmission communication
When data, start bit and stop bits are high level, do not transmit RS-485 interface circuits output high level during communication data, into
The timing information of saltus step occurs according to signal described in first pulse train for one step, to produce RS-485 interface circuits
Just connecing correct communication data information, i.e. second signal under state.
As it can be seen that no matter RS-485 interface circuits are just to connect or reversal connection, the embodiment of the present invention can be by that will receive
First signal is converted to the first pulse train that the timing information of saltus step occurs for signal in the first signal of description, then according to above-mentioned
The characteristic and the first pulse train of RS-485 interface circuit transmission datas recover RS-485 interface circuits and are just connecing under state correctly
Communication data information, can be with the purpose of normal communication, further in the reversal connection of RS-485 interface circuits to realize
Improve the reliability of communication.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
God and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (9)
1. a kind of signal processing apparatus, which is characterized in that including：Conversion module and recovery module, the input of the conversion module
The positive port of end connection RS-485 interface circuits or negative terminal mouth, the output end of the conversion module connect the defeated of the recovery module
Enter end, the output end connection processing device of the recovery module；
The jump for the first signal that the conversion module is used to be exported according to the positive port of the RS-485 interface circuits or negative terminal mouth
Becoming situation and generate the first pulse train and simultaneously exports, all pulses in first pulse train are in-phase pulse, and described the
Each pulse in one pulse train sequentially corresponds to a signal transition edges in first signal；
The recovery module is used to generate second signal according to first pulse train and export, every in the second signal
A signal transition edges sequentially correspond to a pulse in first pulse train.
2. device as described in claim 1, which is characterized in that the conversion module specifically includes：With the RS-485 interfaces
The blocking unit of the positive port of circuit or the connection of negative terminal mouth, the rectification unit being connect with the blocking unit, with the rectification list
The output end of the isolated location of member connection, the isolated location connects the recovery module；
The blocking unit is used to generate the second pulse train according to the saltus step situation of first signal and export, described second
Each pulse in pulse train sequentially corresponds to a signal transition edges in first signal, second pulse train
In each pulse transition edges and the transition edges of the corresponding signal in first signal it is in the same direction；
The rectification unit is used to negate the negative-going pulse in second pulse train or will be in second pulse train
Direct impulse negate, obtain third pulse train, all pulses in the third pulse train are in-phase pulse；
The isolated location is for obtaining first pulse train according to the third pulse train and exporting.
3. device as claimed in claim 2, which is characterized in that the blocking unit specifically includes the first capacitance and the first electricity
Resistance；
One end of first capacitance connects positive port or the negative terminal mouth of the RS-485 interface circuits, other end connection described the
One resistance；One end of the first resistor connects first capacitance, other end ground connection；
A tie point between the first resistor and first capacitance is the first output end of the blocking unit, described
The ground terminal of first resistor is the second output terminal of the blocking unit.
4. device as claimed in claim 2, which is characterized in that the rectification unit is rectifier bridge；
The first input end of the rectifier bridge and the second input terminal are separately connected the first output end and second of the blocking unit
Output end, the third output end of the rectifier bridge and the 4th output end are separately connected the third input terminal and of the isolated location
Four input terminals.
5. device as claimed in claim 2, which is characterized in that the isolated location is photoelectric coupling circuit or controllable switch electricity
Road.
6. device as described in claim 1, which is characterized in that the recovery module includes d type flip flop；
The CP pins of the d type flip flop connect the output end of the conversion module, and the QN pins of the d type flip flop connect the place
Device is managed, the D pins of the d type flip flop are connect with the QN pins；
Occur in the output signal of the rising edge or failing edge of the signal that the CP pins of the d type flip flop input, the QN pins
Saltus step.
7. device as claimed in claim 6, which is characterized in that the recovery module further includes reset unit, and the reset is single
The input terminal of member connects the output end of the conversion module, and the output end of the reset unit connects the reset of the d type flip flop
Pin；
The reset unit is used for：
When the output end of the conversion module exports high level, high level is exported to the reseting pin of the d type flip flop, so that
The d type flip flop work；
When the output end of the conversion module exports the time span of low level and holding no more than the first duration, to the D
The reseting pin of trigger exports high level, so that the d type flip flop works；Wherein, first duration is greater than or equal to
R485 transmits the time span needed for 12-bit data；
When exporting the time span of low level and holding in the output end of the conversion module and being more than first duration, to described
The reseting pin of d type flip flop exports low level, so that the d type flip flop resets.
8. device as claimed in claim 7, which is characterized in that the reset unit specifically includes diode, the second capacitance,
Two resistance；
Second capacitance is in parallel with the second resistance, the first end that second capacitance is connected with the second resistance with
The reseting pin of the d type flip flop connects, and connects the cathode of the diode, and the anode of the diode connects the conversion
The output end of module；
The second end ground connection that second capacitance is connected with the second resistance, in the output of ground terminal and the conversion module
3rd resistor is connected between end；
When the output end of the conversion module exports high level, the diode current flow, second capacitor charging, to described
The reseting pin of d type flip flop exports high level；When the output end of the conversion module exports low level, the diode closes
Disconnected, second capacitance is discharged over the ground by the second resistance, and high level is exported to the reseting pin of the d type flip flop；
The resistance value of the second resistance ensures that the retention time after second capacitance is charged to high level is described first
Duration.
9. device as described in claim 1, which is characterized in that further include the processor, the processor is used for according to institute
The second signal for stating recovery module output is handled.
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| JP2013229839A (en) * | 2012-04-26 | 2013-11-07 | Tsushin Hoso Kokusai Kenkyusho:Kk | Information signal processing system, information signal processing device, information signal processing circuit, and information recording medium |
| CN103424660A (en) * | 2012-11-13 | 2013-12-04 | 万高(杭州)科技有限公司 | RS-485 communication interface polarity detection device, method and chip |
| CN203166862U (en) * | 2013-03-04 | 2013-08-28 | 海信科龙电器股份有限公司 | Non-polarized transmit-receive unit and RS-485 communication circuit |
| CN203326979U (en) * | 2013-07-09 | 2013-12-04 | 南京三能电力仪表有限公司 | Non-polar-connection RS485 circuit |
| CN204131543U (en) * | 2014-07-28 | 2015-01-28 | 珠海中慧微电子有限公司 | A kind of self-detection self-recoverage RS485 communicating circuit |
| CN104199338A (en) * | 2014-08-04 | 2014-12-10 | 珠海中慧微电子有限公司 | Communication control method of RS485 communication circuit |
| CN104216317A (en) * | 2014-08-15 | 2014-12-17 | 北京佳讯飞鸿电气股份有限公司 | Enabling signal control circuit used for improving data transmission reliability of RS485 bus |
| CN104184638A (en) * | 2014-09-15 | 2014-12-03 | 万高(杭州)科技有限公司 | Conflict prevention method, interface chip and communication network of RS-485 bus |
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