CN105978494A - Flip chip power amplifier with high yield and application thereof - Google Patents
Flip chip power amplifier with high yield and application thereof Download PDFInfo
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- CN105978494A CN105978494A CN201610289107.1A CN201610289107A CN105978494A CN 105978494 A CN105978494 A CN 105978494A CN 201610289107 A CN201610289107 A CN 201610289107A CN 105978494 A CN105978494 A CN 105978494A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
- H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
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Abstract
The invention discloses a flip chip power amplifier with a high yield and an application thereof. The flip chip power amplifier is characterized in that NM amplification units connected in parallel of the M-th cascaded amplification circuit in the output stage of the power amplifier are four arrays arranged symmetrically; each array comprises NM/4 amplification units connected in parallel; each amplification unit in each array is respectively connected with a corresponding ground wire GND flip chip node in a group of ground wires GND via the emitter or grid of the transistor by using the flip chip technology; and the amplification unit in each array is respectively connected with a corresponding power line VCC flip chip node in a group of power line VCC via the collector or grain of the transistor by using the flip chip technology. The flip chip power amplifier can use the clip chips with unified size to improve the density of grounded nodes of the power amplifier, thus achieving high yield and high reliability.
Description
Technical field
The present invention relates to radio-frequency power amplifier, the employing flip-chip of a kind of high efficiency high yield high reliability
The power amplifier that can balance heat radiation of technique and application thereof.
Background technology
Radio-frequency transmissions front-end module is the key components that rf terminal device realizes signal transmission.Current along with global radio communication
User quickly increases and the user's more high-end demand for experience to radio communication, and market is quick to the demand of the bandwidth of radio communication
Increase.In order to solve this market demand, global open private radio communication frequency range out is more and more and more and more crowded.
The modulation demodulation system that frequency range utilization rate is high, such as: WCDMA (the Wideband Code Division Multiple of 3G
Access, WCDMA), band CDMA (Code Division Multiple Access, CDMA), TD SDMA
(Time Division Synchronous Code Division MultipleAccess, TD-SCDMA), and gradually replace 3G skill
Art becomes the Long term evolution, LTE of the 4G technology of the market mainstream and includes paired spectrum pattern (Frequency
Domain duplexing, FDD) and non-paired spectrum mode (Time domain duplexing, TDD).These frequency range utilization rates
High various modulation demodulation systems all propose higher requirement to wireless communication terminal, such as: high-quality voice call, reduce
Mistake in data communication, the switching of quick voice data transmission, etc..
For main force's components and parts radio-frequency power amplifier and module thereof of radio-frequency transmissions front end, it is meant that in new frequency range profit
With under the high modulation demodulation system of rate, power amplifier must have the higher linearity to ensure that radiofrequency signal can amplify transmission
And distorted signals can be lacked as far as possible.The high linearity of general power amplifier means that reducing its output reduces output crystalline substance
The generation of the non-linear harmonic wave of body tube device.Power amplifier is core parts during radio communication connects, and is with solely
The form of vertical module occurs among wireless communication system.Existing power amplifier typically uses multicomponent to be integrated in a base
Form a module (MCM) on plate, its module may comprise and be not limited to following multiple elements: power amplifier chip,
Power-mode control circuitry is typically CMOS technology, and output matching circuit can use passive discrete component or passive semiconductor device
Part, radio-frequency (RF) switch is typically with GaAs pHEMT technique or SOI technology.Each chip is basic with the connected mode of substrate
Having two kinds, a kind of is by the pad on fly line technology chip and the pad node on substrate, and another kind is flip-chip skill
Art is directly docked by scolding tin or copper post by the metal salient point on chip and the node on substrate.
As a example by power amplifier output-stage connected mode, on market, existing major part power amplifier is by fly line technology handle
Power amplifier chip realizes being connected with substrate, and the biggest common configuration of the transistor is probably wafer through ground connection TWV.Fig. 1 shows
Show is the output stage amplifier circuit grounding design of the existing power amplifier in market, in Fig. 1 101,102 ..., 10 (N-1), 10N
To 131,132 ..., 13 (N-1), 13N (wherein N is integer) show all of basic amplifier circuit unit, each substantially
Amplifying unit can be made up of single-transistor and is likely to be composed in parallel by multiple less basic amplifying units.141-144 represents merit
Ground GND on rate amplifier chip, is to connect by the wafer of wafer substrate is through in GaAs HBT or pHEMT technique
Ground TWV, is the quasiconductor of degree of depth doping in LDMOS technique, may be by wafer substrate in CMOS technology
Wafer through ground connection TWV is possibly by the ground wire on bond pad fly line to substrate.151,152 ..., 15 (K-1),
15K (wherein K is integer) represents pad bond pad on the chip of amplifier RF output, and the voltage of output amplifier is even
Connect and radio frequency output is all to be connected to the load output matching net of amplifier by pad bond pad fly line on this K chip
Network.N number of basic amplifying unit parallel connection in amplifying circuit is by the emitter stage of HBT or pHEMT/LDMOS/CMOS
Grid is connected to ground GND and forms a N cellular array.Typically there is at least 4 such array connection methods such as Fig. 1 institute
Showing, this at least four array collectively constitutes amplifier output stage amplifying circuit.Ground GND is divided into two groups, and 141/142 is one group,
143/144 is another group, often organizes emitter stage or the grid of each basic amplifying unit connecting two arrays respectively.Two groups of ground GND
Position become vertical direction with pad bond pad on the radio frequency pio chip of 151-15K.Basic amplifying unit in each array
Colelctor electrode or drain are connected to pad bond pad 151-15K such as Fig. 1 on the chip of radio frequency output by the metal in chip technology
Shown in.This method of attachment is commonly used among the design of regulex, is also applied to the design of some linear amplifiers.This
Plant wafer through earthing mode radiating effect the best, as a example by business HBT transistor, the emitter stage of this business HBT transistor
Mostly in the superiors of transistor multi-layer material, electric current needs to flow through under emitter many by the emitting stage of transistor
Layer material includes ground level layer, collector layer, substrate layer, then passes through the coat of metal ground connection of wafer rear, so long one
Path can cause inductance and resistance excessive, thus heat transfer efficiency is very poor.
It is straight by the metal salient point on chip and the node on substrate that the common chip in another kind of market is connected by flip chip technology (fct)
Connected scolding tin or the docking of copper post.This mode is common in the high-performance processor chip of multi-pipe pin, and recent market gradually goes out
The circuit of existing power amplifier realizes power amplifier chip to be connected with substrate by flip chip technology (fct).This design is usually
Form to simply transforming of flip-chip as the fly line of figure 1 above links technique.As shown in Fig. 2 a, Fig. 2 b and Fig. 3 a, Fig. 3 b.
In Fig. 2 a/ Fig. 2 b 201,202 ..., in 20 (N-1), 20N (wherein N is integer) and Fig. 3 a/ Fig. 3 b 301,302 ...,
30 (N-1), 30N (wherein N is integer) are in the output stage amplifier circuit identical with the power amplifier in Fig. 1 described above
Basic amplifying unit, each unit can be made up of single-transistor and is likely to be composed in parallel by multiple less basic amplifying units.
In Fig. 2 a and Fig. 2 b in 241 and Fig. 3 a and 3b 341/342 represents the ground GND upside-down mounting joint on power amplifier chip
Point, each ellipse represents a big flip-chip node, and these flip-chip ground nodes generally use the most large-area weldering
Stannum or copper post are to expect to reach more preferable radiating effect.In Fig. 2 a 251,252 ..., 25 (K-1), 25K (wherein K
Integer) and Fig. 2 b in the 251 flip-chip nodes representing amplifier RF output lead, 351 in Fig. 3 a,
352 ..., 351 in 35 (K-1), 35K (wherein K is integer) and Fig. 3 b represent falling of amplifier RF output lead
Cartridge chip node, the voltage of output amplifier connects and radiofrequency signal output is all to flow through this big node (Fig. 2 a, figure
3a) or K little flip-chip node (Fig. 2 b, Fig. 3 b) is connected to the load of amplifier by scolding tin or copper post and exports
Distribution network.The difference of Fig. 2 a/ Fig. 3 a and Fig. 2 b/ Fig. 3 b is that Fig. 2 a/3a amp output node is by multiple minor node groups
Becoming string, Fig. 2 b/ Fig. 3 b amp output node is with a big node composition.Fig. 2 a/2b and Fig. 3 a/3b difference is
The big node of 241 in Fig. 2 a/2b covers the ground connection of all output stage amplifying units；Two big nodes in Fig. 3 a/3b
241/242 is divided into two groups of ground connection each containing half output stage amplifying unit.N number of four row the amplifying circuit base altogether of this each column
The parallel connection of this unit is connected to ground GND by the emitter stage of HBT or the grid of pHEMT/LDMOS/CMOS.With Fig. 1
Unlike Suo Shi, this GND is directly connected to chip transistor output stage by scolding tin or copper post in three dimensions
The emitter stage of HBT or the grid of pHEMT/LDMOS/CMOS, electric current needs not flow through multichip semiconductor layer material and half
Conductor substrate layers, electric current is directly from emitter stage or the grid of pHEMT/LDMOS/CMOS of the HBT of transistor output stage
Flow out the node (scolding tin or copper post) through flip-chip to the ground of substrate.A shortest grounded circuit substantially increases
Heat transfer efficiency.But the shortcoming of this design is due to other signal node and power amplifier heat radiation ground nodes size
The most unbalanced, flip-chip size of node differs, and causes the substrate after upside-down mounting and chip discontinuity, most important node
Especially the ground nodes of each cascaded stages level of power amplifier is usually because chip semiconductor material is passed in surface excessive stresses effect
Material, causes the fracture in chip semiconductor material layer, thus causes the reduction of product yield, in some instances it may even be possible to reduce the reliable of product
Property.
Summary of the invention
In place of the present invention solves above-mentioned the deficiencies in the prior art, it is provided that the upside-down mounting core of a kind of high yield balancing heat radiation
Sheet power amplifier and application thereof, to using the flip-chip node of unified size to improve the node of power amplifier ground connection
Density, thus reach high yield and high reliability.
The present invention solves that technical problem adopts the following technical scheme that
The flip-chip power amplifier of a kind of high yield of the present invention, including: M level Cascaded amplification circuit and output matching circuit；
The amplifying circuit of the i-th cascade of described M level Cascaded amplification circuit comprises NiThe individual unit amplifying unit being connected in parallel；
1≤i≤M and M >=2；
The input of the amplifying circuit that radiofrequency signal cascades from the i-th of described M level Cascaded amplification circuit is into and through NiIndividual
After the amplification of the unit amplifying unit being connected in parallel, then the input exporting the amplifying circuit to i+1 cascade is amplified,
Until after the amplification of the amplifying circuit of m-th cascade, it is thus achieved that Cascaded amplification signal also passes to described output matching circuit；
Described output matching circuit exports to antenna after described Cascaded amplification signal is carried out load optimized coupling, is characterized in:
The N of m-th Cascaded amplification circuit in the output stage of described power amplifier is setMThe individual unit being connected in parallel is amplified single
Unit is the big array of two groups of symmetric arrays；Often organizing big array and comprise two little arrays, each little array comprises NM/ 4 parallel connections are even
The unit amplifying unit connect；
One group of ground wire GND is set between two little arrays of an arbitrarily big array, thus forms two groups of ground wire GND；Described
Ground wire GND is to be formed by the arrangement of several flip-chip nodes；
One group of power line VCC is set；And described power line VCC is orthogonal with described two groups of ground wires；Described one group of power line
VCC is the output lead of m-th Cascaded amplification circuit, and is formed by the arrangement of several flip-chip nodes；
Each unit amplifying unit in each little array be respectively adopted controlled collapsible chip connec-tion and by the emitter stage of its transistor or
It is that ground wire GND flip-chip node corresponding in grid and one group of ground wire GND is connected；
Each unit amplifying unit in each little array be respectively adopted controlled collapsible chip connec-tion and by the colelctor electrode of its transistor or
The drain power line VCC flip-chip node corresponding for power line VCC with a group is connected.
The feature of the flip-chip power amplifier of high yield of the present invention lies also in:
Flip-chip node size in described power amplifier is the most identical.
The feature of the application of the flip-chip power amplifier of a kind of high yield of the present invention is: be applied to described power amplifier move
Dynamic terminal.
Compared with the prior art, the present invention has the beneficial effect that:
1, the fly line during the most of power amplifier in market uses such scheme one links, and power amplifier connects by wafer is through
Ground, this wafer through earthing mode radiating effect is the best, compare on market most of power amplifiers use fly line to connect and
For the through ground connection of wafer, the flip-chip power amplifier of the present invention uses the flip-chip node of unified size, and upside-down mounting connects
The signal of amplifier and heat radiation grounding design, this design not only decreases the use of fly line, decreases power amplifier chip
Area, and decrease the area of module, resistance and the inductance of ground connection can be greatly reduced simultaneously, thus improve amplifier
Heat transfer efficiency, it is possible to increase the efficiency of amplifier, make module product integrated level higher, cost is lower.
2, the flip-chip of the present invention uses the upside-down mounting node of unified size, uses high density more piece at power amplifier ground connection
Point replaces existing big node inversely installed power amplifier design, thus on the basis of realizing equilibrium heat radiation grounding design,
The uneven distribution of the semiconductor surface stress produced after decreasing upside-down mounting, directly enhances the power using this controlled collapsible chip connec-tion
The product yield of amplifier batch production.Reducing thus decrease the disconnected of quasiconductor inner layers of material due to semiconductor surface stress
Split, the reliability of the power amplifier product using controlled collapsible chip connec-tion can be mentioned.This reverse installation process reduces semiconductor die
The junction temperature of body pipe, thus improve the efficiency of power amplifier.In actual applications, what this reverse installation process can more balance dissipates
Heat, can save chip area simultaneously.
3, the Amplifier Design in the such scheme of market is for 2G circuit, 3G circuit, or 4G networking；This
Bright power amplifier can pass through controlled collapsible chip connec-tion and use unified upside-down mounting node size, is not affecting this amplifier
On the basis of volume production yield and product reliability, this power amplifier can be improved by improving the heat dispersion of power amplifier
Efficiency in different modes and/or under different communication standard.
4, using the mobile terminal in existing scheme on market, every grade needs multiple power amplifier circuits to carry out turning of implementation pattern
Change.The power amplifier earthing mode of the present invention, can apply to multi-stage cascade amplifier, so that mobile terminal minimizing area/
Volume, can save the cost of mobile terminal, simultaneously because output stage amplifier can effectively be dispelled the heat, thus improves mobile whole
The linearity of end and the efficiency of mobile terminal.
Accompanying drawing explanation
Fig. 1 is existing fly line technology intermediate power amplifier output stage amplifier circuit wafer through ground connection schematic diagram；
Fig. 2 a is existing flip chip technology (fct) intermediate power amplifier output stage big node ground connection schematic diagram；
Fig. 2 b is that the existing flip chip technology (fct) intermediate power amplifier output stage big node big node of ground connection connects power line schematic diagram；
Fig. 3 a is existing flip chip technology (fct) intermediate power amplifier output stage binode ground connection schematic diagram；
Fig. 3 b is that the existing flip chip technology (fct) intermediate power amplifier output stage big node of binode ground connection connects power line schematic diagram；
Fig. 4 is flip chip technology (fct) intermediate power amplifier ground connection schematic diagram of the present invention.
Fig. 5 a is a kind of flip chip technology (fct) intermediate power amplifier output stage big node ground connection entirety domain upside-down mounting node schematic diagram；
Fig. 5 b is flip chip technology (fct) power amplifier output-stage multinode ground connection entirety domain upside-down mounting node schematic diagram of the present invention.
Detailed description of the invention
In the present embodiment, the flip-chip power amplifier of a kind of high yield, is that the amplifying circuit utilizing at least two-stage is with cascade side
Formula connects, and is attached power amplifier and substrate by the technology of flip-chip, to Cascaded amplification circuit at different levels in amplifier
Earthing mode realizes the high performance heat radiation of power amplifier with the method for designing of high density node upside-down mounting.This power amplifier is owing to adopting
With flip chip technology (fct), output-stage circuit can significantly more efficient ground connection dispel the heat, it is achieved thereby that one can be put down more efficiently
The design of weighing apparatus heat radiation, improves the efficiency of amplifier on the premise of the hold amplifier linearity.Specifically, this multimode
Power amplifier includes: M level Cascaded amplification circuit and output matching circuit；The i-th level of M level Cascaded amplification circuit therein
The amplifying circuit of connection comprises NiThe individual unit amplifying unit being connected in parallel；1≤i≤M and M >=2；
The input of the amplifying circuit that radiofrequency signal cascades from the i-th of M level Cascaded amplification circuit is into and through NiIndividual parallel connection
After the amplification of the unit amplifying unit connected, then the input exporting the amplifying circuit to i+1 cascade is amplified, until
After the amplification of the amplifying circuit of m-th cascade, it is thus achieved that Cascaded amplification signal also passes to output matching circuit；
Output matching circuit exports to antenna after Cascaded amplification signal is carried out load optimized coupling.
In the present embodiment, the fly line that the power amplifier being different from the existing most of mobile phone wireless communication plans in market uses connects
Technique, and the through earthing mode of wafer to dispel the heat to power amplifier.As shown in Figure 4, a kind of power amplification of the present invention
Device uses flip chip technology (fct) and keeps upside-down mounting node size consistent, uses the amplifier ground radiating mode of high density multinode.
The N of m-th Cascaded amplification circuit in this power amplifier output-stageMThe individual unit amplifying unit being connected in parallel is symmetric arrays
Four arrays；Each array comprises NMThe unit amplifying unit that/4 are connected in parallel, this at least four array collectively constitutes amplification
Device output stage amplifier circuit.
Ground wire GND is divided into two groups, often organizes the transmitting of each unit amplifying unit of two arrays connected respectively in four arrays
Pole or grid.Described power amplifier uses flip chip technology (fct) and keeps all flip-chip node size consistent, specifically,
On chip, all of upside-down mounting node includes: all of ground wire node, all of VCC node, and other letter of power amplifier
Number node, the size all maintained like, in the present embodiment, the unified cylinder for diameter 70 microns.In each array, unit is amplified
The colelctor electrode of unit or drain are directly connected to power line node by the metal (scolding tin or copper post) in controlled collapsible chip connec-tion.
This method of attachment may be used among the design of regulex, it is also possible to is applied among the design of some linear amplifiers.
These two groups of ground wire GND are lined up two row by X flip-chip node and form；Wherein X is that arbitrary integer is according to circuit
Depending on chip area and heat radiation need.
Each unit amplifying unit in each array is respectively by the emitter stage of its transistor or grid and one group of ground wire GND
In corresponding ground wire GND flip-chip node be connected；
Each unit amplifying unit in each array is respectively by the colelctor electrode of its transistor or drain and one group of power line VCC
Corresponding power line VCC flip-chip node is connected；
This group power line VCC is the output lead of m-th Cascaded amplification circuit, and is formed a line by upside-down mounting node on K chip
Composition；Wherein, K is integer, and K > 3, generally its quantity is by the area of chip with to power output matching demand and load defeated
The impedance optimizing regulation gone out is determined.
In addition these two groups of ground wires and one group of power line VCC are for being vertically arranged.
In the present embodiment, the present invention uses the upside-down mounting node of unified size as shown in Figure 4, and this puts with existing flip chip power
Big device design uses big upside-down mounting node (241 in Fig. 2,341,342 in Fig. 3) different as shown in Figures 2 and 3.
In whole power amplifier chip domain upside-down mounting node schematic diagram, such as Fig. 5 a, shown in 5b, 501,502 ... wait expression core
All of upside-down mounting node on sheet, wherein 511,512 in Fig. 5 a are power amplifier upside-down mounting ground nodes, and other is all signal joint
Point；Wherein 511,512,513,514 in Fig. 5 b are power amplifier upside-down mounting ground nodes, and other is all signal node.
The big node that same existing flip-chip power amplifier design power amplifier ground connection as shown in Figure 5 a uses
(in Fig. 5 a 501,502) are different, and the present invention uses the upside-down mounting node of unified size as shown in Figure 5 b, the power of the present invention
Amplifier ground upside-down mounting node (in such as Fig. 5 b 511,512,513,514) is with other upside-down mounting node size one on chip
Causing, simply the present invention uses the design of local multinode high density node to improve connecing of power amplifier power amplifier ground connection
Ground thermal conductivity.The emitter current of the power amplifier HBT transistor of the flip-chip of present invention application flows out and directly passes through scolding tin
Or copper post is to substrate ground, shorter thermal conductance path substantially increases the heat transfer efficiency of amplifier, thus with connecing that balance is dispelled the heat
Ground mode reduces the junction temperature of this power amplifier semiconductor transistor, thus improves the efficiency of power amplifier.Should in reality
In with, the earthing mode of this flip-chip can also save the area of chip area and module.
Wherein the design of multi-stage cascade power amplifier can be the semiconductor technology of any applicable amplifier, such as can include and
It is not limited to the technology of CMOS, the technology of SOI, the technology of GaAs HBT, the technology of GaAs pHEMT, GaN HEMT
Technology, the technology of LDMOS, it might even be possible to be the combination of multiple semiconductor technology, such as amplifier the first order amplify electricity
Route CMOS or SOI technology design, second level amplifying circuit is by GaAs HBT Technology design.Wherein load output matching
Impedor in circuit can be passive discrete component, or passive element based on semiconductor integration technology, or based on
Substrate process, but it is not limited to above-mentioned implementation, it is also possible to it is the combination of above-mentioned multiple technologies.
The present invention mainly applies and can include being not limited to mobile phone at rf terminal equipment, panel computer, notebook computer,
The Wireless Telecom Equipment of vehicle electronics, Wireless Telecom Equipment of Internet of Things etc..In addition the present invention can also apply at other wireless
Among communication equipment, including being not limited to communication base station, satellite wireless communication, military Wireless Telecom Equipment etc..Therefore originally
The technical scheme that invention is proposed, can apply to need many power modes and the adjustable any wireless communication terminal of bandwidth of operation,
And do not limited by concrete communications band.Any change on physical circuit or chip layout way of realization, is included in this
Within the covering scope of patent.
Claims (3)
1. a flip-chip power amplifier for high yield, including: M level Cascaded amplification circuit and output matching circuit；Institute
The amplifying circuit of the i-th cascade stating M level Cascaded amplification circuit comprises NiThe individual unit amplifying unit being connected in parallel；
1≤i≤M and M >=2；
The input of the amplifying circuit that radiofrequency signal cascades from the i-th of described M level Cascaded amplification circuit is into and through NiIndividual
After the amplification of the unit amplifying unit being connected in parallel, then the input exporting the amplifying circuit to i+1 cascade is amplified,
Until after the amplification of the amplifying circuit of m-th cascade, it is thus achieved that Cascaded amplification signal also passes to described output matching circuit；
Described output matching circuit exports to antenna after described Cascaded amplification signal is carried out load optimized coupling, it is characterized in that:
The N of m-th Cascaded amplification circuit in the output stage of described power amplifier is setMThe individual unit being connected in parallel is amplified single
Unit is the big array of two groups of symmetric arrays；Often organizing big array and comprise two little arrays, each little array comprises NM/ 4 parallel connections are even
The unit amplifying unit connect；
One group of ground wire GND is set between two little arrays of an arbitrarily big array, thus forms two groups of ground wire GND；Described
Ground wire GND is to be formed by the arrangement of several flip-chip nodes；
One group of power line VCC is set；And described power line VCC is orthogonal with described two groups of ground wires；Described one group of power line
VCC is the output lead of m-th Cascaded amplification circuit, and is formed by the arrangement of several flip-chip nodes；
Each unit amplifying unit in each little array be respectively adopted controlled collapsible chip connec-tion and by the emitter stage of its transistor or
It is that ground wire GND flip-chip node corresponding in grid and one group of ground wire GND is connected；
Each unit amplifying unit in each little array be respectively adopted controlled collapsible chip connec-tion and by the colelctor electrode of its transistor or
The drain power line VCC flip-chip node corresponding for power line VCC with a group is connected.
The flip-chip power amplifier of high yield the most according to claim 1, is characterized in that: described power amplifier
In flip-chip node size the most identical.
3. an application for the flip-chip power amplifier of high yield, is characterized in that: by merit as claimed in claim 1 or 2
Rate amplifier is applied to mobile terminal.
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