CN105960670B - Image element circuit and extraction circuit parameter and the method that compensation in pixel is provided - Google Patents
Image element circuit and extraction circuit parameter and the method that compensation in pixel is provided Download PDFInfo
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- CN105960670B CN105960670B CN201480074742.7A CN201480074742A CN105960670B CN 105960670 B CN105960670 B CN 105960670B CN 201480074742 A CN201480074742 A CN 201480074742A CN 105960670 B CN105960670 B CN 105960670B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
- G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0693—Calibration of display systems
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
System reads desired circuit parameter from following image element circuit, and the image element circuit including light-emitting device, providing the drive device to the light-emitting device, programming input and storage device for storing programming signal for will program driving current.One embodiment of the extraction system ends drive device and predetermined voltage is supplied into the light-emitting device from external source, make light-emitting device electric discharge until the light-emitting device ends, and then read while the light-emitting device is ended the voltage on the light-emitting device.The voltage on each light-emitting device in multiple image element circuits can be read via identical outer lines in the different time.The compensation scheme based on electric charge in pixel is also discussed, it can extract embodiment with external parameter and be used together.
Description
Technical field
The present invention relates generally to active matrix organic light-emitting device (AMOLED) display, and it is this kind of more particularly to extracting
The parameter of image element circuit and light-emitting device in display.
Background technology
Include relative to conventional LCD device, the advantages of active matrix organic light-emitting device (" AMOLED ") display compared with
Low power consumption, manufacture flexible and faster refresh rate.Compared with conventional LCD device, do not have in displayer
There is backlight, and thus each pixel is made up of the OLED of the different colours independently to light.OLED is based on by by program voltage control
The electric current of the driving transistor supply of system lights.The size of the power and caused light in the pixel that are consumed in each pixel has
Relation.
The performance impact of output quality transistor driven and OLED in itself in pixel based on OLED, wherein driving is brilliant
Body pipe is generally made up of the material for including but is not limited to non-crystalline silicon, polysilicon or metal oxide.Specifically, driving transistor
Threshold voltage and mobility tend to pixel ageing and changed.In order to keep picture quality, it is necessary to programmed by adjusting
Voltage compensates come the change to these parameters.For that purpose it is necessary to extract this kind of parameter from drive circuit.It is simple for extracting
The greater room increased on the display base plate needed for drive circuit of the component of this kind of parameter in drive circuit, and
Therefore light is reduced from the aperture that OLED launches or region.
When being biased in saturation state, the I-V characteristic of thin film drive transistor is depended on as manufacturing crystal
The mobility and threshold voltage of the function of the material of pipe.Therefore, the different film transistor devices on display pannel are applied
It may be showed non-homogeneous due to aging and mobility and the processing differences of threshold voltage (process variation)
Sexual behaviour.Therefore, there may be different drain currents for constant voltage, each device.Extreme example is probably one
Individual device may be with Low threshold and low mobility compared with the second device with high threshold voltage and high mobility.
Therefore, using considerably less electronic building brick with keep it is expected aperture in the case of, to driving TFT and OLED it is non-
Uniformity parameters (that is, threshold voltage VthAnd mobility [mu]) extraction become challenging.It is desirable that, using as few as possible
Component extract this kind of parameter in the drive circuit for OLED pixel so that pixel aperture maximizes.It is also expected to
It is that compensation (in-pixel compensation) in parameter extraction and pixel is combined together so that life performance optimizes.
In pixel compensation refer to not externally from image element circuit extract any information in the case of to the aging inside image element circuit or
The compensation that Time Dependent parameter is carried out.
The content of the invention
Embodiment disclosed by the invention reads from image element circuit or extracts desired circuit parameter, and the image element circuit includes
Light-emitting device, for programmable driving current to be provided to the drive device, programming input and use of the light-emitting device
In the storage device of storage programming signal.The extracting method includes:End the drive device, will be predetermined from external source
Voltage supply makes the light-emitting device discharge until light-emitting device cut-off, and then in the hair to the light-emitting device
Electro-optical device reads the voltage on the light-emitting device when being ended.In one embodiment, in the different time via identical
Outer lines read the voltage of each light-emitting device in multiple image element circuits.It can influence in the following way to institute
It is expected the reading of parameter:The image element circuit is connected to charge-pump amplifier;Make the charge-pump amplifier and the pixel
Circuit is isolated to provide voltage output that is proportional to charge level or being integrated to the electric current from the image element circuit;Read
Take the voltage output of the charge-pump amplifier;And determined at least from the voltage output of the charge-pump amplifier
One image element circuit parameter.
Another embodiment extracts circuit parameter from image element circuit in the following way:The drive device is turned on so that
The voltage of the light-emitting device rises above the level of its conducting voltage;End the drive device so that the hair
Voltage on electro-optical device is discharged until the light-emitting device ends by the light-emitting device;And then in described device quilt
The voltage on the light-emitting device is read during cut-off.
Another embodiment extracts circuit parameter from image element circuit in the following way:The image element circuit is programmed;
Turn on the drive device;And read by (i) when predetermined voltage is applied to the drive device flow through it is described
The electric current of drive device or (ii) read the voltage in the drive device when making predetermined electric current flow through the drive device
To extract the parameter of the drive device.
Another embodiment extracts circuit parameter from image element circuit in the following way:The drive device is turned on, and
Change the voltage between the grid of the driving transistor and source electrode or drain electrode so that the driving transistor is between the very first time
When period operates in linear zone and is operated during the second time interval in saturation region, the driving transistor is measured
Electric current and voltage;And the electric current and voltage measured according to the driving transistor operated in described two areas
Relation extract the parameter of the light-emitting device.
Many other embodiments have shown and described herein.
In view of the detailed description for the various embodiments and/or each side that refer to the attached drawing is carried out, of the invention is above-mentioned and another
Outer each side and each embodiment will be apparent to those skilled in the art.Next the brief theory of accompanying drawing is provided
It is bright.
Brief description of the drawings
After following detailed description and refer to the attached drawing is read, foregoing and other advantages of the invention will become it is aobvious and
It is clear to.
Fig. 1 is the block diagram of the displayer with compensation control;
Fig. 2 is the circuit diagram for the data extraction circuit of the double transistor pixels in the displayer in Fig. 1;
Fig. 3 A are the data extraction electricity for the threshold voltage for being used to the extract n-type driving transistor and mobility delivered in Fig. 2
The signal timing diagram of the signal on road;
Fig. 3 B are the data for being used to extract OLED characteristic voltage delivered in the case of n-type driving transistor in Fig. 2
Extract the signal timing diagram of the signal of circuit;
Fig. 3 C are the numbers for being used to extract the threshold voltage of n-type driving transistor in a manner of directly reading delivered in Fig. 2
According to the signal timing diagram of the signal of extraction circuit;
Fig. 4 A are the data extraction electricity for the threshold voltage for being used to the extract p-type driving transistor and mobility delivered in Fig. 2
The signal timing diagram of the signal on road;
Fig. 4 B are the data for being used to extract OLED characteristic voltage delivered in the case of p-type driving transistor in Fig. 2
Extract the signal timing diagram of the signal of circuit;
Fig. 4 C are the numbers for being used to extract the threshold voltage of p-type driving transistor in a manner of directly reading delivered in Fig. 2
According to the signal timing diagram of the signal of extraction circuit;
Fig. 4 D be deliver in Fig. 2 be used for OLED conducting voltages are directly read by using n-type or p-type driving transistor
Data extraction circuit signal signal timing diagram;
Fig. 5 is the data of the extracting parameter of three transistor driver circuits of the pixel for the displayer in Fig. 1
Extract the circuit diagram of circuit;
Fig. 6 A are to deliver in Fig. 5 to be used to extract the threshold voltage of driving transistor and the data extraction circuit of mobility
The signal timing diagram of signal;
Fig. 6 B are the signal sequences for being used to extract the signal of the data extraction circuit of OLED characteristic voltage delivered in Fig. 5
Figure;
Fig. 6 C are that the data for the threshold voltage for extracting driving transistor in a manner of directly reading delivered in Fig. 5 carry
The signal timing diagram of the signal of sense circuit;
The data extraction circuit for being used to extract OLED characteristic voltage in a manner of directly reading that Fig. 6 D are delivered in Fig. 5
The signal timing diagram of signal;
Fig. 7 is the extraction week for reading the driving transistor of the image element circuit in displayer and OLED characteristic
The flow chart of phase;
Fig. 8 is the flow chart of different parameter extraction cycle and final application;And
Fig. 9 is the block diagram and flow chart of the component of data extraction system.
Figure 10 is the threshold voltage and mobility to the driving transistor in the revision for extracting the circuit in Fig. 5
Data extraction circuit signal signal timing diagram;
Figure 11 deliver to for extract the circuit in Fig. 5 revision in OLED characteristic voltage data extraction circuit
Signal signal timing diagram;
Figure 12 is the data extraction for reading pixel charge from the drive circuit of the pixel in Fig. 1 displayer
The circuit diagram of circuit;
Figure 13 is delivered to for reading Figure 12 of pixel status data extraction circuit by externally initializing node
Signal signal timing diagram;
Figure 14 is for reading the flow chart of the pixel status of Figure 12 circuit by externally initializing node;
Figure 15 is delivered to for reading Figure 12 of pixel status data extraction circuit by internally initializing node
Signal signal timing diagram;
Figure 16 is for reading the flow chart of the pixel status in Figure 12 circuit by internally initializing node;
Figure 17 is that the use for reading pixel charge from two different pixels in the displayer in Fig. 1 is public
The circuit diagram of a pair of circuits monitoring the circuit as Figure 12 of line;
Figure 18 is the signal of the data extraction circuit sent when sharing monitoring line to Figure 17 for reading pixel charge
Signal timing diagram;And
Figure 19 is the pixel status for reading a pair of circuits as Figure 17 circuit using common monitoring line
Flow chart.
Figure 20 A are the schematic circuit diagrams for improving image element circuit.
Figure 20 B be a diagram that the timing diagram of the operation of the image element circuit of Figure 20 A compensation of the use based on electric charge.
Figure 21 be a diagram that the operation for being used to obtain the readout of the parameter of driving transistor of Figure 20 A image element circuit
Timing diagram.
Figure 22 be a diagram that the sequential for being used to obtain the operation of the readout of OLED parameter of Figure 20 A image element circuit
Figure.
Figure 23 be a diagram that the improvement operation of the readout for being used to obtain OLED parameter of Figure 20 A image element circuit
Timing diagram.
Figure 24 is for the circuit from the image element circuit extraction parasitic capacitance using external compensation.
Figure 25 illustrates the image element circuit available for current measurement.
Figure 26 is using the exemplary pixel circuits and its correlation timing figure that realization is compensated in the pixel based on electric charge.
Figure 27 shows image element circuits identical from the image element circuit shown in Figure 26 but using different temporal orders.
Figure 28 is that EM signals are divided into two signals to be used in the another of the internal node of the image element circuit of compensation reset
The example of image element circuit.
Figure 29 is can to read OLED current or the image element circuit of voltage and another example of timing diagram via monitoring line.
Figure 30 is change to driving transistor or aging compensates based on electric charge compensation pixel circuit and at that time
Another example of sequence figure.
Figure 31 is the image element circuit and correlation timing figure for having the discharge cycle for making storage discharge at least in part
Another example.
Figure 32 is similar with Figure 31, in addition to driving transistor T1 is programmed to the effect as switch.
Figure 33 is to read OLED via monitoring line (it can also serve as the reference line and/or data wire for programming information)
The image element circuit and its correlation timing figure of voltage or electric current.
Figure 34 be a diagram that another image element circuit and the correlation timing figure for the another method for realizing EM functions.
Figure 35 is conventional image element circuit.
Figure 36 is the image element circuit that one or more switches can be shared between the row and/or row of pel array.
Figure 37 shows image element circuit similar but using different programming operations from Figure 36 image element circuit.
Figure 38 illustrates another image element circuit for sharing one or more switches.
Figure 39 A and 39B illustrate image element circuit and correlation timing figure with discharge cycle.
Figure 40 A and 40B illustrate another image element circuit and correlation timing figure with the reset cycle.
Figure 41 A and 41B are illustrated with another image element circuit and the correlation timing figure resetted with readout interval.
Figure 42 A and 42B are illustrated with another image element circuit and the correlation timing figure resetted with readout interval.
Figure 43 A and 43B illustrate with programming cycle after readout interval another image element circuit and correlation timing figure.
Figure 44 A and 44B are illustrated with after the programming cycle being programmed using cut-off current to image element circuit
Another image element circuit and correlation timing figure of readout interval.
Figure 45 A and 45B illustrate another image element circuit and correlation timing figure with discharge cycle.
Figure 46 A and 46B illustrate another image element circuit and correlation timing figure with the reset cycle.
Figure 47 A and 47B are illustrated with another image element circuit and the correlation timing figure resetted with readout interval.
Figure 48 A and 48B are illustrated with another image element circuit and the correlation timing figure resetted with readout interval.
Figure 49 A and 49B illustrate another image element circuit and correlation timing with the readout interval after programming cycle
Figure.
Although the present invention easily carries out various modifications and alternative form, it is illustrated by way of example in the accompanying drawings
Specific embodiment and will it describe in detail in this manual.It is to be appreciated, however, that the present invention be not intended to be limited to it is disclosed
Special shape.On the contrary, present invention covering is fallen into as defined by the appended claims in the spirit and scope of the present invention
All modifications, equivalent and alternative solution.
Embodiment
Fig. 1 is the electronic display system 100 for having active matrix area or pel array 102, in the pel array 102
In, n × m pixelated array 104 is arranged with the construction of row and column.In order to facilitate example, two rows and two row are illustrate only.
The outside of the active matrix area of pel array 102 is outer peripheral areas 106, wherein being disposed with for driving and controlling pel array
102 peripheral circuit.Peripheral circuit includes address or gate driver circuit 108, data or source driver circuit 110, control
Device 112 processed and optional supply voltage (for example, Vdd) driver 114.The control gate driver 108 of controller 112, source drive
Device 110 and supply voltage driver 114.Gate drivers 108 are under the control of controller 112 to address wire or selection line
SEL [i] and SEL [i+1] etc. are operated, pixel that the address wire or selection line correspond in pel array 102 or
Every a line in image element circuit 104.In following pixels shares construction, grid or address driver circuits 108 can also can
Selectively to global selection line GSEL [j] and selectively right/GSEL [j] is operated, global selection line GSEL [j] or/
GSEL [j] operates to multiple rows (every two row of such as pixel 104) in the pixel 104 in pel array 102.Source electrode drives
Dynamic device circuit 110 operates under the control of controller 112 to voltage data line Vdata [k] and Vdata [k+1] etc., and one
Each row that bar voltage data line corresponds in the pixel 104 in pel array 102.Voltage data line gives each pixel 104
Transport the voltage-programming information for the brightness for representing each light-emitting device in pixel 104.Such as electric capacity in each pixel 104
The memory elements such as device store the voltage-programming information until luminous or drive cycle turns on light-emitting device.Optional supply voltage
Driver 114 controls supply voltage (EL_Vdd) line under the control of controller 112, and a power voltage line corresponds to pixel
Each row or column in pixel 104 in array 102.
Display system 100 also include from DOL Data Output Line VD [k] and VD [k+1] etc. read output data electric current supply with
Reading circuit 120, each row that a data output line corresponds in the pixel 104 in pel array 102.
Represented as it is known, each pixel or image element circuit 104 in display system 100 need to use in pixel 104
The information (form of curtage or electric charge) of the brightness of light-emitting device is programmed.Frame defines programs week including (i)
Phase or stage and (ii) driving or the period in light period or stage, use in programming cycle or during the stage expression brightness
Program voltage each pixel in display system 100 is programmed, and in driving or light period or during the stage
Each light-emitting device in each pixel is switched on so as to be sent out with the brightness to match with the program voltage being stored in memory element
Light.Therefore, frame is one in many still images for the complete moving image that composition is shown in display system 100.Extremely
It is few the two schemes for being used for programming and drive pixel to be present:Line by line or frame by frame.In programming line by line, compiled in next line pixel
Before journey and driving, one-row pixels are programmed and then driven.In programming frame by frame, the institute first in display system 100
There is capable pixel to be all programmed, and drive the pixel of all rows immediately.Any scheme can be in every frame beginning or knot
Of short duration vertical blanking time is used at beam, pixel is both unprogrammed in the vertical blanking time or is not driven.
Component positioned at the outside of pel array 102 can be disposed in the same thing for being disposed with pel array 102 thereon
Manage in the outer peripheral areas 106 around the pel array 102 on substrate.These components include gate drivers 108, source electrode driver
110th, optional supply voltage driver 114 and electric current supply and reading circuit 120.Alternately, one in outer peripheral areas 106
A little components can be disposed in from the identical substrate of pel array 102 and other components are disposed on different substrates, or
All component in person's outer peripheral areas can be disposed on the substrate different from the substrate for being disposed with pel array 102 thereon.
Gate drivers 108, source electrode driver 110 and supply voltage driver 114 form display driving circuit together.Some constructions
In display driving circuit may include gate drivers 108 and source electrode driver 110 but not include supply voltage control 114.
When being biased in saturation state, metal-oxide semiconductor (MOS) (MOS) transistor (is concerned with thin in the case of this
Film transistor) single order I-V characteristic be modeled as:
Here, IDIt is drain current and VGSThe voltage difference being consequently exerted between the gate terminal of transistor and source terminal.
The film transistor device in display system 100 is applied due to aging and mobility (μ) and threshold voltage (Vth) processing it is poor
It is different and show heterogeneity behavior.Therefore, the constant voltage difference V for being applied between grid and source electrodeGS, picture element matrix
Each transistor on 102 may have different drain currents based on uncertain mobility and threshold voltage:
ID(i,j)=f (μi,j,Vth i,j)
Here, i and j be pixel in n × m array of the pixel of Fig. 1 grade of pel array 102 coordinate (row and
Row).
Fig. 2 shows the data extraction system 200 including pair transistor (2T) drive circuit 202 and reading circuit 204.
In the display system with 2T image element circuits 104, supply voltage control 114 is selectable.Reading circuit 204 is that electric current supplies
Data should be collected with the part of reading circuit 120 and from a row pixel 104 as shown in Figure 1.Reading circuit 204 includes electric charge
Pump circuit 206 and box switch circuits 208.Voltage source 210 is provided supply voltage to drive circuit by box switch circuits 208
202.Charge pump circuit 206 and box switch circuits 208 be used in array 102 top side or bottom side (such as in Fig. 1
In voltage driving 114 and electric current supply and reading circuit 120).This be by with it is straight on the identical substrate of pel array 102
Connect manufacture or realized by microchip being bonded on substrate or being used as the flex of hybrid solution.
Drive circuit 202 includes driving transistor 220, organic luminescent device 222, drain electrode storage 224, source electrode
Storage 226 and selection transistor 228.Supply lines 212 provides to the column driver circuit of the grade of drive circuit 202 one
Supply voltage and supervised path (being directed to reading circuit 204).Selection line input 230 is connected to the grid of selection transistor 228
Pole.Programming data input 232 is connected to the grid of driving transistor 220 by selection transistor 228.Driving transistor 220
Drain electrode be connected to power voltage line 212 and the source electrode of driving transistor 220 is connected to OLED 222.Selection transistor 228 is controlled
Connection of the programming input 232 processed to the grid of driving transistor 220.Source electrode storage 226 is connected to driving transistor
Between 220 grid and source electrode.Drain electrode storage 224 is connected between grid and the drain electrode of driving transistor 220.OLED
222 have the parasitic capacitance for being modeled as capacitor 240.Power voltage line 212, which equally has, is modeled as posting for capacitor 242
Raw electric capacity.Driving transistor 220 in this example is the thin film transistor (TFT) made of non-crystalline silicon.It is of course also possible to using such as
The other materials such as polysilicon or metal oxide.Node 244 is that the source electrode of driving transistor 220 is connected with OLED 222 anode
Circuit node together.In this example, driving transistor 220 is n-type transistor.As explained belowly, p can be used
Type driving transistor replaces n-type driving transistor 220 to realize system 200.
Reading circuit 204 includes charge pump circuit 206 and box switch circuits 208.Charge pump circuit 206 is included with positive and negative
The amplifier 250 of input.The negative input end of amplifier 250 is connected to the (C of capacitor 252int), capacitor 252CintTo putting
It is in parallel with switch 254 in the feedback loop of the output end 256 of big device 250.254 (S4) of switch were used in the pre-charging stage phase
Between to capacitor 252CintDischarged.The positive input terminal of amplifier 250 is connected to common-mode voltage input 258 (VCM).Amplification
The output 256 of device 250 represents driving transistor 220 as will be described below and OLED 222 various extracting parameters.
Box switch circuits 208 include being used to control the multiple switch to and from the electric current of pixel driver circuit 202
260 (S1), 262 (S2) and 264 (S3).260 (S1) of switch are used to the discharge path of ground connection during reseting stage.Open
Close 262 (S2) and power supply connection is provided during the normal operating of pixel 104 and during the integration phase of reading.Switch 264
(S3) it is used to charge pump circuit 206 with power line voltage 212 (VD) is isolated.
As shown in Fig. 2 for each pixel 104 double transistor pixels drive circuit 202 it is overall read design come
From on the fact that:The electric charge being stored in the parasitic capacitance represented by the capacitor 240 for crossing over the both ends of OLED 222, which has, to be driven
The threshold voltage and the useful information of mobility and OLED 222 conducting voltage of dynamic transistor 220.The extraction of this kind of parameter
Available for various applications.For example, such parameter can be used to modify to the programming data of pixel 104, with compensation pixel
Change and holding picture quality.Such parameter can also be used to preaging pel array 102.These parameters can also be used to comment
Estimate the process yields (process yield) of manufacture pel array 102.These or other parameters can pass through tool as described herein
Have monitoring line etc. be connected to the line of image element circuit for extracting or reading such parameter any image element circuit and by
Extraction.
It is assumed that (the C of capacitor 240OLED) be initially discharged, then (the C of capacitor 240OLED) need some times to make to charge to
The voltage level that driving transistor 220 is ended.This voltage level is the function of the threshold voltage of driving transistor 220.Apply extremely
(the V of programming data input 232Data) voltage must be sufficiently low so that OLED 222 burning voltage (setteld
voltage)(VOLED) it is less than the on state threshold voltages of of OLED 222 itself.In the case, VData–VOLEDIt is driving transistor
220 threshold voltage (Vth) linear function.In order to extract the migration of the grade film transistor device of driving transistor 220
Rate, to consider this kind of device as the momentary stabilization of threshold voltage and the function of mobility (transient settling).
It is assumed that the threshold voltage deviation between the grade TFT devices of driving transistor 220 is compensated, then start after integrating with constant
The voltage for being spaced the node 244 of sampling is only the function of the mobility for the grade TFT devices of driving transistor 220 paid close attention to.
Fig. 3 A to 3C are to be used to extract it is assumed that in the case that driving transistor 220 is n-type transistor applying in Fig. 2
Threshold voltage and mobility and OLED 222 conducting voltage etc. the ginseng of driving transistor 220 in drive circuit 200
The signal timing diagram of the control signal of several components.This kind of control signal can be applied the source drive into Fig. 1 by controller 112
Device 110, gate drivers 108 and electric current supply and reading circuit 120.Fig. 3 A are to show that application drives crystal to extraction is used for
The timing diagram of the signal of the threshold voltage of pipe 220 and the extraction circuit 200 of mobility.The selection that Fig. 3 A include being used in Fig. 2 is defeated
Enter the signal 302 at end 230, the signal 304 to switch 260For switching 262 signal 306For opening
Close 264 signal 308For switching 254 signal 310For the programming data input 232 in Fig. 2
Program voltage signal 312, node 244 in Fig. 2 voltage 314 and output end 256 for the amplifier 250 in Fig. 2
Output voltage signal 316.
Fig. 3 A show the four-stage of readout, i.e. reseting stage 320, integration phase 322, pre-charging stage 324
With the reading stage 326.The process is by the way that high selection signal 302 is activated to selection input 230 to start.Selection signal 302
Height will be retained as in whole readout as shown in Figure 3A.
During reseting stage 320, in order to provide the discharge path of ground connection, by the input signal 304 of switch 260It is arranged to high.In this stage, to the signal 306 of switch 262 To the signal 308 of switch 264
To the signal 310 of switch 254It is retained as low.Sufficiently high voltage level (VRST_TFT) to be applied to programming data defeated
Enter (the V of end 232Data) maximized with flowing through the electric current of driving transistor 220.Therefore, the voltage quilt at the node 244 in Fig. 2
Ground is discharged to, thinks that next cycle prepares.
During integration phase 322, to the signal 306 of switch 262Height is remained, this is provided from voltage source 210
Pass through the charge path of switch 262.In this stage, to the signal 304 of switch 260To the signal 308 of switch 264With the signal 310 to switch 254It is retained as low.(the V of program voltage input 232Data) it is set to voltage
Level (VINT_TFT) so that once (the C of capacitor 240OLED) be fully charged, the voltage at node 244 is less than OLED's 222
Conducting voltage.Such case will make any minimum interference from OLED 222 during the reading of driving transistor 220.
Before the time of integration closes to an end, in order that (the C of capacitor 240OLED) on electric charge isolate with the remainder of circuit, will deliver to
(the V of program voltage input 232Data) signal 312 be reduced to VOFF。
When time of integration long enough, (the C of capacitor 240 is stored inOLED) on electric charge by be driving transistor 220 threshold value
The function of voltage.For the time of integration of shortening, the voltage at node 244 will undergo incomplete stabilization and be stored in capacitor
240(COLED) on electric charge by be driving transistor 220 threshold voltage and mobility both function.Therefore, it is feasible
It is that two single readings are obtained to extract the two parameters by using short integration phase and long integration phase.
During pre-charging stage 324, by the signal 304 of switch 260With the signal 306 to switch 262It is set as low.Once to the input signal 310 of switch 254It is set high to, amplifier 250 is just set to
Unity feedback constructs.In order to guard amplifier 250 output stage from the short circuit current from supply voltage 210 influence, when to
The signal 306 of switch 262When being set to low, to the signal 308 of switch 264Uprise.When switch 264 is closed
When closing, the parasitic capacitance 242 of power line is precharged to common-mode voltage VCM.Common-mode voltage VCM must be less than OLED 222
The voltage level of conducting voltage.Before pre-charging stage closes to an end, the signal 310 of switch 254 will be delivered toIt is set as
It is low, so that charge-pump amplifier 250 is prepared for read cycle.
During the stage of reading 326, the signal 304 of switch 260 will be delivered toDeliver to the signal 306 of switch 262With the signal 310 for delivering to switch 254It is set as low.By the signal 308 for switch 264Remain
Height, to provide from drive circuit 202 to the charge transfer path of charge-pump amplifier 250.By sufficiently high voltage 312
(VRD_TFT) apply to (the V of program voltage input 232Data), so that the channel resistance of driving transistor 220 minimizes.If product
Divide cycle long enough, then accumulation is in (the C of capacitor 252int) on electric charge be not the time of integration function.Therefore, in this case
The output voltage of charge-pump amplifier 250 be equal to:
For the time of integration of shortening, accumulate in (the C of capacitor 252int) on electric charge be given by the following formula:
Therefore, output voltage 256 of the charge-pump amplifier 250 at the end of read cycle is equal to:
Therefore, can be by reading the centre in stage 326 and the read-out amplifier 250 at the end of read cycle 326
Output voltage 256 extract the threshold voltage of driving transistor 220 and mobility.
Fig. 3 B are the timing diagrams of the reading process of the threshold value conducting voltage parameter for the OLED 222 in Fig. 2.OLED
222 reading process equally includes four-stage:Reseting stage 340, integration phase 342, pre-charging stage 344 and reading stage
346.As the reading process of the driving transistor 220 in Fig. 3 A, OLED reading process is by using high selection signal
302 activation select inputs 230 and started.Deliver to the signal 304 of switch 260Deliver to the signal 306 of switch 262Deliver to the signal 308 of switch 264With the signal 310 for delivering to switch 254Sequential and Fig. 3 A in
The reading process of driving transistor 220 is identical.For programming signal 332, the letter for node 244 programmed to input 232
Numbers 334 and different from the signal in Fig. 3 A for the output signal 336 of the output of amplifier 250.
During reseting stage 340, by the sufficiently high (V of voltage level 332RST_OLED) apply to programming data input
232(VData), to flow through the maximization of the electric current of driving transistor 220.Therefore, the voltage at the node 244 in Fig. 2 is by opening
Close 260 and be discharged to ground, think that next cycle prepares.
During integration phase 342, the signal 306 of switch 262 is delivered toHeight is remained, this is provided from voltage source
210 pass through the charge path of switch 262.(the V of program voltage input 232Data) it is set to (the V of voltage level 332INT_OLED),
Once so that (the C of capacitor 240OLED) be fully charged, the voltage at node 244 is greater than OLED 222 conducting voltage.
In the case, at the end of integration phase 342, driving transistor 220 drives constant current to pass through OLED 222 always.
During pre-charging stage 344, cut driving transistor 220 by the signal 332 for delivering to programming input 232
Only.(the C of capacitor 240OLED) be allowed to discharge, it reaches OLED 222 conducting voltage at the end of pre-charging stage 344.
During the stage of reading 346, by the sufficiently high (V of voltage 332RD_OLED) apply to program voltage input 232
(VData), so that the channel resistance of driving transistor 220 minimizes.If pre-charging stage long enough, capacitor 252
(Cint) both ends burning voltage by be not precharge time function.Therefore, the charge-pump amplifier at the end of the reading stage
250 output voltage 256 is given by the following formula:
By to switch 264 signal 308Height is remained, to provide from drive circuit 202 to charge-pump amplifier
250 charge transfer path.Therefore, output voltage signal 336 can be used for the conducting voltage for determining OLED 220.
Fig. 3 C are the timing diagrams directly read for the driving transistor 220 using the extraction circuit 200 in Fig. 2.Directly
Connecing reading process has reseting stage 350, pre-charging stage 352 and integration/reading stage 354.The readout passes through activation
Selection input 230 in Fig. 2 and start.In whole readout as shown in Figure 3 C, the choosing of selection input 230 is delivered to
Select signal 302 and be retained as height.For switching 260 signal 364With the signal 366 for switch 262Herein
It is invalid (inactive) in readout.
During reseting stage 350, in order to provide the discharge path of virtual ground, by the signal 368 for switch 264With the signal 370 for switch 254It is set as height.By the sufficiently high (V of voltage 372RST_TFT) apply to programming
(the V of input 232Data), to flow through the maximization of the electric current of driving transistor 220.Therefore, node 244 is discharged to common mode electricity
Press 374 (VCMRST), think that next cycle prepares.
During pre-charging stage 352, by by (the V of blanking voltage 372OFF) apply to the programming input 232 in Fig. 2
End driving transistor 220.In order to enter line precharge to line capacitance, by being total to for the positive input terminal for delivering to amplifier 250
Mode voltage input 258 is improved to VCMRD.At the end of pre-charging stage 352, make the signal 370 for delivering to switch 254Cut
Only, so that charge-pump amplifier 250 is to prepare in next cycle.
When integration/reading stage 354 starts, by (the V of program voltage input 232Data) improve to making driving transistor
The V of 220 conductingsINT_TFT372.(the C of capacitor 240OLED) start stored charge, until VDataSubtract voltage at node 244 etc.
In the threshold voltage of driving transistor 220.At the same time, proportional electric charge is accumulated in the (C of capacitor 252INT) in.Therefore,
At the end of read cycle 354, the output voltage 376 of the output end 256 of amplifier 250 is the threshold value electricity provided by equation below
The function of pressure:
As represented by above-mentioned formula, in the case where directly reading, output voltage has positive polarity.Therefore, crystal is driven
The threshold voltage of pipe 220 can be determined by the output voltage of amplifier 250.
As described above, the driving transistor 220 in Fig. 2 can be p-type transistor.Fig. 4 A to 4C are in driving transistor
220 apply when being p-type transistor into Fig. 2 be used for extract voltage threshold and migration from driving transistor 220 and OLED 222
The signal timing diagram of the signal of the component of rate.In the example that driving transistor 220 is p-type transistor, driving transistor 220
Source electrode is connected to supply lines 212 (VD) and the drain electrode of driving transistor 220 is connected to OLED 222.Fig. 4 A are to show driving
Transistor 220 applies when being p-type transistor to for extracting threshold voltage and the extraction circuit of mobility from driving transistor 220
The timing diagram of 200 signal.Fig. 4 A show for the selection input 230 in Fig. 2, switch 260, switch 262, switch 264,
Switch 254, programming data input 232, the voltage signal 402 to 416 of the voltage at node 244 and output voltage 256.With
The following three stage carries out data extraction:Reseting stage 420, integration/pre-charging stage 422 and reading stage 424.
As shown in Figure 4 A, selection signal 402 is that low level is effective and the quilt in the whole reading stage 420,422 and 424
Remain low.In whole readout, the signal 404 of switch 260 is delivered toWith the signal 406 for delivering to switch 262It is retained as low (invalid).In reseting stage, common mode voltage level VCM is resetted in order to which node 244 is charged torst,
The signal 408 at 264 will be switchedWith the signal 410 at switch 254It is set as height.On charge pump input 258
Common-mode voltage input 258 (VCMrst) should be sufficiently low, to keep OLED222 to end.By programming data input 232VData
It is set as the sufficiently low (V of value 412RST_TFT), to provide the maximum charging current by driving transistor 220.
During integration/pre-charging stage 422, by the common mode voltage reduction on common-mode voltage input 258 to VCMintAnd
By (the V of programming input 232Data) increase to (V of level 412INT_TFT) so that driving transistor 220 will be led in the opposite direction
It is logical.If the distribution time long enough in this stage, the voltage at node 244 will be decreased until the grid of driving transistor 220
Reach the threshold voltage of driving transistor 220 to source voltage.Before this end cycle, in order that charge-pump amplifier 250
Prepared for the reading stage 424, deliver to the signal 410 of switch 254Step-down.
By by (the V of programming input 232Data) signal 412 at place is decreased to VRD_TFTSo that driving transistor 220 turns on
To start the reading stage 424.Now, (the C of capacitor 240 will be stored inOLED) on electric charge transmit to (the C of capacitor 252INT).
At the end of the reading stage 424, in order that charge-pump amplifier 250 is isolated with drive circuit 202, the signal of switch 264 will be delivered to
408It is set as low.Now, the output voltage signal 416V from amplifier out 256outIt is to be provided by equation below
Driving transistor 220 threshold voltage function:
Fig. 4 B are it is assumed that the threshold value for the OLED 222 being used in the case that driving transistor 220 is p-type transistor in Fig. 2
The timing diagram of extraction in the pixel of voltage.The extraction process and the extraction circuit for n-type driving transistor delivered in Fig. 3 A
The sequential of 200 signal is very similar.Fig. 4 B show for the selection input 230 in Fig. 2, switch 260, switch 262, open
Close the voltage signal of 264, switch 254, programming data input 232, the voltage at node 244 and amplifier out 256
432 to 446.Extraction process includes reseting stage 450, integration phase 452, pre-charging stage 454 and read the stage 456.This reads
It is to apply in each reading stage to drive circuit 202 extremely to go out the main distinction of the cycle compared with the readout interval in Fig. 4 A
(the V of programming data input 232Data) signal 442 voltage level.It is brilliant for the p-type thin film available for driving transistor 220
Body pipe, the selection signal 432 for delivering to selection input 230 is that low level is effective.In whole readout as shown in Figure 4 B
In, select input 230 to be retained as low.
Readout in reseting stage 450 by making (the C of capacitor 240 firstOLED) reset and start.Switch will be delivered to
260 signal 434It is set as height, to provide the discharge path of ground connection.In order that driving transistor 220 turns on, will deliver to
(the V of programming input 232Data) signal 442 be reduced to VRST_OLED。
In integration phase 452, the signal 434 of switch 260 will be delivered toWith the signal 436 to switch 262
Cut-off state and conducting state are respectively set as, to provide the charge path to OLED 222.(the C of capacitor 240OLED) be allowed to
Charged, the voltage 444 at node 244 exceeds OLED 222 threshold voltage so that OLED 222 is turned on.Integrating
Before stage 452 terminates, (the V of programming input 232 is delivered toData) voltage signal 442 improve to VOFFSo that driving transistor
220 cut-offs.
During pre-charging stage 454, (the C of capacitor 240OLED) on stored charge be discharged into OLED 222, directly
Voltage 444 at node 244 reaches OLED 222 threshold voltage.Moreover, in pre-charging stage 454, switch is being delivered to
264 signal 438With the signal 440 for delivering to switch 254While being set to conducting, switch 260 is delivered to
Signal 434With the signal 436 for delivering to switch 262Cut-off.This is that amplifier 250 is provided supply lines 212
(VD) it is precharged to the common-mode voltage input 258 (VCM) being arranged at the positive input terminal of amplifier 250 and provides condition.
At the end of pre-charging stage, make the signal 440 for delivering to switch 254Cut-off, so that charge-pump amplifier 250 is reading rank
Section 456 is prepared.
The reading stage 456 is by delivering to (the V of programming input 232Data) voltage 442 be reduced to VRD_OLEDWhen make drive
Dynamic transistor 220 is turned on and started.Now, it is stored in (the C of capacitor 240OLED) on electric charge be transferred to capacitor 252
(CINT), the output voltage 446 at the output end 256 of amplifier 250 is configured to OLED 220 threshold voltage by the capacitor
Function.
Fig. 4 C are for the driving crystal in the extraction system 200 in Fig. 2 when driving transistor 220 is p-type transistor
The signal timing diagram of the direct extraction of the threshold voltage of pipe 220.Fig. 4 C are shown for the selection input 230 in Fig. 2, switch
260th, switch 262, switch 264, switch 254, programming data input 232, voltage and output voltage 256 at node 244
Voltage signal 462 to 476.The extraction process includes pre-charging stage 480 and integration phase 482.However, in figure 4 c when
The special last reading stage 484 is illustrated in sequence figure, if to charge-pump amplifier 250 at the end of integration phase 482
Output is sampled, then can eliminate the reading stage 484.
The extraction process passes through simultaneously to the drain electrode storage 224 in Fig. 2, source electrode storage 226, electric capacity
(the C of device 240OLED) and capacitor 242 enter line precharge and start.Selection line input is delivered to therefore, activating as shown in Figure 4 C
230 signal 462, the signal 468 for delivering to switch 264 and the signal 470 for delivering to switch 254.In whole readout, deliver to
The signal 464 of switch 260With the signal 466 for delivering to switch 262It is retained as low.Common-mode voltage input 258
(VCM) voltage level determines voltage on supply lines 212 and thus determines the voltage at node 244.Common-mode voltage (VCM) should
When sufficiently low so that OLED 222 is not turned on.Deliver to (the V of programming input 232Data) voltage 472 be set to it is sufficiently low
Level (VRST_TFT) so that transistor 220 turns on.
When integration phase 482 starts, in order that the convection current of charge-pump amplifier 250 is overdrived, the electric current of transistor 220 enters
Row integration, the signal 470 of switch 254 will be delivered toCut-off.Threshold voltage and its grid as driving transistor 220
The function of pole-source voltage, the output voltage 256 of charge-pump amplifier 250 is by with constant speed rising.In integration phase
Before 482 terminate, make the signal 468 for delivering to switch 264Cut-off, so that charge-pump amplifier 250 and drive circuit
202 isolation.Therefore, the output voltage 256 of amplifier 250 is given by the following formula:
Here, ITFTIt is the conduct mobility and (V of driving transistor 220CM-VData-|Vth|) function drain current.Tint
It is the length of the time of integration.In optionally the stage 484 is read, the signal 468 of switch 264 is delivered toEnded, so that
Charge-pump amplifier 250 is isolated with drive circuit 202.Any time in the stage 484 can read to brilliant as driving
The output voltage 256 of the mobility of body pipe 220 and the function of threshold voltage is sampled.
Fig. 4 D are the timing diagrams directly read for the OLED 222 in Fig. 2.When electric using sufficiently high gate-to-source
When pressure makes the conducting of driving transistor 220, driving transistor 220 is used as the simulation of the anode terminal for accessing OLED 222
Switch.In the case, the voltage at node 244 is substantially equal to the voltage on supply lines 212 (VD).Therefore, driving is passed through
The driving current of transistor 220 by be only OLED 222 conducting voltage and supply lines 212 on the function of voltage that sets.Should
Driving current can be provided by charge-pump amplifier 250.When being integrated in certain time period, the output electricity of integrating circuit 206
Pressure 256 is exactly how many measurement weathered to OLED 222.
Fig. 4 D are to show the extraction circuit 200 applied to being used to extract conducting voltage from OLED 222 via directly reading
Signal timing diagram.Fig. 4 D show the three phases of readout, i.e. pre-charging stage 486, integration phase 487 and reading
Stage 488.The signal 489n or 489p of the selection input 230 that Fig. 4 D include being used in Fig. 2, the signal 490 for delivering to switch 260For switching 262 signal 491For switching 264 signal 492For switching 254 letter
Numbers 493For the node in the program voltage signal 494n or 494p, Fig. 2 of the programming data input 232 in Fig. 2
The output voltage signal 496 of 244 voltage 495 and output end 256 for the amplifier 250 in Fig. 2.
The process is started by activating the selection signal corresponding with the desired row of the pixel in array 102.Such as Fig. 4 D
Shown, selection signal 489n is effective for n-type selection transistor high level, and effective for p-type selection transistor low level.
In the case of n-type driving transistor, high selection signal 489n is applied to selection input 230.For driving transistor
220, in the case of p-type driving transistor, low signal 489p is applied to selection input 230.
During precharge cycle 486 and integration period 487, selection signal 489n or 489p will be kept effective.Herein
In reading method,Input 490 HesIt is invalid to input 491.During precharge cycle, in order to provide signal path, it will open
OFF signal 492With switching signal 493It is set as height, so that power line (CP) parasitic capacitance 242 and node 244 at
Common-mode voltage (the VCM that the non-inverting terminals that voltage is precharged to amplifier 250 are providedOLED).By sufficiently high driving electricity
Press signal 494n (VON_nTFT) or 494p (VON_pTFT) apply to (the V of data input pin 232Data), so that driving transistor 220 is made
Operated for analog switch.Therefore, supply voltage 212VD and node 244 are precharged to common-mode voltage (VCMOLED), think next
Cycle prepares.When integration phase 487 starts, in order that electric charge pump module 206 integrates to OLED 222 electric current, make
Switch input 493Cut-off.As (that is, the VCM of voltage 495 set in OLED 222 conducting voltage and node 244OLED)
Function, the output voltage 496 of electric charge pump module 206 will rise with constant speed.Before the end of integration phase 487, make
Switching signal 492Cut-off, so that electric charge pump module 206 is isolated with image element circuit 202.After at the moment, output voltage is permanent
Determine until electric charge pump module 206 is reset for another reading.When being integrated in certain time period, the output of integrator
Voltage is given by the following formula:
It is the measurement to OLED degree of agings.T in this formulaintIt is switching signal 493Trailing edge to opening
OFF signal 492Trailing edge between time interval.
It can be carried using the similar extraction process of the bicrystal cast drive circuit such as drive circuit in Fig. 2
Take such as threshold voltage of three transistor-type drive circuits of the part as shown in Figure 5 as data extraction system 500
With heterogeneity and the ageing parameter such as mobility.Data extraction system 500 includes drive circuit 502 and reading circuit 504.As
Electric current is supplied and a part for reading circuit 120, reading circuit 504 from a row pixel 104 as shown in Figure 1 collect data and
Including charge pump circuit 506 and box switch circuits 508.Voltage source 510 provides supply voltage (VDD) to drive circuit 502.Electricity
Lotus pump circuit 506 and box switch circuits 508 are used in top side or bottom side (the voltage drive such as in Fig. 1 of array 102
Move in 114 and electric current supply and reading circuit 120).This be by with the direct manufacture on the identical substrate of pel array 102
Or by the way that microchip is bonded on substrate or realized by being used as the flex of hybrid solution.
Drive circuit 502 includes driving transistor 520, organic luminescent device 522, drain electrode storage 524, source electrode and deposited
Storing up electricity container 526 and selection transistor 528.Selection line input 530 is connected to the grid of selection transistor 528.Programming input
End 532 is connected to the grid of driving transistor 520 by selection transistor 528.It is brilliant that selection line input 530 is also connected to output
The grid of body pipe 534.Output transistor 534 is connected to the source electrode and voltage monitoring output line 536 of driving transistor 520.Driving
The drain electrode of transistor 520 is connected to power voltage source 510 and the source electrode of driving transistor 520 is connected to OLED 522.Source electrode is deposited
Storing up electricity container 526 is connected between the grid and source electrode of driving transistor 520.It is brilliant that drain electrode storage 524 is connected to driving
Between the grid of body pipe 520 and drain electrode.OLED 522 has the parasitic capacitance for being modeled as capacitor 540.Monitor output voltage
Line 536 equally has the parasitic capacitance for being modeled as capacitor 542.Driving transistor 520 in this example is by non-crystalline silicon system
Into thin film transistor (TFT).Voltage node 544 is the point between the source terminal of driving transistor 520 and OLED 522.Originally showing
In example, driving transistor 520 is n-type transistor.Can be to realize instead of driving transistor 520 using p-type driving transistor
System 500.
Reading circuit 504 includes charge pump circuit 506 and box switch circuits 508.Charge pump circuit 506 is included in negative-feedback
There is (the C of capacitor 552 in ringint) amplifier 550.Between precharge phase, using 554 (S4) of switch come to capacitor 552
(Cint) discharged.Amplifier 550 has and capacitor 552 and switchs 554 negative input ends that are connected and defeated with common-mode voltage
Enter the positive input terminal of end 558 (VCM) connection.Amplifier 550, which has, represents driving transistor 520 as will be described below and OLED
The output end 556 of 522 various extracting parameters.
Box switch circuits 508 include being used for multiple switch 560,562 and for guiding electric current to and from drive circuit 502
564.Switch 560 is used to the discharge path of ground connection during reseting stage.Normal operating of the switch 562 in pixel 104
Period and the offer power supply connection during the integration phase of readout.Switch 564 is used to make charge pump circuit 506 and electricity
Source line voltage source 510 isolates.
In three transistor driver circuits 502, it is read out normal through monitoring line 536.Can also with Fig. 3 A to 3C
In the process similar mode of clock signal be read out by the voltage power line of power voltage source 510.For switching 560
Input signalThe input signal of switch 562The input signal of switch 564Switch 554 it is defeated
Enter signalSelect input 530 and the (V of program voltage input 532Data) accurate sequential be used to control read
The performance of circuit 504.During each stage of readout, some voltage levels are applied to programming data input 532
(VData) and common-mode voltage input 558 (VCM).
Three transistor-type drive circuits 502 can by program voltage input 532 and monitoring output end 536 discriminatively
It is programmed.Therefore, reseting stage and pre-charging stage can be merged together to form reset/pre-charging stage, the reset/pre-
It is integration phase and reading stage after charging stage.
Fig. 6 A be the driving transistor 520 being related in Fig. 5 threshold voltage and mobility extraction signal timing diagram.
The timing diagram includes selection input 530, switch 560, switch 562, switch 564, switch 554, the program voltage being used in Fig. 5
Input 532, driving transistor 520 grid at voltage, the voltage letter of the voltage at node 544 and output voltage 556
Numbers 602 to 618.Readout in Fig. 6 A has pre-charging stage 620, integration phase 622 and read the stage 624.The reading
Process by simultaneously drain-capacitor 524, source capacitor 526 and capacitor parasitics 540 and 542 are entered line precharge and
Start.Therefore, selection line voltage 602 is activated as shown in Figure 6A, delivers to the signal 608 of switch 564Switched with delivering to
554 signal 610In whole readout interval, the signal 604 of switch 560 is delivered to562 are switched with delivering to
Signal 606Remain low.
The voltage level of common mode input 558 (VCM) determines the voltage on output monitoring line 536 and thus determination node
Voltage at 544.Voltage to common mode input 558 (VCM) should be sufficiently low, so that OLED 522 is not turned on.It is being pre-charged
In stage 620, (the V of program voltage input 532 is delivered toData) 612 sufficiently high (V of voltage signalRST_TFT) so that driving transistor
520 conductings, and it is also sufficiently low so that OLED 522 is always maintained at ending.
When integration phase 622 starts, make the voltage 602 for delivering to selection input 530 invalid, so that electric charge can be deposited
Store up (the C of capacitor 540OLED) on.Voltage at node 544 will be begun to ramp up, and the grid voltage of driving transistor 520 will
With the capacitance of source capacitor 526 relative to source capacitor 526 and the ratio [C of the capacitance of drain-capacitor 524S1/
(CS1+CS2)] follow the voltage at node 544 to rise.Once the grid voltage of driving transistor 520 and the voltage at node 544
Difference be equal to driving transistor 520 threshold voltage, charging just will complete.Before the end of integration phase 622, make to deliver to switch
554 signal 610Cut-off, so that charge-pump amplifier 550 is to prepare in the reading stage 624.
On reading the stage 624, the signal 602 of selection input 530 is delivered in activation again.In programming input 532
(the V of voltage signal 612RD_TFT) sufficiently low so that driving transistor 520 keeps cut-off.Now, it is stored in (the C of capacitor 540OLED)
On electric charge be transferred to the (C of capacitor 552INT) and produce the output voltage proportional to the threshold voltage of driving transistor 520
618:
Before the end of stage 624 is read, the signal 608 of switch 564 is delivered toCut-off is so that charge pump circuit 506
Isolate with drive circuit 502.
Fig. 6 B are the timing diagrams for the input signal of the extraction of the conducting voltage of the OLED 522 in Fig. 5.Fig. 6 B include
For the selection input 530 in Fig. 5, switch 560, switch 562, switch 564, switch 554, program voltage input 532, drive
Move the voltage at the grid of transistor 520, the voltage at node 544, common-mode voltage input 558 and output voltage 556
Voltage signal 632 to 650.Readout in Fig. 6 B has pre-charging stage 652, integration phase 654 and read the stage 656.
Similar to the reading for the driving transistor 220 in Fig. 6 A, readout with pre-charging stage 652 simultaneously to drain electrode
The mode that capacitor 524, source capacitor 526 and capacitor parasitics 540 and 542 enter line precharge starts.Therefore, such as Fig. 6 B
It is shown to activate the signal 638 delivered to the signal 632 of selection input 530, deliver to switch 564554 are switched with delivering to
Signal 640In whole readout interval, signal 634With signal 636Remain low.Deliver to common mode electricity
Press (the VCM of input voltage 648 of input 558Pre) it should be high enough that OLED 522 is switched on.Deliver to programming input 532
(VData) (V of voltage 642Pre_OLED) sufficiently low to keep driving transistor 520 to end.
When integration phase 654 starts, it is invalid to make to deliver to the voltage 632 of selection input 530, with enable electric charge by
Store (the C of capacitor 540OLED) on.Voltage at node 544 will be begun to decline, and the grid voltage of driving transistor 520
By with the capacitance of source capacitor 526 relative to source capacitor 526 and the ratio [C of the capacitance of drain-capacitor 524S1/
(CS1+CS2)] follow the voltage at node 544 to decline.Once the voltage at node 544 reaches OLED 522 conducting voltage
(VOLED), electric discharge is just completed.Before the end of integration phase 654, make the signal 640 for delivering to switch 554Cut-off, so that
Charge pump circuit 506 is to prepare in the reading stage 656.
On reading the stage 656, the signal 632 of selection input 530 is delivered in activation again.In programming input 532
(the V of voltage signal 642RD_OLED) should be sufficiently low so that driving transistor 520 keeps cut-off.Then, it is stored in capacitor 540
(COLED) on electric charge be transferred to the (C of capacitor 552INT), led so as to be produced at electric discharge output end 556 with OLED 522
The output voltage 650 for the ratio that is pressed into that is powered:
Reading the front signal 638 of the end of stage 656Cut-off, so that charge pump circuit 506 and drive circuit 502
Isolation.
Line for electric current is provided as illustrated, monitoring output transistor 534 is driving transistor 520 or OLED 522
Property integration directapath.Reading can be performed in precharge cycle and integration period.However, Fig. 6 C are shown for extra
The last reading stage input signal timing diagram, if the output to charge pump circuit 506 at the end of integration phase is adopted
Sample, then it can eliminate the reading stage.Fig. 6 C include selection input 530, switch 560, switch 562, the switch being used in Fig. 5
564th, the voltage signal 662 of switch 554, program voltage input 532, the voltage at node 544 and output voltage 556 to
674.Therefore, the readout in Fig. 6 C has pre-charging stage 676, integration phase 678 and optional reading stage 680.
The direct integral readout of n-type driving transistor 520 in Fig. 5 as shown in Figure 6 C passes through simultaneously to drain electrode
Capacitor 524, source capacitor 526 and capacitor parasitics 540 and 542 enter line precharge and started.Therefore, as shown in Figure 6 C
Ground activation delivers to the signal 660 of selection input 530, delivers to the signal 666 of switch 564With the letter for delivering to switch 554
Numbers 668In whole readout interval, the signal 662 of switch 560 is delivered toWith the signal 664 for delivering to switch 562Remain low.The voltage level of common-mode voltage input 558 (VCM) determine the voltage on monitoring output line 536 and because
And determine the voltage at node 544.Voltage signal (the VCM of common-mode voltage input 558TFT) it is sufficiently low so that OLED 522 not
Conducting.Deliver to (the V of programming input 532Data) (V of signal 670ON_TFT) it is high enough that driving transistor 520 turns on.
When integration phase 678 starts, in order that charge-pump amplifier 550 can be to the electricity from driving transistor 520
Stream is integrated, and makes the signal 668 for delivering to switch 554Cut-off.Threshold voltage, mobility as driving transistor 520
With the function of grid-source voltage, the output voltage 674 of charge-pump amplifier 550 is declined with constant speed.In integration phase
Before end, make the signal 666 for delivering to switch 564Cut-off, so that charge pump circuit 506 is isolated with drive circuit 502.
Therefore, output voltage is given by the following formula:
Here, ITFTIt is the conduct mobility and (V of driving transistor 520Data-VCM-Vth) function drain current.Tint
It is the length of the time of integration.Any time in the stage 680 can read to the mobility and threshold as driving transistor 520
The output voltage 674 of the function of threshold voltage is sampled.
Fig. 6 D show the input signal directly read of conducting (threshold value) voltage for the OLED 522 in Fig. 5 when
Sequence figure.Fig. 6 D include selection input 530, switch 560, switch 562, switch 564, switch 554, the programming electricity being used in Fig. 5
The voltage signal 682 to 696 of voltage and output voltage 556 at pressure input 532, node 544.Readout in Fig. 6 D
With pre-charging stage 697, integration phase 698 and optional reading stage 699.
Readout in Fig. 6 D passes through simultaneously to drain-capacitor 524, source capacitor 526 and capacitor parasitics
540 and 542 enter line precharge and start.Deliver to the signal 682 of selection input 530 therefore, being activated to as shown in Figure 6 D, send
To the signal 688 of switch 564With the signal 690 for delivering to switch 554In whole readout interval, signal 684With signal 686Remain low.The voltage level of common-mode voltage input 558 (VCM) determines monitoring output line
Voltage on 536 and thus determine voltage at node 544.Voltage signal (the VCM of common-mode voltage input 558OLED) enough
Height is so that OLED 522 is turned on.(the V of programming input 532Data) (V of signal 692OFF_TFT) sufficiently low so that driving transistor 520
Keep cut-off.
When the stage of integration phase 698 starts, in order that charge-pump amplifier 550 can be to the electric current from OLED 522
Integrated, make the signal 690 for delivering to switch 554Cut-off.Threshold voltage and the both ends of OLED 522 as OLED 522
Voltage function, the output voltage 696 of charge-pump amplifier 550 will rise with constant speed.
Before the end of integration phase 698, make the signal 688 for delivering to switch 564Cut-off, so that charge pump circuit
506 isolate with drive circuit 502.Therefore, output voltage is given by the following formula:
Here, IOLEDIt is as (VCM-Vth) function OLED current, and TintIt is the length of the time of integration.It can read
Any time in during the stage 699 is taken to sample the output voltage of the function of the threshold voltage as OLED 522.
The technical staff of computer, software and network field will be understood that, can by using according to as noted herein and
Illustrated teaching and one or more general-purpose computing systems, microprocessor, digital signal processor, the microcontroller programmed
Device, application specific integrated circuit (ASIC), PLD (PLD), field programmable logic device (FPLD) and scene can compile
Journey gate array (FPGA) etc. conveniently realizes the controller 112 in Fig. 1.
In addition, two or more computing systems or equipment can be substituted by any controller described herein.Therefore, also
Such as redundancy can desirably be realized and replicate the principle and advantage of equal distribution processing to increase controller described herein
Robustness and performance.Controller can also be in computer system or in times using any appropriate interface mechanism and the communication technology
It is implemented in the system extended in meaning network environment, telecommunications of the communication technology for example including any appropriate format is (for example, sound
Sound and modem etc.), public switched telephone network (PSTN), enfeoffment data network (PDN), internet, Intranet and it
Combination etc..
Illustrated with reference to operation of the flow chart shown in Fig. 7 to example data extraction process.Flow in Fig. 7
Maximumlly the threshold voltage of simple drive circuit and move in the aperture that figure represents to be used to be determined to make pixel 104 in Fig. 1
The example machine readable of shifting rate.In this example and any other flowchart illustration herein, machine readable instructions
Including the algorithm performed by (a) processor, (b) controller and/or (c) one or more of the other appropriate processing unit.It is described
Algorithm, which can be embodied in, is stored in such as flash memory, CD-ROM, floppy disk, hard disk drive, digitized video (general) CD
(DVD) or in the software in the entity medium such as other storage devices, but those of ordinary skill in the art will be readily understood that,
Alternately, whole algorithms and/or some algorithm can be performed by equipment rather than processor, and/or with many weeks
The mode known is implemented in firmware or specialized hardware (for example, it can be by application specific integrated circuit (ASIC), programmable logic device
Part (PLD), field programmable logic device (FPLD), field programmable gate array (FPGA) and discrete logic etc. are realized).Example
Such as, any or all component of abstraction sequence can be realized by software, hardware and/or firmware.Moreover, can manually realize by
The some or all of machine readable instructions that flow chart (including Fig. 7) herein represents.In addition, though with reference to diagram herein
Flow chart (including Fig. 7) exemplary algorithm is illustrated, but those of ordinary skill in the art will be readily understood that, can
Alternatively, many other methods for performing example machine readable can be used.Such as, thus it is possible to vary the execution of module is suitable
Sequence, and/or can change, eliminate or combine some modules.
By making corresponding selection and line program conducting select studied pixel or image element circuit 104 (700).Once
Pixel 104 is have selected, reading is just performed with four-stage.Readout by first in reseting stage to OLED (Coled) two
The parasitic capacitance at end is discharged and started (702).Next, making driving transistor conducting sometime measure, this makes some electricity
Lotus can be accumulated in OLED ColedOn the electric capacity at both ends (704).In integration phase, end selection transistor, so that
OLED ColedCharge separation on the electric capacity at both ends and then by circuit parasitic capacitance (CP) it is precharged to known voltage electricity
Flat (706).Finally, in the reading stage, turn on driving transistor again, so that OLED ColedElectricity on the electric capacity at both ends
Lotus can be transferred to charge-pump amplifier output end (708).The output of amplifier is represented as mobility and threshold voltage
Function amount.The readout is to select pixel by cancelling while other pixels are corrected to prevent interference and complete
Into (710).
Fig. 8 is the difference for image element circuits such as three transistor circuits in the transistor circuit and Fig. 5 in Fig. 2
Extracting cycle and the flow chart of parameter application.One process is to be related to integration (800) in the pixel of electric charge transmission.By with concern
The related charge accumulation of parameter is in the internal capacitance of pixel (802).Then, such as charge pump or integrator are transferred the charge to
Deng outside reading circuit to establish proportion expression voltage (804).Another process is from pixel integration (off-pixel
) or direct integral (810) integration.By the outside reading circuit such as charge pump or integrator circuit come directly
Device current is integrated (812).
During the two, caused voltage is post-processed, to obtain the threshold voltage of such as driving transistor
Or the parameter (820) of the concern such as mobility or OLED conducting voltage.Then, the parameter of extraction can be used for various applications
(822).Include changing programming data according to the parameter of extraction to compensate pixel change using the example of these parameters
(824).Another example is to carry out preaging (826) to the panel of pixel.Another example is to assess the face of the pixel after manufacturing
The process yields (828) of plate.
Fig. 9 is the block diagram and flow chart of the component of data extraction system, and the data extraction system includes image element circuit
900th, switch enclosure 902 and can be charge pump/integrator reading circuit 904.The constituent components (910) of image element circuit 900
The storage device such as the drive device such as light-emitting device, driving transistor, capacitor and such as such as including OLED
The accesses such as selecting switch switch.The constituent components 912 of switch enclosure 902 include the one group of electronic cutting that can be controlled by external control signal
Close.The constituent components 914 of reading circuit 904 include amplifier, capacitor and reset switch.
The parameter of concern can be stored as shown in frame 920.The parameter paid close attention in this example may include driving transistor
The conducting voltage of threshold voltage, the mobility of driving transistor and OLED.The function frame 922 of switch enclosure 902 represents.It is described
Function include manipulating electric current inside and outside image element circuit 900, provide positioned at image element circuit 900 and reading circuit 904 charge pump it
Between discharge path and the charge pump of reading circuit 904 is isolated with image element circuit 900.The function frame of reading circuit 904
924 represent.One function is included as in step 800 in fig. 8 to 804, in the case of being integrated in pixel, in the future
Transmitted from the electric charge of the internal capacitance of image element circuit 900 to the capacitor of reading circuit 904, it is proportional to the electric charge to produce
Voltage.Another function is included as in step 810 in fig. 8 to 814, sometime interior to image element circuit 900
Driving transistor or OLED electric current integrated, to produce the voltage with the current in proportion.
Figure 10 is the threshold voltage of driving transistor 520 and carrying for mobility in the revision for the circuit for being related to Fig. 5
The timing diagram of the signal taken, in the revision, the grid of output transistor 534 be connected to single control signal wire RD and
It is not SEL lines.Readout in Figure 10 has pre-charging stage 1001, integration phase 1002 and read the stage 1003.Pre-
During charging stage 1001, by making SEL signals and RD signals are high to make at the grid of driving transistor 520 and source electrode
VAAnd VBIt is reset to initial voltage.
During integration phase 1002, signal RD step-downs, grid voltage VAIt is maintained at Vinit, and source electrode (node 544) place
Voltage VBRecharged to the voltage of the function as TFT characteristics (it includes mobility and threshold voltage), for example, (Vinit–VT)。
If the long enough of integration phase 1002, voltage VBTo only be threshold voltage (VT) function.
During the stage of reading 1003, signal SEL is low, VADrop to (Vinit+Vb–VT) and VBDrop to Vb.Reading
In circuit 504, electric charge is from the total capacitance C at node 544TIt is transferred to integrated capacitor (Cint)552.Can be by using electricity
The analog-digital converter (Analog-to-Digital Convertor, ADC) of the output of lotus amplifier 550 exports to read
Voltage Vout.Alternately, comparator can be used in adjustment VinitWhile by output voltage compared with reference voltage,
Until the two voltages are changed into identical.The reference voltage can produce in the following way:Do not having in during a stage
There is any pixel to be sampled in the case of being connected to circuit to circuit, and pixel charge is taken in another stage
Sample.
Figure 11 is the input signal of the extraction of the conducting voltage of the OLED 522 in the revision for Fig. 5 circuit
Timing diagram.
Figure 12 is for reading the circuit diagram of the image element circuit of pixel status by externally initializing node.Driving is brilliant
Body pipe T1 has drain electrode be connected with supply voltage Vdd, with the OLED D1 source electrodes being connected and via switching transistor T2 and
The grid of Vdata lines connection.Transistor T2 grid is connected to write line WR.Storage Cs is connected to node A, and (it is located at
Between driving transistor T1 grid and transistor T2) and node B (it is located between driving transistor T1 source electrode and OLED)
Between.Transistor T3 is read node B is connected into monitoring line and controlled by the signal on read line RD.
Figure 13 be a diagram that the timing diagram of the operation of Figure 12 circuit for externally initializing node.The P1 phases in the first stage
Between, driving transistor T1 is programmed using blanking voltage V0, and via monitoring line OLED voltage externally set to
Vrst.During second stage P2, reading signal RD ends transistor T3, and therefore OLED voltage is put by OLED D1
Electricity, until OLED ends (generating OLED conducting voltages threshold value).During phase III P3, via monitoring line cutting OLED
Only voltage is transmitted to outside reading circuit (for example, using charge amplifier).
Figure 14 be a diagram that by externally initializing node the flow chart that is read out to pixel status.In the first step
In rapid, internal node is resetted so that at least one pixel components conducting.It is steady that second step provides inner/outer node
The fixed time to expectation state (for example, cut-off state).Third step reads the cut-off state value of internal node.
Figure 15 be a diagram that the timing diagram of the improved operation of Figure 12 (being still used to internally initialize node) circuit.
During first stage P1, driving transistor T1 is programmed using conducting voltage V1.OLED voltage is risen to than its electric conduction
Press the higher voltage of threshold value.During second stage P2, driving transistor T1 is programmed using blanking voltage V0, and therefore
OLED voltage is discharged by OLED D1, until OLED ends (so as to generate OLED conducting voltages threshold value).In the phase III
During P3, by OLED conducting voltages threshold packet transmission to outside reading circuit (for example, using charge amplifier).
Figure 16 be a diagram that by internally initializing node the flow chart that is read out to pixel status.First step
Make the pixel conducting for being selected for measurement so that inner/outer node is stable to conducting state.Second step makes the picture of selection
Element cut-off so that inner/outer node is stable to cut-off state.Third step reads the cut-off state value of internal node.
Figure 17 be a diagram that the circuit diagram of the image element circuit shown in two Figure 12, and the two circuits are via their own reading
Transistor T3 is taken to be connected to common monitoring line, and Figure 18 be a diagram that the group for reading pixel charge using the monitoring line shared
Close the timing diagram of the operation of circuit.In the first stage during P1, pixel is programmed using blanking voltage V0 and V03, and will
OLED voltage is reset to VB0.During second stage P2, signal RD cut-offs are read, and when other signals are in cut-off state,
The pixel to be measured is programmed using conducting voltage V1.Therefore, it is in the other pixels being connected with monitoring line and resets shape
During state, the OLED voltage for being selected for the pixel of measurement is higher than its on state threshold voltage.During phase III P3, also by
The pixel after being programmed using conducting voltage is programmed to keep it turned off using blanking voltage V02.In this stage, select
The OLED voltage for the pixel selected is discharged to its on state threshold voltage.During fourth stage P4, retaking of a year or grade OLED voltage.
Figure 19 be a diagram that the flow chart of the reading with the pixel status for sharing monitoring line.First step makes all pixels
End and make inner/outer node reset.Second step makes the pixel conducting for being selected for measurement so that inner/outer section
Point is set to conducting state.Third step ends the pixel of selection, so that inner/outer node is stable to cut-off state.
Four steps reads the cut-off state value of internal node.
Figure 20 A illustrate such image element circuit:Wherein, line Vdata (program voltage) is via switching transistor T2 connections
To node A, and line Monitor/Vref (Vref is reference voltage) is connected to node B via transistor T3 is read.Node A connections
To driving transistor T1 grid and be connected to storage Cs side.Figure 20 B are Figure 20 A benefit of the use based on electric charge
The timing diagram of the operation for the circuit repaid.Node B be connected to driving transistor T1 source electrode, storage Cs opposite side and open
Transistor T4 drain electrode is closed, the switching transistor T4 is connected between the source electrode of driving transistor and power voltage source Vdd.This
Operation in the case of kind is as follows:
1. during programming cycle, the program voltage V for being supplied to node A from line Vdata via transistor T2 is usedPTo picture
Element is programmed, and node B is connected to the reference voltage Vref supplied via transistor T3 from line Monitor/Vref.
2. during discharge cycle, reading signal RD ends transistor T3, and therefore the voltage at node B is adjusted to
Partially compensate for driving transistor T1 change (for example, aging).
3. during the driving stage, write signal WR make transistor T2 end, and one section delay (it can be zero) it
Afterwards, signal EM turns on transistor T4, and supply voltage Vdd is connected into driving transistor T1.Therefore, driving transistor T1
Electric current is by being stored in capacitor CSIn voltage control and identical electric current flow to OLED.
In another construction, reference voltage Vref is provided to node A via switching transistor T2 from line Vdata, and saves
Point B is supplied with the program voltage Vp supplied via transistor T3 is read from Monitor/Vdata lines.In this case operation
It is as follows:
1. during programming cycle, node A is charged to the reference voltage supplied via transistor T2 from line Vdata
Vref, and the program voltage Vp supplied via transistor T3 is read from line Monitor/Vref is supplied to node B.
2. during discharge cycle, reading signal RD ends transistor T3, and therefore the voltage at node B is adjusted to
Partially compensate for driving transistor T1 change (or aging).
3. during the driving stage, write signal WR ends transistor T2, and one section of delay (it can be zero) it
Afterwards, signal EM turns on transistor T4, and supply voltage Vdd is connected into driving transistor T1.Therefore, driving transistor T1
Electric current is by being stored in capacitor CSIn voltage control and identical electric current flow to OLED.
Figure 21 is the behaviour for being used for producing the circuit of the reading of driving transistor T1 electric current and/or voltage for Figure 20 A
The timing diagram of work.It can use or pixel is programmed without using during electric discharge.If there is during electric discharge, then it can be
Make capacitor CSThe short time partly discharged, or it can be with long enough so that capacitor CSElectric discharge is until driving transistor T1
Cut-off.In the case of short discharge time, driving transistor can be read by applying fixed voltage during readout time
T1 electric current, or can by via read transistor T3 from line Monitor/Vref apply fixed current come read by as
Voltage caused by the driving transistor T1 of amplifier., can be with retaking of a year or grade due to electric discharge and in node B in the case of long discharge time
Voltage caused by place.This voltage represents driving transistor T1 threshold voltage.
Figure 22 is the timing diagram for being used for producing the operation of the circuit of the reading of OLED voltage for Figure 20 A.In Figure 22 institutes
In the case of description, image element circuit is programmed so that driving transistor T1 is used as and (has high break-over voltage) switch, and
OLED curtage is measured by transistor T1 and T3.In another case, at by concept transfer A and node B
Voltage measures multiple current/voltage points, and can be from the voltage of the formulas Extraction OLED between these electric currents and voltage.Example
Such as, if driving transistor T1 is operated in linear zone, OLED voltage more influences driving transistor T1 electric current;Cause
This, by having current point in the driving transistor T range of linearity and operated in saturation area, can by transistor T1 voltage-
Current relationship extracts OLED voltage.
If two or more pixels share identical monitoring line, it is used for by the way that blanking voltage is applied to not selected
OLED measurement pixel driving transistor T1 come make these pixels end.
Figure 23 be for Figure 20 A generation OLED voltage reading circuit improvement operation timing diagram, the improvement
Operation is as follows:
1. during reseting stage, OLED is charged using conducting voltage.
2. during discharge regime, signal Vdata ends driving transistor T1, and therefore OLED voltage is passed through OLED
It is discharged to blanking voltage.
3. during the reading stage, pass through driving transistor T1 and reading transistor T3 retakings of a year or grade OLED blanking voltage.
Figure 24 is illustrated for the circuit from the image element circuit extraction parasitic capacitance using external compensation.Show for OLED
Show in most of external compensation systems of device, the internal node of pixel is different during measuring with drive cycle.Therefore, post
The influence of raw electric capacity will not be extracted correctly.
It is the step of being used to compensate parasitic parameter below:
1. using under one group of voltage/current (outside voltage/current or the voltage/current of inside) measurement first state
Pixel.
2. use different one group of voltage/current (outside voltage/current or the voltage/current of inside) second shapes of measurement
Pixel under state.
3. based on the pixel model including parasitic parameter, the parasitic parameter of measurement extraction twice is (if the model needs in the past
Measure more times, then the voltage/current repeat step 2 for different groups).
Another technology is experimentally to extract parasitic effects.For example, two groups of measurements can be subtracted, and pass through gain
Difference is added into other measurements.The gain can be extracted experimentally.For example, the difference after bi-directional scaling can be increased
The measurement group extremely made for the panel of specific gray scale.Experimentally the comparative example factor it can be adjusted, until panel
On image it is up to specification.After this, this scale factor can be used as the preset parameter for all other panel.
An externally measured method for parasitic parameter is that electric current is read.In the case, it is extraction parasitic parameter, can be with
Change the external voltage set by measuring circuit for two groups of measurements.Figure 24 is shown with the reading for being used to measure pixel current
The pixel of line.The voltage of sense line is by measuring unit bias voltage (VB) control.
Figure 25 illustrates the image element circuit available for current measurement.Use the program voltage V after calibrationcalPixel is carried out
Programming, and monitoring line is set as Vref.Then, transistor T3 conductings are made to measure driving transistor by using control signal RD
T1 electric current.During drive cycle, the voltage at node B is in Voled, and the voltage at node A is from VcalIt is changed into Vcal+
(Voled-Vref)CS/(CP+CS), here, VcalBe calibration after program voltage, CPIt is total parasitic capacitance at node A, and VrefIt is
Monitoring voltage during programming.The grid-source voltage V of driving transistorGSDuring programming cycle and during drive cycle
It is different, it is respectively (VP-Vref) and [(VP-Vref)CS/(CP+CS)-VoledCP/(CP+CS)].Therefore, program and measure the phase
Between electric current due to by influence compensation parasitic capacitance and it is different from driving current, especially if deposited in driving transistor T1
If significant mobility change.
In order to extract measurement during parasitic effects, during measurement monitoring line at can have with the programming cycle phase
Between voltage (Vref) different voltage VB.Therefore, the grid-source voltage V during measurementGSTo be [(VP-Vref)CS/(CP+
CS)-VBCP/(CP+CS)].Two different V can be usedB(VB1And VB2) extract parasitic capacitance CPValue.In a kind of situation
Under, voltage VPIdentical and electric current for two kinds of situations is by difference.Pixel current formula can be used and from the difference of two electric currents
Extract parasitic capacitance CP.In another case, a V can be adjustedPTo obtain and the electric current identical electricity in other situations
Stream.In this case, the difference will be (VB1-VB2)CP/(CP+CS).Therefore, because known to all parameters, it is possible to carry
Take CP。
Figure 26 illustrates the pixel with electric charge readability.Here, internal capacitor is charged and then will
Electric charge is transmitted to charge integrator, or electric current is integrated by electric charge reading circuit.In the feelings integrated to electric current
Under condition, method described above can be used in extracting parasitic capacitance.
When it is expected to read the electric charge being integrated in capacitor internally, in addition to voltage is directly adjusted, can also make
Parasitic capacitance is extracted with two different times of integration.For example, in the image element circuit shown in Figure 25, OLED electricity can be used
Appearance is internally integrated to pixel current, and the pixel electricity then can be externally transmitted using charge-pump amplifier
Stream.In order to extract parasitic parameter, voltage can be changed using method described above.However, due to the essence of charge integration,
When being integrated in OLED electric capacity to electric current, two different times of integration can be used.
Increase with node B voltage, influence of the parasitic parameter to pixel current becomes big.Therefore, when there is longer integration
Between measurement cause bigger voltage at node B, and thus more influenceed by parasitic parameter.Charge value and pixel can be used public
Formula extracts parasitic parameter.Another method is to ensure the AVHRR NDVI electric charge with the time of integration by adjusting program voltage
It is identical for two kinds of situations.Then, it is as discussed above, parasitic capacitance can be extracted using the difference between two voltages.
To being compensated in the pixel based on electric charge of intelligent pixel
In fig. 26, the signal of each pixel and bias voltage line can be shared or replaced by other signals and realize identical
Function.Figure 26 image element circuit is only exemplary.Moreover, it can easily change the position of load (for example, light emitting diode)
Put.Furthermore it is possible to each TFT is changed into by n-type TFT based on complementary circuit concept.As the image element circuit shown in Figure 26
Image element circuit uses in the following way to be compensated in the pixel based on electric charge:Electric charge is generated at the internal node of image element circuit
(it is generally stored inside storage capacitance CSIn) and make in the electric charge it is at least some can be removed or T1 can be used as and/or
OLED function electric discharge, to allow to produce the parameter of the threshold voltage such as T1 inside image element circuit.
In fig. 26, during programming, offset voltage is produced at node D, bias voltage is applied to node B and C simultaneously
And program voltage is applied to node C.
, can be using the charging method illustrated by timing diagram as shown in Figure 26 or as by this in order to form compensation circuit
The illustrated ground of the earlier application of application claims priority applies bias current by monitoring line like that.
Switching transistor Tb2 addition eliminate it is undesirable luminous during programming/compensation cycle because it makes electric current
It is diverted through Vb2.
This circuit also allows to read pixel or OLED current/voltage as is described elsewhere herein.
This pixel can also read TFT or OLED current, voltage or electric charge by Tm.
Read for TFT, predefined parameter (or the voltage calculated) can be used to be programmed pixel, then make Tm
Conducting.Here, because Tm is turned on, so the voltage of monitoring line is smaller than OLED voltage.This will ensure that OLED ends.At this moment,
Pixel current can be read.Another method:WR and RD conductings and EM cut-offs, and curtage is applied to monitoring line and returned
Read current or voltage.Moreover, apply to monitoring line curtage can be include zero any value.
In order to read OLED (curtage), pixel can be programmed so that driving TFT be used as switch (for example,
Vb1 can be adjusted, so that Td is changed into switch).It is then possible to read OLED current or voltage by monitoring line.
For being read to OLED current or the another of voltage, EM signals can end, thus without electric current by Td, and because
This can read OLED current or voltage.
For being read to OLED current or the another of voltage, V can be changed into during programming cycle with node DOLED's
Mode selects Vb1.Then, can be with influence of the retaking of a year or grade OLED voltage to TFT after TFT programmings.
In figure 27, for example, EM signals are divided into two signals.This allows to reset node D using Tb, with based on such as
Charge/discharge function pair voltage generation described by waveform in Figure 27 compensates.As can be seen that EM ' can be next line
EM signals.
This pixel can also read TFT or OLED current, voltage or electric charge by Tm.
Read for TFT, predefined parameter (or the voltage calculated) can be used to be programmed pixel, then make Tm
Conducting.Here, because Tm is turned on, so the voltage of monitoring line is smaller than OLED voltage.This will ensure that OLED ends.At this moment,
Pixel current can be read.Another method:WR and RD conductings and EM cut-offs, and curtage is applied to monitoring line and returned
Read current or voltage.Moreover, apply to monitoring line curtage can be include zero any value.
To read OLED current or voltage, pixel can be programmed so that driving TFT is used as switch (for example, can be with
Vb1 is adjusted, so that Td is changed into switch).It is then possible to read OLED current or voltage by monitoring line.
For being read to OLED current or the another of voltage, EM ' signals can end, thus without electric current by Td, and
Therefore OLED current or voltage can be read.
For being read to OLED current or the another of voltage, V can be changed into during programming cycle by node DOLED
Mode select Vb1.Then, can be with influence of the retaking of a year or grade OLED voltage to TFT after TFT programmings.
In Figure 28, for example, EM signals are divided into two signals.This allows to reset node D using Tb, with based on such as
Charge/discharge function pair voltage generation described by waveform in Figure 28 compensates.Moreover, Tm and Tb2 are shared.
As can be seen that EM ' can be the EM signals of next line.
This image element circuit 104 also allows TFT or OLED current, voltage or electric charge are read or extracted by Tm.
Read for driving TFT curtages, predefined parameter (or the voltage calculated) can be used to enter pixel
Row programming, then turns on Tm.In this example, because Tem is turned on, so the voltage of monitoring line is smaller than OLED voltage.This
It will ensure that OLED ends.At this moment, pixel current can be read.Alternately, WR and RD conductings and EM ends, and by electric current or
Voltage applies to monitoring line and retaking of a year or grade curtage.Moreover, the curtage for applying extremely monitoring line can include zero
Any value.
To read OLED (current/voltage/electric charge), pixel can be programmed so that TFT provides zero current.Then,
OLED current or voltage can be read by monitoring line.
For being read to OLED current or the another of voltage, EM ' signals can end, thus without electric current by Td, and
Therefore OLED current or voltage can be read.
For being read to OLED current or the another of voltage, V can be changed into during programming cycle by node DOLED
Mode select Vb1.Then, can be with influence of the retaking of a year or grade OLED voltage to TFT after TFT programmings.
For the circuit shown in Figure 29, during programming, while EM ends, answer node B by Tm and monitoring line
Position and node C is charged to Vdata.During compensation cycle (cycle 4), node B is charged into work using driving TFT (Td)
For the offset voltage of the function of Td characteristics.During the drive cycle (6), EM conductings, and therefore Td grid by being stored in CSIn
Program voltage and offset voltage limit.
This pixel can also read TFT or OLED current, voltage or electric charge by Tm.
Reading for driving TFT curtages, predefined parameter (or the voltage calculated) can be used to pixel
It is programmed, then turns on Tm.Here, because Tem is turned on, so the voltage of monitoring line is smaller than OLED voltage.This will be true
Protect OLED cut-offs.At this moment, pixel current can be read.Alternately, WR and RD conductings and EM ends, and by electric current or electricity
Pressure applies to monitoring line and retaking of a year or grade curtage.In addition, the curtage for applying extremely monitoring line can include zero
Any value.
To read OLED current or voltage, pixel can be programmed so that TFT provides zero current.Then, EM is turned on
And OLED current or voltage can be read by monitoring line.
Programming and driving
In a construction of the compensation pixel circuit based on electric charge shown in Figure 30, the line being connected with T2 is data voltage
And the line being connected with T3 is Monitor/Vref voltages.Operation in this example can carry out as follows:
During the period 1, pixel is programmed using program voltage (VP), and node B is connected to reference to electricity
Pressure.
During second round, the cut-off of RD signals, and therefore partly adjust the voltage at node B with T1 is changed (or
Aging) compensate.
During the phase III, the cut-off of WR signals, and after one section of delay (it can be zero), EM conductings.Therefore, T1
Electric current be stored in CSIn voltage control and identical current direction OLED.
In another construction, the line being connected with T2 is reference voltage (Vref) and the line that is connected with T3 is Monitor/
Vdata lines.
During the period 1, node A is charged into reference voltage, and node B is connected to program voltage (VP).
During second round, the cut-off of RD signals, and therefore partly adjust the voltage at node B with T1 is changed (or
Aging) compensate.
During the phase III, the cut-off of WR signals, and after one section of delay (it can be zero), EM conductings.Therefore, T1
Electric current be stored in CSIn voltage control and identical current direction OLED.
TFT is driven to read
Reading for the curtage of the driving T1 shown in Figure 31, pixel is entered (using or without using the electric discharge period)
Row programming.If there is the electric discharge period, then it can make capacitor CSThe relatively short time partly discharged, or it can
Make capacitor C to grow toSElectric discharge is until driving T1 cut-offs., can be by phase readout time in the case of short discharge time
Between apply fixed reference voltage to read driving T1 electric current, or can be by applying fixed electric current via T3 to read
The voltage as caused by the driving T1 as amplifier.In the case of long discharge time, can with retaking of a year or grade by caused by electric discharge
Voltage caused by node B.This voltage will represent T1 threshold voltage.
Moreover, in whole process, WR signals can be held on.
OLED is read
In the image element circuit shown in Figure 32, T1 is programmed to serve as and (there is high break-over voltage) switch.
Furthermore, it is possible to by T3 and T1 come the curtage that measures or extract OLED.
In another example, several current/voltage points are measured by the voltage at concept transfer A and node B1, and
Can be from the voltage of the formulas Extraction OLED between these electric currents and voltage.For example, if T1 were in its linear zone, OLED
Voltage can more influence T1 electric current;Therefore, by having current point, Ke Yicong in T linear and operated in saturation area
T1 voltage-current relation extraction OLED voltage.
If several pixels share identical monitoring line, not selected use will be made by the way that blanking voltage is applied to T1
In the pixel cut-off of OLED measurements.
In the image element circuit shown in Figure 33, the reading of OLED curtage can be carried out as follows:
During reseting stage, OLED is charged using conducting voltage.
T1 cut-offs are driven, and therefore OLED voltage is discharged to blanking voltage by OLED.
Pass through T1 retaking of a year or grade blanking voltages.
In foregoing image element circuit, can using RD or WR inverse signal as EM signals (so EM signals can correspond to/
RD or/WR).In this case, it is possible to invert signal and be passed to pixel, or can be produced using complementary type TFT
Raw inverse function.If for example, PMOS switch is used for into RD TFT, nmos switch can be used for EM TFT.
Furthermore, it is possible to replaced using the reverse signal of next RD or WR signals (or previous RD signals) as current line
EM signals.Similarly, RD and WR inverse function can be realized outside image element circuit and is passed to image element circuit, Huo Zheke
To be combined using complementary type TFT.
Figure 34 illustrates the another method that luminous EM functions are realized in the image element circuit 104 based on electric charge.Here it is possible to
Luminous EM signals are produced using control signal RD and WR reversion.Therefore, if either of which person turns on, pixel electricity
Road will disconnect with power vd D.Similarly, RD and WR inverse function (/RD and/WR) can be realized outside image element circuit 104 simultaneously
Image element circuit is passed to, or can be combined using complementary type TFT.Although NMOS TFT can be used for T4 and T5, push away
Recommend (but not necessarily) PMOS is used for these TFT and NMOS is used for WR and RD (for example, S2 and S3).
Image element circuit 104 in Figure 34 includes the driving transistor T1 being connected with light-emitting device (OLED) and with driving crystalline substance
Body pipe T1 connections and the storage device (C for storing programming informationS), so that OLED lights according to the programming information via T1.CS
Can (rather than must) be directly connected between T1 grid and the first terminal (source electrode or drain electrode, this depend on T1 be NMOS also
It is PMOS).T1 Second terminal (the other of source electrode or drain electrode) can be connected to OLED.
Figure 34 image element circuit 104 includes first switch S2, and the first switch S2 is connected to T1, and (it can with First Line
Transmission programming information Vdata or reference voltage Vref) between so that T1 is connected into First Line according to the first signal (for example, WR).
Image element circuit 104 is connected between T1 and the second line with according to secondary signal (example including second switch S3, the second switch S3
Such as, RD) the second line (it at least has two functions) is connected to T1.Second line can be used as monitoring line, electric from pixel with monitoring
The curtage that the one or more assemblies on road are read.Second line can be additionally used in reference voltage Vref or programming information
Vdata is provided to the internal node B of image element circuit.
Figure 34 image element circuit 104 includes the 3rd switch (S4) and the 4th being connected in the line between T1 and power supply Vdd
Switch (S5).3rd switch (S4) and the 4th switch (S5) and their own control signal have first switch S2 and second
Switch S3 and the inverse function of their own control signal.This means S2 and S3 can be n-type transistor, and S4 and S5 are
P-type transistor.Or S2 and S3 can be p-type transistor, and S4 and S5 are n-type transistors.Or S2 to S5 can be phase
The transistor of same type (n-type or p-type), but S4 and S5 is controlled by the signal of the reversion of the signal as control S2 or S3.Example
Such as, S4 can be controlled by/WR or/RD controls and S5 by/RD or/WR, and S2 is controlled by WR and S3 is controlled by RD.Or can be with
Two switch S4 and S5 are replaced using the single switch of the control signal with its own.In other words, the inverse function is phase
Opposite state.For example, when the first and second switch conductions or controlled by respective control signal and when turning on, then the third and fourth switch
Cut-off is controlled and ended by respective control signal.
In this example, it is only necessary to minimum two control signals RD and WR (and can directly be exported from RD and WR respectively
Their inverse signal), to realize in pixel compensation and outside by reading image element circuit curtage via the second line
Compensation.When first switch S2 is closed, First Line can provide program voltage (Vdata) or reference voltage (Vref) to storage
Device CS。
For the skew of internally compensating parameter (similar T1 threshold voltage), the S2 that First Line passes through closure (WR is effective)
Apply Vref, the node B of inside is charged into Vref.Make CSIn storage electric charge electric discharge the period in discharge, until electric charge
Represent at least T1 threshold voltage.Make WR invalid, now, CS(it is T1 to the function for being changed into Vdata-Vdischarge at both ends
With OLED function).
In order to from the component of image element circuit (for example, T1 or OLED, or both) read current or voltage, make RD effectively with
S3 is closed, this allows to read curtage (monitoring function) from the second line.During programming cycle, when S3 is closed, the
Two wires can also be used to provide Vdata to S3.In this way, it is possible to by using the second line drawing circuit parameter and by circuit
Parameter is stored to being compensated come the change outside image element circuit to image element circuit or aging outside image element circuit.The circuit
Parameter can be at least T1 or at least OLED or at least T1 and OLED curtage.
Pay attention to, can be from First Line or the second line (but not being simultaneously) supply reference voltage in Figure 34 image element circuit
Vref.The electric charge associated with the Vref of supply is maintained at CSIn.Likewise it is possible to (but it is not from First Line or the second line
Program voltage Vdata is supplied simultaneously), and Vdata is at least initially kept at CSIn.OLED is according in the Vdata at least stored
A part and light.It can increase from program voltage or subtract internal or external compensation.This flexibility allows in pel array
Multiple row between share one line or two lines.Control signal RD and WR can be also total between multiple rows of image element circuit
With.
Figure 34 further relates to extract circuit parameter from image element circuit and difference for image element circuit or aging are provided in pixel and mended
The method repaid.Methods described includes:By the way that reference voltage (Vref) is applied into image element circuit from First Line or the second line
Storage device (CS) with based on reference voltage (Vref) to storage device (CS) charged, cause in image element circuit
Drive device (T1) or light-emitting device (OLED) or the difference of both or aging compensated in self-compensating pixel.The side
Method includes:Allow to join from First Line or the second line reading circuit by closing the switch in the image element circuit (S2 or S3)
Number (for example, flowing through T1, OLED or T1 and OLED curtage), is carried using the circuit outside image element circuit from image element circuit
Sense circuit parameter.Methods described includes:Next, the programming information compensated using the circuit parameter for having been based at least extracting
(for example, derive from Vdata) drives image element circuit.When image element circuit and First Line and the second line are disconnected and even
When two switches (S4 and S5) being connected in the line between drive device (T1) and power supply (VDD) are all closed, driving week is performed
Phase.
The common switch between multiple row and/or multiple rows
Figure 35 shows the image element circuit of prior art.In operation, during programming, EM cut-offs and WR conductings.
Pixel is applied a current to by Iref and applies program voltage (VP) to Vdata.At node A and node B
Produce the bias voltage (VB) of the function as Iref and T1 characteristics.CSIn storage voltage be VP-VB.
During driving/light period:Luminous circulation EM conductings and write signal WR cut-offs.Node C is from program voltage VP
It is changed into supply voltage VDD.Node A is booted (boot-strap) by capacitor CS and moved with identical value (VDD-VP)
It is dynamic.Therefore, the voltage at node A will be VB+VDD-VP.During this cycle, the electric current proportional to the VP using VB compensation
Driving transistor T1 and OLED will be flowed through.
Now the operation to the image element circuit shown in Figure 36 illustrates.Switch can be shared between each row and each row.
Tc and Td can be shared by each row.Ta and Tb can be shared by row and column.
If only row occur to share, SEM and SWR can be identical with EM and WR.
If row also occurs to share, SEM and SWR are used as overall signal.
Pair with during the programming of identical SEM and the SWR row being connected, SEM cut-off and SWR turn on.In the drive of these rows
During dynamic/luminous, SEM conductings and SWR cut-offs.
Shared condition in Figure 37 is identical with the image element circuit in Figure 36, but programming cycle is different.In programming cycle,
SEM/EM ends and SWR/WR is turned on.When starting, node B and A are reset to Vref by RD conductings.Hereafter, RD ends, and uses
T1 charges to node B and A.Charge volume is the function of T1 parameters.Therefore, at node A develop voltage be T1 function simultaneously
Heterogeneity/aging to it during driving/light period is compensated.
The operation of image element circuit in Figure 36 and shared principle are identical with Figure 37.
Figure 38 shows the 3 transistor pixels circuits that the compensation based on electric charge can be used.Vdata includes program voltage, and
Vref provides reference voltage via T3.Control signal RD and WR control T3 and T2 respectively for each image element circuit, and SEM and
SWR control signals are global.SWR is shared between each row, and SEM can be shared between each row/each row.
Figure 39 A to Figure 49 B show the change (for example, aging and processing heterogeneity) for the parameter to image element circuit
The various image element circuits and corresponding timing diagram compensated.It will be appreciated by one of skill in the art that how to connect shown in the drawings each
Kind component.The mark used is consistent with the mark that text of the statement uses.T1 is typically to be used for according to being stored in capacitor CS
In electric charge match electric current driving OLED driving transistor.This electric charge can with or can not be to the threshold value as driving transistor T1
The skew of voltage is such to be influenceed to carry out self compensation.Other transistors are marked as T2, T3 and T4 etc..Control signal is labeled,
Wherein RD=is read, and WR=writes and EM=lights.EM signals control whether to make OLED conductings be lighted.Vdd is power supply
Voltage.Vdata be transmit corresponding to voltage form programming information signal wire, the programming information can with or can not be externally
The change of one or more parameters of compensation pixel circuit.The line for being marked as Monitor be used for from image element circuit (for example,
From both T1, OLED or T1 and OLED) read or extraction curtage signal wire.Extraction is used outside from image element circuit
The change that comes to the parameter including the skew of T1 or OLED or the threshold voltage of both of the curtage it is (all
Such as aging) compensate.In timing diagram, " programming " refers to that programming information is applied to Vdata (in the form of voltage or current)
Line is simultaneously stored in CSIn programming cycle." electric discharge " is to instigate to be stored in CSIn electric discharge phase for discharging at least in part of electric charge
Between.During discharging herein, CSFinal voltage generally settled out at the value of threshold voltage for representing T1, and be used to pin
Skew to T1 threshold voltage and internally self compensation is carried out to the program voltage of application.Finally, " drive scheme " refers to
OLED is connected to supply voltage VDD and electric current is according to being stored in CSIn residual charge flow to the luminous of OLED." programming/benefit
Repay " refer to the mixing cycle that programming and internal or external compensation can occur.It is preferred that but not necessarily, first carry out internal
Compensation, then carries out external compensation.However, each aspect of the present invention is not limited to any particular order --- external compensation can be prior to
Internal compensation.RESET operation is to instigate image element circuit (for example, being stored in CSIn electric charge) reset." reading " operation refers to lead to
Cross and read or extract curtage from image element circuit (for example, both T1, OLED or T1 and OLED) using monitoring line.
It is described herein and show many different embodiments for being not only used for internal compensation and being used for external compensation again.Ying Qing
Understand to Chu, any combinations of any image element circuit and any timing diagram can be used herein.It is described herein any
Image element circuit can be worked with any other sequential shown in any other accompanying drawing and operation cycle, and any sequential and operation
Cycle can be used or modified to be operated together with any image element circuit described herein.Because those skilled in the art can
Any appropriate voltage level or sequential duration is selected to realize any specific embodiment, so all voltage levels,
Formula and sequential duration are only exemplary and be not restricted.
Although the particular embodiment of the present invention and application are illustrated and have illustrated, but it is to be understood that the present invention is unlimited
In accurate construction and composition described herein, and without departing from this hair such as limited in appended claims of the invention
In the case of bright spirit and scope, various modifications, change and change of the invention are obvious from explanation above.
Claims (15)
1. a kind of change or aging from image element circuit extraction circuit parameter and to the image element circuit provides what is compensated in pixel
Method, the image element circuit include light-emitting device, for programmable drive current to be provided to the driving dress of the light-emitting device
Put, programming input and the storage device for storing programming signal, methods described include:
By applying the storage device into image element circuit from First Line or the second line by reference voltage to refer to electricity based on described
Pressure the storage device is charged, with to the drive device in the image element circuit or the light-emitting device or this two
The change or aging of person carries out self compensation, thus causes to compensate in the pixel of the image element circuit;
By closing the first switch in the image element circuit using the circuit outside the image element circuit from the image element circuit
The circuit parameter is extracted, to allow to outside the image element circuit from the First Line or from described in second line reading
Circuit parameter;And
Then, the programming information after being compensated by using the circuit parameter at least based on extraction is described to drive
Image element circuit, wherein, it is when the image element circuit is disconnected with the First Line and second line and in place being connected
When second switch in line and the 3rd switch between the drive device and power supply are closed, the driving is performed so that institute
Light-emitting device is stated to be lighted according to the programming information compensated.
2. a kind of image element circuit with light-emitting device, it includes:
Driving transistor, it is connected to the light-emitting device;
Storage device, it is connected to the driving transistor and stores programming information, so that the light-emitting device is according to via institute
State the programming information of driving transistor and light;
First switch, it is connected between the driving transistor and First Line, with according to the first signal by the driving crystal
Pipe is connected to the First Line;
Second switch, it is connected between the driving transistor and the second line, to be connected second line according to secondary signal
The driving transistor is connected to, wherein, the First Line or second line close in the first switch and the second switch
Reference voltage is supplied to the storage device, and wherein when closing, applies the ginseng from the First Line or second line
Voltage is examined to carry out certainly with the change to the image element circuit or aging to charge to the storage device according to the reference voltage
Compensation;And
3rd switch and the 4th switch, it is connected in the line between the driving transistor and power supply, and the described 3rd opens
Close and the described 4th switch and their own control signal have the first switch and the second switch and they
The inverted signal function of respective control signal, wherein, by using the second line drawing circuit parameter and the circuit is joined
Number is stored to the image element circuit, and the change or aging for the image element circuit are outside the image element circuit to described
Image element circuit compensates.
3. image element circuit as claimed in claim 2, wherein, when the second switch is closed, second line is used to
Voltage or electric current are read from the image element circuit, or by reference voltage supplies to the image element circuit.
4. image element circuit as claimed in claim 2, wherein, when the second switch is closed, second line is used to
Voltage or electric current are read from the image element circuit, or program voltage is supplied to the image element circuit.
5. image element circuit as claimed in claim 2, wherein, the storage device is capacitor and is directly connected between the drive
Between the grid of dynamic transistor and the first terminal of the driving transistor.
6. image element circuit as claimed in claim 4, wherein, the Second terminal of the driving transistor is connected to the luminous dress
Put.
7. image element circuit as claimed in claim 2, wherein, by the way that the light-emitting device and the driving transistor are connected
The node being connected together charges to reference voltage and discharged via the driving transistor with the storage table in the storage device
Show the electric charge of the threshold voltage of the driving transistor, the image element circuit internally compensates the threshold of the driving transistor
The change of threshold voltage.
8. image element circuit as claimed in claim 7, wherein, the circuit parameter be at least described driving transistor electric current or
Voltage, the either curtage of at least described light-emitting device or at least described driving transistor and the light-emitting device
Curtage.
9. image element circuit as claimed in claim 2, wherein, the first switch and the second switch are disposed in the picture
In plain circuit so that supply reference voltage from the First Line or from second line rather than simultaneously from the First Line and
Second line supplies reference voltage, and the reference voltage is charged to the storage device so that it keeps and the reference
The electric charge that voltage matches.
10. image element circuit as claimed in claim 2, wherein, the first switch and the second switch are disposed in described
In image element circuit so that supply program voltage rather than simultaneously from the First Line from the First Line or from second line
Program voltage is supplied with second line, the program voltage is stored in the storage device so that the program voltage
In at least a portion be used to the described at least a portion for making the light-emitting device in the program voltage and light.
11. image element circuit as claimed in claim 2, wherein, the 3rd switch is by first signal control and described the
Four switches are controlled by the secondary signal, or, the 3rd switch is by the inverse signal control of first signal and described the
Four switches are controlled by the inverse signal of the secondary signal, or, the 3rd switch is controlled and described the by the secondary signal
Four switches are controlled by first signal, or, the 3rd switch is by the inverse signal control of the secondary signal and described the
Four switches are controlled by the inverse signal of first signal.
12. image element circuit as claimed in claim 2, wherein, the first switch and the second switch be n-type transistor and
3rd switch and the described 4th switch are p-type transistors, or, the first switch and the second switch are p-type crystalline substances
It is n-type transistor that body pipe and the 3rd switch switch with the described 4th so that when the first switch and the second switch
During conducting, the 3rd switch and the described 4th switch end, and when the first switch and the second switch end,
3rd switch and the 4th switch conduction.
13. image element circuit as claimed in claim 2, wherein, the first switch, the second switch, the 3rd switch
With the described 4th switch only by first signal and secondary signal control without other signals.
14. image element circuit as claimed in claim 13, wherein, make to be stored in the storage device by the driving transistor
In charge discharge so that the voltage at the storage device both ends is at least the function of the threshold voltage of the driving transistor.
15. image element circuit as claimed in claim 2, wherein, the inverted signal function is inverse state so that when described first
When switch and second switch conducting or controlled signal are controlled and turned on, the 3rd switch and the described 4th switch end
Or controlled and ended by the control signal.
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US61/975,479 | 2014-04-04 | ||
US14/447,323 | 2014-07-30 | ||
US14/447,323 US9530349B2 (en) | 2011-05-20 | 2014-07-30 | Charged-based compensation and parameter extraction in AMOLED displays |
PCT/IB2014/066655 WO2015083136A1 (en) | 2013-12-05 | 2014-12-05 | Charge-based compensation and parameter extraction in amoled displays |
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KR102617966B1 (en) * | 2016-12-28 | 2023-12-28 | 엘지디스플레이 주식회사 | Electroluminescent Display Device and Driving Method thereof |
CN109243367B (en) * | 2018-09-19 | 2020-10-09 | 昆山国显光电有限公司 | Threshold voltage detection circuit and detection method |
US11217649B2 (en) * | 2020-04-03 | 2022-01-04 | Star Technologies, Inc. | Method of testing and analyzing display panel |
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CN107967897B (en) | 2021-09-03 |
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